Ridge recognition pixel circuit, ridge detection circuit, display substrate and display device
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- BOE TECHNOLOGY GROUP CO LTD
- Filing Date
- 2020-09-11
- Publication Date
- 2026-06-26
Smart Images
Figure CN114255482B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of display technology, and in particular to a texture recognition pixel circuit, a texture detection method, a texture detection circuit, a display substrate, and a display device. Background Technology
[0002] With the development of technology, texture sensing technology (such as fingerprint sensing technology) is being used more and more widely in daily life.
[0003] Based on the imaging principle of fingerprints, fingerprint sensing technologies can be divided into optical fingerprint sensing technology, semiconductor capacitive fingerprint sensing technology, semiconductor thermal fingerprint sensing technology, semiconductor pressure-sensitive fingerprint sensing technology, and ultrasonic fingerprint sensing technology. Among them, optical fingerprint sensing technology mainly acquires the fingerprint pattern by using an image sensor to collect the reflected light signal (i.e., the light reflected from the finger) after it is illuminated by the fingerprint sensor. Summary of the Invention
[0004] The purpose of this disclosure is to provide a texture recognition pixel circuit, a texture detection method, a texture detection circuit, a display substrate, and a display device to improve the accuracy of texture recognition and avoid leakage in the texture recognition pixel circuit.
[0005] To achieve the above objectives, the present disclosure provides the following technical solutions:
[0006] A first aspect of this disclosure provides a texture recognition pixel circuit. The texture recognition pixel circuit includes: a photosensitive sub-circuit, a potential boosting sub-circuit, and a drive output sub-circuit. The photosensitive sub-circuit is electrically connected to a first voltage signal terminal and a readout node; the photosensitive sub-circuit is configured to sense an optical signal containing texture information, convert the optical signal into a first detection signal, and transmit it to the readout node. The potential boosting sub-circuit is electrically connected to a second voltage signal terminal and the readout node; the potential boosting sub-circuit is configured to raise the potential of the readout node under the action of a second voltage signal transmitted from the second voltage signal terminal. The drive output sub-circuit is electrically connected to a third voltage signal terminal, a fourth voltage signal terminal, and the readout node; the drive output sub-circuit is configured to generate a second detection signal and output the second detection signal under the control of the raised first detection signal and the fourth voltage signal transmitted from the fourth voltage signal terminal.
[0007] The texture recognition pixel circuit provided in some embodiments of this disclosure connects a potential boosting sub-circuit at the connection point (i.e., the readout node) between the photosensitive sub-circuit and the driving output sub-circuit. After the photosensitive sub-circuit senses an optical signal containing texture information and converts the optical signal into a first detection signal, the potential of the readout node is raised by the potential boosting sub-circuit (i.e., the static operating point value of the photosensitive sub-circuit is increased). This effectively increases the potential difference between the output terminals of the readout node and the driving output sub-circuit, thereby effectively increasing the difference between the second detection signal output by the driving output sub-circuit when the optical signal is ridge reflection light and the second detection signal output when the optical signal is valley reflection light. This helps to reduce the difficulty of identifying and analyzing the second detection signal and improve the accuracy of texture recognition.
[0008] Furthermore, by connecting a potential-raising sub-circuit at the readout node, the potential of the readout node can be kept at a low level even when the first detection signal is not being read. This effectively avoids leakage in the texture recognition pixel circuit.
[0009] In some embodiments, the potential-lifting sub-circuit includes a first transistor. The control electrode of the first transistor is electrically connected to the read node, and both the first and second electrodes of the first transistor are electrically connected to the second voltage signal terminal.
[0010] In some embodiments, the potential-lifting sub-circuit includes a first storage capacitor. A first plate of the first storage capacitor is electrically connected to the read node, and a second plate of the first storage capacitor is electrically connected to the second voltage signal terminal.
[0011] In some embodiments, the photosensitive sub-circuit includes a photodetector; a first terminal of the photodetector is electrically connected to the first voltage signal terminal, and a second terminal of the photodetector is electrically connected to the readout node. The drive output sub-circuit includes a second transistor and a third transistor; the control electrode of the second transistor is electrically connected to the readout node, the first electrode of the second transistor is electrically connected to the third voltage signal terminal, and the second electrode of the second transistor is electrically connected to the first electrode of the third transistor; the control electrode of the third transistor is electrically connected to the fourth voltage signal terminal, and the second electrode of the third transistor is configured to output the second detection signal.
[0012] In some embodiments, the second voltage signal terminal and the fourth voltage signal terminal are the same voltage signal terminal.
[0013] In some embodiments, the texture recognition pixel circuit further includes a reset sub-circuit. The reset sub-circuit is electrically connected to a fifth voltage signal terminal, a scan signal terminal, and the readout node; the reset sub-circuit is configured to, under the control of the scan signal transmitted at the scan signal terminal, transmit the fifth voltage signal transmitted at the fifth voltage signal terminal to the readout node to reset the readout node.
[0014] In some embodiments, the reset sub-circuit includes a fourth transistor. The control terminal of the fourth transistor is electrically connected to the scan signal terminal, the first terminal of the fourth transistor is electrically connected to the fifth voltage signal terminal, and the second terminal of the fourth transistor is electrically connected to the read node.
[0015] In some embodiments, the texture recognition pixel circuit further includes a second storage capacitor. A first plate of the second storage capacitor is electrically connected to a sixth voltage signal terminal, and a second plate of the second storage capacitor is electrically connected to the read node. The second storage capacitor is configured to store the first detection signal transmitted to the read node.
[0016] On the other hand, a texture detection method is provided. The texture detection method is applied to a texture recognition pixel circuit as described in any of the above embodiments. The texture detection method includes: a driving cycle comprising an exposure stage and an output stage. The exposure stage includes: a photosensitive sub-circuit in the texture recognition pixel circuit sensing a light signal containing texture information, converting the light signal into a first detection signal, and transmitting the first detection signal to a readout node. The output stage includes: a potential boosting sub-circuit in the texture recognition pixel circuit, under the action of a second voltage signal transmitted at a second voltage signal terminal, boosting the potential of the readout node; and a driving output sub-circuit in the texture recognition pixel circuit, under the control of the boosted first detection signal and a fourth voltage signal transmitted at a fourth voltage signal terminal, generating and outputting a second detection signal.
[0017] The beneficial effects that the texture detection method provided in this embodiment can achieve are the same as those that the texture recognition pixel circuit provided in the above technical solutions can achieve, and will not be repeated here.
[0018] In another aspect, a texture detection circuit is provided. The texture detection circuit includes: a plurality of texture recognition pixel circuits as described in any of the above embodiments, and a plurality of amplification sub-circuits. One amplification sub-circuit is electrically connected to a drive output sub-circuit of at least one texture recognition pixel circuit. The amplification sub-circuit is configured to amplify the second detection signal output by the texture recognition pixel circuit.
[0019] The beneficial effects that the texture detection circuit provided in this embodiment can achieve are the same as those that the texture recognition pixel circuit provided in the above technical solutions can achieve, and will not be repeated here.
[0020] In some embodiments, the amplification sub-circuit includes: a negative feedback amplification circuit, a third storage capacitor, and a switch. The non-inverting input terminal of the negative feedback amplification circuit is electrically connected to a seventh voltage signal terminal, the inverting input terminal of the negative feedback amplification circuit is electrically connected to the drive output sub-circuit, the first plate of the third storage capacitor, and the first terminal of the switch, and the output terminal of the negative feedback amplification circuit is electrically connected to the second plate of the third storage capacitor and the second terminal of the switch.
[0021] In some embodiments, the plurality of texture recognition pixel circuits are arranged in multiple columns, and each column of texture recognition pixel circuits includes at least one texture recognition pixel circuit. One of the amplification sub-circuits is electrically connected to each texture recognition pixel circuit in a column of texture recognition pixel circuits.
[0022] In another aspect, a display substrate is provided. The display substrate has a display area and a non-display area located adjacent to the display area. The display area includes a texture recognition area. The display substrate includes: a substrate; and a texture detection circuit as described in any of the above embodiments, disposed on one side of the substrate. A plurality of texture recognition pixel circuits in the texture detection circuit are located in the texture recognition area, and a plurality of amplification sub-circuits in the texture detection circuit are located in the non-display area.
[0023] The beneficial effects that the display substrate provided in this embodiment can achieve are the same as those that the texture recognition pixel circuit provided in the above technical solution can achieve, and will not be repeated here.
[0024] In another aspect, a display device is provided. The display device includes a display substrate as described in any of the above embodiments.
[0025] The beneficial effects that the display device provided in this embodiment can achieve are the same as the beneficial effects that the display substrate provided in the above technical solutions can achieve, and will not be repeated here.
[0026] In some embodiments, the display device further includes a texture recognition chip electrically connected to the display substrate, the texture recognition chip being electrically connected to a plurality of amplification sub-circuits of the texture detection circuit of the display substrate. The texture recognition chip is configured to receive an amplified second detection signal output from the plurality of amplification sub-circuits, and determine the texture to be recognized based on the amplified second detection signal. Attached Figure Description
[0027] To more clearly illustrate the technical solutions in this disclosure, the accompanying drawings used in some embodiments of this disclosure will be briefly described below. Obviously, the drawings described below are only drawings of some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams and are not intended to limit the actual size of the product, the actual process of the method, etc. involved in the embodiments of this disclosure.
[0028] Figure 1 This is a circuit diagram of a texture recognition pixel circuit according to some embodiments of the present disclosure;
[0029] Figure 2 This is a schematic diagram of the output characteristic curve of a transistor according to some embodiments of the present disclosure;
[0030] Figure 3 This is a circuit diagram of another texture recognition pixel circuit according to some embodiments of the present disclosure;
[0031] Figure 4 This is a circuit diagram of yet another texture recognition pixel circuit according to some embodiments of the present disclosure;
[0032] Figure 5 This is a circuit diagram of yet another texture recognition pixel circuit according to some embodiments of the present disclosure;
[0033] Figure 6 This is a circuit diagram of yet another texture recognition pixel circuit according to some embodiments of the present disclosure;
[0034] Figure 7 This is a flowchart of a texture detection method according to some embodiments of the present disclosure;
[0035] Figure 8 This is a structural diagram of a texture detection circuit according to some embodiments of the present disclosure;
[0036] Figure 9 This is a structural diagram of another texture detection circuit according to some embodiments of the present disclosure;
[0037] Figure 10 This is a structural diagram of a display substrate according to some embodiments of the present disclosure;
[0038] Figure 11 This is a structural diagram of a display device according to some embodiments of the present disclosure. Detailed Implementation
[0039] The technical solutions in some embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments provided in this disclosure are within the scope of protection of this disclosure.
[0040] Unless the context otherwise requires, throughout the specification and claims, the term "comprise" and its other forms, such as the third-person singular "comprises" and the present participle "comprising," are interpreted as open-ended and encompassing, meaning "including, but not limited to." In the description of the specification, terms such as "one embodiment," "some embodiments," "exemplary embodiments," "example," "specific example," or "some examples," etc., are intended to indicate that a particular feature, structure, material, or characteristic associated with that embodiment or example is included in at least one embodiment or example of this disclosure. The illustrative representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics mentioned may be included in any suitable manner in any one or more embodiments or examples.
[0041] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of this disclosure, unless otherwise stated, "a plurality of" means two or more.
[0042] In describing some embodiments, the term "connection" and its derivative expressions may be used. For example, the term "connection" may be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact with each other. The embodiments disclosed herein are not necessarily limited to the content of this document.
[0043] As used herein, depending on the context, the term “if” may optionally be interpreted as meaning “when”, “in the event of”, “in response to determination”, or “in response to detection”. Similarly, depending on the context, the phrase “if it is determined that…” or “if [the stated condition or event] is detected” may optionally be interpreted as meaning “in the event of determination that…”, “in response to determination that…”, “when [the stated condition or event] is detected”, or “in response to the detection of [the stated condition or event]”.
[0044] The use of “applies to” or “configured to” in this article implies an open and inclusive language that does not preclude applicability to or configuration to devices that perform additional tasks or steps.
[0045] In addition, the use of “based on” implies openness and inclusivity, because processes, steps, calculations or other actions “based on” one or more of the stated conditions or values may in practice be based on additional conditions or values beyond those stated.
[0046] As used herein, “about” or “approximately” includes the stated value and the average value within an acceptable range of deviation from the given value, wherein the acceptable range of deviation is determined by a person skilled in the art taking into account the measurement under discussion and the error associated with the measurement of the given quantity (i.e., the limitations of the measurement system).
[0047] This document describes exemplary embodiments with reference to cross-sectional views and / or plan views, which are idealized exemplary drawings. In the drawings, the thickness of layers and regions is enlarged for clarity. Therefore, variations in shape relative to the drawings are contemplated due to, for example, manufacturing techniques and / or tolerances. Thus, exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing processes. For example, etched regions shown as rectangular would typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shapes of the regions of the device, nor are they intended to limit the scope of the exemplary embodiments.
[0048] The aforementioned image sensors mainly include passive pixel sensors (PPS) and active pixel sensors (APS).
[0049] The following explanation uses the aforementioned texture sensing technology as an example of fingerprint sensing technology and the APS image sensor as an example.
[0050] Some embodiments of this disclosure provide a texture recognition pixel circuit 100. This texture recognition pixel circuit 100 can be an active texture recognition pixel circuit. For example... Figure 1 , Figures 3-6 As shown, the texture recognition pixel circuit 100 includes: a photosensitive sub-circuit 1 and a drive output sub-circuit 2.
[0051] In some embodiments, such as Figure 1 , Figures 3-6 As shown, the photosensitive circuit 1 is electrically connected to the first voltage signal terminal V1 and the readout node G. The first voltage signal terminal V1 is configured to receive a first voltage signal and input the first voltage signal to the photosensitive circuit 1.
[0052] In some examples, the aforementioned photosensitive circuit 1 is configured to sense an optical signal containing texture information, convert the optical signal into a first detection signal, and transmit it to the aforementioned readout node G.
[0053] For example, the aforementioned light signal containing ridge information can be the light signal reflected after being irradiated onto the fingerprint of a finger (i.e., the light reflected from the finger). Since fingerprints have ridges and valleys, this means that the light signal containing ridge information can include ridge reflected light (i.e., the light reflected after the ridges in the fingerprint) and valley reflected light (i.e., the light reflected after the valleys in the fingerprint). The light intensities of the ridge reflected light and the valley reflected light are different.
[0054] For example, the photosensitive circuit 1 is capable of photoelectric conversion; that is, after sensing an optical signal, the photosensitive circuit 1 can convert the optical signal into an electrical signal (i.e., a first detection signal) and transmit the first detection signal to the readout node G. After the first detection signal is transmitted to the readout node G, the potential of the readout node G will decrease.
[0055] The magnitude of the converted electrical signal varies depending on the intensity of the light signal sensed by photosensitive circuit 1. Therefore, the potential drop at read node G differs depending on whether the light signal sensed by photosensitive circuit 1 is ridge-reflected light or valley-reflected light. For example, a ridge-reflected light signal may cause a 0.5V drop in the potential of read node G, while a valley-reflected light signal may cause a 1V drop.
[0056] The structure of the above-mentioned photosensitive circuit 1 includes various types, and can be selected and configured according to actual needs.
[0057] In some examples, such as Figure 1 As shown, the photosensitive circuit 1 includes a photodetector 11. The first terminal 111 of the photodetector 11 is electrically connected to the first voltage signal terminal V1, and the second terminal 112 of the photodetector 11 is electrically connected to the readout node G.
[0058] For example, the first terminal 111 of the photodetector 11 can be a positive electrode, and the second terminal 112 of the photodetector 11 can be a negative electrode. The difference between the voltage value of the first voltage signal and the potential of the reading node G is negative (that is, the voltage value of the first voltage signal is less than the potential of the reading node G), which allows the photodetector 11 to be in a reverse bias state. Thus, when the light signal does not illuminate the photosensitive circuit 1, the photodetector 11 can be in a turned-off state, and when the light signal illuminates the photosensitive circuit 1, the photodetector 11 can be in a turned-on state, converting the light signal into a first detection signal and transmitting the first detection signal to the reading node G.
[0059] Here, the difference between the first voltage signal and the potential of the reading node G can be, for example, 2V to 7V.
[0060] In other examples, such as Figure 4 As shown, the texture recognition pixel circuit 100 further includes a second storage capacitor 12. The photosensitive circuit 1 may include a photodetector 11 and a second storage capacitor 12.
[0061] For example, such as Figure 4 As shown, the first plate 121 of the second storage capacitor 12 can be electrically connected to the sixth voltage signal terminal V6, and the second plate 122 of the second storage capacitor 12 can be electrically connected to the read node G. The sixth voltage signal terminal V6 is configured to receive a sixth voltage signal and input the sixth voltage signal to the first plate 121 of the second storage capacitor 12.
[0062] The second storage capacitor 12 is configured to store the first detection signal transmitted to the read node G. That is, when the drive output sub-circuit 2, which is electrically connected to the read node G, is not operating, the second storage capacitor 12 can store the first detection signal converted by the photodetector 11. Then, when the drive output sub-circuit 2 needs to operate, the second storage capacitor 12 releases the stored first detection signal.
[0063] It should be noted that the photodetector 11 can have charge storage capability. This means that even if the photosensitive sub-circuit 1 does not include the second storage capacitor 12, the photodetector 11 can store the first detection signal it converts when the drive output sub-circuit 2 is not working, and release the first detection signal it stores when the drive output sub-circuit 2 needs to work.
[0064] The structure of the photodetector 11 described above includes various types. For example, the photodetector 11 can be a photodiode.
[0065] In some embodiments, such as Figure 1 , Figures 3-6 As shown, the aforementioned drive output sub-circuit 2 is electrically connected to the third voltage signal terminal V3, the fourth voltage signal terminal V4, and the read node G. The third voltage signal terminal V3 is configured to receive a third voltage signal and input the third voltage signal to the drive output sub-circuit 2; the fourth voltage signal terminal V4 is configured to receive a fourth voltage signal and input the fourth voltage signal to the drive output sub-circuit 2.
[0066] Here, the read node G is the connection point between the photosensitive sub-circuit 1 and the drive output sub-circuit 2, rather than an actual component.
[0067] In some examples, the drive output sub-circuit 2 is configured to generate a second detection signal and output the second detection signal under the control of the first detection signal and the fourth voltage signal transmitted at the fourth voltage signal terminal V4.
[0068] In some examples, such as Figure 1 , Figures 3-6 As shown, the structure of the drive output sub-circuit 2 can be, for example, as follows: The drive output sub-circuit 2 includes a second transistor M2 and a third transistor M3. The control electrode M21 (i.e., the gate of the second transistor M2) of the second transistor M2 is electrically connected to the read node G; the first electrode M22 (i.e., one of the source and drain of the second transistor M2) of the second transistor M2 is electrically connected to the third voltage signal terminal V3; the second electrode M23 (i.e., the other of the source and drain of the second transistor M2) of the second transistor M2 is electrically connected to the first electrode M32 (i.e., one of the source and drain of the third transistor M3); the control electrode M31 (i.e., the gate of the third transistor M3) of the third transistor M3 is electrically connected to the fourth voltage signal terminal V4; and the second electrode M33 (i.e., the other of the source and drain of the third transistor M3) of the third transistor M3 is configured to output a second detection signal.
[0069] For example, the second transistor M2 is configured to be turned on under the control of the first detection signal, so that the second transistor M2 is in a linear conduction state, and generates a second detection signal under the action of the third voltage signal. The third transistor M3 is configured to be turned on under the control of the fourth voltage signal, so that the third transistor M3 is in a saturated conduction state, and outputs the second detection signal.
[0070] For example, the second terminal M33 of the third transistor M3 is electrically connected to the eighth voltage signal terminal V8, wherein the eighth voltage signal terminal V8 is configured to receive an eighth voltage signal and input the eighth voltage signal to the second terminal M33 of the third transistor M3. Thus, when the third transistor M3 is in a saturated conduction state under the control of the fourth voltage signal, the eighth voltage signal can be transmitted to the second terminal M23 of the second transistor M2.
[0071] In some examples, the third voltage signal may be a DC high-level signal, and the eighth voltage signal may be a DC low-level signal. Here, "high" and "low" refer only to the comparison between the third and eighth voltage signals; the voltage value of the third voltage signal is greater than the voltage value of the eighth voltage signal.
[0072] At this time, with the second transistor M2 and the third transistor M3 turned on, the potential difference between the first terminal M22 and the second terminal M23 of the second transistor M2 can be made to a fixed value. Thus, the characteristics of the second transistor M2 can be controlled by the potential of its control terminal M21 (i.e., the potential of the read node G), so that the current output by the second terminal M23 of the second transistor M2 (i.e., the second detection signal) can change accordingly with the change in the potential of the read node G.
[0073] Different light signals sensed by the photosensitive sub-circuit 1 will cause different potential drops in the read node G, resulting in different second detection signals output by the drive output sub-circuit 2 when the light signal is ridge-reflected light and when the light signal is valley-reflected light. After obtaining multiple second detection signals, these signals can be analyzed to determine the location (ridge or valley) in the fingerprint corresponding to each signal, thereby achieving fingerprint pattern recognition.
[0074] In some of the above embodiments, the control electrode M21 of the second transistor M2 has a lower potential, and the voltage difference between the control electrode M21 of the second transistor M2 and the second electrode M33 of the second transistor M2 is smaller.
[0075] like Figure 2 As shown, Figure 2 This is a schematic diagram of the output characteristic curve of the transistor. The second transistor M2 is in a linear conduction state; at this time, the output characteristic of the second transistor M2 can be referenced... Figure 2The linear region shown. When the potential difference between the first electrode M22 and the second electrode M23 of the second transistor M2 is a fixed value, the potential difference between the control electrode M21 and the second electrode M23 of the second transistor M2 is low because the potential of the control electrode M21 of the second transistor M2 is low. Furthermore, the difference between the potential of the read node G decreasing after sensing ridge reflection light and the potential of the read node G decreasing after sensing valley reflection light is small (i.e., the potential change of the control electrode M21 of the second transistor M2 is small). This results in a smaller difference between the second detection signal output by the second electrode M23 of the second transistor M2 when the light signal is ridge reflection light and the second detection signal output when the light signal is valley reflection light. This increases the difficulty of identifying and analyzing the second detection signal and reduces the accuracy of texture recognition.
[0076] Based on this, in some embodiments, such as Figures 3-6 As shown, the texture recognition pixel circuit 100 also includes a potential lifting sub-circuit 3.
[0077] In some examples, such as Figures 3-6 As shown, the aforementioned potential-raising sub-circuit 3 is electrically connected to the second voltage signal terminal V2 and the readout node G. The second voltage signal terminal V2 is configured to receive a second voltage signal and input this second voltage signal to the potential-raising sub-circuit 3.
[0078] In some examples, the potential-raising sub-circuit 3 is configured to raise the potential of the read node G under the action of the second voltage signal transmitted at the second voltage signal terminal V2.
[0079] Here, raising the potential of the read node G means adding a certain potential to the original potential of the read node G. For example, after the first detection signal is transmitted to the read node G, the potential of the read node G can be 1V. Based on this, the potential raising sub-circuit 3 can raise the potential of the read node G by 5V. At this time, the potential of the read node G (that is, the potential of the first detection signal after the raising) can be 6V.
[0080] When the potential difference between the first electrode M22 and the second electrode M23 of the second transistor M2 is a fixed value, raising the potential of the read node G (that is, raising the potential of the control electrode M21 of the second transistor M2) can increase the potential difference between the control electrode M21 and the second electrode M23 of the second transistor M2. For example... Figure 2As shown, even if the difference between the potential drop at the read node G after sensing ridge reflection light and the potential drop at the read node G after sensing valley reflection light is small, the second detection signal output by the second electrode M23 of the second transistor M2 will still have a large difference between the second detection signal output when the optical signal is ridge reflection light and the second detection signal output when the optical signal is valley reflection light. This helps to reduce the difficulty of identifying and analyzing the second detection signal and improve the accuracy of texture recognition.
[0081] Therefore, the texture recognition pixel circuit 100 provided in some embodiments of this disclosure, by connecting a potential boosting sub-circuit 3 at the connection point (i.e., the readout node G) of the photosensitive sub-circuit 1 and the drive output sub-circuit 2, can effectively increase the potential difference between the readout node G and the output terminal of the drive output sub-circuit 2 after the photosensitive sub-circuit 1 senses the light signal containing texture information and converts the light signal into a first detection signal. This can further increase the potential difference between the second detection signal output by the drive output sub-circuit 2 when the light signal is ridge reflection light and the second detection signal output when the light signal is valley reflection light, which helps to reduce the difficulty of identifying and analyzing the second detection signal and improve the accuracy of texture recognition.
[0082] Furthermore, by connecting the potential-raising sub-circuit 3 at the read node G, the potential of the read node G can be kept at a low level even when the first detection signal is not being read. This effectively prevents leakage in the texture recognition pixel circuit 100.
[0083] In some embodiments, the structure of the above-mentioned potential lifting sub-circuit 3 includes various types, and can be selected and configured according to actual needs.
[0084] In some examples, such as Figures 3-5 As shown, the aforementioned potential-raising sub-circuit 3 includes a first transistor M1. The control electrode M11 (i.e., the gate of the first transistor M1) of the first transistor M1 is electrically connected to the read node G, and the first electrode M12 (i.e., one of the source and drain of the first transistor M1) and the second electrode M13 (i.e., the other of the source and drain of the first transistor M1) of the first transistor M1 are both electrically connected to the second voltage signal terminal V2.
[0085] Here, when the first terminal M12 and the second terminal M13 of the first transistor M1 are not electrically connected to the same voltage signal terminal, the first terminal M12 and the second terminal M13 of the first transistor M1 are in an insulated state. However, when the first terminal M12 and the second terminal M13 of the first transistor M1 are both electrically connected to the second voltage signal terminal V2, it means that the first terminal M12 and the second terminal M13 of the first transistor M1 are electrically connected.
[0086] Since the control electrode M11 and the first electrode M12 of the first transistor M1 are insulated from each other, and the control electrode M11 and the second electrode M13 of the first transistor M1 are insulated from each other, and the first electrode M12 and the second electrode M13 of the first transistor M1 are electrically connected, the first electrode M12 and the second electrode M13 of the first transistor M1 and the control electrode M11 of the first transistor M1 can form a structure similar to a storage capacitor.
[0087] When a second voltage signal is input to the first terminal M12 and the second terminal M13 of the first transistor M1, the potential of the control terminal M11 of the first transistor M1 will change under the action of the second voltage signal, based on the coupling principle of the storage capacitor. Thus, by setting the value of the second voltage signal input to the first terminal M12 and the second terminal M13 of the first transistor M1, the potential of the control terminal M11 of the first transistor M1 can be raised, which also raises the potential of the read node G.
[0088] In this example, the potential lifting sub-circuit 3 adopts the above structure, which can simultaneously fabricate the first transistor M1 during the process of fabricating the second transistor M2 and the third transistor M3. This can effectively increase the difference between the second detection signal corresponding to the ridge reflection light and the second detection signal corresponding to the valley reflection light, while avoiding the additional process of fabricating the texture recognition pixel circuit 100.
[0089] In other examples, such as Figure 6 As shown, the aforementioned potential-raising sub-circuit 3 includes a first storage capacitor C1. The first plate C11 of the first storage capacitor C1 is electrically connected to the read node G, and the second plate C12 of the first storage capacitor C1 is electrically connected to the second voltage signal terminal V2.
[0090] Here, based on the coupling principle of the first storage capacitor C1, when the potential of the second plate C12 of the first storage capacitor C1 changes (e.g., the potential increases), the potential of the first plate C11 of the first storage capacitor C1 will also change (e.g., the potential increases). Thus, by inputting a second voltage signal to the second plate C12 of the first storage capacitor C1 and appropriately setting the value of the second voltage signal, the potential of the first plate C11 of the first storage capacitor C1 can be increased, which in turn increases the potential of the read node G.
[0091] In this example, the potential lifting sub-circuit 3 adopts the above-described structure. For example, the first plate C11 of the first storage capacitor C1 can be arranged on the same layer as the control electrode M11 of the first transistor M1 and the control electrode M2 of the second transistor M2, and the second plate C12 of the first storage capacitor C1 can be arranged on the same layer as the first electrode M12 and the second electrode M13 of the first transistor M1 and the first electrode M22 and the second electrode M23 of the second transistor M2. This can effectively increase the difference between the second detection signal corresponding to the ridge reflection light and the second detection signal corresponding to the valley reflection light, while avoiding the additional process of fabricating the texture recognition pixel circuit 100.
[0092] It should be noted that the term "same layer" in this article refers to a layer structure formed using the same film deposition process to create a specific pattern, and then using the same mask to form a single patterning process. Depending on the specific pattern, the single patterning process may include multiple exposure, development, or etching processes, and the specific pattern in the formed layer structure may be continuous or discontinuous, and these specific patterns may also be at different heights or have different thicknesses. In this way, the first electrode C11 of the first storage capacitor C1, the control electrode M11 of the first transistor M1, and the control electrode M2 of the second transistor M2 can be fabricated simultaneously in a single patterning process. The second electrode C12 of the first storage capacitor C1, the first electrode M12 and the second electrode M13 of the first transistor M1, and the first electrode M22 and the second electrode M23 of the second transistor M2 can also be fabricated simultaneously in a single patterning process, which simplifies the fabrication process of the texture recognition pixel circuit 100.
[0093] In some embodiments, the configuration between the second voltage signal terminal V2 and the fourth voltage signal terminal V4 can be varied and can be selected according to actual needs.
[0094] In some examples, such as Figure 3 and Figure 4 As shown, the second voltage signal terminal V2 and the fourth voltage signal terminal V4 are different voltage signal terminals.
[0095] At this point, the second voltage signal received by the second voltage signal terminal V2 and the fourth voltage signal received by the fourth voltage signal terminal V4 can be the same or different. The reading node G's potential needs to be increased under the influence of the second voltage signal, and the third transistor M3 needs to be in a saturated conducting state under the control of the fourth voltage signal.
[0096] By setting the second voltage signal terminal V2 and the fourth voltage signal terminal V4 as different voltage signal terminals, it is convenient to control the potential of the reading node G and the conduction state of the third transistor M3 respectively.
[0097] In other examples, such as Figure 5 and Figure 6 As shown, the second voltage signal terminal V2 and the fourth voltage signal terminal V4 are the same voltage signal terminal.
[0098] For example, the second voltage signal terminal V2 and the fourth voltage signal terminal V4 can be collectively referred to as the second voltage signal terminal V2. In this way, during the process of receiving the second voltage signal at the second voltage signal terminal V2, the second voltage signal can be simultaneously transmitted to the control electrode M31 of the third transistor M3 of the potential rise sub-circuit 3 and the drive output sub-circuit 2. Thus, while raising the potential of the reading node G, the third transistor M3 can be controlled to be in a saturated conduction state.
[0099] By setting the second voltage signal terminal V2 and the fourth voltage signal terminal V4 to the same voltage signal terminal, the potential of the reading node G and the conduction state of the third transistor M3 can be controlled simultaneously, avoiding the situation where the potential of the reading node G increases and the conduction of the third transistor M3 is asynchronous, which helps to improve the accuracy of the texture detection results.
[0100] There are several ways to set the second voltage signal terminal V2 and the fourth voltage signal terminal V4 to the same voltage signal terminal, and you can choose to set them according to your actual needs.
[0101] For example, the control electrode M31 of the potential-raising sub-circuit 3 and the third transistor M3 can be electrically connected to the second voltage signal terminal V2 via a separate trace. This improves the reliability of the texture recognition pixel circuit 100.
[0102] For example, such as Figure 5 As shown, the potential-raising sub-circuit 3 and the control electrode M31 of the third transistor M3 are electrically connected, and then electrically connected to the second voltage signal terminal V2 through a trace. This helps to reduce the number of traces, and thus helps to reduce the area occupied by the texture recognition pixel circuit 100.
[0103] Here, taking the potential-raising sub-circuit 3 including the first transistor M1 as an example, the electrical connection between the potential-raising sub-circuit 3 and the control electrode M31 of the third transistor M3 can be achieved as follows: the control electrode M31 of the third transistor M3 is electrically connected to the first electrode M12 or the second electrode M13 of the first transistor M1 through a via. Then, the first electrode M12 or the second electrode M13 of the first transistor M1 can be electrically connected to the second voltage signal terminal V2.
[0104] In some embodiments, such as Figures 3-6 As shown, the texture recognition pixel circuit 100 also includes a reset circuit 4.
[0105] In some examples, such as Figures 3-6 As shown, the reset sub-circuit 4 is electrically connected to the fifth voltage signal terminal V5, the scan signal terminal Gate, and the read node G. The fifth voltage signal terminal V5 is configured to receive a fifth voltage signal and input this fifth voltage signal to the reset sub-circuit 4; the scan signal terminal Gate is configured to receive a scan signal and input this scan signal to the reset sub-circuit 4.
[0106] In some examples, the reset sub-circuit 4 is configured to transmit the fifth voltage signal transmitted from the fifth voltage signal terminal V5 to the read node G under the control of the scan signal transmitted at the scan signal terminal Gate, thereby resetting the read node G. That is, under the control of the scan signal, the reset sub-circuit 4 can transmit the fifth voltage signal to the read node G, specifically to the end of the photosensitive sub-circuit 1 electrically connected to the read node G, the end of the drive output sub-circuit 2 electrically connected to the read node G, and the end of the potential rise sub-circuit 3 electrically connected to the read node G.
[0107] For example, before the photosensitive sub-circuit 1 senses the light signal, a fifth voltage signal can be transmitted to the readout node G to reset the readout node G, giving an initial potential value to the end of the photosensitive sub-circuit 1 electrically connected to the readout node G, the end of the drive output sub-circuit 2 electrically connected to the readout node G, and the end of the potential rise sub-circuit 3 electrically connected to the readout node G. This can reduce noise in the photosensitive sub-circuit 1, the drive output sub-circuit 2, and the potential rise sub-circuit 3, thereby improving the accuracy of the first detection signal and the second detection signal.
[0108] The structure of the reset circuit 4 described above includes various types, and can be selected and configured according to actual needs.
[0109] In some examples, such as Figures 3-6As shown, the reset circuit 4 includes a fourth transistor M4. The control terminal M41 (i.e., the gate of the fourth transistor M4) is electrically connected to the scan signal terminal Gate; the first terminal M42 (i.e., one of the source and drain terminals of the fourth transistor M4) is electrically connected to the fifth voltage signal terminal V5; and the second terminal M43 (i.e., the other of the source and drain terminals of the fourth transistor M4) is electrically connected to the read node G.
[0110] For example, the fourth transistor M4 is configured to be turned on under the control of the scan signal, so that the fourth transistor M4 is in a saturated conduction state, and under the action of the fifth voltage signal terminal V5, the fifth voltage signal is transmitted to the read node G to reset the read node G.
[0111] It should be noted that after resetting the read node G, before the photosensitive circuit 1 senses the light signal, the fifth voltage signal of the read node G (that is, the potential signal of the second terminal 112 of the photodetector 11 in the photosensitive circuit 1) and the first voltage signal of the first terminal 111 of the photodetector 11 can cooperate with each other to make the photodetector 11 be in a reverse bias state.
[0112] Some embodiments of this disclosure provide a texture detection method applied to the texture recognition pixel circuit 100 described in any of the above embodiments. The texture detection method includes a driving cycle comprising an exposure phase and an output phase.
[0113] In some examples, such as Figure 7 As shown, the above exposure stage includes: S100.
[0114] S100, the photosensitive sub-circuit 1 in the texture recognition pixel circuit 100 senses the light signal containing texture information, converts the light signal into a first detection signal, and transmits the first detection signal to the reading node G.
[0115] For example, such as Figures 3-6 As shown, when the photosensitive circuit 1 includes a photodetector 11, the first voltage signal terminal V1 transmits a first voltage signal to the first terminal 111 of the photodetector 11. This first voltage signal is matched with the potential of the reading node G, so that the photodetector 11 is in a reverse bias state when no light signal is sensed, and when the photodetector 11 senses a light signal, it can perform photoelectric conversion to convert the light signal into a first detection signal.
[0116] In some examples, such as Figure 7 As shown, the above output stage includes S200.
[0117] S200, under the action of the second voltage signal transmitted by the second voltage signal terminal V2 in the texture recognition pixel circuit 100, the potential of the reading node G is raised. Under the control of the first detection signal after the elevation and the fourth voltage signal transmitted by the fourth voltage signal terminal V4, the drive output sub-circuit 2 in the texture recognition pixel circuit 100 generates and outputs the second detection signal.
[0118] For example, such as Figures 3-6 As shown, in the case where the potential-raising sub-circuit 3 includes a first transistor M1 and the drive output sub-circuit 2 includes a second transistor M2 and a third transistor M3:
[0119] When the second voltage signal is transmitted from the second voltage signal terminal V2 to the first terminal M12 and the second terminal M13 of the first transistor M1, the potential of the control terminal M11 of the first transistor M1 (that is, the potential of the read node G) can be raised under the action of the second voltage signal.
[0120] The second transistor M2 can be turned on (i.e., linearly turned on) under the control of the first detection signal after being raised, and the third transistor M3 can be turned on (i.e., saturated turned on) under the control of the fourth voltage signal. The second transistor M2 generates the second detection signal according to the first detection signal after being raised, and the third transistor M3 outputs the second detection signal.
[0121] The beneficial effects that the texture detection method provided in some embodiments of this disclosure can achieve are the same as those that the texture recognition pixel circuit 100 provided in some embodiments above can achieve, and will not be repeated here.
[0122] In some embodiments, a drive cycle further includes a reset phase.
[0123] In some examples, the above reset phase includes S300.
[0124] S300, the reset sub-circuit 4 in the texture recognition pixel circuit 100, under the control of the scanning signal transmitted by the scanning signal terminal Gate, transmits the fifth voltage signal transmitted by the fifth voltage signal terminal V5 to the reading node G to reset the reading node G.
[0125] For example, such as Figures 3-6 As shown, when the reset sub-circuit 4 includes the fourth transistor M4, the fourth transistor M4 is turned on (i.e., saturated) under the control of the scan signal, and transmits the fifth voltage signal to the read node G to reset the photosensitive sub-circuit 1, the drive output sub-circuit 2 and the potential rise sub-circuit 3 which are electrically connected to the read node G.
[0126] Some embodiments of this disclosure provide a texture detection circuit 1000. For example... Figure 8 As shown, the texture detection circuit 1000 includes a plurality of texture recognition pixel circuits 100 as described in any of the above embodiments, and a plurality of amplification sub-circuits 200.
[0127] In some examples, such as Figure 8 As shown, an amplification sub-circuit 200 is electrically connected to a drive output sub-circuit 2 of at least one texture recognition pixel circuit 100. The amplification sub-circuit 200 is configured to amplify the second detection signal output by the texture recognition pixel circuit 100.
[0128] The structure of the aforementioned amplifier sub-circuit 200 includes various options, which can be selected and configured according to actual needs.
[0129] In some examples, such as Figure 8 As shown, the amplification sub-circuit 200 includes: a negative feedback amplification circuit 5, a third storage capacitor C3, and a switch 6. The non-inverting input terminal 51 of the negative feedback amplification circuit 5 is electrically connected to the seventh voltage signal terminal V7. The inverting input terminal 52 of the negative feedback amplification circuit 5 is electrically connected to the drive output sub-circuit 2 (i.e., the second terminal M33 of the third transistor M3 in the drive output sub-circuit 2), the first plate C31 of the third storage capacitor C3, and the first terminal 61 of the switch 6. The output terminal 53 of the negative feedback amplification circuit 5 is electrically connected to the second plate C32 of the third storage capacitor C3 and the second terminal 62 of the switch 6. The seventh voltage signal terminal V7 is configured to receive a seventh voltage signal and input this seventh voltage signal to the non-inverting input terminal 51 of the negative feedback amplification circuit 5.
[0130] Here, after the seventh voltage signal is input to the non-inverting input terminal 51 of the negative feedback amplifier circuit 5, the inverting input terminal 52 of the negative feedback amplifier circuit 5 can output a voltage signal (i.e., the eighth voltage signal) that is opposite to the voltage value of the seventh voltage signal.
[0131] For example, the seventh voltage signal can be a DC voltage signal. For instance, if the first voltage signal has a voltage value of -1V, after the seventh voltage signal is input to the non-inverting input terminal 51 of the negative feedback amplifier circuit 5, the voltage value of the eighth voltage signal output from the inverting input terminal 52 of the negative feedback amplifier circuit 5 can be 1V.
[0132] The working principle of the texture detection circuit 1000 is illustrated below.
[0133] The photosensitive circuit 1 in the texture recognition pixel circuit 100 senses the light signal containing texture information and converts the light signal into a first detection signal, which is then transmitted to the reading node G.
[0134] The potential-raising sub-circuit 3 in the texture recognition pixel circuit 100 raises the potential of the reading node G under the action of the second voltage signal transmitted at the second voltage signal terminal V2.
[0135] The third transistor M3 in the drive output sub-circuit 2 is turned on (saturated) under the control of the fourth voltage signal transmitted by the fourth voltage signal terminal V4, and the voltage signal output by the inverting input terminal 52 of the negative feedback amplifier circuit 5 is transmitted from the second terminal M33 of the third transistor M3 to the first terminal M32 of the third transistor M3, that is, to the second terminal M23 of the second transistor M2 which is electrically connected to the first terminal M32 of the third transistor M3.
[0136] The second transistor M2 in the drive output sub-circuit 2 is turned on (linearly turned on) under the control of the first detection signal after being raised. At this time, the current generated in the second transistor M2 is the second detection signal. For example, the formula for calculating the current in the second transistor M2 is: Where Mob represents the carrier mobility, and C ox This is expressed as the channel capacitance per unit area of the second transistor M2. V is expressed as the width-to-length ratio of the channel of the second transistor M2. gs V represents the potential difference between the control electrode M21 and the first electrode M22 in the second transistor M2. th This is expressed as the threshold voltage of the second transistor M2. The value of the second detection signal can be obtained using the above formula.
[0137] The second detection signal is input to the inverting input terminal 52 of the negative feedback amplifier circuit 5 through the second terminal M33 of the third transistor M3. The second detection signal is amplified by the negative feedback amplifier circuit 5 and the third storage capacitor C3, and the amplified second detection signal can be output from the output terminal 53 of the negative feedback amplifier circuit 5. At this time, the switch 6 is in the open state.
[0138] Here, during the amplification of the second detection signal, the electrical quantity input to the amplification sub-circuit 200 and the electrical quantity output from the amplification sub-circuit 200 are the same, that is, I×t=C×V out Where I represents the current generated in the second transistor M2 (i.e., the current value of the second detection signal), t represents the photosensitive time of the photosensitive circuit 1, C represents the capacitance of the third storage capacitor C3, and V out This represents the voltage value of the amplified second detection signal. The amplified second detection signal can be obtained using the formula described above.
[0139] After the amplified second detection signal is output from the amplification subcircuit 200, the read node G can be reset via the reset subcircuit 4. At this time, switch 6 can also be closed to input the eighth voltage signal output from the inverting input terminal 52 of the negative feedback amplifier circuit 5 to the output terminal 53 of the negative feedback amplifier circuit 5, thus resetting the output terminal 53. After resetting both the read node G and the output terminal 53 of the feedback amplifier circuit 5, switch 6 can be opened to prepare for the amplification of the second detection signal in the next stage.
[0140] The beneficial effects that the texture detection circuit 1000 provided in some embodiments of this disclosure can achieve are the same as the beneficial effects that the texture recognition pixel circuit 100 provided in some embodiments above can achieve, and will not be repeated here.
[0141] The connection methods between the aforementioned multiple amplification sub-circuits 200 and multiple texture recognition pixel circuits 100 include various types, which can be selected and set according to actual needs.
[0142] In some examples, such as Figure 8 As shown, the amplification sub-circuit 200 and the texture recognition pixel circuit 100 can be electrically connected in a one-to-one correspondence. In this way, the second detection signal output by each texture recognition pixel circuit 100 can be amplified and detected separately, which helps to improve the accuracy of texture detection results.
[0143] In other examples, such as Figure 9 As shown, the aforementioned plurality of texture recognition pixel circuits 100 are arranged in multiple columns, and each column of texture recognition pixel circuits 100 includes at least one texture recognition pixel circuit 100. In this case, the plurality of texture recognition pixel circuits 100 can also be arranged in multiple rows, and each row of texture recognition pixel circuits 100 includes at least one texture recognition pixel circuit 100.
[0144] In this design, one amplification sub-circuit 200 can be electrically connected to each texture recognition pixel circuit 100 in a column of texture recognition pixel circuits 100. That is, the number of amplification sub-circuits 200 is the same as the number of columns of texture recognition pixel circuits 100. In this way, during the amplification of the second detection signal, the second detection signal generated by each texture recognition pixel circuit 100 in one row can be amplified first, and then the second detection signals generated by each texture recognition pixel circuit 100 in the remaining rows can be amplified sequentially.
[0145] By electrically connecting an amplification sub-circuit 200 to a row of texture recognition pixel circuits 100, it is beneficial to reduce the number of amplification sub-circuits 200, thereby simplifying the structure of the texture detection circuit 1000 and reducing the area occupied by the texture detection circuit 1000.
[0146] Some embodiments of this disclosure provide a display substrate 2000. For example... Figure 10 As shown, the display substrate 2000 has a display area A and a non-display area B located next to the display area A. The non-display area B may be located, for example, on one side, both sides, or around the display area A (e.g., ...). Figure 10 (as shown in the image) etc.
[0147] In some examples, display area A includes a texture recognition area A1. The boundary shape, size, and location of this texture recognition area A1 can be selected and set according to actual needs. For example, Figure 10 As shown, the texture recognition area A1 can be located in the middle of the display area A and is elliptical or circular.
[0148] In some examples, such as Figure 10 As shown, the display substrate 2000 includes a substrate 7 and a texture detection circuit 1000 as described in any of the above embodiments, disposed on one side of the substrate 7. The texture detection circuit 1000 contains a plurality of texture recognition pixel circuits 100 located in a texture recognition area A1, and a plurality of amplification sub-circuits 200 located in a non-display area B. This reduces the area occupied by the texture detection circuit 1000 in the display area A, and avoids reducing the resolution of the display substrate 2000 due to the placement of the texture detection circuit 100.
[0149] The beneficial effects that the display substrate 2000 provided in some embodiments of this disclosure can achieve are the same as the beneficial effects that the texture recognition pixel circuit 100 provided in some embodiments above can achieve, and will not be repeated here.
[0150] In some embodiments, the texture recognition area A1 includes a plurality of texture recognition pixel areas, and the plurality of texture recognition pixel areas and the plurality of texture recognition pixel circuits 100 can be configured in a one-to-one correspondence. That is, a texture recognition pixel circuit 100 can be configured in each texture example pixel area.
[0151] In some embodiments, the display area A includes a plurality of sub-pixel regions arranged in an array. Among the plurality of sub-pixel regions located within the texture recognition area A1, one texture recognition pixel region may correspond to one sub-pixel region, or one texture recognition pixel region may correspond to at least two sub-pixel regions.
[0152] In some examples, the subpixels within each subpixel region may include a light-emitting device and a pixel driving circuit configured to drive the light-emitting device to emit light. The structure of the light-emitting device may be, for example, an OLED (Organic Light Emitting Diode) device or a QLED (Quantum Dot Light Emitting Diode) device.
[0153] In this way, during the texture recognition and detection process, light can be emitted by a light-emitting device and shone onto the finger. After the light is reflected by the finger, the reflected light (i.e., the light signal containing texture information) can be detected and identified. This avoids the need for additional light-emitting devices and simplifies the structure of the display substrate 2000.
[0154] Some embodiments of this disclosure provide a display device 3000. For example... Figure 11 As shown, the display device 3000 includes a display substrate 2000 as described in any of the above embodiments.
[0155] The beneficial effects that the display device 3000 provided in some embodiments of this disclosure can achieve are the same as the beneficial effects that the texture recognition pixel circuit 100 provided in some embodiments above can achieve, and will not be repeated here.
[0156] In some embodiments, such as Figure 11 As shown, the display device 3000 further includes a texture recognition chip 8 electrically connected to the display substrate 2000. This texture recognition chip 8 is electrically connected to a plurality of amplification sub-circuits 200 of the texture detection circuit 1000 of the display substrate 2000. The texture recognition chip 8 is configured to receive amplified second detection signals output from the plurality of amplification sub-circuits 200, and determine the texture to be recognized based on the amplified second detection signals.
[0157] After the multiple amplified sub-circuits 200 output amplified second detection signals, the texture recognition chip 8 can analyze and calculate the multiple amplified second detection signals and integrate them to determine the information of the ridge or valley corresponding to each amplified second detection signal, thereby determining the texture to be identified.
[0158] In some embodiments, the display device 3000 described above may be a product with display function and texture recognition function, such as a mobile phone, tablet computer, laptop computer, monitor, digital photo frame or navigator, and this disclosure does not set any limitations in this regard.
[0159] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.
Claims
1. A display substrate, characterized in that, The display substrate has a display area and a non-display area located next to the display area; the display area includes a texture recognition area; wherein... The display substrate includes: Substrate; and, A texture detection circuit is disposed on one side of the substrate; the texture detection circuit includes multiple texture recognition pixel circuits and multiple amplification sub-circuits; the texture recognition pixel circuit includes: a photosensitive sub-circuit, a potential boosting sub-circuit, and a drive output sub-circuit; the photosensitive sub-circuit is electrically connected to a first voltage signal terminal and a readout node; the photosensitive sub-circuit is configured to sense an optical signal containing texture information, convert the optical signal into a first detection signal, and transmit it to the readout node; the potential boosting sub-circuit is electrically connected to a second voltage signal terminal and the readout node; the potential boosting sub-circuit is configured to, under the second voltage... Under the action of the second voltage signal transmitted at the signal terminal, the potential of the read node is raised; the drive output sub-circuit is electrically connected to the third voltage signal terminal, the fourth voltage signal terminal, and the read node; the drive output sub-circuit is configured to generate a second detection signal and output the second detection signal under the control of the raised first detection signal and the fourth voltage signal transmitted at the fourth voltage signal terminal; an amplification sub-circuit is electrically connected to the drive output sub-circuit of at least one texture recognition pixel circuit; the amplification sub-circuit is configured to amplify the second detection signal output by the texture recognition pixel circuit. The texture detection circuit contains multiple texture recognition pixel circuits located in the texture recognition area, and multiple amplification sub-circuits located in the non-display area. The potential-lifting sub-circuit includes a first transistor; The control electrode of the first transistor is electrically connected to the read node, and both the first and second electrodes of the first transistor are electrically connected to the second voltage signal terminal. The second voltage signal terminal and the fourth voltage signal terminal are the same voltage signal terminal.
2. The display substrate according to claim 1, characterized in that, The photosensitive sub-circuit includes a photodetector; a first end of the photodetector is electrically connected to the first voltage signal terminal, and a second end of the photodetector is electrically connected to the readout node; The drive output sub-circuit includes a second transistor and a third transistor; the control electrode of the second transistor is electrically connected to the read node, the first electrode of the second transistor is electrically connected to the third voltage signal terminal, and the second electrode of the second transistor is electrically connected to the first electrode of the third transistor; the control electrode of the third transistor is electrically connected to the fourth voltage signal terminal, and the second electrode of the third transistor is configured to output the second detection signal.
3. The display substrate according to claim 1 or 2, characterized in that, The texture recognition pixel circuit further includes: a reset sub-circuit; The reset sub-circuit is electrically connected to the fifth voltage signal terminal, the scan signal terminal, and the read node; the reset sub-circuit is configured to transmit the fifth voltage signal transmitted by the fifth voltage signal terminal to the read node under the control of the scan signal transmitted by the scan signal terminal, so as to reset the read node.
4. The display substrate according to claim 3, characterized in that, The reset sub-circuit includes a fourth transistor; The control electrode of the fourth transistor is electrically connected to the scan signal terminal, the first electrode of the fourth transistor is electrically connected to the fifth voltage signal terminal, and the second electrode of the fourth transistor is electrically connected to the read node.
5. The display substrate according to claim 1 or 2, characterized in that, The texture recognition pixel circuit further includes: a second storage capacitor; The first plate of the second storage capacitor is electrically connected to the sixth voltage signal terminal, and the second plate of the second storage capacitor is electrically connected to the read node; The second storage capacitor is configured to store the first detection signal transmitted to the read node.
6. The display substrate according to claim 1, characterized in that, The amplification sub-circuit includes: a negative feedback amplification circuit, a third storage capacitor, and a switch; The non-inverting input terminal of the negative feedback amplifier circuit is electrically connected to the seventh voltage signal terminal, the inverting input terminal of the negative feedback amplifier circuit is electrically connected to the driving output sub-circuit, the first plate of the third storage capacitor and the first terminal of the switch, and the output terminal of the negative feedback amplifier circuit is electrically connected to the second plate of the third storage capacitor and the second terminal of the switch.
7. The display substrate according to claim 1 or 6, characterized in that, The plurality of texture recognition pixel circuits are arranged in multiple columns, and each column of texture recognition pixel circuits includes at least one texture recognition pixel circuit. One of the amplification sub-circuits is electrically connected to each texture recognition pixel circuit in a row of texture recognition pixel circuits.
8. A display device, characterized in that, The display device includes: a display substrate as described in any one of claims 1 to 7.
9. The display device according to claim 8, characterized in that, The display device further includes: a texture recognition chip electrically connected to the display substrate, the texture recognition chip being electrically connected to a plurality of amplification sub-circuits of the texture detection circuit of the display substrate; the texture recognition chip is configured to receive an amplified second detection signal output by the plurality of amplification sub-circuits, and determine the texture to be recognized based on the amplified second detection signal.