A stepped electrode structure based on a two-dimensional material transistor and a preparation method thereof

Abstract

The application discloses a kind of ladder electrode structure based on two-dimensional material transistor and preparation method thereof, belong to semiconductor technical field, two-dimensional material transistor in the application refers to the transistor of two-dimensional semiconductor material in channel. Ladder electrode structure refers to the contact surface of transistor electrode and each layer of channel two-dimensional material, with different layer thickness high and low fluctuation, present ladder shape. The preparation method of the application comprises: photoresist spin coating, patterned exposure, etching, metal coating, coating stripping. The ladder electrode structure based on two-dimensional material transistor proposed in the application solves the problem of two-dimensional material and metal electrode contact, reduces contact resistance, improves charge mobility. The application provides a basis for the wide application of two-dimensional material in transistor.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a stepped electrode structure based on a two-dimensional material transistor and its fabrication method. Background Technology

[0002] Since the discovery of graphene, a two-dimensional material, in 2004, two-dimensional semiconductor materials have become one of the most ideal materials for next-generation thermal, optical, communication, and micro / nano devices due to their high mobility, bipolarity, tunable bandgap, and flexibility. However, due to the layered nature of two-dimensional materials, conventional two-dimensional transistors cannot fully utilize the inherent properties of two-dimensional materials, thus hindering the practical application of two-dimensional transistors.

[0003] Currently, the conventional electrode structures for two-dimensional material transistors are top electrodes, side electrodes, and wrapping electrodes. The top electrode structure is the traditional transistor electrode structure. Due to the non-contact nature between the two-dimensional material layers, the top electrode structure generates an additional tunneling barrier inside the channel (Reference 1, "Das, S., & Appenzeller, J. (2013). Where does the current flow in two-dimensional layered systems."). Nano letters , 13 (7), 3396-3402.”). This ultimately leads to an increase in total contact resistance, reducing the charge transport performance of two-dimensional material transistors. Based on the characteristics of two-dimensional material layers, an improved side electrode and encapsulated electrode structure bypasses the tunneling barrier by directly contacting the side of each two-dimensional material layer with the electrode (Reference 2, “Chu, T., & Chen, Z. (2014). Understanding the electrical impact of edge contacts in few-layer graphene”). Acs Nano , 8 (4), 3584-3589.”). Side electrodes and wrapping electrodes reduce the resistance in the channel, theoretically improving the performance of two-dimensional material transistors. However, due to process limitations, it is difficult to ensure good contact between the metal electrodes and the sides of each layer of two-dimensional material in the channel, resulting in a decrease in device performance.

[0004] The practical application of two-dimensional semiconductor materials in transistors requires solving the contact problem between metal electrodes and two-dimensional materials. In light of the above, with the current development of two-dimensional material etching processes (Reference 3, "Jia, J., Jang, SK, Lai, S., Xu, J., Choi, YJ, Park, JH, & Lee, S. (2015). Plasma-treated thickness-controlled two-dimensional black phosphorus and its electronic transport properties"), ACS nano , 9 (9), 8729-8736.”), further research is needed to explore new structures for the contact between metal electrodes and two-dimensional materials, improve the reliability of the contact, reduce the barrier of channel resistance, and lay the foundation for the practical application of two-dimensional materials in transistors. Summary of the Invention

[0005] The purpose of this invention is to overcome the shortcomings of existing technologies and provide a stepped electrode structure for transistors based on two-dimensional materials and its preparation method, so as to improve the contact between two-dimensional materials and metal electrodes and solve the problems of two-dimensional materials in transistor applications.

[0006] This invention is achieved through the following technical solution:

[0007] A stepped electrode structure based on a two-dimensional material transistor is provided, in which multiple layers of two-dimensional material are provided in the transistor channel, the electrode is in contact with the upper surface of each layer of two-dimensional material, and the contact surfaces between the two-dimensional material and the electrode of different layers of two-dimensional material are not on the same horizontal line, presenting a staggered stepped shape.

[0008] The two-dimensional material is any one of the following: MoS2, MoSe2, MoTe2, WS2, WSe2, WTe2, GeS2, GeSe2, GeTe2, SnS2, SnSe2, SnTe2, SnO, PbS2, PbSe2, PbTe2, GaS, GaSe, GaTe, InS, InSe, InTe, Bi2Se3, Graphene, Black phosphorus, Arsenene, Antimonene, Germanene, Stanene, and Silicene.

[0009] A method for fabricating a stepped electrode structure based on a two-dimensional material transistor specifically includes the following steps:

[0010] Step 1: Clean the conductive substrate and then apply an insulating layer onto it.

[0011] Step 2: Set a two-dimensional material on the insulating layer of the conductive substrate;

[0012] Step 3: Spin-coat the photoresist onto the insulating layer and the two-dimensional material;

[0013] Step four: Pattern the photoresist and perform photolithography;

[0014] Step 5: Etch the two-dimensional material in the channel;

[0015] Step 6: Immerse the etched sample in an organic solution to remove the photoresist;

[0016] Step 7: Repeat steps 3 to 6 according to the total number of layers of the two-dimensional material, so that the electrode is in contact with the upper surface of each layer of the two-dimensional material. The contact surfaces between the two-dimensional material and the electrode of different layers are not on the same horizontal line, presenting a staggered stepped appearance.

[0017] Step 8: Spin-coat the photoresist onto the insulating layer and the etched two-dimensional material;

[0018] Step 9: Pattern the photoresist and perform photolithography to create electrode patterns;

[0019] Step 10: Prepare the electrodes (source and drain) at both ends by metal coating.

[0020] Step 11: Place the sample in an organic solution to remove excess metal plating and residual photoresist from the surface.

[0021] In step one, the conductive substrate material is silicon or copper, and the insulating layer material is one of the following: SiO2, SiC, SiN, Al2O3, HfO2, TiO2, WO3, Ta2O5, ZnO2, TiO2, CaO, ZrO2, La2O3, BaO, MgO, HfSiOx, ZrSiOx, HfLaOx, HfZrOx, HfAlOx, LaAlOx, Y2O3, SrO, Si3N4.

[0022] In step two, the two-dimensional material is mechanically peeled off and then transferred to the insulating layer, or it is grown to directly deposit the two-dimensional material on the substrate insulating layer.

[0023] In step three, the photoresist is one or more of the following superimposed: ultraviolet photoresist, deep ultraviolet photoresist, X-ray photoresist, electron beam photoresist, and ion beam photoresist.

[0024] In step four, the exposure method for the photoresist is one of the following: electron beam lithography, ultraviolet lithography, photolithography without a mask, or photolithography with a mask;

[0025] In step four, the pattern etched on the photoresist is for the purpose of single-layer etching of the two-dimensional material in the subsequent etching process.

[0026] In step five, the etching method for the two-dimensional material is one of the following: dry etching, wet etching, or mechanical etching using a probe of an atomic force microscope. Each etching operation etches only a single layer thickness.

[0027] In step seven, the number of repetitions is the total number of layers of two-dimensional material in the channel minus 2.

[0028] In step ten, the metal coating process is electron beam coating or vacuum sputtering coating, and the metal coating material is one of the following: Ti, Cr, Cu, Au, Ag, Pt, Hf, Zr, Ta, W, Sn, Mn, Fe, V, Al.

[0029] The electrode material can be one type of metal or multiple types of metals, which can improve the adhesion of the electrode and reduce the contact resistance.

[0030] The advantages of this invention are: This invention combines the advantages of top electrode structure with side electrode and encapsulated electrode structure. The stepped electrode structure enables good surface contact between the electrode metal and each layer of two-dimensional material in the channel. This not only avoids the tunneling barrier between the two-dimensional material layers during charge transport in the channel, but also ensures good contact characteristics between the electrode metal and the two-dimensional material. This greatly improves the charge transport characteristics in two-dimensional material transistors, fully utilizes the high mobility of two-dimensional materials, and further practicalizes the application of two-dimensional materials in transistors. Attached Figure Description

[0031] Figure 1 This is a schematic diagram of the structure of the present invention.

[0032] Figure 2 This is a schematic flowchart of the first layer of stepped etching process in the stepped electrode based on MoS2 transistors provided in this invention example.

[0033] Figure 3 This is a schematic flowchart of the second-layer stepped etching process in the stepped electrode based on MoS2 transistors provided in this invention example.

[0034] Figure 4 This is a schematic flowchart illustrating the fabrication process of the drain-source stepped electrode in the stepped electrode based on the MoS2 transistor provided in this invention example. Detailed Implementation

[0035] The following is in conjunction with the appendix Figure 1-4The present invention will be further described in detail below with reference to specific embodiments. The accompanying drawings, which form part of this invention, are used to fully illustrate the invention. The drawings show specific embodiments and related figures of the invention to explain the method for fabricating stepped electrodes based on two-dimensional material transistors according to the present invention. The specific embodiments described herein are for illustrative purposes only and are not intended to limit the scope of protection of the invention.

[0036] Hereinafter, an example of the method of the present invention will be described with reference to the accompanying drawings.

[0037] A stepped electrode structure based on a two-dimensional material transistor is provided, in which multiple layers of two-dimensional material 4 are provided in the transistor channel, the electrode is in contact with the upper surface of each layer of two-dimensional material 4, and the contact surfaces of different layers of two-dimensional material 4 and the electrode 3 are not on the same horizontal line, presenting a staggered stepped shape.

[0038] The two-dimensional material 4 is any one of the following: MoS2, MoSe2, MoTe2, WS2, WSe2, WTe2, GeS2, GeSe2, GeTe2, SnS2, SnSe2, SnTe2, SnO, PbS2, PbSe2, PbTe2, GaS, GaSe, GaTe, InS, InSe, InTe, Bi2Se3, Graphene, Black phosphorus, Arsenene, Antimonene, Germanene, Stanene, and Silicene.

[0039] A method for fabricating a stepped electrode structure based on a two-dimensional material transistor specifically includes the following steps:

[0040] Step 1: Clean the conductive substrate 1 and deposit an insulating layer 2 on the conductive substrate 1;

[0041] Step 2: Set a two-dimensional material 4 on the insulating layer 2 of the conductive substrate 1;

[0042] Step 3: Spin-coat the photoresist onto the insulating layer 2 and the two-dimensional material 4;

[0043] Step 4: Pattern the photoresist 5 and perform photolithography;

[0044] Step 5: Etch the two-dimensional material 4 in the channel;

[0045] Step 6: Immerse the etched sample in an organic solution to remove the photoresist 5;

[0046] Step 7: Repeat steps 3 to 6 according to the total number of layers of the two-dimensional material 4, so that the electrode contacts the upper surface of each layer of the two-dimensional material 4. The contact surfaces of different layers of the two-dimensional material 4 and the electrode 3 are not on the same horizontal line, presenting a staggered stepped shape.

[0047] Step 8: Spin-coat the photoresist onto the insulating layer 2 and the etched two-dimensional material;

[0048] Step 9: Pattern the photoresist 5 and perform photolithography to create the electrode pattern;

[0049] Step 10: Prepare electrodes 3 at both ends by metal coating;

[0050] Step 11: Place the sample in an organic solution to remove excess metal plating and residual photoresist from the surface.

[0051] In step one, the conductive substrate material is silicon or copper, and the insulating layer material is one of the following: SiO2, SiC, SiN, Al2O3, HfO2, TiO2, WO3, Ta2O5, ZnO2, TiO2, CaO, ZrO2, La2O3, BaO, MgO, HfSiOx, ZrSiOx, HfLaOx, HfZrOx, HfAlOx, LaAlOx, Y2O3, SrO, Si3N4.

[0052] In step two, the two-dimensional material is mechanically peeled off and then transferred to the insulating layer, or it is grown to directly deposit the two-dimensional material on the substrate insulating layer.

[0053] In step three, the photoresist is one or more of the following superimposed: ultraviolet photoresist, deep ultraviolet photoresist, X-ray photoresist, electron beam photoresist, and ion beam photoresist.

[0054] In step four, the exposure method for the photoresist is one of the following: electron beam lithography, ultraviolet lithography, photolithography without a mask, or photolithography with a mask;

[0055] In step four, the pattern etched on the photoresist is for the purpose of single-layer etching of the two-dimensional material in the subsequent etching process.

[0056] In step five, the etching method for the two-dimensional material is one of the following: dry etching, wet etching, or mechanical etching using a probe of an atomic force microscope. Each etching operation etches only a single layer thickness.

[0057] In step seven, the number of repetitions is the total number of layers of two-dimensional material within the channel minus two.

[0058] In step ten, the metal coating process is electron beam coating or vacuum sputtering coating, and the metal coating material is one of the following: Ti, Cr, Cu, Au, Ag, Pt, Hf, Zr, Ta, W, Sn, Mn, Fe, V, Al.

[0059] The electrode material can be one type of metal or multiple types of metals, which can improve the adhesion of the electrode and reduce the contact resistance.

[0060] Example:

[0061] Fabrication of the stepped electrode for MoS2 transistors:

[0062] 1. Select a 500um thick P++ type Si substrate, and grow 285nm SiO2 on the surface through thermal oxidation as an insulating layer.

[0063] 2. Transfer a 3-layer MoS2 layer onto the substrate insulating layer by peeling off the adhesive tape.

[0064] 3. The PMMA A7 / MMA EL6 double-layer photoresist was spin-coated onto MoS2 and the substrate.

[0065] 4. Use electron beam lithography (EBL) to pattern the photoresist and expose the locations where MoS2 needs to be etched.

[0066] 5. The monolayer thickness of MoS2 is etched using Ar ions in a reactive ion etching (RIE) machine. In this example, the etching equipment is set with Ar gas, RF power of 50W, pressure of 50mTorr, and time of 50s.

[0067] 6. After etching is complete, place the sample in acetone to remove the attached photoresist.

[0068] 7. Repeat steps 1-6 of the first etching process, modifying the exposure pattern position of the EBL in each repetition, which means changing the position of the etched MoS2. After multiple repetitions, the MoS2 surface at both ends of the channel will exhibit a stepped shape.

[0069] 8. Spin-coat PMMA photoresist onto the insulating layer and MoS2.

[0070] 9. Using EBL equipment, pattern the photoresist. Electrode patterns are etched onto the photoresist to prepare for the next step of electrode fabrication.

[0071] 10. Using an electron beam evaporation coating system, grow 10nm Ti and 80nm Au.

[0072] 11. Immerse in acetone solution to remove excess metal coating and residual photoresist. Obtain the complete drain and source stepped electrode structure of the MoS2 transistor.

Claims

1. A method for fabricating a stepped electrode structure based on a two-dimensional material transistor, characterized in that: The stepped electrode structure has multiple layers of two-dimensional material in the transistor channel. The electrode contacts the upper surface of each layer of two-dimensional material. The contact surfaces between the two-dimensional material and the electrode of different layers are not on the same horizontal line, and present a staggered stepped shape along the width of the channel. The method for preparing the stepped electrode structure specifically includes the following steps: Step 1: Clean the conductive substrate and then apply an insulating layer onto it. Step 2: Set a two-dimensional material on the insulating layer of the conductive substrate; Step 3: Spin-coat the photoresist onto the insulating layer and the two-dimensional material; Step four: Pattern the photoresist and perform photolithography; Step 5: Etch the two-dimensional material in the channel; Step 6: Immerse the etched sample in an organic solution to remove the photoresist; Step 7: Repeat steps 3 to 6 according to the total number of layers of the two-dimensional material, so that the electrode is in contact with the upper surface of each layer of the two-dimensional material. The contact surfaces between the two-dimensional material and the electrode of different layers are not on the same horizontal line, presenting a staggered stepped appearance. Step 8: Spin-coat the photoresist onto the insulating layer and the etched two-dimensional material; Step 9: Pattern the photoresist and perform photolithography to create electrode patterns; Step 10: Prepare electrodes at both ends by metal coating; Step 11: Place the sample in an organic solution to remove excess metal plating and residual photoresist from the surface.

2. The method for fabricating a stepped electrode structure based on a two-dimensional material transistor according to claim 1, characterized in that: The two-dimensional material is any one of the following: MoS2, MoSe2, MoTe2, WS2, WSe2, WTe2, GeS2, GeSe2, GeTe2, SnS2, SnSe2, SnTe2, SnO, PbS2, PbSe2, PbTe2, GaS, GaSe, GaTe, InS, InSe, InTe, Bi2Se3, Graphene, Black phosphorus, Arsenene, Antimonene, Germanene, Stanene, and Silicene.

3. The method for fabricating a stepped electrode structure based on a two-dimensional material transistor according to claim 1, characterized in that: In step one, the conductive substrate material is silicon or copper, and the insulating layer material is one of the following: SiO2, SiC, SiN, Al2O3, HfO2, TiO2, WO3, Ta2O5, ZnO2, CaO, ZrO2, La2O3, BaO, MgO, HfSiOx, ZrSiOx, HfLaOx, HfZrOx, HfAlOx, LaAlOx, Y2O3, SrO, Si3N4.

4. The method for fabricating a stepped electrode structure based on a two-dimensional material transistor according to claim 1, characterized in that: In step two, the two-dimensional material is mechanically peeled off and then transferred to the insulating layer, or it is grown to directly deposit the two-dimensional material on the substrate insulating layer.

5. The method for fabricating a stepped electrode structure based on a two-dimensional material transistor according to claim 1, characterized in that: In step three, the photoresist is one or more of the following superimposed: ultraviolet photoresist, deep ultraviolet photoresist, X-ray photoresist, electron beam photoresist, and ion beam photoresist.

6. The method for fabricating a stepped electrode structure based on a two-dimensional material transistor according to claim 1, characterized in that: In step four, the exposure method for the photoresist is one of the following: electron beam lithography, ultraviolet lithography, maskless lithography, or masked lithography.

7. The method for fabricating a stepped electrode structure based on a two-dimensional material transistor according to claim 1, characterized in that: In step five, the etching method for the two-dimensional material is one of the following: dry etching, wet etching, or mechanical etching using a probe of an atomic force microscope. Each etching operation etches only a single layer thickness.

8. The method for fabricating a stepped electrode structure based on a two-dimensional material transistor according to claim 1, characterized in that: In step seven, the number of repetitions is the total number of layers of two-dimensional material in the channel minus 2.

9. The method for fabricating a stepped electrode structure based on a two-dimensional material transistor according to claim 1, characterized in that: In step ten, the metal coating process is electron beam coating or vacuum sputtering coating, and the metal coating material is one of the following: Ti, Cr, Cu, Au, Ag, Pt, Hf, Zr, Ta, W, Sn, Mn, Fe, V, Al.

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