Display device

Abstract

A display device includes a display panel including a display area and a non-display area; the display panel includes a base, light emitting elements disposed in the display area, and a common voltage supply line disposed in the non-display area and electrically connected to the light emitting elements. The common voltage supply line includes at least two main supply lines, a sub-supply line for connecting the at least two main supply lines, and at least one anti-static pattern disposed outside the sub-supply line in a plan view.

Description

[0001] Cross-references to related applications

[0002] This application claims priority and benefit to Korean Patent Application No. 10-2020-0126976, filed on September 29, 2020, with the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to a display device. Background Technology

[0004] Emitting display devices have wide viewing angles, excellent contrast, and fast response times, and therefore have recently been used in various types of display devices.

[0005] Generally, a emitting display device has thin-film transistors and light-emitting elements on a substrate, and the light-emitting elements emit light during operation. Emitter display devices can be used as display units for small-sized products such as smartphones or large-sized products such as televisions or monitors.

[0006] The emitting display device may include a display area in which pixels can be disposed and a non-display area that may be the periphery of the display area. The non-display area of ​​the emitting display device may be formed along the edge of the substrate, thus allowing for the provision of structures to prevent external moisture penetration.

[0007] The information disclosed in this background section is only intended to enhance the understanding of the background of this disclosure, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0008] This disclosure aims to provide a display device including signal wiring for preventing the penetration of external moisture in non-display areas.

[0009] Embodiments of this disclosure provide a display device, which may include: a display panel, including a display area and a non-display area; the display panel may include: a substrate; a light-emitting element disposed in the display area; and a common voltage supply line disposed in the non-display area and electrically connected to the light-emitting element. The common voltage supply line may include: at least two main supply lines; a sub-supply line for connecting the at least two main supply lines; and at least one anti-static pattern disposed outside the sub-supply line in a plan view.

[0010] At least one antistatic pattern may include multiple antistatic patterns, and the multiple antistatic patterns may be arranged in the first direction.

[0011] Multiple antistatic patterns can be spaced apart from each other.

[0012] The common voltage supply line may include a connecting bridge that is electrically connected to the common electrode of the light-emitting element.

[0013] The connecting bridge can be electrically connected to the sub-supply line and multiple anti-static patterns.

[0014] Each of at least one antistatic pattern and sub-supply line may include an extension connected to the connecting bridge.

[0015] At least two main supply lines may be spaced apart in a first direction, and sub-supply lines may extend in the first direction and be electrically connected to at least two main supply lines.

[0016] The display panel may further include: a buffer layer, an interlayer insulating layer, a first insulating layer and a second insulating layer sequentially disposed on a substrate, wherein the first insulating layer may form a valley between the main supply line and the antistatic pattern, and the second insulating layer may fill the valley.

[0017] The display panel may further include: a first area that overlaps with the main supply line, the sub-supply line and the anti-static pattern; and a second area, wherein the first area may not overlap with the second insulating layer.

[0018] The connecting bridge can overlap with the second insulation layer in the second zone.

[0019] The sub-supply line may include at least one of the following: a first sub-supply line between the substrate and the buffer layer; a second sub-supply line between the buffer layer and the interlayer insulation layer; and a third sub-supply line between the interlayer insulation layer and the first insulation layer.

[0020] The display panel may further include: a metal layer disposed on a substrate; a gate electrode disposed on a buffer layer; and a source electrode and a drain electrode disposed on an interlayer insulating layer. The first sub-supply line and the metal layer may be disposed on the same layer, the second sub-supply line and the gate electrode may be disposed on the same layer, and the third sub-supply line, the source electrode, and the drain electrode may be disposed on the same layer.

[0021] Another embodiment of this disclosure provides a display device, which may include a display panel, the display panel including a display area and a non-display area, the display panel including: a substrate; a light-emitting element disposed in the display area and electrically connected to a thin-film transistor; an insulating layer between the substrate and the light-emitting element; and a common voltage supply line disposed in the non-display area and electrically connected to the light-emitting element. The common voltage supply line may include: a main supply line; a sub-supply line electrically connected to the main supply line; and at least one anti-static pattern disposed outside the sub-supply line in a plan view, and the insulating layer may be spaced apart from the main supply line, the sub-supply line and the at least one anti-static pattern in a plan view.

[0022] The insulation layer may not overlap with the main supply line, the sub-supply line, and at least one antistatic pattern.

[0023] The common voltage supply line may include a connecting bridge that is electrically connected to the common electrode of the light-emitting element.

[0024] The connecting bridge can be electrically connected to the sub-supply line and multiple anti-static patterns.

[0025] The common voltage supply line may include: at least two main supply lines spaced apart in a first direction and extending in a second direction that may be perpendicular to the first direction; and a sub-supply line extending in the first direction and electrically connected to the at least two main supply lines.

[0026] The display panel may further include: a buffer layer, an interlayer insulating layer, a first insulating layer and a second insulating layer sequentially disposed on a substrate, wherein the sub-supply line may include at least one of a first sub-supply line between the substrate and the buffer layer, a second sub-supply line between the buffer layer and the interlayer insulating layer, and a third sub-supply line between the interlayer insulating layer and the first insulating layer.

[0027] The connecting bridge can be installed on a layer higher than the sub-supply line.

[0028] According to an embodiment, a display device can be provided that has an excellent effect in preventing moisture penetration in non-display areas. Attached Figure Description

[0029] Figure 1 An exploded perspective view of a display device according to an embodiment is shown schematically.

[0030] Figure 2 A top plan view of the display panel according to an embodiment is shown schematically.

[0031] Figure 3 The enlargement is shown schematically. Figure 2 A top-down plan of area A.

[0032] Figure 4 The enlargement is shown schematically. Figure 3 A top-down plan of area E.

[0033] Figure 5 It schematically shows about Figure 3 A cross-sectional view of line B-B'.

[0034] Figure 6 The illustration shows about Figure 3 A cross-sectional view of line C-C'.

[0035] Figure 7 The illustration shows about Figure 3 A cross-sectional view of line D-D'.

[0036] Figure 8 It schematically shows the following based on Figure 7 A cross-sectional view of the configuration for connecting the display area and the non-display area in an embodiment.

[0037] Figure 9 The illustration schematically shows the following regarding the embodiments. Figure 3 A cross-sectional view of line D-D'.

[0038] Figure 10 It schematically shows the following based on Figure 9 A cross-sectional view of the configuration for connecting the display area and the non-display area in an embodiment.

[0039] Figure 11 The illustration schematically shows the following regarding the embodiments. Figure 3 A cross-sectional view of line D-D'.

[0040] Figure 12 The illustration schematically shows the following regarding the embodiments. Figure 3 A cross-sectional view of line D-D'.

[0041] Figure 13 It schematically shows the following based on Figure 12 A cross-sectional view of the configuration for connecting the display area and the non-display area in an embodiment.

[0042] Figure 14 , Figure 15 , Figure 16 , Figure 17 , Figure 18 and Figure 19 The illustration schematically shows the following regarding the embodiments. Figure 3 A cross-sectional view of line D-D'. Detailed Implementation

[0043] The present disclosure will be described more fully below with reference to the accompanying drawings, in which embodiments of the disclosure are illustrated. As those skilled in the art will recognize, the described embodiments may be modified in various ways without departing from the spirit or scope of the present disclosure.

[0044] Therefore, the accompanying drawings and descriptions should be considered illustrative rather than restrictive in nature.

[0045] Throughout the specification, the same reference numerals denote the same elements.

[0046] For better understanding and ease of description, the dimensions and thicknesses of each component shown in the accompanying drawings are arbitrarily illustrated, but this disclosure is not limited to the illustrations. The thicknesses of layers, films, panels, areas, etc., may be exaggerated in the drawings for clarity. The thicknesses of some layers and areas may be exaggerated for ease of interpretation.

[0047] It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, the element may be directly on the other element, or an intermediary element may be present. In contrast, when an element is referred to as being "directly on" another element, an intermediary element may not be present. Furthermore, in the specification, the terms "on" or "above" refer to being positioned (e.g., located) on or below a target portion, and do not necessarily mean being positioned on the upper side of the target portion based on the direction of gravity.

[0048] Unless explicitly stated otherwise, the words “including,” “contains,” “has,” and “comprising,” and their variations, shall be understood to imply inclusion of the stated element, rather than exclusion of any other element.

[0049] As used herein, unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well (and vice versa).

[0050] In the specification and claims, for purposes of meaning and interpretation, the term "and / or" is intended to include any combination of the terms "and" and "or". For example, "A and / or B" can be understood to mean "A, B, or A and B". The terms "and" and "or" can be used in combination or separately and can be understood as equivalent to "and / or".

[0051] In the specification and claims, for the purposes of their meaning and interpretation, the phrase "at least one of..." is intended to include the meaning of "at least one selected from the group of...". For example, "at least one of A and B" can be understood to mean "A, B, or A and B".

[0052] Furthermore, throughout the specification, the phrase "in a plan view" refers to the target portion viewed from the top, and the phrase "in a cross-sectional view" refers to the cross-section formed by vertically cutting the target portion viewed from the side.

[0053] The term "overlap" or "overrides" means that the first object may be above, below, or to the side of the second object, or vice versa. Furthermore, the term "overlap" may include layers, stacks, surfaces or finishes, extensions, covers, or partial covers, or any other suitable term that will be understood and appreciated by one of ordinary skill in the art. When an element is described as "not overlapping" with another element, this may include that the elements are spaced apart from each other, offset from each other, or separated from each other, or any other suitable term that will be understood and appreciated by one of ordinary skill in the art.

[0054] Given the measurements discussed and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system), the terms “approximately” or “about” as used herein include stated values ​​and are intended to mean within an acceptable range of deviation from a particular value as determined by one of ordinary skill in the art. For example, “approximately” may mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the stated value.

[0055] Unless otherwise defined or implied, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will be further understood that, unless expressly defined herein, terms such as those defined in a general dictionary should be interpreted as having a meaning consistent with their meaning in the context of the relevant field, and will not be interpreted in an idealized or overly formalized sense.

[0056] Figure 1 An exploded perspective view of a display device according to an embodiment is schematically shown, and Figure 2 A top plan view of the display panel according to an embodiment is shown schematically.

[0057] refer to Figure 1 The display device may include a display panel (DP), a window (WD), and a housing (HM).

[0058] The side of the display panel DP on which an image can be displayed can be parallel to the side defined by the first direction DR1 and the second direction DR2. The normal direction of the side on which an image can be displayed, for example, the thickness direction of the display panel DP, is represented by the third direction DR3. The front (or top) and rear (or bottom) sides of each component can be distinguished by the third direction DR3. However, the directions represented by the first direction DR1, the second direction DR2, and the third direction DR3 are relative concepts and can be converted to other directions.

[0059] The display panel DP can be a flat, rigid display panel, but it is not limited to this, and it can also be a flexible display panel. According to embodiments, the display panel DP can be an emitting display panel, but it is not specifically limited to this. For example, the display panel DP can be an organic light-emitting panel or a quantum dot light-emitting display panel. The emitting layer of an organic light-emitting panel can include organic light-emitting materials. The emitting layer of a quantum dot light-emitting display panel can include quantum dots and quantum rods. The display panel DP will be described as an organic light-emitting panel.

[0060] like Figure 1 As shown, the display panel DP may include a display area DA for displaying images and a non-display area PA provided near the display area DA. The non-display area PA may represent an area for not displaying images. For example, the display area DA may have a quadrilateral shape, and the non-display area PA may have a shape surrounding the display area DA. However, it is not limited to this, and the shapes of the display area DA and the non-display area PA can be designed relatively.

[0061] The window WD can be positioned on the display panel DP. The window WD can protect the display panel DP. The window WD can be integrated into the housing HM to form the internal space. The window WD and the housing HM can define the appearance of the display device.

[0062] The window WD may include a transmissive region TA and a blocking region BA. The transmissive region TA may be an area used to transmit most of the incident light. The transmissive region TA may be optically transparent. The transmissive region TA may have a light transmittance of approximately 90% or higher. The transmissive region TA may overlap with the display region DA of the display panel DP.

[0063] The blocking area BA can be an area used to block most of the incident light. The blocking area BA can prevent the configuration set on the lower part of the window WD from being seen. In addition, the blocking area BA can reduce the reflection of light entering from the outside of the window WD. The blocking area BA can overlap with the non-display area PA of the display panel DP.

[0064] The housing (HM) provides internal space. The display panel (DP) can be installed inside the housing (HM). In addition to the display panel (DP), various electronic components such as power supplies, storage devices, and audio input and output modules can be installed in the housing (HM).

[0065] refer to Figure 2 The display panel DP may include a display area DA and a non-display area PA. The non-display area PA may be defined along the edge of the display area DA.

[0066] The display panel DP may include pixels PX. Pixels PX may be disposed on the substrate 110 in the display area DA. Each pixel PX may include an organic light-emitting diode and a pixel driving circuit connected to the organic light-emitting diode.

[0067] Each pixel PX can emit, for example, red, green, blue, or white light, and may include, for example, an organic light-emitting diode (OLED). The display panel DP can provide an image through the light emitted by the pixels PX, and the display area DA can be defined by the pixels PX. In the specification, the non-display area PA can be an area in which pixels PX may not be disposed, and said area may not display an image.

[0068] The display panel DP may include signal lines and pads. The signal lines may include scan lines SL extending in a first direction DR1 and data lines DL and drive voltage lines PL extending in a second direction DR2.

[0069] The scan driver 20 can be positioned on the substrate 110 in the non-display area PA. The scan driver 20 can generate a scan signal and transmit the scan signal to the pixel PX via the scan line SL. According to an embodiment, the scan driver 20 can be disposed on the right and left sides of the display area DA. The specification shows a configuration in which the scan driver 20 can be disposed on each side of the display area DA, and as another embodiment, the scan driver 20 can be disposed on one side of the display area DA.

[0070] The pad portion 40 may be disposed on one end of the display panel DP and may include terminals 41, 42, 44 and 45. The pad portion 40 may not be covered by an insulating layer but may be exposed, so that the pad portion 40 may be electrically connected to a controller (not shown), such as a flexible printed circuit board or an IC chip.

[0071] The controller can convert image signals into image data signals and transmit them to the data driver 50 via terminal 41. The controller can receive vertical synchronization signals, horizontal synchronization signals, and clock signals, generate control signals for controlling the scan driver 20 and the data driver 50, and transmit these control signals to terminals 44 and 41. The controller can transmit the drive voltage ELVDD to the drive voltage supply line 60 via terminal 42. The controller can also transmit the common voltage ELVSS to the common voltage supply line VSSL via terminal 45.

[0072] The data driver 50 can be located in the non-display area PA. The data driver 50 can generate data signals and transmit the data signals to the pixel PX via the data line DL. The data driver 50 can be located on one side of the display panel DP, and for example, the data driver 50 can be located between the pad portion 40 and the display area DA.

[0073] The drive voltage supply line 60 can be located in the non-display area PA. For example, the drive voltage supply line 60 can be located between the data driver 50 and the display area DA. The drive voltage supply line 60 can supply the drive voltage ELVDD to the pixel PX. The drive voltage supply line 60 can be located on the first direction DR1 and can be connected to the drive voltage line PL located on the second direction DR2.

[0074] The common voltage supply line VSSL can be set in the non-display area PA, and the common voltage ELVSS can be supplied to the common electrode 270 of the organic light-emitting element of pixel PX (reference). Figure 8 The common voltage supply line VSSL can be formed in a closed loop extending from the lateral side of the substrate 110 and around three sides along the edge of the substrate 110.

[0075] The common voltage supply line (VSSL) may include a main supply line 70, a sub-supply line 71, and an anti-static pattern 72. Reference will now be made to... Figures 3 to 8 Description of location Figure 2 The common voltage supply line VSSL in the non-display area PA.

[0076] Figure 3 The enlargement is shown schematically. Figure 2 A top-down plan of area A. Figure 4 The enlargement is shown schematically. Figure 3 A top-down plan of area E. Figure 5 The illustration shows about Figure 3 A cross-sectional view of line B-B'. Figure 6 The illustration shows about Figure 3 A cross-sectional view of line C-C'. Figure 7 The illustration shows about Figure 3 A cross-sectional view of line D-D'. Figure 8 It schematically shows the following based on Figure 7 A cross-sectional view of the configuration for connecting the display area and the non-display area in an embodiment.

[0077] refer to Figure 2 and Figure 3The common voltage supply line VSSL may include a main supply line 70, a sub-supply line 71 extending from the main supply line 70, an anti-static pattern 72, and a connecting bridge 73. The display panel DP may include a first area and a second area, the first area may overlap with the main supply line 70, the sub-supply line 71, and the anti-static pattern 72, and the connecting bridge 73 may be in the second area.

[0078] The main supply line 70 can be referenced Figure 2 The described terminal 45 extends and can receive a common voltage ELVSS. The main supply line 70 can extend in the second direction DR2 and can be bent from the upper part of the substrate 110 in the first direction DR1. The display device may include two main supply lines 70. The two main supply lines 70 can be positioned on the right and left sides of the substrate 110, respectively. The two main supply lines 70 can be symmetrical about an axis parallel to the second direction DR2.

[0079] Sub-supply line 71 may extend in the first direction DR1 and may connect to at least two main supply lines 70. Sub-supply line 71 may extend from the end of the main supply line 70. Sub-supply line 71 may form a closed-loop common voltage supply line VSSL by connecting at least two spaced-apart main supply lines 70. The specification shows an embodiment in which sub-supply line 71 may be a straight line, but is not limited thereto; sub-supply line 71 may have a zigzag shape or a wavy shape in a plan view.

[0080] The anti-static pattern 72 may have a rectangular shape in a plan view. The common voltage supply line VSSL may include the anti-static pattern 72. The anti-static pattern 72 may be disposed on the first direction DR1. In a plan view, the anti-static patterns 72 may be spaced apart from each other. The anti-static pattern 72 may block static electricity input from the outside of the substrate 110 until a connecting bridge 73 to be formed as described in the process for manufacturing the display device can be formed.

[0081] The connecting bridge 73 can electrically connect the anti-static pattern 72 and the sub-supply line 71 extending from the main supply line 70. Specifically, the connecting bridge 73 can connect to an extension protruding from the anti-static pattern 72 in the second direction DR2 and to an extension protruding from the sub-supply line 71 in the second direction DR2. Detailed contact configurations will be described with respect to cross-sections. The connecting bridge 73 can also connect the sub-supply line 71 and the common electrode 270 of the light-emitting element extending to the display area DA (see reference). Figure 8 ).

[0082] The main supply line 70, sub-supply line 71, and antistatic pattern 72 may include a double-layered metal layer. The main supply line 70, sub-supply line 71, and antistatic pattern 72 may each include a first layer positioned on the substrate 110 and a buffer layer 111 (see reference). Figure 5 The second layer on top.

[0083] like Figure 4 and Figure 5 As shown, the main supply line 70 may include a first main supply line 70a positioned on the substrate 110 and a second main supply line 70b positioned on the buffer layer 111.

[0084] refer to Figure 3 and Figure 5 The sub-supply line 71 may include a first sub-supply line 71a positioned on the substrate 110 and a second sub-supply line 71b positioned on the buffer layer 111. The antistatic pattern 72 may include a first antistatic pattern 72a positioned on the substrate 110 and a second antistatic pattern 72b positioned on the buffer layer 111.

[0085] The main supply line 70, sub-supply line 71, and antistatic pattern 72 can be configured on substantially the same layer. The first main supply line 70a, the first sub-supply line 71a, and the first antistatic pattern 72a can be formed from the same material in the same process. The second main supply line 70b, the second sub-supply line 71b, and the second antistatic pattern 72b can be formed from the same material in the same process.

[0086] Although not shown in the specification, the first main supply line 70a and the second main supply line 70b can contact each other in the area where the portion of the buffer layer 111 can be removed. The first sub-supply line 71a and the second sub-supply line 71b can contact each other in the area where the portion of the buffer layer 111 can be removed. The first antistatic pattern 72a and the second antistatic pattern 72b can contact each other in the area where the portion of the buffer layer 111 can be removed.

[0087] The main supply line 70, sub-supply line 71, and antistatic pattern 72 may each have a grid shape in the plan view. The first main supply line 70a may overlap with the second main supply line 70b. In the case of wiring that may include a grid shape, processes such as exposure and curing from the back side of the substrate 110 may be permitted in the manufacturing process through the spaces between the grids.

[0088] The width W1 of one wiring of the first main supply line 70a (reference) Figure 4 It can be greater than the width W2 of one of the cables of the second main supply line 70b (reference). Figure 4 The second main supply line 70b may completely overlap with the first main supply line 70a. A portion of the first main supply line 70a may overlap with the second main supply line 70b. The sub-supply line 71 and the antistatic pattern 72 may include the same shape as the main supply line 70.

[0089] Valley VAs can be positioned between the main supply line 70 and the anti-static pattern 72, as well as between two adjacent anti-static patterns 72. A valley VA indicates an area where no additional wiring needs to be positioned. The cross-sectional shape of the valley VA will now be described.

[0090] Now refer to Figure 5 Description by Figure 3 The line B-B' in the diagram represents the stacked structure.

[0091] The main supply lines 70 and the antistatic pattern 72, which are spaced apart from each other, can be positioned on the substrate 110.

[0092] The main supply line 70 may include a first main supply line 70a positioned on the substrate 110 and a second main supply line 70b positioned on the buffer layer 111. The antistatic pattern 72 may include a first antistatic pattern 72a positioned on the substrate 110 and a second antistatic pattern 72b positioned on the buffer layer 111.

[0093] Interlayer insulation layer 160 and first insulation layer 181 can be positioned on main supply line 70 and anti-static pattern 72, and second insulation layer 182 can be positioned on first insulation layer 181. Second insulation layer 182 can be connected to display panel DP (reference). Figure 2 The first regions of ) do not overlap. For example, such as Figure 5 As shown, the second insulating layer 182 does not overlap with the main supply line 70 and the antistatic pattern 72.

[0094] Valley VA can be positioned between the main supply line 70 and the anti-static pattern 72. For example... Figure 3 As shown, valley VA can extend in the second direction DR2.

[0095] Opening areas OP1 and OP2 can be positioned between the main supply line 70 and the antistatic pattern 72. Buffer layer 111, interlayer insulation layer 160, and first insulation layer 181 can have a stepped shape and can be positioned within opening areas OP1 and OP2. The stepped buffer layer 111, interlayer insulation layer 160, and first insulation layer 181 can form valleys VA. At least a portion of the valleys VA can be filled by the second insulation layer 182. The upper side 182s of the second insulation layer 182 positioned within the valleys VA can be positioned at a horizontal plane lower than the upper side 181s of the first insulation layer 181.

[0096] The instruction manual does not separately show the cross-section between the antistatic patterns 72, but the cross-section may include, for example, the cross-section between the antistatic patterns 72. Figure 5 The cross-section shown with respect to line B-B' illustrates the second insulating layer 182 disposed in valley VA. (As shown) Figure 3 As shown, the valley VA positioned between the antistatic patterns 72 can extend in the second direction DR2.

[0097] refer to Figure 6 The main supply line 70 may include a first main supply line 70a positioned on the substrate 110 and a second main supply line 70b positioned on the buffer layer 111. The connecting bridge 73 may be positioned on the buffer layer 111 and the interlayer insulating layer 160 sequentially stacked on the substrate 110. The connecting bridge 73 is located in the display panel DP (reference). Figure 2 In the second region, it overlaps with the second insulating layer 182. For example, as... Figure 6 As shown, the first insulating layer 181 and the second insulating layer 182 can be positioned on the connecting bridge 73.

[0098] The valley VA can be positioned between the main supply line 70 and the connecting bridge 73. The valley VA can be positioned between the main supply line 70 and the anti-static pattern 72 (see reference). Figure 5 The second insulating layer 182 may be positioned on at least a portion of the valley VA between the two sides. The second insulating layer 182 may be attached to the display panel DP (reference). Figure 2 The first regions of ) do not overlap. For example, such as Figure 6 As shown, the second insulating layer 182 does not overlap with the main supply line 70.

[0099] The second insulating layer 182 may include a first portion 182a filled with valley VA and a second portion 182b positioned on the connecting bridge 73. The first portion 182a may be connected to the second portion 182b. The thickness t1 of the first portion 182a may be greater than the thickness t2 of the second portion 182b.

[0100] Opening regions OP1 and OP2 can be positioned between the main supply line 70 and the connecting bridge 73. Buffer layer 111, interlayer insulation layer 160, and first insulation layer 181 can have a stepped shape and can be positioned within opening regions OP1 and OP2. The stepped buffer layer 111, interlayer insulation layer 160, and first insulation layer 181 can form valleys VA. At least a portion of the valleys VA can be filled by a first portion 182a of the second insulation layer 182.

[0101] The upper side 182s of the second insulating layer 182 corresponding to the first portion 182a can be positioned at a horizontal plane lower than the upper side 181s of the first insulating layer 181 positioned in the main supply line 70. The second portion 182b can be positioned on the connecting bridge 73 and the first insulating layer 181. The upper side 182s of the second insulating layer 182 corresponding to the second portion 182b can be positioned at a horizontal plane higher than the upper side 181s of the first insulating layer 181 that overlaps with the second portion 182b. The second portion 182b of the second insulating layer 182 can cover the upper side 181s of the first insulating layer 181.

[0102] refer to Figure 3 and Figure 7The sub-supply line 71 extending in the first direction DR1 may include a first sub-supply line 71a positioned on the substrate 110 and a second sub-supply line 71b positioned on the buffer layer 111.

[0103] The first sub-supply line 71a may have a grid shape in the plan view. The second sub-supply line 71b may also have a grid shape in the plan view. The first sub-supply line 71a may overlap with the second sub-supply line 71b. The second sub-supply line 71b may include an extension 71c protruding to be electrically connected to the connecting bridge 73. The extension 71c protruding from the second sub-supply line 71b is shown in the cross-sectional view, but it is not limited thereto and may include an extension protruding from the first sub-supply line 71a.

[0104] Interlayer insulation 160 can be positioned on sub-supply line 71. Connecting bridge 73 can be positioned on interlayer insulation 160. Connecting bridge 73 can be connected to sub-supply line 71, such as extension 71c, through opening OP of exposed extension 71c.

[0105] A first insulating layer 181 may be positioned on the connecting bridge 73. A second insulating layer 182 may be positioned on at least a portion of the first insulating layer 181. The second insulating layer 182 may be connected to the display panel DP (reference). Figure 2 The first zone of the bridge does not overlap, and the connecting bridge 73 can be used on the display panel DP (see reference). Figure 2 In the second region, it overlaps with the second insulating layer 182. For example, as... Figure 7 As shown, the second insulating layer 182 may overlap with the connecting bridge 73 and may not overlap with the sub-supply line 71.

[0106] Moisture seeping from the outside of the display panel can be trapped by moisture positioned in areas such as... Figure 3 The second insulating layer 182 is input between the adjacent main supply line 70 and the antistatic pattern 72, or between adjacent antistatic patterns 72, as marked by arrow F in the diagram.

[0107] According to an embodiment, the path through which moisture may enter can be blocked by the sub-supply line 71. For example, the second insulating layer 182 may not be positioned in the sub-supply line 71, thus potentially blocking the path through which the incoming moisture moves. Moisture flow into the display area DA (reference) can be effectively prevented. Figure 2 )middle.

[0108] refer to Figure 3 and Figure 8 The sub-supply line 71, located in the non-display area PA and extending from the main supply line 70, and the connecting bridge 73 electrically connected to the anti-static pattern 72, can be electrically connected to the end of the common electrode 270 extending from the display area DA. Common voltage ELVSS (reference) Figure 2It can be transmitted to the common electrode 270 of the organic light-emitting element.

[0109] about Figure 8 The display area DA shown can have a metal layer 101 positioned on the substrate 110. The metal layer 101 can overlap with the semiconductor layer 131.

[0110] Metal layer 101 can prevent the semiconductor layer 131 from deteriorating in performance by preventing external light from reaching it. Metal layer 101 may include, for example, a metal, a metal alloy, or a conductive material equivalent to a metal.

[0111] Metal layer 101 can receive voltage from a region (not shown) extending from the source electrode 173, which will be described. Therefore, in the saturation region of the voltage-current characteristic curve of transistor Tr, the rate of current change can be reduced, and the characteristics as a driving transistor can be improved. However, metal layer 101 is not limited to this, and metal layer 101 can be connected to another signal line or can be in a floating state.

[0112] Buffer layer 111 can be positioned on substrate 110 and metal layer 101. Buffer layer 111 may include silicon nitride (SiN). x ) or silicon dioxide (SiO) x ).

[0113] Semiconductor layer 131 may be positioned on buffer layer 111. Semiconductor layer 131 may include at least one of polysilicon and oxide semiconductor. Semiconductor layer 131 may include a channel region C, a source region S, and a drain region D. Source region S and drain region D may be disposed on corresponding sides of channel region C. Channel region C may include an intrinsic semiconductor that may not be doped with impurities, and source region S and drain region D may include impurity semiconductors that may be doped with conductive impurities. Semiconductor layer 131 may be made of oxide semiconductor and may be provided with an additional passivation layer (not shown) to protect the oxide semiconductor material that may be susceptible to external conditions such as high temperatures.

[0114] A gate insulating layer 141 overlapping with the channel region C can be positioned on the semiconductor layer 131. The gate insulating layer 141 may include silicon nitride (SiN). x ) and silicon dioxide (SiO) x At least one of the following: a single layer or multiple layers.

[0115] The gate electrode 124 can be positioned on the gate insulating layer 141, and the gate electrode 124 can be a single layer or multiple layers, wherein one or more metal films, including copper (Cu), copper alloy, aluminum (Al), aluminum alloy, molybdenum (Mo), and molybdenum alloy, can be stacked on top of each other.

[0116] Interlayer insulating layer 160 may be positioned on gate electrode 124 and gate insulating layer 141. Interlayer insulating layer 160 may include, for example, silicon nitride (SiN). x ), silicon dioxide (SiO) x Inorganic materials, organic materials, or combinations thereof.

[0117] The source electrode 173 and the drain electrode 175 can be positioned on the interlayer insulating layer 160. The source electrode 173 and the drain electrode 175 can be connected to the source region S and the drain region D of the semiconductor layer 131 through the contact holes of the interlayer insulating layer 160, respectively.

[0118] A first insulating layer 181 and a second insulating layer 182 may be sequentially positioned on an interlayer insulating layer 160, a source electrode 173, and a drain electrode 175. The first insulating layer 181 may include, for example, silicon nitride (SiN). x ), silicon dioxide (SiO) x The second insulating layer 182 may be made of inorganic materials, organic materials, or combinations thereof, such as polyacrylate resin or polyimide resin, organic materials, laminated films of organic and inorganic materials, or inorganic films, or combinations thereof.

[0119] Pixel electrode 191 can be positioned on the second insulating layer 182. Pixel electrode 191 can be connected to drain electrode 175 through contact holes in insulating layers 181 and 182.

[0120] The transistor Tr can be made of a gate electrode 124, a semiconductor layer 131, a source electrode 173 and a drain electrode 175, and can be connected to a pixel electrode 191 and can supply current to the light-emitting element LD.

[0121] The separator 360 may be positioned on the second insulating layer 182 and the pixel electrode 191. The separator 360 may include an opening that at least partially overlaps with the pixel electrode 191 and defines an emission region. The opening may have a planar shape substantially similar to that of the pixel electrode 191. The opening may have a rhomboid shape in a planar view or may have an octagonal shape that is similar to a rhomboid, and is not limited thereto; the opening may have various shapes such as polygons (e.g., quadrilaterals).

[0122] The partition wall 360 may include organic materials such as polyacrylate resin, polyimide resin, silica-based inorganic materials, or combinations thereof.

[0123] The emitter layer 370 can be positioned on the pixel electrode 191 overlapping the opening. The emitter layer 370 can be made of a low-molecular-weight organic material or a polymeric organic material such as PEDOT (poly(3,4-ethylenedioxythiophene)). The emitter layer 370 can be a multilayer comprising at least one of a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL).

[0124] The emission layer 370 may be positioned (e.g., mostly positioned) in the opening, and may also be positioned on the side of the partition wall 360 or above the partition wall 360.

[0125] The common electrode 270 can be positioned on the emitter layer 370. The common electrode 270 can be positioned on multiple pixels. The common electrode 270 can extend to the non-display area PA and can be electrically connected to the connection bridge 73 positioned in the non-display area PA, thus the common electrode 270 can receive a common voltage ELVSS (reference). Figure 2 ).

[0126] Pixel electrode 191, emitter layer 370, and common electrode 270 can constitute a light-emitting element (LD). Here, pixel electrode 191 can be an anode, which can be a hole injection electrode, and common electrode 270 can be a cathode, which can be an electron injection electrode. However, the embodiments are not limited to this, and according to the method for driving an emitting display device, pixel electrode 191 can be a cathode and common electrode 270 can be an anode.

[0127] Holes and electrons can be injected into the organic emission layer 370 from the pixel electrode 191 and the common electrode 270, respectively, and light emission can be generated when excitons, which can be combinations of injected holes and electrons, descend from the excited state to the ground state.

[0128] An encapsulation layer (not shown) may be positioned on the common electrode 270. The encapsulation layer (not shown) may cover the top and lateral sides of the light-emitting element LD to seal the light-emitting element LD. The light-emitting element LD may be very susceptible to moisture and oxygen, therefore the encapsulation layer (not shown) may seal the light-emitting element LD to prevent the inflow of external moisture and oxygen.

[0129] The encapsulation layer (not shown) may include multiple layers, may be made of a composite film including an inorganic film and an organic film therein, and may be made of, for example, three layers in which a first inorganic film, an organic film and a second inorganic film may be sequentially positioned.

[0130] Now refer to Figures 9 to 19 The common voltage supply line located in the non-display area is described according to the embodiment. Components identical to those described above will be omitted.

[0131] Figure 9 The illustration schematically shows the following regarding the embodiments. Figure 3 The cross-sectional view of line D-D', and Figure 10 It schematically shows the following based on Figure 9 A cross-sectional view of the configuration for connecting the display area and the non-display area in an embodiment.

[0132] refer to Figure 9 and Figure 10 According to the embodiment, the sub-supply line 71 may be made of a single conductive layer. The sub-supply line 71 may include a first sub-supply line 71a positioned between the substrate 110 and the buffer layer 111. The sub-supply line 71 may extend in a first direction DR1 and may include an extension 71d protruding in a second direction DR2.

[0133] This specification illustrates and describes embodiments in which the sub-supply line 71 can be made of a single conductive layer, but is not limited thereto. Main supply line 70 (reference) Figure 3 ) and antistatic pattern 72 (reference) Figure 3 It can be formed as a single conductive layer in the same manner as sub-supply line 71, or as referred to Figures 3 to 7 As described, the main supply line 70 and the anti-static pattern 72 can be formed as a double layer, and the sub-supply line 71 can be formed as a single layer. For example, combinations with various configurations described in the specification are permitted.

[0134] The connecting bridge 73 can be positioned on the buffer layer 111. The extension 71d can be exposed by the opening OP. The extension 71d can be electrically connected to the connecting bridge 73 in the exposed area.

[0135] The sub-supply line 71 can be positioned on the same layer as the metal layer 101 located in the display area DA, and can include the same material. The sub-supply line 71 and the metal layer 101 can be formed according to the same process.

[0136] The connecting bridge 73 can be positioned on the same layer as the gate electrode 124 positioned in the display area DA, and can comprise the same material. The connecting bridge 73 and the gate electrode 124 can be formed according to the same process.

[0137] Interlayer insulation layer 160 and first insulation layer 181 may be stacked sequentially on each other on sub-supply line 71. Interlayer insulation layer 160, first insulation layer 181 and second insulation layer 182 may be stacked sequentially on connecting bridge 73.

[0138] The second insulating layer 182 can be removed from the area where the sub-supply line 71 can be positioned, thus blocking the path for moisture from the outside to penetrate into the display area DA.

[0139] refer to Figure 10 The common electrode 270, located in the display area DA, can extend to the non-display area PA and can be electrically connected to the end of the connecting bridge 73 located on the buffer layer 111. The specification shows an embodiment in which the common electrode 270 can be directly connected to the connecting bridge 73, but is not limited thereto; additional connecting members can be further positioned between the common electrode 270 and the connecting bridge 73.

[0140] Figure 11 The illustration schematically shows the following regarding the embodiments. Figure 3 A cross-sectional view of line D-D'.

[0141] refer to Figure 11 The sub-supply line 71 can be fabricated as a single conductive layer. The sub-supply line 71 may include a first sub-supply line 71a positioned between the substrate 110 and the buffer layer 111. The sub-supply line 71 may extend in a first direction DR1 and may include an extension 71d protruding in a second direction DR2.

[0142] Buffer layer 111 and interlayer insulation layer 160 can be positioned on sub-supply line 71. Connecting bridge 73 can be positioned on interlayer insulation layer 160. Extension 71d can be exposed by opening OP. Extension 71d can be electrically connected to connecting bridge 73 in the exposed area.

[0143] Sub-supply line 71 can be positioned in the display area DA (reference) Figure 8 Metal layer 101 in ) (reference) Figure 8 They are positioned on the same layer and can include the same material. Sub-supply line 71 and metal layer 101 (reference) Figure 8 They can be made using the same process.

[0144] Connector 73 can be positioned in the display area DA (reference) Figure 8 Source electrode 173 in ) (reference) Figure 8 ) and drain electrode 175 (reference) Figure 8 They are positioned on the same layer and may include the same material. Connecting bridge 73, source electrode 173 (reference) Figure 8 ) and drain electrode 175 (reference) Figure 8 They can be made using the same process.

[0145] A first insulating layer 181 and a second insulating layer 182 may be positioned on the connecting bridge 73. The first insulating layer 181 may overlap with the sub-supply line 71 and may overlap with the connecting bridge 73. The second insulating layer 182 may not overlap with the sub-supply line 71 but may overlap with the connecting bridge 73.

[0146] The second insulating layer 182 can be removed from the area where the sub-supply line 71 can be positioned, thus blocking the path of moisture seeping from the outside into the display area.

[0147] like Figure 8 As shown, the connecting bridge 73 can be connected to the common electrode 270, and its redundant description will be omitted.

[0148] Figure 12 The illustration schematically shows the following regarding the embodiments. Figure 3 The cross-sectional view of line D-D', and Figure 13 It schematically shows the following based on Figure 12 A cross-sectional view of the configuration for connecting the display area and the non-display area in an embodiment.

[0149] refer to Figure 12 and Figure 13 The sub-supply line 71 can be fabricated as a single conductive layer. The sub-supply line 71 may include a first sub-supply line 71a positioned between the substrate 110 and the buffer layer 111. The sub-supply line 71 may extend in a first direction DR1 and may include an extension 71d protruding in a second direction DR2.

[0150] The sub-supply line 71 can be positioned on the same layer as the metal layer 101 positioned in the display area DA, and can comprise the same material. The sub-supply line 71 and the metal layer 101 can be manufactured using the same process.

[0151] Buffer layer 111, interlayer insulation layer 160, and first insulation layer 181 can be positioned on sub-supply line 71. Second insulation layer 182 can be positioned on a portion of first insulation layer 181. Connecting bridge 73 can be positioned on first insulation layer 181 and second insulation layer 182.

[0152] The extension section 71d can be exposed by the opening OP. The extension section 71d can be electrically connected to the connecting bridge 73 in the exposed area.

[0153] The connecting bridge 73 can be positioned on the same layer as the pixel electrode 191 located in the display area DA, and can comprise the same material. The connecting bridge 73 and the pixel electrode 191 can be manufactured using the same process.

[0154] The first insulating layer 181 may overlap with the sub-supply line 71 and may overlap with the connecting bridge 73. The second insulating layer 182 may not overlap with the sub-supply line 71 but may overlap with the connecting bridge 73.

[0155] The second insulating layer 182 can be removed from the area where the sub-supply line 71 can be positioned, thus blocking the path for moisture from the outside to penetrate into the display area.

[0156] refer to Figure 13 The common electrode 270 located in the display area DA can extend to the non-display area PA and can be electrically connected to the connecting bridge 73 located on the second insulating layer 182.

[0157] Figure 14 , Figure 15 , Figure 16 , Figure 17 , Figure 18 and Figure 19 The illustration schematically shows the following regarding the embodiments. Figure 3 A cross-sectional view of line D-D'.

[0158] refer to Figure 14 Sub-supply line 71 can be fabricated as a single conductive layer. Sub-supply line 71 may include a second sub-supply line 71b positioned between buffer layer 111 and interlayer insulating layer 160. Sub-supply line 71 may extend in a first direction DR1 and may include an extension 71c protruding in a second direction DR2.

[0159] Sub-supply line 71 can be positioned in the display area DA (reference) Figure 8 Gate electrode 124 in ) (reference) Figure 8 They are positioned on the same layer and may include the same material. Sub-supply line 71 and gate electrode 124 (reference) Figure 8 They can be made using the same process.

[0160] Interlayer insulation 160 can be positioned on sub-supply line 71. Connecting bridge 73 can be positioned on interlayer insulation 160. Extension 71c can be exposed by opening OP. Extension 71c can be electrically connected to connecting bridge 73 in the exposed area.

[0161] Connector 73 can be positioned in the display area DA (reference) Figure 8 Source electrode 173 in ) (reference) Figure 8 ) and drain electrode 175 (reference) Figure 8 They are positioned on the same layer and may include the same material. Connecting bridge 73, source electrode 173 (reference) Figure 8 ) and drain electrode 175 (reference) Figure 8 They can be made using the same process.

[0162] A first insulating layer 181 and a second insulating layer 182 may be positioned on the connecting bridge 73. The first insulating layer 181 may overlap with the sub-supply line 71 and the connecting bridge 73. The second insulating layer 182 may not overlap with the sub-supply line 71 but may overlap with the connecting bridge 73.

[0163] The second insulating layer 182 can be removed from the area where the sub-supply line 71 can be positioned, so that the sub-supply line 71 can block the path for moisture from the outside to penetrate into the display area.

[0164] like Figure 8 As shown, the connecting bridge 73 can be connected to the common electrode 270, and its redundant description will be omitted.

[0165] refer to Figure 15 Sub-supply line 71 can be fabricated as a single conductive layer. Sub-supply line 71 may include a second sub-supply line 71b positioned between buffer layer 111 and interlayer insulating layer 160. Sub-supply line 71 may extend in a first direction DR1 and may include an extension 71c protruding in a second direction DR2.

[0166] The extension section 71c can be exposed by the opening OP. The extension section 71c can be electrically connected to the connecting bridge 73 in the exposed area.

[0167] Sub-supply line 71 can be positioned in the display area DA (reference) Figure 13 Gate electrode 124 in ) (reference) Figure 13 They are positioned on the same layer and may include the same material. Sub-supply line 71 and gate electrode 124 (reference) Figure 13 They can be made using the same process.

[0168] Interlayer insulation layer 160 and first insulation layer 181 can be positioned on sub-supply line 71. Second insulation layer 182 can be positioned on first insulation layer 181. Connecting bridge 73 can be positioned on first insulation layer 181 and second insulation layer 182.

[0169] Connector 73 can be positioned in the display area DA (reference) Figure 13 Pixel electrode 191 in ) (reference) Figure 13 They are positioned on the same layer and can have the same material. Connecting bridge 73 and pixel electrode 191 (reference) Figure 13 They can be made using the same process.

[0170] The buffer layer 111, interlayer insulation layer 160, first insulation layer 181, and connecting bridge 73 may be stacked sequentially on top of each other in the area overlapping with the sub-supply line 71. The buffer layer 111, interlayer insulation layer 160, first insulation layer 181, second insulation layer 182, and connecting bridge 73 may be stacked sequentially on top of each other in the area not overlapping with the sub-supply line 71.

[0171] For example, the second insulating layer 182 can be removed from the area where the sub-supply line 71 can be positioned, so that the sub-supply line 71 can block the path for moisture from the outside to penetrate into the display area.

[0172] like Figure 13 As shown, the connecting bridge 73 can be connected to the common electrode 270, and its redundant description will not be provided.

[0173] refer to Figure 16 Sub-supply line 71 can be fabricated as a single conductive layer. Sub-supply line 71 may include a third sub-supply line 71e positioned between interlayer insulating layer 160 and first insulating layer 181. Sub-supply line 71 may extend in a first direction DR1 and may include an extension 71f protruding in a second direction DR2.

[0174] Sub-supply line 71 can be positioned in the display area DA (reference) Figure 13 Source electrode 173 in ) (reference) Figure 13 ) and drain electrode 175 (reference) Figure 13 They are positioned on the same layer and may include the same material. Sub-supply line 71, source electrode 173 (reference) Figure 13 ) and drain electrode 175 (reference) Figure 13 They can be made using the same process.

[0175] The first insulating layer 181 and the connecting bridge 73 can be positioned on the sub-supply line 71. The second insulating layer 182 can be positioned on the first insulating layer 181. The connecting bridge 73 can be positioned on the first insulating layer 181 and the second insulating layer 182. The extension 71f can be exposed by the opening OP. The extension 71f can be electrically connected to the connecting bridge 73 in the exposed area.

[0176] Connector 73 can be positioned in the display area DA (reference) Figure 13 Pixel electrode 191 in ) (reference) Figure 13 They are positioned on the same layer and can include the same material. Connecting bridge 73 and pixel electrode 191 (reference) Figure 13 They can be made using the same process.

[0177] The buffer layer 111, interlayer insulation layer 160, sub-supply line 71, first insulation layer 181, and connecting bridge 73 may be stacked sequentially on top of each other in the area overlapping with the sub-supply line 71. The buffer layer 111, interlayer insulation layer 160, first insulation layer 181, second insulation layer 182, and connecting bridge 73 may be stacked sequentially on top of each other in a second area other than the area overlapping with the sub-supply line 71.

[0178] For example, the second insulating layer 182 can be removed from the area where the sub-supply line 71 can be positioned, so that the sub-supply line 71 can block the path for moisture from the outside to penetrate into the display area.

[0179] like Figure 13As shown, the connecting bridge 73 can be connected to the common electrode 270, and its redundant description will not be provided.

[0180] refer to Figure 17 Sub-supply line 71 can be a multilayer wiring made of double conductive layers. For example, sub-supply line 71 may include a second sub-supply line 71b positioned on buffer layer 111 and a third sub-supply line 71e positioned on interlayer insulating layer 160. The second sub-supply line 71b may include an extension 71d, and the third sub-supply line 71e may include an extension (not shown). The extension 71d may be exposed by an opening OP and may be electrically connected to the connecting bridge 73. The extension (not shown) included by the third sub-supply line 71e may be exposed by an opening OP and may be electrically connected to the connecting bridge 73.

[0181] The connecting bridge 73 can be positioned on the first insulating layer 181 and the second insulating layer 182.

[0182] The second insulating layer 182 may not be positioned in the area where the sub-supply line 71 can be positioned. The second insulating layer 182 can be removed from the area where the sub-supply line 71 can be positioned, so that the sub-supply line 71 can block the path for moisture from the outside to penetrate into the display area.

[0183] Sub-supply line 71 may include a sub-supply line located in the display area DA (reference). Figure 13 Gate electrode 124 in ) (reference) Figure 13 The second sub-supply line 71b is located on the same layer as the source electrode 173 (reference). Figure 13 ) and drain electrode 175 (reference) Figure 13 The third sub-supply line 71e is located on the same layer. The connecting bridge 73 can be connected to the third sub-supply line 71e located in the display area DA (reference). Figure 13 Pixel electrode 191 in ) (reference) Figure 13 They are positioned on the same layer.

[0184] like Figure 13 As shown, the connecting bridge 73 can be connected to the common electrode 270, and its redundant description will not be provided.

[0185] refer to Figure 18Sub-supply lines 71 can be multilayer wiring made of double conductive layers. For example, sub-supply lines 71 may include a first sub-supply line 71a positioned between the substrate 110 and the buffer layer 111 and a third sub-supply line 71e positioned on the interlayer insulating layer 160. The first sub-supply line 71a may include an extension (not shown), and the third sub-supply line 71e may include an extension 71f. The extension 71f may be exposed by an opening OP and may be electrically connected to the connecting bridge 73. The extension (not shown) of the first sub-supply line 71a may also be exposed by an opening OP and may be electrically connected to the connecting bridge 73.

[0186] The connecting bridge 73 can be positioned on the first insulating layer 181 and the second insulating layer 182. The second insulating layer 182 may not be positioned in the area where the sub-supply line 71 can be positioned. The second insulating layer 182 can be removed from the area where the sub-supply line 71 can be positioned, so that the sub-supply line 71 can block the path for moisture from the outside to penetrate into the display area.

[0187] Sub-supply line 71 may include a sub-supply line located in the display area DA (reference). Figure 13 Metal layer 101 in ) (reference) Figure 13 The first sub-supply line 71a is positioned on the same layer as the source electrode 173 (reference). Figure 13 ) and drain electrode 175 (reference) Figure 13 The third sub-supply line 71e is located on the same layer. The connecting bridge 73 can be connected to the third sub-supply line 71e located in the display area DA (reference). Figure 13 Pixel electrode 191 in ) (reference) Figure 13 They are positioned on the same layer.

[0188] like Figure 13 As shown, the connecting bridge 73 can be connected to the common electrode 270, and its redundant description will not be provided.

[0189] refer to Figure 19 Sub-supply line 71 can be a multilayer wiring made of three conductive layers. For example, sub-supply line 71 may include a first sub-supply line 71a positioned between substrate 110 and buffer layer 111, a second sub-supply line 71b positioned between buffer layer 111 and interlayer insulating layer 160, and a third sub-supply line 71e positioned on interlayer insulating layer 160. The first sub-supply line 71a may include an extension (not shown), the second sub-supply line 71b may include an extension (not shown), and the third sub-supply line 71e may include an extension 71f. Extension 71f may be exposed by an opening OP and may be electrically connected to connector bridge 73.

[0190] The connecting bridge 73 can be positioned on the first insulating layer 181 and the second insulating layer 182. The second insulating layer 182 may not be positioned in the area where the sub-supply line 71 can be positioned. The second insulating layer 182 can be removed from the area where the sub-supply line 71 can be positioned, so that the sub-supply line 71 can block the path for moisture from the outside to penetrate into the display area.

[0191] Sub-supply line 71 may include a sub-supply line located in the display area DA (reference). Figure 13 Metal layer 101 in ) (reference) Figure 13 The first sub-supply line 71a, located on the same layer, and the gate electrode 124 (reference) Figure 13 The second sub-supply line 71b is located on the same layer as the source electrode 173 (reference). Figure 13 ) and drain electrode 175 (reference) Figure 13 The third sub-supply line 71e is located on the same layer. The connecting bridge 73 can be connected to the third sub-supply line 71e located in the display area DA (reference). Figure 13 Pixel electrode 191 in ) (reference) Figure 13 They are positioned on the same layer.

[0192] like Figure 13 As shown, the connecting bridge 73 can be connected to the common electrode 270, and its redundant description may not be provided.

[0193] According to an embodiment, sub-supply line 71 is connected to spaced-apart main supply lines 70 (see reference). Figure 3 This allows the common voltage supply line to form a closed loop. In this case, the second insulating layer on which moisture can move can be removed from the area where the sub-supply line 71 can be located. Therefore, the path for moisture to move from the outside can be blocked by the sub-supply line 71, thereby providing a display device with improved reliability.

[0194] While this disclosure has been described in conjunction with what are considered practical embodiments, it should be understood that this disclosure is not limited to the disclosed embodiments. Rather, this disclosure is intended to include various modifications and equivalent arrangements, encompassing all modifications and equivalent arrangements included within the spirit and scope of the appended claims and their equivalents.

Claims

1. A display device, wherein, The display device includes: The display panel includes a display area and a non-display area; The display panel includes: Base; Light-emitting elements are disposed in the display area; and A common voltage supply line is located in the non-display area and is electrically connected to the light-emitting element. The common voltage supply line includes: At least two main supply lines; Sub-supply lines, used to connect the at least two main supply lines; and At least one antistatic pattern is provided on the outside of the sub-supply line in the plan view. The display panel further includes: a buffer layer, an interlayer insulating layer, a first insulating layer, and a second insulating layer sequentially disposed on the substrate, wherein... The first insulating layer forms a valley between the main supply line and the antistatic pattern, and The second insulating layer fills the valley.

2. The display device according to claim 1, wherein, The at least one antistatic pattern includes multiple antistatic patterns, and The plurality of antistatic patterns are arranged in the first direction, and The multiple antistatic patterns are spaced apart from each other.

3. The display device according to claim 2, wherein, The common voltage supply line also includes a connecting bridge electrically connected to the common electrode of the light-emitting element.

4. The display device according to claim 3, wherein, The connecting bridge is electrically connected to the sub-supply line and the plurality of anti-static patterns.

5. The display device according to claim 3, wherein, Each of the at least one antistatic pattern and the sub-supply line includes an extension connected to the connecting bridge.

6. The display device according to claim 2, wherein The at least two main supply lines are spaced apart in the first direction, and The sub-supply line extends in the first direction and is electrically connected to the at least two main supply lines.

7. The display device according to claim 3, wherein, The display panel also includes: The first zone overlaps with the main supply line, the sub-supply line, and the antistatic pattern; and Second District Wherein, the first region does not overlap with the second insulating layer, and wherein the connecting bridge overlaps with the second insulating layer in the second region.

8. The display device according to claim 1, wherein, The sub-supply line includes at least one of the following: The first sub-supply line is located between the substrate and the buffer layer; The second sub-supply line is located between the buffer layer and the interlayer insulation layer; and The third sub-supply line is located between the interlayer insulation layer and the first insulation layer.

9. The display device according to claim 8, wherein, The display panel also includes: A metal layer is disposed on the substrate; A gate electrode is disposed on the buffer layer; and The source electrode and drain electrode are disposed on the interlayer insulating layer, wherein The first sub-supply line and the metal layer are disposed on the same layer. The second sub-supply line and the gate electrode are disposed on the same layer, and The third sub-supply line, the source electrode, and the drain electrode are disposed on the same layer.

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