A laminate package including a support

CN114361152BActive Publication Date: 2026-07-07SK HYNIX INC
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
SK HYNIX INC
Filing Date
2021-05-18
Publication Date
2026-07-07

AI Technical Summary

Technical Problem

Existing technologies struggle to effectively integrate multiple semiconductor wafers and achieve stable connections and seals in stacked packaging structures, especially at the junction between the support and the semiconductor wafer, where voids and connection failures are prone to occur.

Method used

The support structure employs a design where the second side of the support has an inclined surface or a stepped shape, forming a specific gap with the side of the semiconductor wafer. The gap between the support and the semiconductor wafer is filled by an encapsulation layer, ensuring stable flow of the sealant and preventing the formation of pores.

Benefits of technology

It improves the thermal stability and connection reliability of stacked packages, reduces bonding failures and void defects, and ensures stable electrical connections between semiconductor wafers.

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Abstract

This application relates to a laminate package including a support. A laminate package is disclosed. A first semiconductor die and a support are disposed on a package substrate. The support can include a second side facing a first side of the first semiconductor die, the second side having a substantially sloped surface. A second semiconductor die is laminated on the first semiconductor die and the support. An encapsulation layer is formed to fill a portion between the support and the first semiconductor die.
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