Display device

Abstract

A display device includes a package structure disposed on an array substrate, a bottom cover that houses the array substrate and the package structure therein, and at least one heat dissipation pattern disposed between the package structure and the bottom cover. The heat dissipation pattern can include a porous frame layer and a heat dissipation layer composed of particles coated on the frame layer. The heat dissipation pattern can allow for faster and more efficient heat transfer from the package structure to the bottom cover.

Description

Technical Field

[0001] This disclosure relates to a display device including a light-emitting element. Background Technology

[0002] Display devices are used in a variety of electronic devices such as televisions, mobile phones, laptops, and tablets. Therefore, continuous research and development is underway to develop thinner, lighter, and lower-power display devices.

[0003] Examples of display devices include liquid crystal display (LCD), plasma display panel (PDP), field emission display (FED), electrowetting display (EWD), and electroluminescent display (ELDD) (or organic light-emitting display).

[0004] An organic light-emitting display device includes multiple pixel regions arranged in a display area for displaying an image, and multiple organic light-emitting elements corresponding to each of the multiple pixel regions. Each organic light-emitting element is a self-emissive element that emits light. Therefore, compared with liquid crystal display devices, organic light-emitting display devices have faster response times, higher luminous efficiency and brightness, wider viewing angles, and superior contrast and color reproduction range.

[0005] The organic light-emitting display device includes a driver for controlling the brightness level of each pixel region within the plurality of pixel regions based on an image signal. Furthermore, heat may be generated from the driver and the organic light-emitting elements during the on-state operation of the organic light-emitting display device.

[0006] Therefore, the degradation of organic light-emitting elements may be accelerated by the heat, and the element characteristics of the driver may be altered by the heat.

[0007] Therefore, organic light-emitting display devices need to dissipate heat quickly. Summary of the Invention

[0008] Therefore, the purpose of this disclosure is to provide a display device that can quickly dissipate heat.

[0009] The purposes of this disclosure are not limited to those described above. Other purposes and advantages not mentioned in this disclosure may be understood based on the following description and may be more clearly understood based on embodiments according to this disclosure. Furthermore, it will be readily understood that the purposes and advantages of this disclosure can be achieved using the means set forth in the claims and combinations thereof.

[0010] This disclosure provides an example of a display device comprising: an array substrate having a light-emitting array including a plurality of light-emitting elements corresponding to a plurality of pixel regions; an encapsulation structure disposed on the array substrate and sealing the light-emitting array; a bottom cover housing the array substrate and the encapsulation structure; and at least one heat dissipation pattern disposed between the encapsulation structure and the bottom cover. In this regard, the at least one heat dissipation pattern may include: a porous frame (skeleton) layer made of wound metal fibers; and a heat dissipation layer consisting of particles coated on the frame layer, wherein the heat dissipation layer is capable of dissipating heat from the frame layer.

[0011] Because the heat dissipation pattern contacts each of the package structure and the bottom cover, the heat dissipation pattern receives heat from the package structure and dissipates heat around the heat dissipation pattern and the bottom cover. Due to this heat dissipation pattern, heat transfer from the package structure to the bottom cover can be performed faster and more efficiently, thereby improving the heat dissipation effect for dissipating heat from the array substrate. Therefore, the degradation of image quality and lifespan of the display device can be delayed.

[0012] In addition, the encapsulation structure may include: a first adhesive film disposed on the array substrate; an encapsulation film disposed on the first adhesive film and made of a metal material; a second adhesive film disposed on the encapsulation film; and a planar reinforcing plate disposed on the second adhesive film.

[0013] Therefore, because the encapsulation structure has an encapsulation film of metallic material disposed between the first and second adhesive films, the path for external oxygen or moisture to permeate into the light-emitting array can be complex. This can thus delay the degradation of the light-emitting array's characteristics and lifetime.

[0014] Furthermore, due to the structure in which the planar reinforcing plate is in close contact with the encapsulation film via the second adhesive film, heat from the array substrate can be quickly and easily transferred to the reinforcing plate. In addition, the rigidity of the display device can be improved by the reinforcing plate, making its shape less susceptible to deformation due to external physical impacts.

[0015] The bottom cover may include a bottom facing the package structure, a side extending vertically from the edge of the bottom, and a through hole extending through the bottom and corresponding to at least a portion of the at least one heat dissipation pattern.

[0016] Therefore, this through-hole allows a portion of the heat dissipation pattern to be exposed from the bottom cover, enabling heat dissipated from the pattern to be directly discharged from the bottom cover. This further improves heat dissipation performance.

[0017] According to one embodiment of this disclosure, the encapsulation structure of a light-emitting array disposed on and sealing the array substrate includes a reinforcing plate with a relatively large thickness. The reinforcing plate is made of a thick metallic material and is adhered to the encapsulation film via a second adhesive film. As a result, heat from the array substrate can be easily transferred to the reinforcing plate, thereby improving the heat dissipation effect of the array substrate.

[0018] A display device according to an embodiment of the present disclosure includes at least one heat dissipation pattern disposed between a package structure and a bottom cover. Each heat dissipation pattern includes a porous frame layer that facilitates heat transfer and a heat dissipation layer composed of particles made of a material coated on the frame layer that dissipates heat around the heat dissipation pattern. Since such a heat dissipation pattern can facilitate heat transfer from the package structure to the bottom cover, the heat dissipation effect can be further improved.

[0019] According to another embodiment of this disclosure, the bottom cover may have a through-hole extending through the bottom and corresponding to at least a portion of the at least one heat dissipation pattern. Therefore, heat dissipated from the heat dissipation pattern can be discharged from the bottom cover through the through-hole, thereby further improving the heat dissipation effect.

[0020] The effects of this disclosure are not limited to those described above, and other effects not mentioned will be clearly understood by those skilled in the art from the following description. Attached Figure Description

[0021] Figure 1 This is an exploded perspective view of a display device in a first direction according to an embodiment of the present disclosure.

[0022] Figure 2 Is with Figure 1 The block diagrams show the corresponding array substrate and the drivers that drive the array substrate.

[0023] Figure 3 It shows the corresponding Figure 2 The attached figure shows an example of the equivalent circuit for the pixel region.

[0024] Figure 4 It is shown Figure 3 The attached figure shows examples of driving thin-film transistors and organic light-emitting elements.

[0025] Figure 5 It is shown Figure 2 The accompanying diagram shows an example implementation of the array substrate and driver.

[0026] Figure 6 It is shown Figure 5 The attached figure shows an example of an array substrate.

[0027] Figure 7 yes Figure 1The display device is an exploded perspective view in the second direction.

[0028] Figure 8 It is along Figure 7 A cross-sectional view taken from line I-I'.

[0029] Figure 9 It is shown Figure 7 The attached diagram shows the heat dissipation pattern in the image.

[0030] Figure 10 and Figure 11 It is shown Figure 7 The accompanying drawings show other examples of heat dissipation patterns for display devices.

[0031] Figure 12 This is an exploded perspective view of a display device according to another embodiment of the present disclosure in a second direction.

[0032] Figure 13 It is shown Figure 12 The accompanying drawing shows another example of a through-hole in a display device.

[0033] Figure 14 and Figure 15 It is along Figure 12 Example of a cross-sectional view taken by line II-II' in the diagram. Detailed Implementation

[0034] For the sake of simplicity and clarity, the elements in the accompanying drawings are not necessarily drawn to scale. The same reference numerals in different drawings denote the same or similar elements and thus perform similar functions. Furthermore, for the sake of simplicity, descriptions and details of well-known steps and elements have been omitted. In addition, numerous specific details are set forth in the following detailed description of this disclosure to provide a thorough understanding of the disclosure. However, it should be understood that this disclosure can be practiced without these specific details. In other instances, well-known methods, processes, components, and circuits have not been described in detail so as not to unnecessarily obscure aspects of this disclosure. Examples of various embodiments are further illustrated and described below. It should be understood that the description herein is not intended to limit the claims to the specific embodiments described. Rather, it is intended to cover alternatives, modifications, and equivalents that may be included (including) within the spirit and scope of this disclosure as defined by the appended claims.

[0035] The shapes, sizes, ratios, angles, quantities, etc., disclosed in the accompanying drawings used to describe embodiments of this disclosure are exemplary, and this disclosure is not limited thereto. The same reference numerals refer to the same elements herein. Furthermore, for the sake of simplicity, descriptions and details of well-known steps and elements have been omitted.

[0036] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. As used herein, unless the context clearly indicates otherwise, the singular forms “a” and “an” are intended to include the plural forms as well. It will be further understood that the terms “comprising” or “including” as used in this specification specify the presence of the stated features, integers, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, operations, elements, components, and / or portions thereof. As used herein, the term “and / or” includes any and all combinations of one or more of the associated list items. Expressions such as “at least one of…” following a list of elements may modify the entire list of elements and may not modify any individual element in the list. When “C through D” is mentioned, unless otherwise stated, it means C (inclusive of C) through D (inclusive of D).

[0037] It should be understood that although the terms "first," "second," "third," etc., may be used herein to describe various elements, components, regions, layers, and / or segments, these elements, components, regions, layers, and / or segments should not be limited by these terms. These terms are used to distinguish one element, component, region, layer, or segment from another. Therefore, without departing from the spirit and scope of this disclosure, the first element, component, region, layer, or segment described below may be referred to as the second element, component, region, layer, or segment.

[0038] Furthermore, it should be understood that when a first element or layer is referred to as existing "above" or "below" a second element or layer, the first element may be directly disposed above or below the second element, or may be indirectly disposed above or below the second element, wherein a third element or layer is disposed between the first and second elements or layers. It should be understood that when an element or layer is referred to as being "connected to" or "coupled to" another element or layer, it may be directly connected to or coupled to or above another element or layer, or one or more intermediate elements or layers may exist. Additionally, it should be understood that when an element or layer is referred to as being "between" two elements or layers, it may be the only element or layer between the two elements or layers, or one or more intermediate elements or layers may exist.

[0039] Furthermore, as used herein, when a layer, membrane, region, plate, etc., is disposed "above" or "on top" of another layer, membrane, region, plate, etc., the former can directly contact the latter, or another layer, membrane, region, plate, etc., can be disposed between the former and the latter. As used herein, when a layer, membrane, region, plate, etc., is directly disposed "above" or "on top" of another layer, membrane, region, plate, etc., the former directly contacts the latter, and no other layer, membrane, region, plate, etc., is disposed between the former and the latter. Furthermore, as used herein, when a layer, membrane, region, plate, etc., is disposed "below" or "underneath" another layer, membrane, region, plate, etc., the former can directly contact the latter, or another layer, membrane, region, plate, etc., can be disposed between the former and the latter. As used herein, when a layer, membrane, region, plate, etc., is directly disposed "below" or "underneath" another layer, membrane, region, plate, etc., the former directly contacts the latter, and no other layer, membrane, region, plate, etc., is disposed between the former and the latter.

[0040] Unless otherwise defined, all terms used herein, including technical and scientific terms, shall have the same meaning as commonly understood by one of ordinary skill in the art to which the inventive concept pertains. It should be further understood that terms such as those defined in common dictionaries shall be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and shall not be interpreted in an idealized or overly formal sense unless expressly defined herein.

[0041] In one example, when an embodiment can be implemented differently, the functions or operations specified in a specific block may occur in a different order than those specified in the flowchart. For example, two consecutive blocks may actually be executed simultaneously. Depending on the functions or operations involved, these blocks may be executed in reverse order.

[0042] In descriptions of temporal relationships, such as the chronological order between two events described as "after," "following," or "before," another event may occur between the two events unless indicated as "directly after," "directly following," or "directly before." Features of various embodiments of this disclosure can be combined in part or in whole with each other and can be technically associated or interoperable with each other. The embodiments can be implemented independently of each other and can be implemented together in an associated relationship. For ease of explanation, spatial relative terms such as "below," "below," "lower," "below," "above," and "upper" are used herein to describe the relationship between one element or feature and another element or feature as shown in the figures. It should be understood that, in addition to the orientations depicted in the figures, spatial relative terms are intended to cover different orientations of the device in use or operation. For example, when the device in the figures is flipped, an element described as "below" or "below" or "below" other elements or features will subsequently be oriented "above" other elements or features. Thus, the example terms "below" and "below" can cover both the upper and lower orientations. The apparatus may be oriented in other ways (e.g., rotated 90 degrees or oriented in other orientations), and the spatial relative descriptors used herein shall be interpreted accordingly.

[0043] The terms "X-axis direction," "Y-axis direction," and "Z-axis direction" should not be interpreted merely as having a geometric relationship where the X-axis, Y-axis, and Z-axis directions are perpendicular to each other. Instead, they can be interpreted as having a broader range of orientations within which the components described herein can function functionally.

[0044] In the following description, a display device according to each embodiment of the present disclosure will be described with reference to the accompanying drawings.

[0045] Figure 1 This is an exploded perspective view of a display device in a first direction according to an embodiment of the present disclosure.

[0046] like Figure 1 As shown, a display device according to an embodiment of the present disclosure includes an array substrate 100, an encapsulation structure 200 disposed on the array substrate 100, and a bottom cover 300 therein accommodating the array substrate 100 and the encapsulation structure 200.

[0047] The array substrate 100 includes a plurality of pixel regions defined in a display area, and a light-emitting array composed of a plurality of light-emitting elements respectively corresponding to the plurality of pixel regions. Furthermore, the array substrate 100 further includes a transistor array composed of a plurality of pixel circuits respectively corresponding to the plurality of pixel regions. The light-emitting element corresponding to each pixel region operates based on a drive current supplied from each pixel circuit.

[0048] The encapsulation structure 200 includes a first adhesive film 201 disposed on the array substrate 100, an encapsulation film 210 disposed on the first adhesive film 201 and made of a metal material, a second adhesive film 202 disposed on the encapsulation film 210, and a planar reinforcing plate 220 disposed on the second adhesive film 202.

[0049] The bottom cover 300 includes a bottom 310 facing the package structure 200 and a side 320 extending upward from the edge of the bottom 310 toward the array substrate 100.

[0050] Figure 2 Is with Figure 1 The block diagrams show the corresponding array substrate and the drivers that drive the array substrate. Figure 3 It shows the corresponding Figure 2 The attached figure shows an example of the equivalent circuit for the pixel region. Figure 4 It is shown Figure 3 The attached figure shows examples of driving thin-film transistors and organic light-emitting elements.

[0051] like Figure 2 As shown, a display device according to an embodiment of the present disclosure includes an array substrate 100, which includes a display area AA (effective display area) for displaying an image, and a driver that provides signals to signal lines GL and DL of the array substrate 100, respectively.

[0052] The array substrate 100 includes a plurality of pixel regions PA defined in the display area AA.

[0053] Each of the plurality of pixel regions PA refers to a region used to emit light corresponding to a certain color. Two or more pixel regions PA that are adjacent to each other and correspond to different colors can constitute a unit pixel for emitting light of various colors. That is, a unit pixel can be implemented. The unit pixel can display various colors by combining light beams emitted from two or more adjacent pixel regions PA.

[0054] The array substrate 100 includes a gate line GL that provides a scan signal SCAN to select a horizontal line to which a data signal VDATA is to be written, and a data line DL that provides the data signal VDATA. The horizontal line may consist of pixel regions arranged in a horizontal row among the plurality of pixel regions PA.

[0055] Additionally, the array substrate 100 may further include first and second drive power lines that provide first and second drive powers VDD and VSS respectively for the operation of the light-emitting element. Figure 3 VDDL and VSSL in (the context of VDDL and VSSL).

[0056] The driver includes a timing controller 410, a data driver 420 connected to the data line DL, and a gate driver 430 connected to the gate line GL.

[0057] The timing controller 410 rearranges the digital video data RGB input from the external system based on the resolution of the array substrate 100, and provides the rearranged digital video data RGB′ to the data driver 420.

[0058] The timing controller 410 can generate and provide a data control signal DDC for controlling the operating timing of the data driver 420, and a gate control signal GDC for controlling the operating timing of the gate driver 430, based on timing signals such as the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, the dot clock signal DCLK, and the data enable signal DES.

[0059] Gate driver 430 sequentially provides scan signals SCAN to multiple gate lines GL during a frame period to display an image based on gate control signals GDC.

[0060] In other words, the gate driver 430 provides a scan signal SCAN to each gate line GL during each horizontal period corresponding to each gate line GL in a frame period.

[0061] The data driver 420 converts the rearranged digital video data RGB' into analog data voltages based on the data control signal DDC. Based on the rearranged digital video data RGB', the data driver 420 provides the data line DL with a data signal VDATA corresponding to each pixel region PA of the horizontal line to which the scan signal SCAN is provided during each horizontal cycle.

[0062] like Figure 3 As shown, each pixel region PA includes an organic light-emitting element (OLED) and pixel circuitry for providing driving signals to the OLED.

[0063] In one example, the pixel circuitry includes a driving transistor DT, a switching transistor ST, and a storage capacitor Cst. This is merely an example. Although not shown, each pixel region PA may further include compensation circuitry (not shown) for compensating for degradation of at least one of the driving transistor DT and the light-emitting element OLED. The compensation circuitry may include at least one transistor (not shown) to detect the amount of degradation or provide a reference power (not shown).

[0064] An organic light-emitting element (OLED) includes a first electrode and a second electrode, namely an anode and a cathode, and a light-emitting layer disposed between the first and second electrodes. The light-emitting layer emits light based on a driving current between the first and second electrodes. OLEDs can have a multi-layer stacked structure comprising two or more light-emitting layers.

[0065] The driving transistor DT can be connected in series with the light-emitting element OLED, and can be positioned between the first driving power line VDDL that provides the first driving power VDD and the second driving power line VSSL that provides the second driving power VSS, wherein the potential of the second driving power VSS is lower than the potential of the first driving power VDD.

[0066] In other words, one end of the driving transistor DT is connected to the first driving power line VDDL, and the other end of the driving transistor DT is connected to one end of the light-emitting element OLED. Furthermore, the other end of the light-emitting element OLED is connected to the second driving power line VSSL.

[0067] A switching transistor ST is positioned between the first node ND1 and the data line DL providing the data signal VDATA for each pixel region PA. The first node ND1 is the contact point between the gate electrode of the driving transistor DT and the switching transistor ST. Furthermore, the gate electrode of the switching transistor ST is connected to the gate line GL.

[0068] The storage capacitor Cst is positioned between the first node ND1 and the second node ND2. The second node ND2 is the contact point between the driving transistor DT and the organic light-emitting element OLED.

[0069] The pixel circuit operates as follows. The switching transistor ST is turned on based on the scan signal SCAN of the gate line GL. In this regard, the data signal VDATA of the data line DL is supplied to the gate electrode of the driving transistor DT and the storage capacitor Cst via the turned-on switching transistor ST and the first node ND1.

[0070] The storage capacitor Cst is charged by the data signal VDATA provided to the first node ND1.

[0071] Furthermore, the driving transistor DT is turned on based on the data signal VDATA supplied to the first node ND1 and the charging voltage of the storage capacitor Cst, to generate a driving current corresponding to the data signal VDATA. Therefore, the driving current generated by the turned-on driving transistor DT can be supplied to the second node ND2, i.e., to the organic light-emitting element OLED.

[0072] like Figure 4As shown, the array substrate 100 includes a transistor array 110 and a light-emitting array 120. The transistor array 110 includes a plurality of pixel circuits corresponding to a plurality of pixel regions PA, and the light-emitting array 120 includes a plurality of organic light-emitting elements (OLEDs) corresponding to the plurality of pixel regions PA.

[0073] The transistor array 110 may include a substrate 111, the substrate 111 including a display area AA corresponding to the plurality of pixel areas PA, and a driving thin-film transistor DT disposed on the substrate 111 and corresponding to each pixel area PA. Furthermore, the transistor array 110 may further include a planarization film 115 covering the driving thin-film transistor DT in a planarized manner.

[0074] The substrate 111 can be made of an insulating material and can be flat. In one example, the substrate 111 can be made of glass or plastic.

[0075] The driving thin-film transistor DT includes an active layer ACT disposed on a buffer film 112 covering a substrate 111; a gate insulating layer 113 disposed on a channel region of the active layer ACT; a gate electrode GE disposed on the gate insulating layer 113; an interlayer insulating film 114 covering the buffer film 112, the active layer ACT, and the gate electrode GE; a source electrode SE disposed on the interlayer insulating film 114 and connected to the source region of the active layer ACT; and a drain electrode DE disposed on the interlayer insulating film 114 and connected to the drain region of the active layer ACT.

[0076] Buffer membrane 112 can be made of materials such as silicon nitride (SiN). x (ii) An insulating material, silicon dioxide (SiO2), is readily adhered to the active layer ACT. The buffer film 112 not only helps to fix the active layer ACT, but also prevents moisture or oxygen from penetrating through the substrate 111, and prevents defects in the substrate 111 from being transmitted to the insulating films 114 and 115 on the substrate 111. However, depending on the material of the substrate 111, the buffer layer 112 can be omitted from the transistor array 110.

[0077] The active layer ACT can be made of silicon semiconductor or oxide semiconductor.

[0078] In addition, although not in Figure 4 As shown, transistor array 110 may further include switching thin-film transistors (TFTs). Figure 3 ST), the gate line connected to the gate electrode of the switching thin-film transistor ST. Figure 3 (GL in the middle), and the data line connected to one of the source and drain electrodes ( Figure 3 (DL in the text).

[0079] Since the gate electrode GE of the driving thin film transistor DT can be disposed on the gate insulating film 113, the gate line GL can be disposed on the gate insulating film 113.

[0080] Since the source electrode SE and drain electrode DE of the driving thin film transistor DT can be disposed on the interlayer insulating film 114, the data line DL can be disposed on the interlayer insulating film 114.

[0081] An interlayer insulating film 114 is disposed on the buffer film 112 and covers the active layer ACT and the gate electrode GE in a planarized manner. The interlayer insulating film 114 may have a structure in which layers made of at least one insulating material selected from organic and inorganic insulating materials are vertically stacked. Examples of inorganic insulating materials include silicon nitride (SiN). x (ii) Silicon oxide (SiO2). Examples of organic insulating materials include acrylic resins, epoxy resins, phenolic resins, polyamide resins, and polyimide resins.

[0082] Similar to the interlayer insulating film 114, the planarization film 115 may have a structure in which layers made of at least one insulating material selected from organic and inorganic insulating materials are stacked vertically.

[0083] The light-emitting array 120 can be disposed on the planarization film 115 of the transistor array 110, and can include multiple organic light-emitting elements (OLEDs) corresponding to multiple pixel regions PA respectively.

[0084] Each organic light-emitting element (OLED) may include a first electrode 121 and a second electrode 122 opposite to each other, and a light-emitting layer 123 disposed between the first electrode 121 and the second electrode 122.

[0085] The light-emitting array 120 may include a plurality of first electrodes 121 corresponding to a plurality of pixel regions PA and disposed on a transistor array 110; a bank 124 disposed on the transistor array 110 and outside each pixel region PA and covering the edge of the first electrodes 121; a light-emitting layer 123 disposed on the bank 124 and the first electrodes 121; and a second electrode 122 disposed on the light-emitting layer 123 and corresponding to the plurality of pixel regions PA.

[0086] The encapsulation structure 200 is disposed on the array substrate 100 and covers the light-emitting array 120. The encapsulation structure 200 may have a structure in which films of different thicknesses and materials are stacked. A portion of the encapsulation structure 200 may be made of an adhesive material.

[0087] The first adhesive film 201 of the encapsulation structure 200 covers the light-emitting array 120 in a polarized (or planar) manner and seals the light-emitting element array 120.

[0088] In addition, such as Figure 1 As shown, the encapsulation structure 200 may include a first adhesive film 201 disposed on the array substrate 100, an encapsulation film 210 fixed to the array substrate 100 via the first adhesive film 201, a second adhesive film 202 attached to the encapsulation film 210, and a reinforcing plate 220 attached to the second adhesive film 202.

[0089] Figure 5 It is shown Figure 2 The accompanying diagram shows an example implementation of the array substrate and driver. Figure 6 It is shown Figure 5 The attached figure shows an example of an array substrate.

[0090] like Figure 5 As shown, the gate driver provides the scan signal SCAN to the gate line GL. Figure 2 (430) can be embedded in the array substrate 100.

[0091] In one example, the gate driver ( Figure 2 430) can be located in a portion of the outer periphery of the non-display area adjacent to the display area AA, outside the display area AA, in the GDA (gate driver area).

[0092] The data driver used to provide data signals VDATA to the data line DL. Figure 2 The 420 in the figure can be represented as an integrated circuit chip 510 mounted on a flexible substrate 511.

[0093] The flexible substrate 511 on which the integrated circuit chip 510 is mounted can be connected to one side edge of the array substrate 100 and the printed circuit board 521 and disposed between them.

[0094] Timing controller ( Figure 2 410 in the figure can be represented as an integrated circuit chip 513 mounted on a printed circuit board 521.

[0095] like Figure 6 As shown, the array substrate 100 may further include pads PAD, which are disposed in the non-display area adjacent to the outer periphery of the display area AA.

[0096] A data drive is installed on it. Figure 2 The flexible substrate 511 of the integrated circuit chip 510 (420) can be connected to the pad PAD.

[0097] In this way, the gate driver GDA and the pad PAD can be located in the non-display area outside the display area AA of the array substrate 100. Therefore, relatively high temperatures may be generated at the edges of the array substrate 100.

[0098] In addition, compared with other regions of the display area AA, the OLED in the pixel area PA, which has a longer operating time or higher driving intensity than other regions of the display area AA, may generate relatively high temperatures of heat.

[0099] In specific regions where relatively high temperatures are generated, the organic light-emitting element (OLED) may degrade more quickly, or the characteristics of thin-film transistors such as switching transistors (ST) and driving transistors (DT) may change, leading to a decrease in image quality such as afterimage defects or blemishes.

[0100] Therefore, a display device according to one embodiment of the present disclosure includes at least one heat dissipation pattern disposed between the encapsulation structure 200 and the bottom cover 300, and thus may be advantageous in terms of heat dissipation.

[0101] Figure 7 yes Figure 1 The display device is an exploded perspective view in the second direction. Figure 8 It is along Figure 7 A cross-sectional view taken from line I-I'. Figure 9 It is shown Figure 7 The attached diagram shows the heat dissipation pattern in the image.

[0102] like Figure 7 and Figure 8 As shown, a display device according to an embodiment of the present disclosure may include an array substrate 100, the array substrate 100 having areas respectively corresponding to a plurality of pixel regions ( Figure 4 Multiple light-emitting elements (PA) in the PA Figure 4 OLED light-emitting array Figure 4 The array 120 includes: an array substrate 100; an encapsulation structure 200 disposed on the array substrate 100 and sealing the light-emitting array 120; a bottom cover 300 accommodating the array substrate 100 and the encapsulation structure 200; and at least one heat dissipation pattern 500 disposed between the encapsulation structure 200 and the bottom cover 300.

[0103] The encapsulation structure 200 includes a first adhesive film 201 disposed on the array substrate 100; an encapsulation film 210 disposed on the first adhesive film 201, made of metal material and fixed to the array substrate 100 via the first adhesive film 201; a second adhesive film 202 disposed on the encapsulation film 210; and a planar reinforcing plate 220 disposed on the second adhesive film 202 and fixed to the encapsulation film 210 via the second adhesive film 202.

[0104] The first adhesive film 201 seals the light-emitting array 120 of the array substrate 100.

[0105] An encapsulation film 210 made of a metallic material is disposed between a first adhesive film 201 and a second adhesive film 202. Therefore, the intrusion path of moisture or oxygen toward the light-emitting array 120 can be complex, which can delay the performance degradation or lifespan reduction of the light-emitting elements included in the light-emitting array 120.

[0106] The encapsulation film 210 may have a thickness less than that of the first adhesive film 201. In one example, the thickness TH1 of the encapsulation film 210 may be in the range of 30 μm to 50 μm.

[0107] For example, the encapsulation film 210 can be made of aluminum foil (Al foil). In this way, the encapsulation film 210 can be prepared conveniently and inexpensively.

[0108] The reinforcing plate 220 supports the array substrate 100 and dissipates the heat generated by the array substrate 100.

[0109] The reinforcing plate 220 can be made of a metallic material with relatively high thermal conductivity to improve heat dissipation from the array substrate 100. In one example, the reinforcing plate 220 can be made of aluminum.

[0110] Furthermore, the reinforcing plate 220 can be thicker than the encapsulation film 210 to make it rigid. The thickness TH2 of the reinforcing plate 220 can be 1 mm or greater.

[0111] In addition, in order to improve the reliability of fixing the relatively thick reinforcing plate 220, the second adhesive film 202 may be thicker than the first adhesive film 201.

[0112] In one example, the thickness TH3 of the second adhesive film 202 can be in the range of 50 μm to 250 μm. The thickness of the second adhesive film 202 can vary proportionally to the thickness of the reinforcing plate 220.

[0113] The at least one heat dissipation pattern 500 is disposed in a portion of the space between the package structure 200 and the bottom cover 300. In other words, the at least one heat dissipation pattern 500 does not correspond to the entire separation space between the package structure 200 and the bottom cover 300.

[0114] Furthermore, when multiple heat dissipation patterns 500 are provided, the multiple heat dissipation patterns 500 can be spaced apart from each other.

[0115] In one example, such as Figure 7 As shown, the plurality of heat dissipation patterns 500 can be arranged in a matrix and are spaced apart from each other in a first direction with a first spacing and in a second direction with a second spacing, and the second spacing may be different from the first spacing.

[0116] Therefore, the heat emitted from the heat dissipation pattern 500 can be transferred to the spacing area between the heat dissipation patterns 500, thereby improving the heat dissipation effect achieved by the heat dissipation pattern 500.

[0117] One surface of each heat dissipation pattern 500 may contact the package structure 200, while the other surface (opposite surface) of each heat dissipation pattern 500 may contact the bottom 310 of the bottom cover 300.

[0118] The shape of each of the surfaces of the respective contact encapsulation structure 200 and bottom cover 300 of each heat dissipation pattern 500 should not be limited to a particular shape, and may be, by way of example, a polygon or a circle.

[0119] like Figure 9 As shown, each heat dissipation pattern 500 can be disposed between the encapsulation structure 200 and the bottom cover 300, and is fixed to the encapsulation structure 200 and the bottom cover 300 via a first pattern adhesive layer 501 and a second pattern adhesive layer 502, which are respectively two opposite surfaces of each heat dissipation pattern 500.

[0120] Each heat dissipation pattern 500 includes a porous frame layer 510 and a heat dissipation layer 520 surrounding the frame layer 510 and made of a heat dissipation (heat dissipation) material. Figure 9 In the embodiment shown, the heat dissipation pattern 500 includes two heat dissipation layers 520. One of the two heat dissipation layers 520 is disposed between the frame layer 510 and the first pattern adhesive layer 501, while the other of the two heat dissipation layers 520 is disposed between the frame layer 510 and the second pattern adhesive layer 502, but this disclosure is not limited thereto.

[0121] The frame layer 510 may be made of intertwined metal fibers.

[0122] In one example, the frame layer 510 may have a thickness of 0.1 mm or less.

[0123] The heat dissipation layer 520 can be coated on the frame layer 510 to surround the frame layer 510, and can include particles made of a heat-dissipating material.

[0124] The particles of the heat dissipation layer 520 can be coated on the outer surface of the frame layer 510 and can be disposed in the space between the metal fibers provided in the frame layer 510.

[0125] In one example, the particles of the heat dissipation layer 520 may be made of a silicon-based material. Alternatively, the particles of the heat dissipation layer 520 may be made of a silicon-based ceramic material.

[0126] For example, the particles of the heat dissipation layer 520 may be made of at least one of Si2N2O, CaF2, BN, SiC, SrTiO3 and Na2SiO3.

[0127] In addition, the heat dissipation layer 520 can have a thickness in the range of 20 μm to 50 μm.

[0128] Since the heat dissipation pattern 500 is disposed on a portion of the reinforcing plate 220, heat from the array substrate 100 can be transferred to the frame layer 510 via the reinforcing plate 220 of the encapsulation structure 200, and then dissipated around the heat dissipation pattern 500 via the heat dissipation layer 520. Therefore, heat transfer from the encapsulation structure 200 to the cover 300 can be performed more quickly and efficiently.

[0129] In one example, according to Figure 7 As illustrated, the at least one heat dissipation pattern 500 may be arranged in a matrix and may be disposed on the reinforcing plate 220 of the packaging structure 200. However, this is merely an example. The arrangement of the heat dissipation pattern 500 may correspond to the heat generation (heat-generating) distribution in the array substrate 100.

[0130] Figure 10 and Figure 11 It is shown Figure 7 The accompanying drawings show other examples of heat dissipation patterns in display devices.

[0131] like Figure 10 As shown, the heat dissipation pattern 500A can correspond to the outer periphery of the display area AA of the array substrate 100.

[0132] Thus, due to the heat dissipation pattern 500A, the gate driver located on the outer periphery of the display area AA adjacent to the array substrate 100 can be improved. Figure 5 and Figure 6 GDA in the middle) and pads ( Figure 6 The heat dissipation of at least one of the PADs in the PAD.

[0133] Alternatively, such as Figure 11As shown, a portion of the heat dissipation pattern (e.g., heat dissipation pattern 500A) may correspond to the outer periphery of the display area AA of the array substrate 100, while another portion of the heat dissipation pattern (e.g., heat dissipation pattern 500B) may be arranged in a matrix and may be disposed in the display area AA of the array substrate 100.

[0134] In one example, heat transferred to the reinforcing plate 220 and dissipated via heat dissipation patterns 500, 500A and 500B can be dissipated to the outside through the bottom cover 300.

[0135] However, some of the heat dissipated from the heat dissipation pattern 500 may be reflected from the bottom cover 300 and may be guided back to the array substrate 100.

[0136] Therefore, another embodiment of this disclosure provides a display device in which at least a portion of the heat dissipation pattern 500 can be exposed outside the bottom cover 300, thereby further improving the heat dissipation effect achieved by the heat dissipation pattern 500.

[0137] Figure 12 This is an exploded perspective view of a display device according to another embodiment of the present disclosure in a second direction. Figure 13 It is shown Figure 12 The accompanying drawing shows another example of a through-hole in a display device. Figure 14 and Figure 15 It is along Figure 12 Example of a cross-sectional view taken by line II-II' in the diagram.

[0138] like Figure 12 As shown, except that the bottom cover 300 further has a through hole 330 defined in 1, the display device according to another embodiment of the present disclosure and Figure 1 , Figures 7 to 11 The display devices shown are identical. Repeated descriptions will be omitted in the following text.

[0139] like Figure 12 As shown, according to another embodiment of the present disclosure, the bottom cover 300 has a bottom 310 facing the package structure 200, a side portion 320 extending vertically from the edge of the bottom 310, and at least one through-hole 330 defining the bottom 310 and corresponding to at least a portion of the at least one heat dissipation pattern 500.

[0140] In one example, such as Figure 12As shown, the at least one heat dissipation pattern 500 can correspond one-to-one with the at least one through hole 330. Thus, the entire heat dissipation pattern 500 can be exposed outside the bottom cover 300 through the through hole 330, allowing heat dissipated from the heat dissipation pattern 500 to be directly dissipated to the outside through the through hole 330. Therefore, the heat dissipation effect generated by the heat dissipation pattern 500 can be further improved.

[0141] However, foreign objects may flow into the bottom cover 300 through the through-hole 330. Therefore, the arrangement area of ​​the through-hole 330 can be limited to areas with relatively high heat generation levels.

[0142] In other words, such as Figure 13 As shown, only a portion of the at least one heat dissipation pattern 500 may correspond to the through hole 330.

[0143] In this way, the arrangement of vias 330 can correspond to the heat generation distribution in the array substrate 100. That is, the arrangement area of ​​vias 330 can be limited to areas of the array substrate 100 with relatively high heat generation levels. In this way, the heat dissipation effect generated by the heat dissipation pattern 500 can be further improved, while foreign matter intrusion caused by the arrangement of vias 330 can be reduced.

[0144] like Figure 14 As shown, each of at least one heat dissipation pattern 500 corresponding to the through hole 330 of the bottom cover 300 has a width greater than the width of the through hole 330.

[0145] Therefore, each of at least one heat dissipation pattern 500 corresponding to the through hole 330 of the bottom cover 300 includes an exposed area EXA corresponding to the through hole 330 and a covered area NEXA corresponding to the peripheral area surrounding the through hole 330 in the region of the bottom 310 of the bottom cover 300.

[0146] In this way, the heat dissipated from the heat dissipation pattern 500 can be transferred to the bottom 310 of the bottom cover 300, and simultaneously dissipated from the bottom cover 300 through the through-hole 330. Therefore, the heat dissipation effect generated by the heat dissipation pattern 500 can be further improved.

[0147] Alternatively, based on the ratio between the thickness of the heat dissipation pattern 500 and the spacing between the package structure 200 and the bottom cover 300, the exposed area EXA of the heat dissipation pattern 500 can be set in the through-hole 330 of the bottom cover 300.

[0148] In other words, such as Figure 15As shown, the exposed area EXA facing the through-hole 330 in the region of the heat dissipation pattern 500 can be partially inserted into the through-hole 330. In this way, the contact area between the heat dissipation pattern 500 and the bottom cover 300 can be increased, thereby further improving the heat dissipation effect caused by the heat dissipation pattern 500. In addition, this can contribute to the thinning and lightening of the display device.

[0149] As described above, each embodiment of the display device according to this disclosure includes at least one heat dissipation pattern 500 disposed between the encapsulation structure 200 and the bottom cover 300. Each heat dissipation pattern 500 includes a porous frame layer 510 and a heat dissipation layer 520 coated on the frame layer 510 to surround the frame layer 510 and composed of particles made of a heat dissipation material. The heat dissipation pattern 500 conducts heat transferred through the encapsulation structure 200 to the bottom cover 300 and dissipates heat into the space between the encapsulation structure 200 and the bottom cover 300. As a result, heat from the array substrate 100 can be dissipated more quickly. Therefore, the display quality and lifespan of the display device can be improved.

[0150] Furthermore, according to each embodiment of this disclosure, the encapsulation structure 200 includes a first adhesive film 201 disposed on the array substrate 100; an encapsulation film 210 disposed on the first adhesive film 201, made of a metal material and fixed to the array substrate 100 via the first adhesive film 201; a second adhesive film 202 disposed on the encapsulation film 210; and a planar reinforcing plate 220 disposed on the second adhesive film 202 and fixed to the encapsulation film 210 via the second adhesive film 202.

[0151] Therefore, the first adhesive film 201, the encapsulation film 210 made of metallic material, and the second adhesive film 202 can seal the light-emitting array 120. Consequently, the pathways for moisture or oxygen to penetrate into the light-emitting array 120 can be complex. Therefore, the lifetime degradation and performance degradation of the light-emitting array 120 can be delayed.

[0152] Furthermore, the reinforcing plate 220 can be relatively thick and made of metal. Therefore, the rigidity of the display device can be improved due to this reinforcing plate 220.

[0153] The planar reinforcing plate 220 can be fixedly attached to the entire surface of the encapsulation film 210 via the second adhesive film 202. That is, there can be no air gap between the reinforcing plate 220 and the encapsulation film 210, and the reinforcing plate 220 can be in close contact with the encapsulation film 210. This makes it easier for heat from the array substrate 100 to be transferred to the reinforcing plate 220. Therefore, heat dissipation can be improved.

[0154] Furthermore, the heat transferred to the reinforcing plate 220 of the packaging structure 200 can be easily dissipated toward the bottom cover 300 via at least one heat dissipation pattern 500 disposed on the reinforcing plate 220. In other words, due to the at least one heat dissipation pattern 500, heat dissipation of the reinforcing plate 220 can be performed quickly and easily, thereby further improving the heat dissipation effect.

[0155] In a display device according to another embodiment of the present disclosure, a through hole 330 corresponding to at least a portion of the at least one heat dissipation pattern 500 may extend through the bottom 310 of the bottom cover 300.

[0156] A portion of the heat dissipation pattern 500 can be exposed outside the bottom cover 300 through the through-hole 330, while another portion of the heat dissipation pattern 500 can face the bottom 310 of the bottom cover 300. Therefore, some of the heat dissipated from the heat dissipation pattern 500 can be dissipated directly from the bottom cover 300 through the through-hole 330, while another portion of the heat dissipated from the heat dissipation pattern 500 can be transferred to the bottom cover 300. Thus, the heat dissipation effect generated by the heat dissipation pattern 500 can be further improved.

[0157] Although embodiments of the present disclosure have been described in more detail with reference to the accompanying drawings, the present disclosure is not necessarily limited to these embodiments. The present disclosure can be implemented in various modifications without departing from the spirit and concept of the present disclosure. Therefore, the embodiments disclosed herein are not intended to limit the spirit and concept of the present disclosure, but rather to describe it. The scope of the spirit and concept of the present disclosure is not limited by the embodiments. Therefore, it should be understood that the embodiments described above are illustrative and not restrictive in all respects. The scope of protection of the present disclosure should be interpreted by the claims, and all spirit and concept within the scope of the present disclosure should be interpreted as being included within the scope of the present disclosure.

Claims

1. A display device comprising: An array substrate having a light-emitting array, the light-emitting array comprising a plurality of light-emitting elements respectively corresponding to a plurality of pixel regions; An encapsulation structure is disposed on the array substrate and seals the light-emitting array; A bottom cover that houses the array substrate and the packaging structure; At least one heat dissipation pattern is disposed between the encapsulation structure and the bottom cover; Wherein, the at least one heat dissipation pattern includes: A porous framework layer comprising wound metal fibers; and A heat dissipation layer surrounding the frame layer and made of heat dissipation material. The heat dissipation layer comprises particles made of a heat-dissipating material, and is capable of dissipating heat from the frame layer. The particles of the heat dissipation layer are coated on the outer surface of the frame layer and disposed in the space between the metal fibers wound in the frame layer.

2. The display device according to claim 1, wherein, The packaging structure includes: A first adhesive film disposed on the array substrate; An encapsulation film comprising a metal material is disposed on the first adhesive film; A second adhesive film disposed on the encapsulation film; and A planar reinforcing plate disposed on the second adhesive film.

3. The display device according to claim 2, wherein, The encapsulation film has a thickness less than that of the first adhesive film.

4. The display device according to claim 3, wherein, The encapsulation film has a thickness in the range of 30 mm to 50 mm.

5. The display device according to claim 2, wherein, The encapsulation film includes aluminum foil.

6. The display device according to claim 2, wherein the reinforcing plate comprises aluminum.

7. The display device according to claim 2, wherein, The reinforcing plate is thicker than the encapsulation film.

8. The display device according to claim 7, wherein, The second adhesive film is thicker than the first adhesive film.

9. The display device according to claim 2, wherein, The second adhesive film has a thickness in the range of 50 mm to 250 mm. The encapsulation film is thinner than the second adhesive film. The reinforcing plate has a thickness of 1 mm or greater.

10. The display device according to claim 1, wherein, The bottom cover includes: Facing the bottom of the packaging structure; and The side portion extending vertically from the bottom edge toward the array substrate. In this embodiment, one surface of the at least one heat dissipation pattern contacts the packaging structure, while the other surface of the at least one heat dissipation pattern contacts the bottom of the bottom cover. The at least one heat dissipation pattern is disposed in a portion of the space between the packaging structure and the bottom cover.

11. The display device according to claim 10, wherein, The at least one heat dissipation pattern includes a plurality of heat dissipation patterns arranged in a matrix and spaced apart from each other.

12. The display device according to claim 11, wherein, The plurality of heat dissipation patterns are spaced apart from each other in a first direction with a first spacing and in a second direction with a second spacing, wherein the second spacing is different from the first spacing.

13. The display device according to claim 10, wherein, The at least one heat dissipation pattern is arranged in accordance with the heat generation distribution in the array substrate.

14. The display device according to claim 10, wherein, At least a portion of the at least one heat dissipation pattern corresponds to the outer periphery of the display area of ​​the array substrate.

15. The display device according to claim 14, wherein, Another portion of the at least one heat dissipation pattern is disposed in the display area of ​​the array substrate.

16. The display device according to claim 10, wherein, The bottom has at least one through hole defined therein, corresponding to at least a portion of the at least one heat dissipation pattern.

17. The display device according to claim 16, wherein, The portion of the at least one heat dissipation pattern corresponding to the through hole of the bottom cover includes: The exposed area of ​​the through hole facing the bottom cover; and The area covered around the periphery of the through hole in the region of the bottom of the bottom cover.

18. The display device according to claim 17, wherein, The exposed area of ​​the heat dissipation pattern is partially inserted into the through hole of the bottom cover.

19. The display device according to claim 1, wherein, Each of the particles in the heat dissipation layer comprises a silicon-based material.

20. The display device according to claim 1, wherein, Each of the particles in the heat dissipation layer includes at least one selected from the group consisting of Si2N2O, CaF2, BN, SiC, SrTiO3 and Na2SiO3.

21. The display device according to claim 1, wherein, The frame layer has a thickness of 0.1 mm or less, and The heat dissipation layer has a thickness in the range of 20 mm to 50 mm.

22. The display device according to claim 2, wherein, The reinforcing plate is fixedly attached to the entire surface of the encapsulation film via the second adhesive film.

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