Thin film transistor, manufacturing method thereof, driving substrate and electronic device

Abstract

Embodiments of the present application provide a thin film transistor, a manufacturing method thereof, a driving substrate and an electronic device. The thin film transistor comprises a source contact electrode and a drain contact electrode, a manufacturing material of the source contact electrode and the drain contact electrode comprising a first metal oxide; a semiconductor active layer connecting the source contact electrode and the drain contact electrode, the semiconductor active layer comprising a channel region; a barrier layer covering at least the channel region; a gate insulating layer located on a side of the barrier layer away from the active layer and covering the barrier layer; a gate located on a side of the gate insulating layer away from the barrier layer, and a projection of the gate on the semiconductor active layer overlapping the channel region; an interlayer dielectric layer located on a side of the gate away from the gate insulating layer; a source and a drain located on a side of the interlayer dielectric layer away from the gate, the source being connected to the source contact electrode through a first via, and the drain being connected to the drain contact electrode through a second via. The present application can reduce the risk of electrical property degradation of the thin film transistor after light exposure.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor device technology, and more specifically relates to a thin-film transistor and its fabrication method, driving substrate and electronic device. Background Technology

[0002] In the current display technology field, thin-film transistors (TFTs) are the main electronic components in the driving substrates for displays. TFT technologies primarily include low-temperature polycrystalline silicon (LTPS), metal-oxide-semiconductor (MODS), and single-crystal silicon (SDS) semiconductor processes. Among these, LTPS TFTs exhibit superior electron mobility compared to the other two types, while MODS TFTs have lower off-state leakage current. LTPS TFTs and MODS TFTs are currently the two main types of transistors used in driving substrates. In practical applications, TFTs in the driving substrate may be exposed to light, leading to electrical degradation and consequently affecting the operation of the driving substrate. Summary of the Invention

[0003] In view of this, this application provides a thin-film transistor and its fabrication method, driving substrate and electronic device, to solve the technical problem of electrical degradation of thin-film transistors after exposure to light.

[0004] In a first aspect, embodiments of this application provide a thin-film transistor, comprising: a source contact electrode and a drain contact electrode, the source contact electrode and the drain contact electrode being fabricated from a first metal oxide; a semiconductor active layer, the semiconductor active layer connecting the source contact electrode and the drain contact electrode, the semiconductor active layer including a channel region; a barrier layer, the barrier layer at least covering the channel region; a gate insulating layer located on the side of the barrier layer away from the active layer and covering the barrier layer; a gate located on the side of the gate insulating layer away from the barrier layer, the projection of the gate on the semiconductor active layer overlapping the channel region; an interlayer dielectric layer located on the side of the gate away from the gate insulating layer; a source electrode and a drain electrode located on the side of the interlayer dielectric layer away from the gate electrode, the source electrode being connected to the source contact electrode through a first via, and the drain electrode being connected to the drain contact electrode through a second via.

[0005] This application provides a barrier layer between the semiconductor active layer and the gate insulating layer of a thin-film transistor (TFT), which can prevent electrical degradation of the TFT after exposure to light. The source and drain contact electrodes are made of a first metal oxide. The etching and drilling processes used to fabricate the first and second vias cause minimal or no damage to the source and drain contact electrodes, thereby ensuring low contact resistance between the source and source contact electrodes and low contact resistance between the drain and drain contact electrodes. This improves the conductivity of the connection between the source / drain and the contact electrodes, ensuring stable TFT performance. Furthermore, the first metal oxide, which has a large work function, prevents the generation of photoelectrons in the source and drain contact areas after exposure to light, thus avoiding photo-induced leakage current and further ensuring the stability of the TFT performance.

[0006] Specifically, the barrier layer is made of a second metal oxide. Typically, the second metal oxide is aluminum oxide. The barrier layer has a large work function and is not excited by light to generate electrons, thus blocking the transfer of holes or defect ions generated by light exposure in the semiconductor active layer.

[0007] Specifically, the barrier layer is fabricated using atomic layer deposition (ALD). ALD allows for a thinner barrier layer, so during the subsequent fabrication of the first and second vias of the insulating layer, the etching process can remove the barrier layer at the via locations to ensure proper contact performance between the source and source electrodes, as well as between the drain and drain electrodes.

[0008] Specifically, the thickness of the barrier layer is d, where, The deposition time for each single-atom film in atomic layer deposition (ALD) is relatively long, and a smaller barrier layer thickness can reduce the time required for the barrier layer process.

[0009] Specifically, the barrier layer includes a cutout area, and the gate insulating layer fills the cutout area.

[0010] Specifically, the first metal oxide includes indium tin oxide (ITO) or indium zinc oxide (IZO). ITO has a work function of approximately 3.8 eV. Both ITO and IZO possess good conductivity and a large work function. Using ITO or IZO to fabricate the source and drain contact electrodes minimizes damage to the source and drain contact electrodes during the etching process of the insulating layer to form vias in thin-film transistor fabrication. This reduces the contact resistance between the source and source contacts, as well as between the drain contacts. Simultaneously, it prevents the generation of photoelectrons in the source and drain contact areas after illumination, thereby avoiding photogenerated leakage current.

[0011] Furthermore, the work function of the first metal oxide is greater than 3.1 eV, and the work function of the barrier layer is greater than 3.1 eV.

[0012] Specifically, the first via penetrates the gate insulating layer, the interlayer dielectric layer, and the barrier layer, and exposes the source contact electrode; the second via penetrates the gate insulating layer, the interlayer dielectric layer, and the barrier layer, and exposes the drain contact electrode.

[0013] Secondly, embodiments of this application also provide a method for fabricating a thin-film transistor. The method includes: fabricating a source contact electrode and a drain contact electrode, the material for which the source contact electrode and the drain contact electrode are made includes a first metal oxide; fabricating a semiconductor active layer, the semiconductor active layer connecting the source contact electrode and the drain contact electrode, the semiconductor active layer including a channel region; fabricating a barrier layer on the semiconductor active layer; fabricating a gate insulating layer on the barrier layer; fabricating a gate on the gate insulating layer, the semiconductor active layer including a channel region, the projection of the gate on the semiconductor active layer overlapping the channel region; fabricating an interlayer dielectric layer on the gate; etching the gate insulating layer, the interlayer dielectric layer and the barrier layer to form a first via and a second via, the first via exposing the source contact electrode and the second via exposing the drain contact electrode; fabricating a source and a drain on the interlayer dielectric layer, the source being connected to the source contact electrode through the first via and the drain being connected to the drain contact electrode through the second via.

[0014] Specifically, fabricating a barrier layer on top of the active layer includes using atomic layer deposition (ALD). ALD allows for a thinner barrier layer, enabling the etching process to remove the barrier layer at the via locations during subsequent fabrication of the first and second vias in the insulating layer. This ensures satisfactory contact performance between the source and drain electrodes. Since ALD eliminates the need for additional processing steps after fabricating the barrier layer, the process is relatively simple.

[0015] Thirdly, embodiments of this application also provide a driving substrate, including the thin-film transistors provided in any embodiment of this application.

[0016] Fourthly, embodiments of this application also provide an electronic device, including the driving substrate provided in embodiments of this application.

[0017] The thin-film transistor, its fabrication method, driving substrate, and electronic device provided in this application have the following beneficial effects:

[0018] A barrier layer is placed between the semiconductor active layer and the gate insulating layer. This barrier layer prevents photogenerated carriers and photogenerated defect ions generated in the semiconductor active layer from moving towards the gate insulating layer and recombining after the thin-film transistor (TFT) receives light, thus avoiding electrical degradation after light exposure. Furthermore, the source is connected to the source contact electrode via a first via, and the source is connected to the semiconductor active layer via the source contact electrode. The drain is connected to the drain contact electrode via a second via, and the drain is connected to the semiconductor active layer via the drain contact electrode. The source and drain contact electrodes are made of a first metal oxide. The etching and drilling processes used to fabricate the first and second vias cause minimal or no damage to the source and drain contact electrodes, thus ensuring low contact resistance between the source and source contact electrodes and between the drain contact electrodes. This improves the conductivity of the connection between the source and drain electrodes and ensures stable TFT performance. In addition, the source contact electrode and the drain contact electrode are made of a first metal oxide. The first metal oxide has a large work function, so the source contact area and the drain contact area will not generate photoelectrons after being exposed to light, which can avoid the generation of photogenerated leakage current, thereby further ensuring the performance stability of the thin film transistor. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a schematic diagram of the structure of a thin-film transistor in related technologies;

[0021] Figure 2 This is a schematic diagram of the structure of a thin-film transistor provided in an embodiment of this application;

[0022] Figure 3 A schematic diagram illustrating another optional embodiment of the thin-film transistor provided in this invention;

[0023] Figure 4 A top view schematic diagram of a thin-film transistor provided in an embodiment of the present invention;

[0024] Figure 5 Another top view schematic diagram of a thin-film transistor provided in an embodiment of the present invention;

[0025] Figure 6 This is a schematic diagram illustrating an application of a thin-film transistor provided in an embodiment of this application;

[0026] Figure 7 This is a flowchart illustrating a method for fabricating a thin-film transistor according to an embodiment of this application. Detailed Implementation

[0027] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0028] The terminology used in the embodiments of this invention is for the purpose of describing particular embodiments only and is not intended to limit the invention. The singular forms “a,” “the,” and “the” as used in the embodiments of this invention and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0029] Organic light-emitting diode (OLED) display technology has become the mainstream display technology due to its advantages such as self-illumination, low power consumption, high brightness, and thinness. In applications, ambient light can penetrate part of the film layer of the OLED display panel and illuminate the thin-film transistors (TFTs) in the driving substrate. Alternatively, light can penetrate the display panel and be reflected off the back structure (such as the back cover) of the electronic device before illuminating the TFTs in the driving substrate. Ambient light can also illuminate the TFTs in transparent display devices. However, the materials used to fabricate the active layer of the TFTs are sensitive to light. When the TFTs receive light, they absorb light, leading to electrical degradation, which in turn affects the normal operation of the circuitry in the driving substrate and impacts the stability of the product's performance.

[0030] Figure 1 This is a schematic diagram of the structure of a thin-film transistor in related technologies, such as... Figure 1 As shown, in the structure of a conventional thin-film transistor 000, the semiconductor active layer 20 includes a source contact region 21, a drain contact region 22, and a channel region 23, with the gate 30 overlapping the channel region 23. The source 41 is connected to the source contact region 21 through vias (not shown) in the gate insulating layer 60 and the interlayer dielectric layer 70, and the drain 42 is connected to the drain contact region 22 through vias (not shown) in the gate insulating layer 60 and the interlayer dielectric layer 70. When the thin-film transistor 000 is exposed to light, the semiconductor active layer 20 releases photoelectrons due to the light exposure, and simultaneously generates holes or defect ions. These holes or defect ions diffuse towards the interface between the semiconductor active layer 20 and the gate insulating layer 60, and are then captured by defects at the interface, resulting in irreversible electrical damage.

[0031] Based on this, embodiments of this application provide a thin-film transistor, which solves the technical problem of electrical degradation of thin-film transistors after exposure to light by improving the structure of the thin-film transistor.

[0032] Figure 2 A schematic diagram of the structure of a thin-film transistor provided in an embodiment of this application is shown below. Figure 2 As shown, the thin-film transistor 00 includes: a source contact electrode 11, a drain contact electrode 12, a semiconductor active layer 20, a gate electrode 30, a source electrode 41, and a drain electrode 42. The semiconductor active layer 20 connects the source contact electrode 11 and the drain contact electrode 12. The semiconductor active layer 20 is fabricated using low-temperature polycrystalline silicon semiconductor or metal oxide semiconductor, typically indium gallium zinc oxide (IGZO). The semiconductor active layer 20 includes a channel region (not shown in the figure). In a thin-film transistor device, the region of the semiconductor active layer 20 that overlaps with the gate electrode 30 is the channel region. The source electrode 41 is connected to the semiconductor active layer 20 through the source contact electrode 11, and the drain electrode 42 is connected to the semiconductor active layer 20 through the drain contact electrode 12. A substrate 01 is also shown in the figure, on which the thin-film transistor 00 is formed. In a driving substrate structure, the substrate 01 can be a rigid substrate or a flexible substrate.

[0033] In the thin-film transistor 00 provided in this application embodiment, the source contact electrode 11 and the drain contact electrode 12 are made of a first metal oxide; wherein, the first metal oxide has electrical conductivity. The electrical conductivity of the first metal oxide is greater than that of the semiconductor active layer.

[0034] The thin-film transistor 00 also includes a barrier layer 50 and a gate insulating layer 60. The barrier layer 50 is fabricated on the semiconductor active layer 20 and at least covers the channel region. The gate insulating layer 60 is located on the side of the barrier layer 50 away from the semiconductor active layer and covers the barrier layer 50. Specifically, the material used to fabricate the gate insulating layer 60 includes silicon oxide.

[0035] The barrier layer 50 is used to prevent photogenerated carriers and photogenerated defect ions generated by the semiconductor active layer 20 from moving towards the gate insulating layer 60 and recombinating after the thin-film transistor 00 receives light, thus preventing irreversible damage to the thin-film transistor. Among them, photogenerated carriers are generally electrons, and photogenerated defects are mainly holes, O- ions, H ions, etc.

[0036] Specifically, in one embodiment, the semiconductor active layer of the thin-film transistor provided in this application is made of low-temperature polycrystalline silicon. When exposed to light, the semiconductor active layer of the thin-film transistor generates free electrons and H ions. In application, when a voltage signal is applied to the gate, the H ions moving towards the gate insulating layer are blocked by the barrier layer, preventing them from recombinating with the gate insulating layer interface. When the gate voltage signal is reset, the H ions recombine with the free electrons, restoring the semiconductor active layer to its initial state, thereby preventing changes in the channel performance of the thin-film transistor.

[0037] Specifically, in another embodiment, the semiconductor active layer of the thin-film transistor provided in this application is made of oxide semiconductor material. When the semiconductor active layer is exposed to light, it generates free electrons and holes. In application, when a voltage signal is applied to the gate, holes migrating towards the gate insulating layer are blocked by the blocking layer, thereby preventing holes from neutralizing with O negative ions at the interface. When the gate voltage signal is reset, the holes recombine with free electrons, restoring the semiconductor active layer to its initial state, thus preventing changes in the channel performance of the thin-film transistor.

[0038] like Figure 2As shown, the gate 30 is located on the side of the gate insulating layer 60 away from the barrier layer 50, and the projection of the gate 30 onto the semiconductor active layer 20 overlaps with the channel region. The interlayer dielectric layer 70 is located on the side of the gate 30 away from the gate insulating layer 60; the source 41 and drain 42 are located on the side of the interlayer dielectric layer 70 away from the gate 30. Specifically, the interlayer dielectric layer 70 is made of silicon oxide and silicon nitride. As illustrated, the first via 81 penetrates the gate insulating layer 60, the interlayer dielectric layer 70, and the barrier layer 50, and exposes the source contact electrode 11; the second via 82 penetrates the gate insulating layer 60, the interlayer dielectric layer 70, and the barrier layer 50, and exposes the drain contact electrode 12. The source 41 is connected to the source contact electrode 11 through the first via 81, and the drain 42 is connected to the drain contact electrode 12 through the second via 82. Optionally, in the fabrication process of the thin-film transistor provided in this application embodiment, the barrier layer can be etched away simultaneously during the drilling process of the gate insulating layer and the interlayer dielectric layer to form the first via and the second via. The specific fabrication method of the thin-film transistor will be described in the following embodiments regarding the fabrication method. In the thin-film transistor structure provided in this application embodiment, a barrier layer is provided between the semiconductor active layer and the gate insulating layer. The barrier layer can prevent photogenerated carriers and photogenerated defect ions generated in the semiconductor active layer from moving towards the gate insulating layer and recombinating after the thin-film transistor receives light, thereby preventing electrical degradation of the thin-film transistor after light exposure. Specifically, the material used to fabricate the barrier layer has a large work function, ensuring that the barrier layer is not easily excited by light to generate photoelectrons, and thus can prevent the migration of holes or defect ions generated in the semiconductor active layer by light exposure.

[0039] Furthermore, in related technologies, the source and drain are respectively connected to the active semiconductor layer via vias, thus exposing the active semiconductor layer through the vias penetrating the gate insulating layer and the interlayer insulating layer. In thin-film transistor fabrication processes, etching and drilling holes in the gate insulating layer and interlayer insulating layer above the active semiconductor layer can damage the active semiconductor layer, leading to increased contact resistance between the source / drain and the active semiconductor layer. In this application, the source is connected to the source contact electrode via a first via, and the source is connected to the active semiconductor layer via the source contact electrode. The drain is connected to the drain contact electrode via a second via, and the drain is connected to the active semiconductor layer via the drain contact electrode. The source and drain contact electrodes are made of a first metal oxide. The etching and drilling process used to fabricate the first and second vias causes little or no damage to the source and drain contact electrodes, thereby ensuring low contact resistance between the source and source contact electrodes and low contact resistance between the drain and drain contact electrodes. This improves the conductivity of the connection between the source and drain electrodes and ensures stable performance of the thin-film transistor.

[0040] Furthermore, in related technologies, the semiconductor active layer includes a source contact region and a drain contact region, both of which are sensitive to light. In applications, a voltage difference exists between the source and drain. When the source and drain contact regions are exposed to light, photocurrents are generated between them, affecting the performance of the thin-film transistor (TFT). For example, when the TFT is used as a switch, it may cause premature turn-on or excessive off-state leakage current, affecting the node potential in the circuit. In this application, the source and drain contact electrodes are made of a first metal oxide, which has a large work function. Therefore, the source and drain contact regions do not generate photoelectrons after exposure to light, avoiding photogenerated leakage current and further ensuring the stability of the TFT performance.

[0041] Specifically, the work function of the first metal oxide is greater than 3.1 eV. In applications, the light that can illuminate the thin-film transistor is ambient light, or light emitted by the light-emitting devices in the display panel and then illuminating the thin-film transistor. In other words, the light illuminating the thin-film transistor is visible light. The wavelength range of visible light is 400 nm to 700 nm.

[0042] According to the formula for electron energy, E = h * f, and the formula for frequency, f = c / (k * λ), where E is energy in eV and h is Planck's constant (6.63 * 10⁻⁶). -34 J˙s; f is frequency, unit is Hz; c is speed of light, 3*10 17 nm / s; k is a constant, 1.6 * 10 -19 J / eV; λ is the wavelength in nm. Therefore, E = 1240 / λ. The energy range of photoelectrons generated after the active semiconductor layer in a thin-film transistor absorbs visible light is 1.78–3.1 eV. In this embodiment, the work function of the first metal oxide is set to be greater than 3.1 eV, ensuring that the source and drain contact regions are not excited to generate photoelectrons after being exposed to light. Specifically, the first metal oxide includes indium tin oxide (ITO) or indium zinc oxide (IZO). ITO has a work function of approximately 3.8 eV. Both ITO and IZO have good conductivity and a large work function. Using ITO or IZO to fabricate the source and drain contact electrodes minimizes damage to the source and drain contact electrodes during the etching process of the insulating layer to form vias in thin-film transistor fabrication, reducing the contact resistance between the source and drain electrodes. Simultaneously, it prevents the generation of photoelectrons in the source and drain contact regions after exposure to light, thereby avoiding photogenerated leakage current.

[0043] Specifically, in this embodiment, the material used to fabricate the barrier layer includes a second metal oxide with a work function greater than 3.1 eV. The second metal oxide is an insulating material with a high dielectric constant and is essentially non-conductive. Typically, the second metal oxide may include aluminum oxide, which has a work function of approximately 8.4 eV. Aluminum oxide is not photoexcited to generate electrons and can block the transfer of holes or defect ions generated by light exposure in the semiconductor active layer.

[0044] Specifically, in this application, the barrier layer 50 is fabricated using atomic layer deposition (ALD). Optionally, aluminum oxide can be fabricated as the barrier layer using ALD. During fabrication, the entire barrier layer 50 is fabricated using ALD after the semiconductor active layer 20, meaning that the barrier layer 50 is also formed above the source contact electrode 11 and drain contact electrode 12. Because ALD can produce a relatively thin barrier layer 50, the etching process can remove the barrier layer at the via location when fabricating the first and second vias of the insulating layers (gate insulating layer and interlayer insulating layer), thus satisfying the contact performance between the source and source contact electrodes, as well as the contact performance between the drain and drain contact electrodes.

[0045] Optionally, the thickness of the barrier layer 50 is d, where, The barrier layer is fabricated using atomic layer deposition (ALD), and its thickness is approximately 1 to 10 atoms. Furthermore, the deposition time for each single-atom layer in ALD is relatively long; a smaller barrier layer thickness reduces the fabrication time.

[0046] Figure 3 This is a schematic diagram of another optional embodiment of the thin-film transistor provided in this invention. (See diagram below.) Figure 3As shown, the barrier layer 50 of the thin-film transistor includes a hollow region 51, which is filled by a gate insulating layer 60. Specifically, the barrier layer 50 is fabricated using atomic layer deposition (ALD), where the barrier layer material is formed layer by layer on the semiconductor active layer 50 in the form of a single-atom film to form a thin barrier layer 50. Because the deposition thickness of the barrier layer material is thin, the fabricated barrier layer has multiple hollow regions. When the gate insulating layer 60 is fabricated on the barrier layer 50, the hollow region 51 is filled by the gate insulating layer 60. In this embodiment, the barrier layer 50 has a certain thickness, which can prevent the migration of photogenerated carriers, holes, or defect ions generated by illumination of the semiconductor active layer to the gate insulating layer, thus preventing the recombination of holes or defect ions at the interface of the gate insulating layer. The barrier layer above the active layer of the semiconductor mainly plays a role. The barrier layer above the contact electrodes (source and drain contacts) may affect the contact connection between the source / drain and the contact electrodes. In this application, because the barrier layer is relatively thin, the etching process can easily remove the thin barrier layer when fabricating vias connecting the source / drain and contact electrodes, thus ensuring the contact connection between the source / drain and contact electrodes and reducing the contact resistance. In thin-film transistor fabrication, an atomic layer deposition process is used to create the thin barrier layer, eliminating the need for additional patterning processes and simplifying the process.

[0047] Specifically, in one embodiment, Figure 4 This is a top view schematic diagram of a thin-film transistor provided in an embodiment of the present invention. The figure illustrates the view from the gate side of the thin-film transistor towards the semiconductor active layer of the thin-film transistor. Figure 4 As shown, the barrier layer 50 includes multiple barrier portions 52, which are dispersedly arranged, and the barrier layer 50 is island-shaped. The area between adjacent barrier portions 52 is the hollow area 51. When the barrier layer is fabricated using atomic layer deposition (ALD), the material for the barrier layer is formed layer by layer on the semiconductor active layer in the form of single-atom films. When the number of deposited single-atom films is small, the single atoms only locally aggregate, and there will be gaps (i.e., hollow areas) in the formed barrier layer, and a dense film layer cannot be formed on the entire surface. As the number of deposited single-atom films increases, the subsequently deposited atomic films will gradually cover the gaps in the previous film layers. When the number of deposited single-atom films is large enough, a dense film layer can eventually be formed on the entire surface. Figure 4In the thin-film transistor structure provided in the embodiment, a barrier layer is obtained by depositing a small number of single-atom films. In this embodiment, the barrier layer can prevent the migration of holes or defect ions generated by light exposure in the semiconductor active layer to the gate insulating layer, thus preventing the recombination of holes or defect ions at the interface of the gate insulating layer. At the same time, the barrier layer is thin and is easily etched away in the insulating layer opening process. After the barrier layer is made by atomic layer deposition process, no additional processing process is required for the barrier layer.

[0048] It should be noted that Figure 4 The island-shaped barrier portion 52 is shown as a circle only, and is used solely to illustrate the morphology of the barrier layer in this embodiment. This application does not impose any limitations on the specific shape of the island-shaped barrier portion.

[0049] Furthermore, Figure 5 This is another top view schematic diagram of a thin-film transistor provided in an embodiment of the present invention. (See diagram below.) Figure 5 As shown, the barrier layer 50 includes multiple perforated areas 51, and the barrier layer 50 is similar to a sieve. This embodiment is similar to... Figure 4 Compared to the previous embodiment, the atomic layer deposition process deposits slightly more single-atom films, but the barrier layer still does not form a dense film covering the entire surface, indicating that the thickness of the barrier layer 50 is still relatively thin. The barrier layer 50 can prevent the migration of holes or defect ions generated by light exposure in the semiconductor active layer to the gate insulating layer, and is easily etched away during the insulating layer opening process. Optionally, in this embodiment, the length of the cutout region 51 is greater than 1.5 μm.

[0050] Additionally, it should be noted that Figure 5 The hollow area 51 in the diagram is shown only as a circle to illustrate the morphology of the barrier layer in this embodiment. This application does not impose any limitations on the specific shape of the hollow area.

[0051] Figure 6 This is a schematic diagram illustrating an application of the thin-film transistor provided in an embodiment of this application, such as... Figure 6 The diagram illustrates the structure of a display panel, which includes a driving substrate 1 and a display layer 2 situated on the driving substrate 1. The driving substrate 1 includes a thin-film transistor 00 as provided in this embodiment. The display layer 2 includes a light-emitting device 3, which includes an anode a, a light-emitting layer b, and a cathode c. Optionally, the light-emitting layer b includes an organic light-emitting material. The drain 42 of the thin-film transistor 00 is connected to the anode a of the light-emitting device 3 via a via. Figure 6 In the embodiment, the thin-film transistor 00 is illustrated as a transistor in a pixel circuit.

[0052] In another embodiment, the driving substrate further includes a driving circuit, which includes a plurality of thin-film transistors. The thin-film transistors in the driving circuit can adopt the structure of the thin-film transistors provided in the embodiments of this application.

[0053] This application also provides a method for fabricating a thin-film transistor. Figure 7 A flowchart illustrating the fabrication method of a thin-film transistor provided in this application embodiment is shown below. Figure 7 As shown, the manufacturing method includes:

[0054] Step S101: Fabricate source contact electrode 11 and drain contact electrode 12. The material used to fabricate source contact electrode 11 and drain contact electrode 12 includes a first metal oxide. Specifically, source contact electrode and drain contact electrode are fabricated on substrate 01.

[0055] Step S102: Fabricate a semiconductor active layer 20. The semiconductor active layer 20 is connected to the source contact electrode 11 and the drain contact electrode 12. The semiconductor active layer 20 includes a channel region (not shown in the figure).

[0056] Step S103: Fabricate a barrier layer 50 on the semiconductor active layer 20.

[0057] Step S104: Fabricate a gate insulating layer 60 on top of the barrier layer 50;

[0058] Step S105: A gate 30 is fabricated on the gate insulating layer 60, and the projection of the gate 30 on the semiconductor active layer 20 overlaps with the channel region.

[0059] Step S106: Fabricate an interlayer dielectric layer 70 on top of the gate 30;

[0060] Step S107: Etch the gate insulating layer 60, the interlayer dielectric layer 70 and the barrier layer 50 to form a first via 81 and a second via 82. The first via 81 exposes the source contact electrode 11 and the second via 82 exposes the drain contact electrode 12.

[0061] Step S108: Fabricate a source electrode 41 and a drain electrode 42 on the interlayer dielectric layer 70. The source electrode 41 is connected to the source contact electrode 11 through the first via 81, and the drain electrode 42 is connected to the drain contact electrode 42 through the second via 82.

[0062] Specifically, an atomic layer deposition (ALD) process is used to fabricate a barrier layer 50 on top of the semiconductor active layer 20. ALD allows for a thinner barrier layer 50, enabling the etching process to remove the barrier layer at the via locations during subsequent fabrication of the first and second vias in the insulating layers (gate insulating layer and interlayer insulating layer). This ensures satisfactory contact performance between the source and source electrodes, as well as between the drain and drain electrodes. Since no additional processing is required after fabricating the barrier layer using ALD, the process is relatively simple.

[0063] This application also provides a driving substrate, including the thin-film transistors provided in any embodiment of this application.

[0064] This application also provides an electronic device, including the driving substrate provided in this application embodiment. The electronic device can be any device with display function, such as a mobile phone, tablet computer, laptop computer, e-reader, television set, smart wearable product, transparent display product, etc.

[0065] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

[0066] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A thin-film transistor, characterized in that, include: The source contact electrode and the drain contact electrode are made of a first metal oxide; the first metal oxide includes indium tin oxide or indium zinc oxide. A semiconductor active layer is provided, which connects the source contact electrode and the drain contact electrode, and includes a channel region; the material of the semiconductor active layer is different from the materials of the source contact electrode and the drain contact electrode. The material of the semiconductor active layer includes polycrystalline silicon semiconductor, and the first edge of the semiconductor active layer covers a portion of the surface of the source contact electrode and the second edge covers a portion of the surface of the drain contact electrode. A barrier layer, the barrier layer at least covering the channel region; the barrier layer is made of a second metal oxide, the second metal oxide being aluminum oxide; A gate insulating layer is located on the side of the barrier layer away from the semiconductor active layer and covers the barrier layer; The gate is located on the side of the gate insulating layer away from the barrier layer, and the projection of the gate on the semiconductor active layer overlaps with the channel region; An interlayer dielectric layer is located on the side of the gate away from the gate insulating layer; The source and drain are located on the side of the interlayer dielectric layer away from the gate. The source is connected to the source contact electrode through a first via, and the drain is connected to the drain contact electrode through a second via.

2. The thin-film transistor according to claim 1, characterized in that, The barrier layer is fabricated using atomic layer deposition (ALD) technology.

3. The thin-film transistor according to claim 1, characterized in that, The thickness of the barrier layer is d, where 5Å≤d≤50Å.

4. The thin-film transistor according to claim 1, characterized in that, The barrier layer includes a cutout area, and the gate insulating layer fills the cutout area.

5. The thin-film transistor according to claim 1, characterized in that, The work function of the first metal oxide is greater than 3.1 eV, and the work function of the barrier layer is greater than 3.1 eV.

6. The thin-film transistor according to claim 1, characterized in that, The first via penetrates the gate insulating layer, the interlayer dielectric layer, and the barrier layer, and exposes the source contact electrode; The second via penetrates the gate insulating layer, the interlayer dielectric layer, and the barrier layer, and exposes the drain contact electrode.

7. A method for fabricating a thin-film transistor, characterized in that, The manufacturing method includes: The source contact electrode and the drain contact electrode are fabricated, wherein the material used to fabricate the source contact electrode and the drain contact electrode includes a first metal oxide; the first metal oxide includes indium tin oxide or indium zinc oxide; A semiconductor active layer is fabricated, the semiconductor active layer connecting the source contact electrode and the drain contact electrode, the semiconductor active layer including a channel region; the material of the semiconductor active layer is different from the materials of the source contact electrode and the drain contact electrode; the material of the semiconductor active layer includes polycrystalline silicon semiconductor, and a first edge of the semiconductor active layer covers a portion of the surface of the source contact electrode and a second edge covers a portion of the surface of the drain contact electrode; A barrier layer is formed on the semiconductor active layer; the barrier layer is formed of a second metal oxide, which includes aluminum oxide. A gate insulating layer is formed on the barrier layer; A gate is formed on the gate insulating layer, the semiconductor active layer includes a channel region, and the projection of the gate on the semiconductor active layer overlaps with the channel region; An interlayer dielectric layer is fabricated on the gate; The gate insulating layer, the interlayer dielectric layer and the barrier layer are etched to form a first via and a second via, wherein the first via exposes the source contact electrode and the second via exposes the drain contact electrode; A source and a drain are fabricated on the interlayer dielectric layer. The source is connected to the source contact electrode through a first via, and the drain is connected to the drain contact electrode through a second via.

8. The manufacturing method according to claim 7, characterized in that, Fabricating a barrier layer on top of the active layer includes: A barrier layer is fabricated on the active layer using atomic layer deposition (ALD) technology.

9. A driving substrate, characterized in that, Includes the thin-film transistor according to any one of claims 1 to 6.

10. An electronic device, characterized in that, Includes the driving substrate as described in claim 9.

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