Display device

Abstract

Disclosed is a display device including: a substrate including a display area and a peripheral area defined outside the display area; a circuit layer on the substrate; a device layer on the display area; a first layer on the peripheral area, extending in a first direction, and including a first portion having a first thickness, a second portion having a second thickness smaller than the first thickness, and an intermediate portion connecting the first portion and the second portion and inclined with respect to the first portion and the second portion; an encapsulation layer covering the device layer; a touch sensing unit including a touch insulating layer and a touch electrode disposed on the encapsulation layer, and a touch signal line connected to the touch electrode; and a cover pattern superposed with at least the intermediate portion, wherein the first portion, the intermediate portion, and the second portion are sequentially adjacent along the first direction. The touch signal line extends in a second direction intersecting the first direction in a portion superposed with the second portion. The cover pattern and the touch signal line are spaced apart from each other in the first direction.

Description

[0001] This application is a divisional application of the invention patent application filed with the State Intellectual Property Office on July 26, 2017, entitled "Display Device and Method of Manufacturing Thereof" and with application number 201710618058.6. Technical Field

[0002] The present invention generally relates to a display device and a method of manufacturing the display device, and more specifically, to a display device and a method of manufacturing the display device that reduces or eliminates the possibility of certain defects occurring in the patterning process of one or more touch lines in the display device. Background Technology

[0003] Various display devices have been developed for multimedia devices such as televisions, mobile phones, tablet computers, navigation devices, and gaming devices. Keyboards or mice are widely used as input devices for these displays. In recent years, touch-sensing units have been used as input devices in displays that typically use LEDs or OLEDs as the light source for pixels. Manufacturing such displays requires a complex process involving the deposition of multiple layers of sensitive materials and photoresists with tight tolerances. The incorporation of touch-sensing lines into the touch unit further complicates the process.

[0004] To design the necessary structural components in such devices, it is typically necessary to deposit layers along a sloping surface, which results in uneven or non-uniform layer thickness. One problem caused by non-uniform layer deposition in OLEDs is layer delamination due to leakage of organic material along the sloping surface during the etching process used to form touch lines in the display device.

[0005] The information disclosed in this background section is only intended to enhance the understanding of the background of the inventive concept, and therefore may include information that does not constitute prior art known to those skilled in the art in this country. Summary of the Invention

[0006] One or more embodiments of the invention provide a display device and a method of manufacturing the same, which reduces or eliminates the possibility of certain defects occurring in the patterning process of (multiple) touch lines in the display device. Specifically, one or more embodiments of the invention provide a display device and a method of manufacturing the same, which reduces or eliminates the possibility of layer delamination due to leakage of organic material along a sloping surface during the etching process used to form touch lines in the display device. The applicant has discovered that leakage can occur due to insufficient thickness of photoresist in the sloping portion, and placing a cover on the sloping surface can reduce or eliminate leakage and subsequent delamination. Furthermore, the process of the invention can form a dam that reduces or prevents abnormal patterning of touch signal lines, such as cuts or scratches caused by masks used to form the thin-film encapsulation layer TFE in OLEDs.

[0007] Other aspects will be set forth in the specific description below, and will be partly clear from this disclosure, or may be understood by practice of the inventive concept.

[0008] According to one aspect of the invention, a display device includes: a substrate having a display area and a peripheral area defined outside the display area; a circuit layer disposed on the substrate; a device layer disposed on the display area; an encapsulation layer covering the device layer; a touch sensing unit including at least one touch insulating layer disposed on the encapsulation layer, a touch electrode disposed on the encapsulation layer, and a touch signal line connected to the touch electrode; a first component disposed in the peripheral area, including a first portion having a first thickness, a second portion having a second thickness smaller than the first thickness and superimposed on the touch signal line, and an intermediate portion inclined and connecting the first portion and the second portion; and a first thickened pattern superimposed at least on the intermediate portion. The first thickened pattern may also be superimposed on the first portion. The at least one touch insulating layer may include a lower insulating layer directly disposed on the encapsulation layer, an intermediate insulating layer disposed on the lower insulating layer, and an upper insulating layer disposed on the intermediate insulating layer. The touch signal line and the first thickened pattern may be disposed between the intermediate insulating layer and the upper insulating layer and covered by the upper insulating layer. The touch electrode may include a first touch electrode and a second touch electrode. The first touch electrode includes a plurality of first sensor electrodes arranged in one direction and a first connecting electrode connecting the plurality of first sensor electrodes. The second touch electrode includes a plurality of second sensor electrodes arranged in a direction substantially orthogonal to the one direction and a second connecting electrode connecting the plurality of second sensor electrodes. The first connecting electrode may be disposed between a lower insulating layer and an intermediate insulating layer. The first sensor electrode, the second connecting electrode and the second sensor electrode may be disposed between an intermediate insulating layer and an upper insulating layer.

[0009] The display device may further include a plurality of dummy lines disposed between a lower insulating layer and an intermediate insulating layer, each of the plurality of dummy lines being superimposed on each of the touch signal lines, each of the plurality of dummy lines being connected to the touch signal line superimposed on each of the plurality of dummy lines through a contact hole defined by the intermediate insulating layer.

[0010] The display device may also include a second thickened pattern that is at least superimposed on the intermediate portion, the second thickened pattern being disposed between the lower insulating layer and the intermediate insulating layer.

[0011] The circuit layer may include: multiple signal lines connected to the device layer; multiple pads connected to the signal lines and located on one side of the peripheral area; and a first component located between the display area and the pads.

[0012] The circuit layer may include transistors and an insulating layer covering the transistors, with the second part disposed on the same layer as the insulating layer of the circuit layer.

[0013] The device layer may include light-emitting diodes that emit light through stacked light-emitting regions and an insulating layer disposed on the insulating layer of the circuit layer and stacked with the non-light-emitting regions. The first part includes a lower part disposed on the same layer as the insulating layer of the circuit layer and an upper part disposed on the lower part and disposed on the same layer as the insulating layer of the device layer.

[0014] The lower part of the first part can be integrated with the second part.

[0015] The intermediate portion may include a lower portion disposed on the same layer as the insulating layer of the circuit layer and an upper portion disposed on the lower portion and disposed on the same layer as the insulating layer of the device layer. The upper portion of the intermediate portion is integrally disposed with the upper portion of the first portion, and the lower portion of the intermediate portion is integrally disposed with the lower portion of the first portion and the second portion.

[0016] The display device may also include a dam disposed on a substrate between the first component and the display area, the dam including a lower portion disposed on the same layer as the insulating layer of the circuit layer.

[0017] The dam may also include an upper part disposed on the lower part and disposed on the same layer as the insulating layer of the device layer.

[0018] The dam can have a height equal to or less than the height of the first part.

[0019] The touch signal line and the first thickened pattern may include the same metallic material.

[0020] The first component may include a dike; the first part may include a first dike section, and the second part may include a second dike section; the middle part may include a boundary section; the first thickened pattern may include a first covering pattern.

[0021] According to another aspect of the invention, a method of manufacturing a display device includes: setting a substrate, the substrate including a display area and a peripheral area defined outside the display area; forming a circuit layer on the substrate; forming a device layer on the display area; forming a first layer on the peripheral area, the first layer extending in a first direction, the first layer including a first portion having a first thickness, a second portion having a second thickness smaller than the first thickness, and an intermediate portion connecting the first portion and the second portion and inclined relative to the first portion and the second portion; forming an encapsulation layer covering the device layer; forming a touch sensing unit, the touch sensing unit including a touch insulating layer disposed on the encapsulation layer, a touch electrode disposed on the encapsulation layer, and a touch signal line connected to the touch electrode; and forming a thickened pattern at least superimposed with the intermediate portion.

[0022] The step of forming the thickened pattern may also include forming the thickened pattern to overlap with the first part.

[0023] The steps of forming a touch sensing unit may include forming a touch insulating layer, forming touch electrodes, and forming touch signal lines in the same process steps as forming a thickened pattern.

[0024] The steps of forming a touch insulating layer may include forming a lower insulating layer on the encapsulation layer, forming an intermediate insulating layer on the lower insulating layer, and forming an upper insulating layer on the intermediate insulating layer. The steps of forming a thickened pattern may include forming a thickened pattern between the intermediate insulating layer and the upper insulating layer.

[0025] The steps of forming the thickened pattern may include forming a conductive layer on the middle portion and patterning the conductive layer.

[0026] As described above, the thickened pattern is formed in the inclined middle portion of the first component, thus preventing leakage of organic material into the first component during the etching process, which is caused by insufficient thickness of the photoresist layer on the middle portion. Therefore, delamination is less likely to occur.

[0027] The foregoing general description and the following detailed description are exemplary and illustrative, and are intended to provide further explanation of the claimed subject matter. Attached Figure Description

[0028] The accompanying drawings, which are included to provide a further understanding of the inventive concept and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the inventive concept and, together with this specification, serve to explain the principles of the inventive concept.

[0029] Figure 1 This is a perspective view of the first state of a first embodiment of a display device DD constructed according to the principles of the present invention;

[0030] Figure 2A yes Figure 1 A perspective view of the second state of the display device;

[0031] Figure 2B yes Figure 1 A perspective view of the third state of the display device;

[0032] Figure 2C yes Figure 1 A cross-sectional side view of the display device;

[0033] Figure 3A and Figure 3B This is a perspective view of a second embodiment of the display device DD-1 constructed according to the principles of the present invention;

[0034] Figure 4A This is a schematic cross-sectional side view of a display module that can be applied in the display device of the present invention;

[0035] Figure 4B This is a plan view of an embodiment of an organic light-emitting display panel that can be applied in the display device of the present invention;

[0036] Figure 5 This is an equivalent circuit diagram of an embodiment of pixels that can be applied in the display device of the present invention;

[0037] Figure 6A This is a partial cross-sectional side view of an embodiment of an organic light-emitting display panel that can be applied in the display device of the present invention;

[0038] Figure 6B This is a partial cross-sectional side view of an embodiment of an organic light-emitting display panel that can be applied in the display device of the present invention;

[0039] Figures 7A to 7C This is a cross-sectional side view of an embodiment of a thin-film encapsulation layer that can be applied to the display device of the present invention;

[0040] Figure 8A This is a cross-sectional side view of an embodiment of a touch sensing unit that can be applied in the display device of the present invention;

[0041] Figures 8B to 8E yes Figure 8A Local top cross-sectional views of the touch sensing unit at each layer;

[0042] Figure 8F yes Figure 8E A magnified view of region AA;

[0043] Figure 9 It is along Figure 8E A sectional side view taken by line A-A';

[0044] Figure 10A It is along Figure 8E The side view of the cross section taken by line B-B'. Figure 8E A first embodiment of a dam that can be applied in a display device of the present invention is shown;

[0045] Figure 10B This is a cross-sectional side view showing a second embodiment of the dam that can be applied in the display device of the present invention;

[0046] Figure 11 yes Figure 10A A perspective view of the first embodiment of the embankment;

[0047] Figures 12A to 12G It shows the formation Figure 10A and Figure 11 A cross-sectional side view of an exemplary process for a dam with a first covering pattern;

[0048] Figures 13A to 13C This is a partial top cross-sectional view of each layer of another exemplary embodiment of the touch sensing unit that can be applied in the display device of the present invention;

[0049] Figure 14 This is a cross-sectional side view of a third embodiment of a dam having a first overlay pattern and a second overlay pattern that can be applied to the display device of the present invention. Detailed Implementation

[0050] In the following description, numerous specific details are set forth for illustrative purposes in order to provide a thorough understanding of various exemplary embodiments. However, it will be apparent that various exemplary embodiments may be practiced without these specific details or with one or more equivalent arrangements. In other instances, well-known structures and devices are shown in block diagram form to avoid unnecessarily obscuring the various exemplary embodiments.

[0051] In the accompanying drawings, the dimensions and relative dimensions of layers, films, panels, areas, etc., may be exaggerated for clarity and descriptive purposes. Furthermore, the same reference numerals denote the same elements.

[0052] When an element or layer is referred to as being "on," "connected to," or "bonded to" another element or layer, the element or layer may be directly on, directly connected to, or directly bonded to the other element or layer, or there may be intermediate elements or layers. However, when an element or layer is referred to as being "directly on," "directly connected to," or "directly bonded to" another element or layer, there are no intermediate elements or layers. For the purposes of this disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" can be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z, such as XYZ, XYY, YZ, and ZZ. The same reference numerals always denote the same element. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0053] While the terms first, second, etc., may be used herein to describe various elements, components, regions, layers, and / or portions, these elements, components, regions, layers, and / or portions should not be limited by these terms. These terms are used to distinguish one element, component, region, layer, and / or portion from another element, component, region, layer, and / or portion. Therefore, without departing from the teachings of this disclosure, the first element, component, region, layer, and / or portion discussed below may be referred to as the second element, component, region, layer, and / or portion.

[0054] Spatial relative terms such as “below,” “under,” “below,” “above,” and “above” can be used for descriptive purposes to describe the relationship between one element or feature and another, as shown in the figures. In addition to the orientations depicted in the figures, spatial relative terms are also intended to include different orientations of the device in use, operation, and / or manufacture. For example, if the device in the figures is flipped, then an element described as “below” or “under” other elements or features would be oriented “above” other elements or features. Thus, the exemplary term “below” can include both above and below orientations. Furthermore, the device can be otherwise oriented (e.g., rotated 90 degrees or in other orientations), and the spatial relative descriptors used herein will be interpreted accordingly.

[0055] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, unless the context clearly indicates otherwise, the singular shapes “a,” “an,” and “the” are also intended to include the plural shapes. Furthermore, when the terms “comprising,” “including,” and their various variations are used in this specification, they indicate the presence of said features, integrals, steps, operations, elements, components, and / or combinations thereof, but do not preclude the presence or addition of one or more features, integrals, steps, operations, elements, components, and / or combinations thereof.

[0056] Various exemplary embodiments are described herein with reference to cross-sections as schematic diagrams of idealized exemplary embodiments and / or intermediate structures. Thus, variations in the shapes of the illustrations as a result of, for example, manufacturing techniques and / or tolerances are expected. Therefore, the exemplary embodiments disclosed herein should not be construed as limitations on the shape of the specifically illustrated areas, but rather include deviations in shape caused, for example, by manufacturing processes. For example, an injection area shown as rectangular will typically have rounded or curved features at its edges and / or an injection concentration gradient, rather than a binary variation from the injection area to the non-injection area. Similarly, the formation of a buried area by injection results in some injection in the area between the buried area and the surface where the injection occurs. Therefore, the areas shown in the figures are substantially schematic, and their shapes are not intended to illustrate the actual shape of the areas of the device, nor are they intended to be limiting.

[0057] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure is a part. Unless so explicitly defined herein, terms (such as those defined in a general dictionary) shall be interpreted as having the same meaning as they have in the context of the relevant field, and not as having an idealized or overly shaped meaning.

[0058] Reference Figure 1 In the first operating state, the display surface IS of the display device DD, which displays the image IM, is substantially parallel to the surface defined by the first direction axis DR1 and the second direction axis DR2. The normal direction of the display surface IS, corresponding to the thickness direction of the display device DD, is indicated by the third direction DR3. In each component, the front surface is separated from the rear surface on the third direction axis DR3. However, the first direction axis DR1 to the third direction axis DR3 are opposite to each other, so the first direction axis DR1 to the third direction axis DR3 can be changed to any other direction. In the following, the first direction to the third direction corresponds to the direction represented by the first direction axis DR1 to the third direction axis DR3 respectively in the figures, and therefore the first direction to the third direction is assigned the same reference numerals as the first direction axis DR1 to the third direction axis DR3.

[0059] Figure 1 , Figure 2A and Figure 2B A foldable display device is shown as a representative example among several embodiments of the display device DD. The flexible display device DD can be a rollable display device or a bendable display device. The display device DD can be a planar rigid display device. The flexible display device DD can be a large-sized electronic product such as a television or monitor, or a small or medium-sized electronic product such as a mobile phone, tablet computer, car navigation device, gaming device, or smartwatch.

[0060] Reference Figure 1 The display surface IS of the flexible display device DD may include multiple regions. The flexible display device DD includes a display area DD-DA for displaying an image IM and a non-display area DD-NDA disposed adjacent to the display area DD-DA. The image IM is not disposed in the non-display area DD-NDA. Figure 1 An image of a vase is shown as image IM. The display area DD-DA has a generally quadrilateral shape, and the non-display area DD-NDA surrounds the display area DD-DA. The shapes of the display area DD-DA and the non-display area DD-NDA can be designed relative to each other and have different configurations in other embodiments.

[0061] Reference Figure 1 , Figure 2A and Figure 2B The display device DD is divided into multiple regions according to its operating state. The display device DD includes a curved region BA that is curved relative to the bending axis BX, a first non-curved region NBA1 that is not curved, and a second non-curved region NBA2 that is not curved. For example... Figure 2A As shown, the display device DD can be bent inwards, such that the display surface IS of the first non-bent region NBA1 faces the display surface IS of the second non-bent region NBA2. Figure 2B As shown, the display device DD can be bent outwards to allow the display surface IS to be exposed even when bent.

[0062] The display device DD may include multiple curved regions BA. Furthermore, the curved regions BA may be defined to correspond to operations performed by the user on the display device DD. For example, unlike... Figure 2A and Figure 2B In the embodiment shown, the bending region BA can be defined substantially parallel to the first direction axis DR1, or it can be defined in a diagonal direction. When not fixed, the bending region BA has a bending radius BR (refer to...) Figure 2A The area is determined. The display device DD can be repeatedly executed. Figure 1 and Figure 2A The operating modes shown are as follows.

[0063] Reference Figure 2C The display device DD includes a protective film PM, a display module DM, an optical component LM, a window WM, a first adhesive component AM1, a second adhesive component AM2, and a third adhesive component AM3. The display module DM is disposed between the protective film PM and the optical component LM. The optical component LM is disposed between the display module DM and the window WM. The first adhesive component AM1 bonds the display module DM and the protective film PM; the second adhesive component AM2 bonds the display module DM and the optical component LM; and the third adhesive component AM3 bonds the optical component LM and the window WM.

[0064] The protective film PM protects the display module DM. The protective film PM includes a first outer surface OS-L exposed to the outside and an adhesive surface adhered to a first adhesive member AM1. The protective film PM prevents external moisture from entering the display module DM and absorbs external impacts.

[0065] The protective film PM may include a plastic film as a base substrate. The protective film PM may include a plastic film selected from the group consisting of polyethersulfone (PES), polyacrylate, polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyallylate, polyimide (PI), polycarbonate (PC), poly(aryl ether sulfone), and mixtures thereof.

[0066] The material of the protective film PM can include a mixture of organic and inorganic materials, and is not limited to plastic resin. The protective film PM comprises a porous organic layer and inorganic material filling the pores of the organic layer. The protective film PM may also include a functional layer formed in the plastic film. The functional layer may include a resin layer. The functional layer can be formed by a coating method. In various embodiments, the protective film PM may be omitted.

[0067] The window membrane (WM) may include a plastic film. The window membrane may have a multi-layered structure. The window membrane may have a multi-layered structure consisting of a glass substrate, a plastic film, or a plastic substrate. The window membrane may also include a border pattern. The multi-layered structure of the window membrane can be formed through a continuous process or by using an adhesive layer bonding process.

[0068] An optical component LM reduces the reflectivity of external light. The optical component LM may include at least a polarizing film. The optical component LM may also include a retardation film. In various embodiments, the optical component LM may be omitted.

[0069] The display module DM may include an organic light-emitting display panel DP and a touch sensing unit TS. The touch sensing unit TS may be directly disposed on the organic light-emitting display panel DP. In the following description, the statement "the first component is directly disposed on the second component" means that the first component and the second component can be formed by a continuous process without being adhered to each other by using a separate adhesive layer.

[0070] The organic light-emitting display panel (DP) generates an image IM corresponding to the input image data (reference). Figure 1 An organic light-emitting display panel (DP) may include a first display panel surface BS1-L and a second display panel surface BS1-U facing the first display panel surface BS1-L in the thickness direction DR3. The description of the organic light-emitting display panel DP is provided as a representative example of a display panel DP.

[0071] The touch sensing unit TS acquires the coordinate information of external input. The touch sensing unit TS senses external input using electrostatic capacitance.

[0072] The display module (DM) may also include an anti-reflective layer. The anti-reflective layer may include a color filter or a stacked structure of conductive / insulating / conductive layers. The anti-reflective layer absorbs or polarizes light from the outside, thereby reducing the reflectivity of external light. The anti-reflective layer can replace the function of the optical component (LM).

[0073] Each of the first adhesive component AM1, the second adhesive component AM2, and the third adhesive component AM3 can be, but is not limited to, an organic adhesive layer such as an optically transparent adhesive (OCA) film, an optically transparent resin (OCR), or a pressure-sensitive adhesive (PSA) film. The organic adhesive layer can include polyurethane-based adhesives, polyacrylic-based adhesives, polyester-based adhesives, polyepoxy-based adhesives, or polyvinyl acetate-based adhesives. Therefore, an organic adhesive layer can correspond to an organic layer.

[0074] The display device DD may also include a frame structure, which supports the functional layer to maintain... Figure 1 , Figure 2A and Figure 2B The state shown is illustrated. The frame structure can have either a connecting structure or a hinge structure.

[0075] Figure 3A The display device DD-1 in its unfolded state is shown. Figure 3B The display device DD-1 is shown in a bent state.

[0076] Display device DD-1 may include a curved area BA and a non-curved area NBA. The non-display area DD-NDA of display device DD-1 is curved; however, the curved area of ​​display device DD-1 can be changed.

[0077] Unlike Figure 1 , Figure 2A and Figure 2B The display device DD shown herein, display device DD-1, can be fixed in one state during operation. Display device DD-1 can be in the following states: Figure 3B The display device DD-1 can be fixed to the frame when bent, and the frame can be attached to the housing of the electronic device.

[0078] The display device DD-1 can have the same Figure 2C The cross-sectional structures shown are essentially the same. However, the non-curved area NBA and the curved area BA can have different stacking structures. The non-curved area NBA can have the same as... Figure 2C The cross-sectional structure shown is essentially the same as the cross-sectional structure, and the curved region BA can have the same cross-sectional structure. Figure 2C The cross-sectional structures shown are different. The optical component LM and window WM may not be located in the curved region BA. That is, the optical component LM and window WM may only be located in the non-curved region NBA. The second adhesive component AM2 and the third adhesive component AM3 may not be located in the curved region BA.

[0079] Reference Figure 4A An organic light-emitting display panel (DP) may include a base layer (SUB), a circuit layer (DP-CL) disposed on the base layer (SUB), a device layer (DP-OLED), and a thin-film encapsulation layer (TFE). The base layer (SUB) may include at least one plastic film. The base layer (SUB) may be a flexible substrate and may include a plastic substrate, a glass substrate, a metal substrate, or an organic / inorganic hybrid material substrate.

[0080] The DP-CL circuit layer may include multiple insulating layers, multiple conductive layers, and semiconductor layers. The conductive layers of the DP-CL circuit layer may form signal lines or pixel control circuitry. The DP-OLED device layer may include an organic light-emitting diode. The TFE thin-film encapsulation layer may include inorganic and organic layers. The TFE thin-film encapsulation layer may include at least two inorganic layers and an organic layer disposed between them. The inorganic layers protect the DP-OLED device layer from moisture / oxygen, while the organic layers protect the DP-OLED device layer from foreign substances such as dust. The inorganic layers may include silicon nitride layers, silicon oxynitride layers, and silicon oxide layers. The organic layers may include acrylamide-based organic materials, but the organic layers should not be limited to or restricted by this.

[0081] The touch sensing unit TS can be directly disposed on the thin-film encapsulation layer TFE. The touch sensing unit TS may include a touch sensor and touch signal lines. The sensor and touch signal lines may have a single-layer structure or a multi-layer structure.

[0082] Touch sensors and touch signal lines may include indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ITZO), PEDOT, metal nanowires, or graphene. Touch sensors and touch signal lines may include metal layers, such as molybdenum, silver, titanium, copper, aluminum, or alloys thereof. Touch sensors and touch signal lines may have the same or different layer structures. The touch sensing unit TS will be described in detail later.

[0083] Reference Figure 4B When viewed in a plan view, an organic light-emitting display panel (DP) may include a display area (DA) and a non-display area (NDA). The display area (DA) and non-display area (NDA) of the organic light-emitting display panel (DP) respectively correspond to the display device (DD) (see reference). Figure 1 The display area DD-DA (refer to) Figure 1 ) and non-display area DD-NDA (refer to) Figure 1 The display area (DA) and non-display area (NDA) of an organic light-emitting display panel (DP) do not need to be connected to the display device (DD) (see reference). Figure 1 The display area DD-DA (refer to) Figure 1 ) and non-display area DD-NDA (refer to) Figure 1 Similar to the organic light-emitting display panel (DP), the display area (DA) and the non-display area (NDA) of the DP can be changed according to the structure and design of the DP.

[0084] An organic light-emitting display panel (DP) comprises multiple pixels (PX). The area where the pixels (PX) are arranged is called the display area (DA). As shown in the figure, the non-display area (NDA) is defined along the edge of the display area (DA).

[0085] The organic light-emitting display panel DP includes gate line GL, data line DL, light-emitting line EL, control signal line SL-D, initialization voltage line SL-Vint, voltage line SL-VDD, first pad PD1, and power line E-VSS.

[0086] Each gate line GL can be connected to a corresponding pixel in pixel PX, and each data line DL can be connected to a corresponding pixel in pixel PX. Each light-emitting line EL can be arranged substantially parallel to the corresponding gate line in gate line GL. Control signal line SL-D applies control signals to the gate drive circuit GDC. Initialization voltage line SL-Vint applies an initialization voltage to pixel PX. Voltage line SL-VDD can be connected to pixel PX to apply a first voltage to pixel PX. Voltage line SL-VDD can include multiple lines extending in a first direction DR1 and multiple lines extending in a second direction DR2. Power line E-VSS can be disposed in the non-display area NDA to surround three sides of the display area DA. Power line E-VSS applies a common voltage (e.g., a second voltage) to pixel PX. The common voltage has a level lower than the first voltage.

[0087] The gate drive circuit GDC can be located on one side of the non-display area NDA and connected to the gate line GL and the light-emitting line EL. Some of the lines, including the gate line GL, data line DL, light-emitting line EL, control signal lines SL-D, initialization voltage line SL-Vint, and voltage line SL-VDD, can be located on the same layer, while the other lines can be located on different layers.

[0088] The first pad PD1 can be connected to the end of the data line DL, control signal line SL-D, initialization voltage line SL-Vint, and voltage line SL-VDD. The first pad PD1 can be located on one side of the non-display area NDA.

[0089] Figure 5 The connection to the data cable DL (reference) is shown. Figure 4B The i-th pixel PXi of the k-th data line DLk in )

[0090] The i-th pixel PXi may include an organic light-emitting diode (OLED) and a pixel driving circuit for controlling the OLED. The driving circuit may include seven transistors T1 to T7 and a storage capacitor Cst.

[0091] The driving transistor controls the driving current applied to the organic light-emitting diode (OLED). The output electrode of the second transistor T2 can be electrically connected to the OLED. The output electrode of the second transistor T2 can be directly in contact with the anode of the OLED or can be connected to the anode of the OLED via another transistor (e.g., the sixth transistor T6).

[0092] The control electrode of the control transistor receives a control signal. The control signal applied to the i-th pixel PXi may include the (i-1)-th gate signal Si-1, the i-th gate signal Si, the (i+1)-th gate signal Si+1, the data signal Dk, and the i-th light emission control signal Ei. The control transistor as shown may include a first transistor T1 and third transistors T3 through seventh transistors T7.

[0093] The first transistor T1 may include an input electrode connected to the k-th data line DLk, a control electrode connected to the i-th gate line GLi, and an output electrode connected to the output electrode of the second transistor T2. The first transistor T1 can be turned on by applying a gate signal Si (hereinafter referred to as the "i-th gate signal") to the i-th gate line GLi to apply the data signal Dk applied to the k-th data line to the storage capacitor Cst.

[0094] Reference Figure 6A and Figure 6B The circuit layer DP-CL can be set on the base layer SUB. Functional layers can also be set on the base layer SUB. Functional layers include at least one of a barrier layer and a buffer layer.

[0095] The semiconductor pattern OSP1 of the first thin-film transistor T1 (hereinafter referred to as the "first semiconductor pattern"), the semiconductor pattern OSP2 of the second thin-film transistor T2 (hereinafter referred to as the "second semiconductor pattern"), and the semiconductor pattern OSP6 of the sixth thin-film transistor T6 (hereinafter referred to as the "sixth semiconductor pattern") can be disposed on the base layer SUB. The first semiconductor pattern OSP1, the second semiconductor pattern OSP2, and the sixth semiconductor pattern OSP6 can include amorphous silicon, polycrystalline silicon, or metal oxide semiconductor.

[0096] A first insulating layer 10 is disposed on a first semiconductor pattern OSP1, a second semiconductor pattern OSP2, and a sixth semiconductor pattern OSP6. Figure 6A and Figure 6B In this process, the first insulating layer 10 may be configured in a layer shape to cover the first semiconductor pattern OSP1, the second semiconductor pattern OSP2, and the sixth semiconductor pattern OSP6, but the first insulating layer 10 should not be limited thereto or restricted by it. That is, the first insulating layer 10 may be configured in a pattern shape corresponding to the first semiconductor pattern OSP1, the second semiconductor pattern OSP2, and the sixth semiconductor pattern OSP6.

[0097] The first insulating layer 10 may include multiple inorganic thin layers. The inorganic thin layers include a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer.

[0098] The control electrode GE1 (hereinafter referred to as the "first control electrode") of the first thin-film transistor T1, the control electrode GE2 (hereinafter referred to as the "second control electrode") of the second thin-film transistor T2, and the control electrode GE6 (hereinafter referred to as the "sixth control electrode") of the sixth thin-film transistor T6 may be disposed on the first insulating layer 10. The first control electrode GE1, the second control electrode GE2, and the sixth control electrode GE6 are connected to the gate line GL (see reference GL). Figure 4B They can be formed using the same photolithography process.

[0099] The second insulating layer 20 may be disposed above the first insulating layer 10 to cover the first control electrode GE1, the second control electrode GE2, and the sixth control electrode GE6. The second insulating layer 20 may provide a flat upper surface. The second insulating layer 20 may comprise organic and / or inorganic materials.

[0100] The input electrode SE1 (hereinafter referred to as the "first input electrode") and output electrode DE1 (hereinafter referred to as the "first output electrode") of the first transistor T1, the input electrode SE2 (hereinafter referred to as the "second input electrode") and output electrode DE2 (hereinafter referred to as the "second output electrode") of the second transistor T2, and the input electrode SE6 (hereinafter referred to as the "sixth input electrode") and output electrode DE6 (hereinafter referred to as the "sixth output electrode") of the sixth transistor T6 may be disposed on the second insulating layer 20.

[0101] The first input electrode SE1 and the first output electrode DE1 can be connected to the first semiconductor pattern OSP1 through a first contact hole CH1 and a second contact hole CH2 formed through the first insulating layer 10 and the second insulating layer 20, respectively. The second input electrode SE2 and the second output electrode DE2 can be connected to the second semiconductor pattern OSP2 through a third contact hole CH3 and a fourth contact hole CH4 formed through the first insulating layer 10 and the second insulating layer 20, respectively. The sixth input electrode SE6 and the sixth output electrode DE6 can be connected to the sixth semiconductor pattern OSP6 through a fifth contact hole CH5 and a sixth contact hole CH6 formed through the first insulating layer 10 and the second insulating layer 20, respectively. Meanwhile, according to another exemplary embodiment, each of the first transistor T1, the second transistor T2, and the sixth transistor T6 can have a bottom gate structure.

[0102] A third insulating layer 30 may be disposed above the second insulating layer 20 to cover the first input electrode SE1, the second input electrode SE2, the sixth input electrode SE6, the first output electrode DE1, the second output electrode DE2, and the sixth output electrode DE6. The third insulating layer 30 may include an organic layer and / or an inorganic layer. Specifically, the third insulating layer 30 may include an organic material to provide a flat surface.

[0103] One of the first insulating layer 10, the second insulating layer 20, and the third insulating layer 30 can be omitted depending on the pixel structure. Both the second insulating layer 20 and the third insulating layer 30 can be referred to as intermediate layers. Intermediate layers can be disposed between conductive patterns (e.g., between an upper conductive pattern and a lower conductive pattern) to insulate the conductive patterns from each other.

[0104] The pixel defining layer (PDL) and the organic light-emitting diode (OLED) can be disposed on the third insulating layer 30. The anode (AE) can be disposed on the third insulating layer 30. The anode (AE) can be connected to the sixth output electrode (DE6) through a seventh contact hole (CH7) defined by the third insulating layer 30. The pixel defining layer (PDL) can have an opening (OP) defined therethrough. At least a portion of the anode (AE) can be exposed through the opening (OP) of the pixel defining layer (PDL).

[0105] When viewed in a planar diagram, pixel PX (reference) Figure 4B The light-emitting region (PXA) can be located within a pixel area. The pixel area may include a light-emitting region (PXA) and a non-light-emitting region (NPXA) adjacent to the light-emitting region (PXA). The non-light-emitting region (NPXA) may surround the light-emitting region (PXA). The light-emitting region (PXA) shown is defined as the portion corresponding to the anode (AE) exposed through the opening (OP).

[0106] The hole control layer HCL can be set in the emitting region PXA and the non-emitting region NPXA. For example, the common layer of the hole control layer HCL can be formed in pixel PX (see reference). Figure 4B )middle.

[0107] An organic light-emitting layer (EML) can be disposed on a hole control layer (HCL). The EML can be disposed in the region corresponding to the opening (OP). That is, the EML can be patterned into multiple portions, each of which can be disposed in multiple pixels (PX). Although the patterned EML is shown as a representative example, the EML can be disposed in multiple pixels (PX). In this case, the EML can produce white light. Furthermore, the EML can have a multilayer structure.

[0108] The electronic control layer (ECL) can be placed on the organic light-emitting layer (EML). The ECL can be placed within multiple pixels (PX) (see reference). Figure 4B ).

[0109] The cathode CE can be located on the electronic control layer ECL. The cathode C can be located in the pixel PX.

[0110] A thin-film encapsulation layer (TFE) can be disposed on the cathode (CE). The TFE can be disposed within multiple pixels (PX). The TFE can include at least one inorganic layer and at least one organic layer. Alternatively, the TFE can include multiple inorganic layers and multiple organic layers stacked alternately with the inorganic layers. The TFE can directly cover the cathode (CE).

[0111] Reference Figure 7A The thin film encapsulation layer TFE1 may include n inorganic thin layers IOL1 to IOLn, wherein the first inorganic thin layer among the n inorganic thin layers IOL1 to IOLn is connected to the cathode CE (refer to...). Figure 6A )touch.

[0112] The first inorganic thin layer IOL1 can be referred to as the "lower inorganic thin layer", and the inorganic thin layers among the n inorganic thin layers IOL1 to IOLn, excluding the first inorganic thin layer IOL1, can be referred to as the "upper inorganic thin layer".

[0113] The thin film encapsulation layer TFE1 may include n-1 organic thin layers OL1 to OLn-1, which may be arranged alternately with n inorganic thin layers IOL1 to IOLn. Each of the n-1 organic thin layers OL1 to OLn-1 may have a thickness greater than that of each of the n inorganic thin layers IOL1 to IOLn.

[0114] Each of the n inorganic thin layers IOL1 to IOLn can have a single-layer structure containing one type of material or a multilayer structure containing multiple different types of materials. Each of the n-1 organic thin layers OL1 to OLn-1 can be formed by depositing organic monomers. The organic monomers can include acryloyl monomers. The film encapsulation layer TFE1 may also include the nth organic thin layer.

[0115] Reference Figure 7B and Figure 7C Each of the thin film encapsulation layers TFE2 and TFE3 includes an inorganic thin layer that may contain the same inorganic material or different inorganic materials, and may have the same thickness or different thicknesses. Similarly, each of the thin film encapsulation layers TFE2 and TFE3 includes an organic thin layer that may contain the same organic material or different organic materials, and may have the same thickness or different thicknesses.

[0116] like Figure 7B As shown, the thin film encapsulation layer TFE2 may include a first inorganic thin layer IOL1, a first organic thin layer OL1, a second inorganic thin layer IOL2, a second organic thin layer OL2, and a third inorganic thin layer IOL3 that can be stacked sequentially.

[0117] The first inorganic thin layer IOL1 can have a bilayer structure. The first sublayer S1 and the second sublayer S2 can be made of different inorganic materials.

[0118] like Figure 7C As shown, the thin film encapsulation layer TFE2 may include a first inorganic thin layer IOL10, a first organic thin layer OL1, and a second inorganic thin layer IOL20 that can be stacked sequentially. The first inorganic thin layer IOL10 may have a bilayer structure. The first sublayer S10 and the second sublayer S20 may be made of different inorganic materials. The first organic thin layer OL1 may be an organic layer comprising a polymer, and the second inorganic thin layer IOL20 may have a bilayer structure. The second inorganic thin layer IOL20 may include a first sublayer S100 and a second sublayer S200 that can be deposited in different environments. The first sublayer S100 may be deposited at low power, and the second sublayer S200 may be deposited at high power. The first sublayer S100 and the second sublayer S200 may include the same inorganic material.

[0119] Reference Figure 8A The touch sensing unit TS may include a lower insulating layer TS-LIL, an intermediate insulating layer TS-MIL, a first conductive layer TS-CL1, an upper insulating layer TS-HIL, and a second conductive layer TS-CL2. The lower insulating layer TS-LIL may be directly disposed on the encapsulation layer TFE. The first conductive layer TS-CL1 may be directly disposed on the lower insulating layer TS-LIL, but the first conductive layer TS-CL1 should not be limited thereto or restricted by this. That is, another inorganic layer (e.g., a buffer layer) may also be disposed between the first conductive layer TS-CL1 and the lower insulating layer TS-LIL.

[0120] Each of the first conductive layer TS-CL1 and the second conductive layer TS-CL2 may have a single-layer structure or a multilayer structure with multiple layers stacked on a third-direction DR3. The multilayer conductive layer may include two or more layers, consisting of a transparent conductive layer and a metal layer. The multilayer conductive layer may include a metal layer containing metals that are different from each other. The transparent conductive layer may include indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ITZO), PEDOT, metal nanowires, or graphene. The metal layer may include molybdenum, silver, titanium, copper, aluminum, or alloys thereof.

[0121] Each of the first conductive layer TS-CL1 and the second conductive layer TS-CL2 may include multiple patterns. The first conductive layer TS-CL1 may include a first conductive pattern, and the second conductive layer TS-CL2 may include a second conductive pattern. Each of the first conductive pattern and the second conductive pattern may include a touch electrode and a touch signal line.

[0122] Each of the lower insulating layer TS-LIL, the middle insulating layer TS-MIL, and the upper insulating layer TS-HIL may comprise an inorganic or organic material. Inorganic materials include at least one of alumina, titanium dioxide, silicon dioxide, silicon oxynitride, zirconium oxide, and hafnium oxide. Organic materials may include at least one of acrylic resins, methacrylic resins, polyisoprene resins, vinyl resins, epoxy resins, urethane resins, cellulose resins, siloxane resins, polyimide resins, polyamide resins, and perylene resins.

[0123] Each of the lower insulating layer TS-LIL, the middle insulating layer TS-MIL, and the upper insulating layer TS-HIL has a single-layer structure or a multi-layer structure. Each of the lower insulating layer TS-LIL, the middle insulating layer TS-MIL, and the upper insulating layer TS-HIL may include at least one of an inorganic layer and an organic layer. The inorganic layer and the organic layer may be formed by chemical vapor deposition.

[0124] If the intermediate insulating layer TS-MIL insulates the first conductive layer TS-CL1 from the second conductive layer TS-CL2, then the intermediate insulating layer TS-MIL should not be limited to a specific shape. The shape of the intermediate insulating layer TS-MIL can be determined based on the shapes of the first conductive pattern and the second conductive pattern. The intermediate insulating layer TS-MIL may completely cover the thin film encapsulation layer TFE or may include multiple insulating patterns. The insulating patterns may be superimposed with the first connection portion CP1 and the second connection portion CP2, which will be described later.

[0125] Although a two-layer touch sensing unit has been described, touch sensing units should not be limited to a two-layer type. A single-layer touch sensing unit may include a conductive layer and an insulating layer covering the conductive layer. The conductive layer may include a touch sensor and touch signal lines connected to the touch sensor. A single-layer touch sensing unit can acquire coordinate information using a self-capacitance method.

[0126] Reference Figure 8B The touch sensing unit TS may include first touch electrodes TE1-1 to TE1-5, a first touch signal line TL1 connected to the first touch electrodes TE1-1 to TE1-5, second touch electrodes TE2-1 to TE2-4, a second touch signal line TL2 connected to the second touch electrodes TE2-1 to TE2-4, and a second pad PD2 connected to the first touch signal line TL1 and the second touch signal line TL2. The second pad PD2 may be located on one side of the non-display area NDA. Figure 8B The touch sensing unit TS is shown to be configured to include five first touch electrodes TE1-1 to TE1-5 and four second touch electrodes TE2-1 to TE2-4, but the number of first touch electrodes and the number of second touch electrodes should not be limited to or restricted by this.

[0127] Each of the first touch electrodes TE1-1 to TE1-5 may have a grid shape that defines multiple touch openings. Each of the first touch electrodes TE1-1 to TE1-5 may include multiple first touch sensor portions SP1 and multiple first connecting portions CP1. The first touch sensor portions SP1 may be arranged on the second direction DR2. Each of the first connecting portions CP1 connects two adjacent first touch sensor portions SP1. Although not shown in detail, the first touch signal line TL1 may have a grid shape.

[0128] The second touch electrodes TE2-1 to TE2-4 may be insulated from, and intersect with, the first touch electrodes TE1-1 to TE1-5. Each of the second touch electrodes TE2-1 to TE2-4 may have a grid shape that defines a plurality of touch openings. Each of the second touch electrodes TE2-1 to TE2-4 may include a plurality of second touch sensor sections SP2 and a plurality of second connecting sections CP2. The second touch sensor sections SP2 may be arranged in the first direction DR1. Each of the second connecting sections CP2 connects two adjacent second touch sensor sections SP2. Although not shown in detail, the second touch signal line TL2 may have a grid shape.

[0129] The first touch electrodes TE1-1 to TE1-5 can be capacitively coupled to the second touch electrodes TE2-1 to TE2-4. When a touch sensing signal is applied to the first touch electrodes TE1-1 to TE1-5, a capacitor can be formed between the first touch sensor section SP1 and the second touch sensor section SP2.

[0130] A portion of the first touch sensor unit SP1, the first connecting part CP1, the first touch signal line TL1, the second touch sensor unit SP2, the second connecting part CP2, and the second touch signal line TL2 can be made to... Figure 8A The first conductive layer TS-CL1 shown is formed by patterning. Other parts of the first touch sensor part SP1, the first connection part CP1, the first touch signal line TL1, the second touch sensor part SP2, the second connection part CP2, and the second touch signal line TL2 can be formed by making... Figure 8A The second conductive layer TS-CL2 shown in the figure is formed by patterning.

[0131] To enable electrical connections between conductive patterns placed on different layers, it is possible to pass through Figure 8A The intermediate insulating layer TS-MIL shown in the diagram forms contact holes. In the following text, reference will be made to... Figures 8C to 8E Describe the touch sensing unit TS.

[0132] Reference Figure 8C The first conductive pattern can be disposed on the lower insulating layer TS-LIL. The first conductive pattern includes a bridging pattern CP1. The bridging pattern CP1 can be directly disposed on the lower insulating layer TS-LIL. The bridging pattern CP1 corresponds to... Figure 8B The first connecting part CP1 is shown in the figure.

[0133] Reference Figure 8D The intermediate insulating layer TS-MIL can be disposed on the lower insulating layer TS-LIL to cover the bridging pattern CP1. The touch contact hole TCH can be defined by the intermediate insulating layer TS-MIL to partially expose the bridging pattern CP1. The touch contact hole TCH can be formed by photolithography.

[0134] Reference Figure 8E The second conductive pattern can be disposed on the first touch insulating layer TS-IL1. The second conductive pattern may include a first touch sensor part SP1, a second connection part CP2, a first touch signal line TL1, a second touch sensor part SP2, and a second touch signal line TL2. The upper insulating layer TS-HIL can be disposed on the middle insulating layer TS-MIL to cover the second conductive pattern.

[0135] The first conductive pattern may include a first touch electrode TE1-1 and a first touch signal line TL1. The second conductive pattern includes second touch electrodes TE2-1 to TE2-4 and a second touch signal line TL2. In this case, the contact hole CH may not be limited to the first touch insulating layer TS-IL1.

[0136] Furthermore, the first conductive pattern and the second conductive pattern can be interchanged. For example, the second conductive pattern may include the bridging pattern CP1.

[0137] Reference Figure 8F The first touch sensor portion SP1 can be stacked with the non-light-emitting region NPXA. The first touch sensor portion SP1 can include a plurality of first extensions SP1-A extending along a fifth direction DR5 intersecting the first direction DR1 and the second direction DR2, and a plurality of second extensions SP1-B extending along a sixth direction DR6 intersecting the fifth direction DR5. The first extensions SP1-A and the second extensions SP1-B can be defined as grid lines. Each grid line can have a linewidth of several micrometers.

[0138] The first extension SP1-A can be connected to the second extension SP1-B to define a plurality of touch openings TS-OP. In other words, the first touch sensor unit SP1 can have a grid shape defined by the touch openings TS-OP. Although the touch openings TS-OP correspond to the light-emitting areas PXA, they should not be limited to or restricted by them. That is, one touch opening TS-OP can correspond to two or more light-emitting areas PXA.

[0139] The light-emitting area PXA can have various sizes. For example, the size of the blue light-emitting area PXA can be different from the size of the red light-emitting area PXA. Therefore, the touch opening TS-OP can have various sizes. Although in Figure 8F The light-emitting area PXA can be of various sizes, but the light-emitting areas PXA can be the same size as each other, and the touch opening OP can all be the same size as each other.

[0140] The description of the first touch sensor part SP1 can be applied to the second touch sensor part SP2, therefore a detailed description of the second touch sensor part SP2 will be omitted.

[0141] In the following text, reference will be made to Figure 8B and Figure 8E Describe the dam (DAM) and the dike (BAK).

[0142] Reference Figure 8B and Figure 8E The dam DAM can be disposed in the non-display area NDA (hereinafter referred to as the "peripheral area") of the base layer SUB (hereinafter referred to as the "substrate"). More specifically, when viewed in a plan view, the dam DAM can have a closed-loop shape and surround the display area. However, the shape of the dam DAM should not be limited to a closed-loop shape. In other embodiments, multiple dam DAMs can be provided. Multiple dams can be arranged spaced apart from each other in the peripheral area NDA and surround the display area.

[0143] The dam BAK can be positioned adjacent to the dam DAM in the outer area NDA of the base layer SUB. The dam BAK can be positioned between the display area DA and the first pad PD1 and the second pad PD2. The dam BAK can be positioned between the second pad PD2 and the dam DAM. More specifically, when viewed in a plan view, the dam BAK can be strip-shaped (i.e., a long, narrow rectangle), but the shape of the dam BAK should not be limited to a strip.

[0144] The first touch signal line TL1 and the second touch signal line TL2 extend to the dam DAM and the dike BAK and connect to the second pad PD2. (Refer to...) Figures 9 to 11 Describe the dam DAM and the dike BAK in detail.

[0145] Reference Figures 9 to 11 The dam DAM may include an upper DAMU and a lower DAMD. More specifically, the upper DAMU may be configured to contact the upper surface of the lower DAMD. The lower DAMD may be connected to a third insulating layer 30 (see reference). Figure 6A The lower DAMD is formed using the same process. That is, the lower DAMD can be disposed on the same layer as the third insulating layer 30. The lower DAMD can be an organic layer and / or an inorganic layer. Specifically, the lower DAMD may include organic materials to provide a flat surface.

[0146] The upper DAMU can be formed using the same process as the pixel-defining layer (PDL). That is, the upper DAMU can be disposed on the same layer as the pixel-defining layer (PDL). The upper DAMU may include organic materials. For example, the upper DAMU may include organic materials such as polyimide.

[0147] When viewed in cross-section, the dam DAM can form an upwardly extending protrusion by combining the lower DAMD and the upper DAMU. The dam DAM can control the flow of organic thin-film material within the TFE encapsulation layer. For example, in… Figure 9 The thin film encapsulation layer TFE shown is Figure 7C In the case of the thin film encapsulation layer TFE3 shown, the dam DAM can control the flow of monomers in the first organic thin layer OL1, and the movement of the first organic thin layer OL1 in the first direction DR1 can be controlled by the dam DAM. Therefore, the first inorganic thin layer IOL10 of the thin film encapsulation layer TFE can be directly disposed on the dam DAM, and the second inorganic thin layer IOL20 can be directly disposed on the first inorganic thin layer IOL10.

[0148] The embankment BAK can be spaced apart from the dam DAM by a predetermined distance in the first direction DR1. The embankment BAK may include a first embankment section BANK1, a boundary section BOR, and a second embankment section BANK2. The boundary section BOR may be located between the first embankment section BANK1 and the second embankment section BANK2.

[0149] The first dam section BANK1 may include an upper BU and a lower BD. The upper BU may be disposed on the lower BD. More specifically, the upper BU may contact the upper surface of the lower BD. The lower BD may be connected to the third insulating layer 30 (see reference). Figure 6A It is formed using the same process. That is, the lower BD can be disposed on the same layer as the third insulating layer 30. The lower BD can be an organic layer and / or an inorganic layer. Specifically, the lower BD may include organic materials to provide a flat surface.

[0150] The upper BU can be formed using the same process as the pixel defining layer PDL. That is, the upper BU can be disposed on the same layer as the pixel defining layer PDL. The upper BU may include a portion corresponding to the pixel defining layer PDL and spacers SPC. The spacers SPC can be formed substantially simultaneously with the portion corresponding to the pixel defining layer PDL. The spacers SPC can be disposed on the pixel defining layer PDL. The first dam BANK1 can have a height greater than the height of the dam DAM. The upper BU may include an organic material such as polyimide.

[0151] The boundary section BOR can be like the first embankment BANK1, comprising an upper BRU and a lower BRD. The other parts of the boundary section BOR can be substantially the same as the first embankment BANK1, therefore their detailed descriptions are unnecessary and will be omitted.

[0152] The second dam BANK2 can be formed using the same process as the third insulating layer 30. That is, the second dam BANK2 can be disposed on the same layer as the third insulating layer 30. The second dam BANK2 can be an organic layer and / or an inorganic layer.

[0153] Multiple boundary sections (BORs) can be set. A second embankment (BANK2) can be set between two adjacent boundary sections (BORs). The second embankment (BANK2) can have a height smaller than that of the first embankment (BANK1) and the boundary sections (BORs).

[0154] Therefore, the lower part BD of the first dam section BANK1, the lower part BRD of the boundary section BOR, and the second dam section BANK2 can be formed integrally with each other.

[0155] As described above, when the second dam BANK2 and the boundary portion BOR are formed, the dam BAK can prevent abnormal patterning of the touch signal lines on the upper surface of the dam BAK from being caused by cuts or scratches due to the mask during the process of supporting the mask used to form the thin film encapsulation layer TFE.

[0156] Reference Figure 12A A lower insulating layer, TS-LIL, can be formed on the dam BAK. The lower insulating layer, TS-LIL, can be formed on the dam BAK using a deposition process.

[0157] Reference Figure 12B The intermediate insulating layer TS-MIL can be formed on the lower insulating layer TS-LIL through a deposition process.

[0158] Reference Figure 12CA conductive layer CODL can be formed on the intermediate insulating layer TS-MIL. The conductive layer CODL can be formed as a first overlay pattern CAP1 and touch signal lines TL1 and TL2. The conductive layer CODL can be formed on the intermediate insulating layer TS-MIL by a deposition process. The conductive layer CODL may include indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ITZO), PEDOT, metal nanowires, or graphene. The touch sensor and touch signal lines may include a metal layer, such as molybdenum, silver, titanium, copper, aluminum, or alloys thereof.

[0159] Reference Figure 12D A photoresist layer PRE can be formed on the conductive layer CODL, and the portion of the photoresist layer PRE other than the portion that forms the first overlay pattern CAP1 and touch signal lines TL1 and TL2 can be exposed to light.

[0160] Reference Figure 12E An etching process can be performed on the conductive layer CODL corresponding to the exposed portion ELA. For example, the conductive layer CODL corresponding to the exposed portion ELA can be etched using a dry etching process.

[0161] Reference Figure 12F After the etching process, the photoresist layer PRE can be removed by a stripping process. When the photoresist layer PRE is removed, an upper insulating layer TS-HIL can be formed on the intermediate insulating layer TS-MIL. A first overlay pattern CAP1 can be formed between the intermediate insulating layer TS-MIL and the upper insulating layer TS-HIL to correspond to the boundary portion BOR. A first touch signal line TL1 and a second touch signal line TL2 can be formed between the intermediate insulating layer TS-MIL and the upper insulating layer TS-HIL to correspond to the second dam portion BANK2.

[0162] Reference Figure 10A , Figure 11 and Figure 12G A first overlay pattern CAP1, a first touch signal line TL1, and a second touch signal line TL2, which will be covered by the upper insulating layer TS-HIL, can be formed between the intermediate insulating layer TS-MIL and the upper insulating layer TS-HIL. The upper insulating layer TS-HIL can be formed on the intermediate insulating layer TS-MIL by a deposition process.

[0163] Due to such Figure 10A The first overlay pattern CAP1 shown extends along the entire extent of the boundary portion BOR, thus preventing leakage of organic material from the embankment BAK during the etching process due to thinning of the photoresist layer on the boundary portion. Therefore, delamination of the layer due to leakage of organic material is also prevented.

[0164] like Figure 10B As shown, the first overlay pattern CAP1' can be formed between the intermediate insulating layer TS-MIL and the upper insulating layer TS-HIL to extend along the entire range of the first embankment BANK1 and the boundary portion BOR. The first overlay patterns CAP1 and CAP1' can also take other forms. For example, touch signal lines TL1 and TL2, as well as the first overlay patterns CAP1 and CAP1', can be formed on the intermediate insulating layer TS-MIL, and the touch signal lines TL1 and TL2 can be formed on the lower insulating layer TS-LIL as described above. Therefore, the first overlay patterns CAP1 and CAP1' can be formed between the lower insulating layer TS-LIL and the intermediate insulating layer TS-MIL.

[0165] Reference Figure 13A The dummy line (DUL) can be placed on the lower insulation layer (TS-LIL). The dummy line (DUL) can be connected to... Figure 14 The touch signal lines TL1 and TL2 are stacked as shown. A dummy line DUL can be connected in parallel to the touch signal lines TL1 and TL2 to reduce the resistance of the lines that can transmit signals, thereby improving the device's sensitivity to touch.

[0166] The method for forming the dummy line DUL is essentially the same as the method for forming the touch signal lines TL1 and TL2, therefore the details of the dummy line DUL will be omitted.

[0167] Reference Figure 13B The dummy contact hole (DCH) can be defined by an intermediate insulating layer (TS-MIL) to partially expose the touch signal lines TL1 and TL2. The dummy contact hole (DCH) can be formed using a photolithography process. Figure 13A The dummy line DUL shown can be connected to touch signal lines TL1 and TL2 via the dummy contact hole DCH.

[0168] Reference Figure 13C Because the dummy line DUL can be stacked with the touch signal lines TL1 and TL2, the dummy line DUL will not be visible from above after the first touch signal line TL1 and the second touch signal line TL2 are formed. Each of the dummy lines DUL can be connected to the second pad PD2', which can be connected to the corresponding touch signal line of the touch signal lines TL1 and TL2.

[0169] Reference Figure 14The second cover pattern CAP2 can be disposed between the lower insulating layer TS-LIL and the intermediate insulating layer TS-MIL to correspond to the boundary portion BOR, and the dummy line DUL can be disposed between the lower insulating layer TS-LIL and the intermediate insulating layer TS-MIL to correspond to the second embankment BANK2. The second cover pattern CAP2 and the dummy line DUL can be formed using the same process, and the method of forming the second cover pattern CAP2 and the dummy line DUL can be substantially the same as the method of forming the first cover pattern CAP1 and the touch signal lines TL1 and TL2 as described in more detail above. Therefore, a more detailed description of the process for forming the second cover pattern CAP2 and the dummy line DUL is unnecessary and will be omitted.

[0170] Consistent with the description of the first covering patterns CAP1 and CAP1' above, the formation of the second covering pattern CAP2 reduces the likelihood of defects such as delamination or completely prevents such defects.

[0171] Dummy lines (DUL) can be placed between the lower insulation layer (TS-LIL) and the middle insulation layer (TS-MIL), but DUL should not be limited to or restricted by this. For example, touch signal lines TL1 and TL2 can be placed between the lower insulation layer (TS-LIL) and the middle insulation layer (TS-MIL), and dummy lines (DUL) can be placed between the middle insulation layer (TS-MIL) and the upper insulation layer (TS-HIL).

[0172] While specific exemplary embodiments and implementations have been described herein, other embodiments and modifications will be apparent from this description. Therefore, the inventive concept is not limited to these embodiments, but rather relates to the broader scope of the claims and various apparent modifications and equivalent arrangements.

Claims

1. A method for manufacturing a display device, the method comprising: A dam layer is formed on a base layer including a display area and a peripheral area surrounding the display area, the dam layer being disposed in the peripheral area, and including a first portion having a first thickness, a second portion having a second thickness smaller than the first thickness, and an intermediate portion connecting the first portion and the second portion and inclined relative to the first portion and the second portion; An insulating layer is formed on the embankment layer; A conductive layer is formed on the insulating layer; A photoresist layer is formed on the conductive layer; The photoresist layer is patterned; The portion of the conductive layer exposed by the photoresist layer is etched to form at least a first capping layer superimposed on the intermediate portion and multiple signal lines superimposed on the second portion; and Remove the photoresist layer from the first cover layer and the plurality of signal lines.

2. The method of claim 1, wherein, The formation of the embankment layer includes: A lower embankment layer is formed on the base layer; and An upper embankment layer is formed on the lower embankment layer.

3. The method according to claim 2, wherein, The upper embankment is formed to expose a portion of the lower embankment, and The plurality of signal lines are formed on a first region where the insulating layer overlaps with a portion of the lower embankment layer.

4. The method according to claim 3, wherein, The first cover layer is formed on a second region of the insulating layer that overlaps with the upper embankment layer, and the second region is separated from the first region.

5. The method according to claim 2, wherein, Each of the upper and lower embankment layers is formed of organic material.

6. The method according to claim 2, wherein, Forming the insulating layer on the embankment includes: A lower insulating layer is formed on the embankment layer; and An intermediate insulating layer is formed on the lower insulating layer. Each of the lower insulating layer and the intermediate insulating layer is formed of an inorganic material.

7. The method according to claim 6, further comprising: A second cover layer is formed on the lower insulating layer, wherein the second cover layer is formed between the lower insulating layer and the intermediate insulating layer.

8. The method according to claim 7, further comprising: Multiple dummy lines are formed on the lower insulating layer, wherein the multiple dummy lines are formed between the lower insulating layer and the intermediate insulating layer.

9. The method according to claim 8, wherein, The second cover layer and the plurality of dummy lines are formed using the same process.

10. The method according to claim 8, further comprising: Multiple dummy contact holes are formed in the intermediate insulating layer, wherein the multiple dummy lines are connected to the multiple signal lines via the multiple dummy contact holes.

11. The method according to claim 6, wherein, The intermediate insulating layer is formed to be in direct contact with the lower insulating layer.

12. The method according to claim 6, wherein, The lower insulating layer is formed to be in direct contact with the embankment layer.

13. The method according to claim 1, further comprising: A circuit layer is formed on the base layer; A device layer is formed on the circuit layer; Form an encapsulation layer covering the device layer; and Multiple touch electrodes are formed on the encapsulation layer, wherein the multiple signal lines are electrically connected to the multiple touch electrodes.

14. The method according to claim 13, wherein, The first portion of the dike layer is formed during the process of forming the circuit layer, and The second portion and the intermediate portion of the dam layer are formed on the first portion during the process of forming the device layer.

15. A display device, the display device comprising: The base layer includes a display area and a peripheral area surrounding the display area; A dike layer, disposed in the peripheral region, includes: a lower dike layer located on the base layer; and an upper dike layer disposed on a first portion and a middle portion of the lower dike layer and not overlapping with a second portion of the lower dike layer, the middle portion connecting the first portion and the second portion and inclined relative to the first portion and the second portion; An insulating layer is located on the lower embankment layer and the upper embankment layer; and A metal layer, located on the insulating layer, includes a cover layer and multiple signal lines. The multiple signal lines are arranged on the second part of the lower embankment, and The covering layer is disposed at least on the middle portion of the lower embankment layer.

16. The display device according to claim 15, wherein, The covering layer is disposed on the upper embankment layer.

Images