Circuits and devices including transistors and diodes

Abstract

A circuit comprising: a transistor, a base of the transistor being switchably connectable to a signal source; a first diode connected between the base of the transistor and a reference voltage; wherein the circuit is arranged such that when the signal source is not connected to the base of the transistor, a voltage applied at an emitter of the transistor causes a current to flow through the base of the transistor and through the first diode, such that the transistor is in an on state; an impedance of the signal source is lower than an impedance of the transistor through the emitter and the base; the first diode is selected to provide a current limiting function, such that when the signal source is connected to the base of the transistor, the current flowing through the base is reduced, such that the transistor switches to an off state; and wherein the circuit comprises a second diode, the second diode being comprised of a semiconductor region providing the base of the transistor and another semiconductor region in direct contact with the semiconductor region providing the base of the transistor; and wherein the signal source is connectable to the base of the transistor through the second diode.

Description

Background Technology

[0001] To form digital logic circuits, 'normally on' transistors are required, which are transistors that operate in the on state when no signal is applied to their base, because they allow logic gates to be built without complementary transistors, thus halving the transistor count.

[0002] It is known that a PNP bipolar junction transistor (BJT) can be configured in a circuit as a normally-on transistor, where the base of the BJT is connected to ground via a resistor. When a voltage is applied between the emitter and base terminals of the BJT, the emitter voltage is higher, allowing current to flow from the base terminal and through the resistor. This allows current to flow between the emitter and collector terminals of the transistor; in other words, the transistor is turned on. To turn off the transistor, the base is connected to a current source that provides sufficient current through the resistor so that the current flowing out of the base decreases sufficiently (or stops), thereby stopping the current flow between the emitter and collector.

[0003] Resistors typically have a large temperature coefficient. This makes it difficult for the circuit described above to maintain operational stability over a wide temperature range. Furthermore, the resistor's resistance (in ohms) must be large enough to limit current so that the transistor can turn off when it can draw maximum current from the current source. Resistors with values ​​that meet this requirement are physically relatively large. For these reasons, using this circuit design in many integrated circuits (ICs) is not feasible. Summary of the Invention

[0004] According to a first aspect of the invention, a circuit is provided, comprising: a transistor; a signal source; the base of the transistor being switchably connected to the signal source; a first diode connected between the base of the transistor and a reference voltage; the circuit being arranged such that when the signal source is not connected to the base of the transistor, a voltage applied to the emitter of the transistor causes a current to flow through the base of the transistor and through the first diode, thereby turning the transistor on; the impedance of the signal source is lower than the impedance of the transistor through the emitter and the base; the first diode provides a current-limiting function such that when the signal source is connected to the base of the transistor, the current flowing through the base is reduced, thereby turning the transistor off; the circuit includes a second diode having a diode junction provided by a contact between a semiconductor region of the base of the transistor and another semiconductor region in direct contact with the semiconductor region providing the base of the transistor; and wherein the signal source can be connected to the base of the transistor via the second diode.

[0005] The first diode provides the current-limiting function of a large resistor in existing circuitry; however, unlike a resistor, the first diode is a relatively small electronic component, and therefore makes the circuit more suitable for implementing digital logic circuits.

[0006] The current-limiting function of the first diode provides a convenient way to limit the current flowing through the base-emitter terminals of the transistor when it is turned on, allowing for a relatively small potential drop between the emitter and base of the transistor. This results in a smaller change in the voltage of the base transistor (relative to a reference voltage) when the transistor switches between on and off, which reduces the likelihood of parasitic effects forming between the bases of adjacent transistors within the semiconductor device.

[0007] The first diode can provide current limiting functionality in one or more ways. For example, the first diode can be selected to have a physical size that provides the required resistance; the smaller the diode, the more limited its current-carrying capacity. Alternatively or additionally, the first diode can be arranged in the circuit to be reverse-biased when a voltage is applied between the emitter terminal of the transistor and the second terminal of the diode. The latter approach is preferred, especially when using a larger diode.

[0008] The circuitry is operable such that the first diode is reverse-biased when the voltage across it is below its breakdown voltage. When reverse-biased, leakage current due to quantum tunneling may generate a current flowing through the diode.

[0009] The first diode can be a Zener diode. Compared to many other types of diodes, Zener diodes operate reliably when biased below their Zener voltage (breakdown voltage). However, alternative diodes can be used, such as tunnel diodes that can operate under forward bias.

[0010] Advantageously, the temperature coefficient of the first diode has a modulus less than or equal to 2 mV / ℃. More advantageously, the temperature coefficient of the first diode is approximately 0 mV / ℃, as this provides maximum operational stability under temperature variations.

[0011] To provide this temperature coefficient, it is preferable that the first diode is a Zener diode selected to exhibit a Zener voltage of less than or equal to about 5.6 V, and more advantageously about 5.6 V.

[0012] Bipolar junction transistors can be PNP or NPN in form. In the PNP form, the voltage between the emitter and the second terminal of the first diode is arranged such that normal current flows from the emitter through the transistor, out of the base, and into the first diode, and the signal source is a current source. In the NPN form, the voltage between the emitter and the second terminal of the diode is arranged such that normal current flows from the second terminal of the first diode through the first diode, into the base, and out through the emitter, and the signal source is a current sink.

[0013] The second diode can be a Zener diode. Provided the semiconductor region providing the second diode is sufficiently highly doped, the voltage drop across the second diode can be small enough that, during operation, the voltage drop across the second diode is less than the voltage drop between the emitter and base of the transistor, and additionally, advantageously, it does not have a significantly detrimental effect on the operation of the transistor. In this case, the presence of the second diode provides several benefits, including those described below.

[0014] The second diode provides a non-metallic connection to the base of the transistor. This allows the conductive traces to the transistor's base to be made of polysilicon instead of metal. Because polysilicon can also be used to connect the transistor's collector and emitter, there is no need to provide a metal layer to provide any contacts to the transistor, thereby reducing the number of steps required to manufacture the device. Furthermore, because metal layers are typically thicker than polysilicon when used to construct electrical devices, and therefore require larger track sizes and spacing, the metal layer allows for increased transistor density in a given area.

[0015] Because there will be a voltage drop across the second diode, its presence prevents the transistor's base from being pulled up / down to, for example, the voltage of a signal source on the power rail. The transistor's base region has capacitance, and therefore the presence of the second diode reduces the charge stored in the base region, thus reducing the power required to switch transistor states (or reducing the time spent switching to the same power).

[0016] The second diode can suppress unwanted back propagation of the signal from the base of the transistor back to the signal source. This is advantageous when the transistor is one of many devices driven from a single signal source.

[0017] The sizes of the first and second diodes can be selected to change their equivalent resistance. This allows for the creation of circuits with weak pull-down (first diode) and low-resistance input (second diode), which can be used in analog circuits to introduce offset and bias into amplifiers.

[0018] The circuit described above is particularly useful for implementing logic gates, for example, as an inverter logic gate that outputs a voltage representing the opposite logic level to an input connected to the base of a transistor. Multiple circuits described above, as distinct from those described above, can be connected together to implement logic gates that perform other logic operations.

[0019] The circuit may include one or more additional diodes, each of which consists of a semiconductor region providing the base of the transistor and one or more additional semiconductor regions in direct contact with the semiconductor region providing the base of the transistor; and one or more additional signal sources may be connected to the base of the transistor via one or more additional diodes.

[0020] This allows the transistor to be disconnected by connecting any of the current sources to the base of the transistor, and thus allows the circuit to implement NOR logic gates. This circuit advantageously allows NOR gates to be implemented with a single transistor, whereas prior art implementations of NOR gates (e.g., those implemented using CMOS manufacturing processes) require multiple transistors.

[0021] More advantageously, because each of the one or more semiconductor regions is in direct contact with the base of the transistor, the semiconductor region can be included without significantly increasing the overall size of the transistor.

[0022] According to another aspect of the invention, a semiconductor device is provided, comprising: a transistor comprising: a first region and a second region of a first type of semiconductor material providing a collector region and an emitter region of the transistor, and a second type of first region providing a base of the transistor, the second type of first region being between and in contact with each of the first and second regions of the first type; a first diode comprising: a second type of first region and a third region of a first type of semiconductor, the third region being in contact with the second type of first region to form a first diode junction; and a second diode comprising: a second type of first region and a fourth region of a first type of semiconductor, the fourth region being in contact with the second type of first region to form a second diode junction; and wherein the first, second, third, and fourth regions of the first type of semiconductor material are provided by a semiconductor layer deposited on a semiconductor wafer, the semiconductor layer at least partially defining the second type of first region providing the base region of the transistor.

[0023] This structure provides a convenient way to form a circuit described above as a semiconductor region, which provides the base of a transistor and also provides one of the regions that provides a diode PN junction.

[0024] The first diode may be composed of a portion of a first region of the second type, which is relatively highly doped compared to the remainder of the first region of the second type.

[0025] The relatively highly doped portion of the first region of the second type and another region of the first type of semiconductor can provide a Zener diode.

[0026] The transistor can be a lateral bipolar junction transistor, in which the first region and the second region of the first type are laterally spaced apart from each other around the first region of the second type and are located on the same side as the first region of the second type.

[0027] The semiconductor device may include electrical terminals connected to another region of a first type of semiconductor that provides the first diode.

[0028] Another region of the first type of semiconductor may be provided at least partially by a semiconductor layer deposited on the semiconductor wafer, which at least partially defines the second type of first region providing the base of the transistor. This provides a convenient way to provide these regions without reverse doping of the base, although reverse doping can be used alternatively, albeit less preferred.

[0029] The first and second regions of the first type of semiconductor material can be provided by a semiconductor layer deposited on a semiconductor wafer, which at least partially defines the second type of first region providing the base region of a transistor. Similarly, this provides the advantage of reverse doping the silicon wafer.

[0030] The semiconductor device may include a contact terminal of a first diode, the contact terminal being in direct contact with another region of a first type of semiconductor.

[0031] Another region of the first type of semiconductor may include: a relatively highly doped first portion that, together with the first region of the second type, provides a first diode; and a second portion that, relative to the first portion, is relatively lightly doped and provides a substrate layer.

[0032] The semiconductor device may include a plurality of second diodes comprising: a first region of a second type; and a plurality of fourth regions of a first type semiconductor, each fourth region contacting the first region of the second type to form a plurality of second diode junctions; and wherein the plurality of fourth regions of the first type semiconductor material are provided by a semiconductor layer deposited on a semiconductor wafer, the semiconductor layer at least partially defining the first region of the second type providing the base region of a transistor.

[0033] The semiconductor layer deposited on a semiconductor wafer can be made of polycrystalline silicon.

[0034] The semiconductor device may include a plurality of first regions of a second type, the first regions being within a substrate and isolated from each other by the substrate. In this way, a plurality of transistor-diode devices can be formed on a single wafer. Attached Figure Description

[0035] The invention will now be described by way of example with reference to the following figures, in which: Figure 1a This is a schematic diagram of a circuit including a PNP bipolar junction transistor and a reverse-biased Zener diode, which implements an inverter logic gate ("NOT" gate). Figure 1b It uses a single symbol to represent an electronic component implemented by a specific arrangement of transistors and Zener diodes. Figure 1a Alternative representations of the circuit; Figure 2aThis is a schematic diagram of a circuit consisting of an NPN bipolar junction transistor and a reverse-biased Zener diode, which implements the function of an inverter logic gate ("NOT" gate). Figure 2b It uses a single symbol to represent an electronic component implemented by a specific arrangement of transistors and Zener diodes. Figure 2a Alternative representations of the circuit; Figure 3 Used to provide Figure 1a and 1b The cross-sectional side view of the semiconductor layer structure of the lateral PNP bipolar transistors and Zener diodes shown in the figure. Figure 4 It is a schematic diagram of an integrated circuit that includes multiple transistors interconnected by metal-free conductive traces; Figure 5 Is using Figure 1a and 1b A schematic diagram of a circuit that implements an "XOR" logic gate across multiple circuits; Figure 6 Is using Figure 1a and 1b A schematic diagram of a circuit implementing logic gates A (NAND) and B (NOT). Figure 7A This is a schematic diagram of a circuit including a PNP bipolar junction transistor and a diode, which implements NOR logic gates; Figure 7B It uses a single symbol to represent an electronic component implemented by a specific arrangement of transistors and Zener diodes. Figure 7A Alternative representations of the circuit; Figure 8A Used to provide Figure 7A and 7B A cross-sectional side view of the semiconductor layer structure of the modified lateral PNP bipolar transistor and Zener diode arrangement shown in the figure. Figure 8B yes Figure 8A A schematic plan view of the semiconductor layer structure; Figure 9 It is by Figures 7A-8B The representation of the logic circuit implemented by the circuit; Figure 10 Is using Figure 7A and 7B The circuit that implements a D-type flip-flop; Figure 11 It is represented using logic gate notation. Figure 10 The circuit.

[0036] Figure 12This is a schematic diagram of a circuit that implements a "OR NOT" gate, which includes a PNP bipolar junction transistor, a reverse-biased Zener diode, and a Baker clamping diode. Figure 13 It is used for implementation Figure 12 A cross-sectional side view of the semiconductor layer structure of the circuit; Figure 14 It implements a NOR gate, which is equivalent to implementing it using an IGZO with an NMOS transistor. Figure 12 A schematic diagram of the circuit; and Figure 15 yes Figure 14 A schematic diagram of the variant circuit. Detailed Implementation

[0037] refer to Figure 1a The diagram illustrates a circuit 10 including a PNP bipolar junction transistor 11. The emitter E of the transistor is connected to the high-side rail, and the collector C of the transistor is connected to ground or some other low-side reference voltage. The base B of transistor 11 can be switched to a current source 13 via a switch 12.

[0038] The first terminal of the first Zener diode 14 is connected via switch 12 to both the base B of transistor 11 and current source 13. The second terminal of the first Zener diode 14 is connected to ground or another low-side reference voltage. The first Zener diode 14 is oriented to be reverse biased. The first Zener diode 14 is selected to have a Zener voltage of approximately 5.6 V so that the Zener diode has a temperature coefficient as close as possible to 0 mV / °C. This ensures that the characteristics of the first Zener diode 14 remain stable even if the temperature of the first Zener diode 14 changes due to external conditions.

[0039] With switch 12 open to isolate current source 13 from base terminal B, there is a voltage drop between transistor 11 and first Zener diode 14, and therefore a normal current flows through the emitter base terminal of transistor 11 and through the reverse-biased first Zener diode 14; the current flowing through the first Zener diode 14 may be caused by leakage current.

[0040] Circuit 10 is arranged such that the voltage across the first Zener diode 14 is reduced to below the breakdown voltage of the first Zener diode 14. The leakage current is therefore considered to be a result of the quantum tunneling effect within the first Zener diode 14.

[0041] The first Zener diode 14 is selected such that sufficient leakage current flows through the diode for the expected voltage drop across it, and thus also flows between the emitter E and base B of the diode to allow current to flow between the emitter E and collector C of the transistor 11; that is, the transistor is turned on.

[0042] Additionally, preferably, the first Zener diode 14 is selected such that the leakage current is kept as low as possible for the desired voltage across it, while ensuring the transistor is turned on. This has the advantage of reducing the voltage drop across the transistor when it is turned on, and thus reducing the potential change of the transistor's base (relative to ground at a certain reference voltage) when the transistor switches between off and on. This minimizes the static field between transistors formed on the same wafer. In one example, preferably, the switching voltage across the transistor is limited to about 0.5 V.

[0043] When switch 12 is closed, the current source is connected to the base B of transistor 11 through a second forward-biased Zener diode 15. The second Zener diode 15 is selected to have a forward voltage lower than the voltage drop across the emitter-base junction of transistor 11 when the transistor is in the off state (i.e., through high doping of the junction).

[0044] The impedance of the current source is chosen to be lower than the impedance passing through the emitter-base terminals of transistor 11, so that the first Zener diode 14 preferentially draws current from the current source 13 through the second Zener diode 15 rather than through transistor 11. This reduces the emitter-base current through transistor 11, for example, to essentially zero, so that the current between the emitter and collector is reduced (if not stopped) to the point that the transistor is considered to be off.

[0045] To ensure that the current through transistor 11 is reduced when switch 12 is closed, the first Zener diode 14 needs to be current-limited, that is, it does not have the capacity to carry the maximum current that can be supplied by current source 13 as well as the current from transistor 11.

[0046] In the circuit arrangement described above, when no signal is applied to the base, transistor 11 can be regarded as operating as a normally-on transistor when the transistor is turned on.

[0047] Figure 1a and 1b The circuit can be used to implement an inverter ("NOT") logic gate. When the base is connected to the signal source, i.e., current source 13 (input on), the current on the collector side of transistor 11 will be essentially zero (output off). In contrast, when the base is disconnected from the signal source (input off), there will be current flowing through the collector (output on).

[0048] The following text will be about Figure 3 As described, both the first Zener diode 14 and the second Zener diode 15 can be integrated with the transistor 11 to provide an integrated transistor-Zener electronics device. Figure 1b Show Figure 1aAn alternative representation of the circuit is shown, in which transistor 11, a first Zener diode 14, and a second Zener diode 15 are shown using a single electronic circuit symbol. T indicates the connection through the second Zener diode 15 to the base of the transistor.

[0049] Figure 2a Showing with Figure 1a A variant circuit 20 performs the same function, but in which the PNP bipolar transistor is replaced with an NPN bipolar transistor. Circuit 20 operates in a similar manner, except that the polarity is reversed and the current source is replaced with a current sink 23.

[0050] When switch 22 is closed, the potential between reverse bias diode 24 and transistor 21 causes leakage current to flow through the diode, and thus causes a current sufficient to turn on the transistor to flow into the base of transistor 21.

[0051] When switch 22 is closed such that current sink 23 is connected to the base B of transistor 21, the current through the diode is preferentially drawn into current sink 23 due to its lower impedance compared to the impedance of transistor 21 between the base terminal B and the emitter terminal E. Therefore, the current entering the base B of transistor 21 decreases, for example, stops, thereby disconnecting the transistor.

[0052] Figure 2b Show Figure 2a An alternative representation of the circuit, in which transistor 21 and diodes 24 and 25 are shown using a single electronic circuit symbol.

[0053] Figure 1a , 1b Current source 13 and switch 12 are generally shown for ease of understanding. In most practical implementations, the base of the transistor will be connected to the output of another logic circuit, where the current ultimately originates from the high rail compared to a separate current source; in this case, the circuit is designed such that the impedance of the circuit system from the high rail to the base terminal is lower than the impedance between the transistor's emitter and base. The same applies with suitable modifications. Figure 2a , 2b .

[0054] Figure 3 It is used for implementation Figure 1a and 1b A schematic diagram of the semiconductor layer structure of a PNP bipolar junction transistor and a Zener diode.

[0055] The lateral bipolar junction transistor is provided by a first n-type semiconductor region 100 providing the base region of the transistor, the first n-type semiconductor region being formed in a p-type layer 101 (e.g., a substrate, wherein multiple regions 100 may be provided and isolated from each other by the substrate to form multiple transistor Zener diode circuit devices). A portion of the n-type region 100 is heavily doped to provide an n+ type region 102. The n+ type region 102 is in contact with the substrate 101. The n+ type region 102 extends below the less heavily doped portion of the n-type region 100.

[0056] The polysilicon pattern is disposed on the n-type region 100 (e.g., on the surface of a silicon wafer) to define separate p-type regions 103, 104 providing the collector and emitter regions of a transistor. The polysilicon pattern is also used to provide two additional p+ regions 105, 107 directly above the n+ type region 102 to form diode junctions 106, 108, which provide corresponding p-type regions due to the high doping levels of the n+ type base region 102 and the p+ regions 105, 107. Figure 1a and 1b The first Zener diode 14 and the second Zener diode 15 are the first Zener diode and the second Zener diode.

[0057] The p+ regions 103, 104, 105, and 107 are advantageously fabricated by depositing undoped and / or lightly doped polysilicon on a wafer and then doping in situ. The doping process is advantageously such that the portion of the n-type region 100 (and, in the case of the p-type regions 105 and 106, the portion of the n+ region 106 adjacent to the polysilicon is reverse-doped, such that said portion forms part of the p-type regions 103, 104, 105, and 107.

[0058] Electrical contact S is disposed on p substrate 101 to provide a second terminal of Zener diode.

[0059] The polysilicon layer 105 extends laterally across the PN junction within the wafer between the n+ type region 102 of the transistor and the relatively lightly doped p-type substrate 100 (but in a variation, it may extend only above the p-type substrate).

[0060] Using polysilicon instead of traditional metal contacts to generate the input to the n+ region 102 of the transistor via the diode junction eliminates the need for any metal layer. This reduces the number of steps required to manufacture the device.

[0061] Providing a base region including an n-region 100 with a buried n+ type region beneath it reduces the efficiency of any parasitic vertical transistors unintentionally generated due to the lateral transistor structure. However, providing this layer structure is complex because it is difficult to generate lightly doped material in already heavily doped regions. However, this can be accomplished using multiple epitaxial layers, for example, by placing an N+ layer across the entire wafer, followed by a lighter N layer.

[0062] It should be understood that Figure 3 The structure can be adapted to form an NPN bipolar transistor with a Zener diode by changing the type of the surrounding layers.

[0063] A first Zener diode in a reverse-biased arrangement (where the voltage across the Zener diode is lower than its Zener voltage) is preferred because it provides operational stability, especially when the Zener voltage is selected to minimize the diode's thermal coefficient. However, other diode configurations are possible. For example, the diode can be used in a normal-biased arrangement if the first diode is small enough and therefore has a high current-limiting capability. Other types of diodes, such as tunnel diodes, may also be used. Tunnel diodes can be used under forward-biased conditions, where the voltage across the diode is lower than the higher voltage that distinguishes the negative resistance region of the tunnel diode.

[0064] Figure 4 This is a schematic diagram illustrating how multiple transistor Zener diode devices described above can be electrically interconnected without metal contacts or traces.

[0065] The example circuit includes four transistors labeled I, II, III, and IV. The emitters of transistors I and III, made of polysilicon, are connected together via conductive traces in polysilicon that intersect with the n+ region. Figure 4 (Indicated at point 1). Interference between the polysilicon trace and the n+ region is prevented by the oxide layer located above the n+ region.

[0066] The base of transistor II is connected to the collector of transistor IV via a polysilicon trace through diode 2.

[0067] The base of transistor I is connected to the collector of transistor IV via diode Z (3). To achieve this, the N+ region of transistor I includes an elongated 'arm' extending away from the emitter and collector of transistor I, such that diode (3) of transistor I is located away from the emitter and collector of transistor I. The n+ arm provides a region through which the polysilicon trace connecting transistors I and III can pass. To complete the connection between transistors I and IV, the polysilicon trace extends between the collector of transistor IV and diode 3.

[0068] about Figure 1a-3 The described circuits can be combined to implement logic gates. Figure 5 and 6 Example circuits for implementing XOR and NAND gates are shown respectively. In each diagram, the following are used: Figure 1b The circuit symbols introduced here represent transistor-diode devices. Two of these examples illustrate... Figure 1a-3How can the circuit be used to implement logic gates with a lower number of transistors than would typically be required when implementing them using other manufacturing methods such as CMOS?

[0069] Figure 7A and 7B Showing with Figure 1a and 1b The same variant circuit is used, except that it includes three signal sources 13A, 13B, and 13C, each of which can be independently and switchably connected to the base of the normally-on transistor 10 via different switches 12A, 12B, and 12C.

[0070] When one of switches 12A, 12B, and 12C is closed, the associated current sources 13A, 13B, and 13C are connected to the base B of transistor 11 through one of the forward-biased Zener diodes 15A, 15B, and 15C.

[0071] Each of the Zener diodes 15A, 15B, and 15C is coupled with... Figure 1a and 1b The second Zener diode 15 operates in the same way.

[0072] Each diode is selected to have a forward voltage lower than the voltage drop across the emitter-base junction of transistor 11 when the transistor is in the off state (i.e., through high doping of the junction). Therefore, connecting any of the current sources 13A, 13B, or 13C to the base of transistor 11 switches the transistor to the off state.

[0073] Figure 7B Showing the use Figure 1b The circuit symbols introduced in Figure 7A The circuit is shown. The three connections between the three current sources and the base are labeled T1, T2, and T3, respectively.

[0074] Figure 8A and 8B Showing the implementation Figure 7A , 7B An example semiconductor layer structure of transistors and diodes in a circuit. The structure is similar to... Figure 3 The structures are the same, except that the polysilicon pattern is used to provide two additional p+ regions, resulting in a total of three P+ regions 107A, 107B, and 107C directly above the n+ type region 102 to form three diode junctions 108A, 108B, and 108C, thereby providing corresponding... Figure 6 The three second Zener diodes are Zener diodes 15A, 15B, and 15C. Figure 8BThis is a schematic plan view showing an example pattern of polysilicon on the n+ type region 102 for providing each of the p+ regions 103, 104, 105, 107A, 107B, 107C and isolating them from each other.

[0075] although Figures 7A-7B The examples shown in 8A-8B illustrate three input connections to the base 11 of transistor 10 for connecting three separate current sources 13A, 13B, 13C, but it should be understood that different numbers of connections may exist for connecting to different numbers of current sources, such as two, four or more connections.

[0076] Figure 8A and 8B The layered structure can be used to implement Figure 9 The OR NOT logic gate shown is used because transistor 10 will be disconnected if any of the current sources 13A, 13B, and 13C are connected to the base 11. Advantageously, this implementation requires only one transistor compared to prior art circuits, such as those manufactured using CMOS which require at least two transistors.

[0077] Figure 10 Shown and has multiple Figures 7A-7B An example circuit of transistor circuitry for implementing a D-type master-slave flip-flop. Figure 11 Show Figure 10 The same circuit is shown in the figure, which illustrates the "OR" logic gate function provided by each of the transistor circuits.

[0078] Figure 12 Show Figures 7A-7B A variant circuit. Like Figures 7A-7B In one embodiment, the number of inputs 13 can vary.

[0079] Figure 12 circuit and Figures 7A-7B The circuit is essentially the same, but another diode 16 is added, which acts as a Baker clamp and is therefore referred to below as Baker clamp diode 16.

[0080] A Baker clamp diode 16 is connected between the base and collector of transistor 11, oriented with its anode facing the collector. By connecting the collector and base of transistor 11 through the Baker clamp diode 16, as the voltage at the collector increases when the transistor is turned on, the voltage at the base increases by subtracting the voltage drop across the Baker clamp diode 16 from the voltage towards the collector. In this way, the magnitude of the voltage swing at the base 11 of transistor 10 between the on and off states is reduced, thereby allowing for faster switching.

[0081] By selecting the voltage drop provided between Zener diodes 15A, 15B, and 15C and across the Beck clamp 16, the values ​​of the upper and lower limit voltages at the base of transistor 11 during switching can be selected.

[0082] Advantageously, the values ​​of the upper and lower voltage limits are selected based on the characteristics of transistor 11, so that during the operation of the circuit: There is always a current flowing between the emitter and the collector; The base will never saturate, and When the transistor is off, the current between the emitter and collector is small enough that the voltage at the collector is too low to disconnect the transistor in the next stage of the logic circuit.

[0083] This arrangement allows for further improvements in the switching speed of transistor 11.

[0084] Figure 13 This is a schematic diagram of the semiconductor layer structure used to implement transistor 11, Zener diodes 15A, 15B, 15C and Baker clamp diode 16.

[0085] The structure and Figure 8A The structures are essentially the same, except that the p+ region 103 of the collector is positioned transversely and thus in direct contact with both the n-type region 100 and the n+ type region 102. This arrangement provides two diode junctions: a first diode junction 111 between the p+ region 103 and region 100 of transistor 11, and a second diode junction 110 between the p+ region 103 and the n+ type region 102, the second diode junction providing a Beck clamp diode 16.

[0086] The overlapping region between the p+ region 103 and the n+ region 102 determines the size of the Beck clamp diode 16, and thus the voltage drop across it.

[0087] Figure 14 It is relative to Figure 12 A schematic diagram of the equivalent circuit (but with two inputs instead of three) of the circuit, which is implemented as an integrated circuit containing NMOS transistors that can be manufactured using indium gallium zinc oxide (IGZO) semiconductors.

[0088] Provide relative to Figure 12 The components of the circuit with equivalent function have been assigned the same numbers, where an asterisk is added ( ).

[0089] Transistor 11 It is an NMOS transistor with a source terminal, a drain terminal, and a gate terminal.

[0090] Figure 12The equivalent function of the first Zener diode 14 is determined by the arrangement of the transistor 11 at the positive reference voltage. Reverse bias leakage Schottky diode 14 between gates (Or implemented as a depletion-type NMOS transistor configured to act as a resistor). When signal input 13a 13b With transistor 11 When the gate is disconnected, leakage Schottky diode 14 Ensure that there is a sufficient positive voltage at the gate to turn on the transistor.

[0091] When signal input 13a 13b When any one of them is connected to the reference voltage, the voltage at the gate drops and transistor 11 disconnect.

[0092] The equivalent function of the Baker clamp 16 is achieved by connecting it to transistor 11. Schottky diode 16 between drain and gate supply.

[0093] When the transistor is turned on, the voltage at the drain is pulled towards ground. The voltage at the drain will continue to drop until the Schottky diode 16... Switching to a forward bias configuration suppresses any further increase in the voltage between the gate and source (Vgs) of transistor 11.

[0094] Diode 15A and diode 15B Provides the equivalent function of Zener diode 15A and Zener diode 15B, thereby limiting the lower limit of the voltage at the gate.

[0095] Therefore, diode 15A Diode 15B and 16 Limiting transistor 11 The voltage swing at the base allows for a significant increase in switching speed.

[0096] Figure 15 It is used to provide higher noise immunity. Figure 14 Schematic diagrams of different versions of the circuit.

Claims

1. A circuit comprising: transistor, Switches and signal sources; The base of the transistor can be switched to the signal source via the switch; A first diode is connected between the base of the transistor and a reference voltage; The first diode is configured such that when the signal source is not connected to the base of the transistor, the voltage applied to the emitter of the transistor causes a current to flow through the base of the transistor and through the first diode, which is sufficient to put the transistor in an on state. The impedance of the signal source is lower than the impedance of the transistor through the emitter and base; The first diode is also selected to provide a current-limiting function, such that when the signal source is connected to the base of the transistor, the current flowing through the base is reduced, causing the transistor to switch to an off state; and wherein The circuit further includes a second diode, which is composed of a semiconductor region providing the base of the transistor and another semiconductor region in direct contact with the semiconductor region providing the base of the transistor; and wherein the signal source can be connected to the base of the transistor through the second diode.

2. The circuit of claim 1, wherein the first diode is arranged in the circuit to be reverse biased when the voltage is applied to the emitter terminal of the transistor.

3. The circuit of claim 1, wherein the doping level of the semiconductor region used to provide the first diode and / or the second diode is sufficiently high such that the current flowing through the first diode and / or the second diode can be at least partially caused by the quantum tunneling effect.

4. The circuit according to claim 1, wherein the temperature coefficient of the first diode is in the range of -2 mV / ℃ to 2 mV / ℃, including -2 mV / ℃ and 2 mV / ℃.

5. The circuit according to claim 1, wherein the first diode is a Zener diode.

6. The circuit of claim 5, wherein the Zener voltage of the first diode is between 4 volts and 5.6 volts, inclusive.

7. The circuit of claim 6, wherein the Zener voltage of the first diode is approximately 5.6 volts.

8. The circuit according to any of the preceding claims, wherein the second diode is a Zener diode.

9. The circuit of claim 1, wherein when the circuit is in operation, the voltage drop across the second diode is less than the voltage drop between the base and emitter of the transistor.

10. The circuit of claim 1, further comprising a third diode disposed between the collector and the base of the transistor, the third diode being configured to provide a Baker clamping function.

11. The circuit of claim 1, further comprising one or more additional diodes, each of the one or more additional diodes comprising the semiconductor region providing the base of the transistor and one or more additional semiconductor regions in direct contact with the semiconductor region providing the base of the transistor; and wherein one or more additional signal sources are connectable to the base of the transistor via the one or more additional diodes.

12. An inverter logic gate circuit comprising the circuitry described in any of the preceding claims.

13. A "NOR" logic gate circuit comprising the circuit according to claim 11.

14. A method for operating a circuit, The circuit includes a bipolar transistor and a diode, the diode having a first terminal connected to the base terminal of the transistor, and a second terminal of the diode connected to a reference voltage; A voltage is applied between the emitter terminal of the bipolar transistor and the second terminal of the diode; The base terminal of the bipolar transistor and the first terminal of the diode are connected to a signal source via a switch; the impedance of the signal source is lower than the impedance between the emitter and base terminals of the bipolar transistor; and The method includes using a switch to switchably connect the base terminal of the transistor and the first terminal of the diode to a signal source, such that: When disconnected, current flows through the base terminal of the transistor and through the diode to turn on the transistor; Furthermore, when connected, the current flowing through the control terminal of the transistor decreases to disconnect the transistor.

15. The method of claim 14, wherein the voltage is applied between the emitter terminal of the transistor and the second terminal of the diode, such that the diode is reverse biased.

16. The method of claim 14 or 15, wherein the diode is a Zener diode, and the voltage applied across the diode when the transistor is turned on is less than the breakdown voltage of the Zener diode.

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