A wafer alignment method and apparatus

Abstract

This invention provides a wafer alignment method, apparatus, storage medium, and electronic device, relating to the field of semiconductor integrated circuit technology. The method includes: obtaining a first alignment line by connecting a first preset alignment mark and a second preset alignment mark on the surface of a first wafer; obtaining a second alignment line by connecting a third preset alignment mark and a fourth preset alignment mark on the surface of a second wafer; mapping the first alignment line to a coordinate system containing the surface of the second wafer to obtain a mapping line; obtaining the positional deviation between the mapping line and the second alignment line in the coordinate system; and performing an alignment operation between the first wafer and the second wafer based on the positional deviation. The technical solution provided by this invention can greatly simplify wafer alignment operations and improve wafer alignment accuracy.

Description

Technical Field

[0001] This invention relates to the field of semiconductor integrated circuit technology, and particularly to a wafer alignment method and apparatus. Background Technology

[0002] As the integration density of semiconductor integrated circuits increases, it becomes increasingly difficult to improve the integration density of transistors in two-dimensional semiconductor chips. Therefore, to improve the transistor integration density and reduce external leads in semiconductor chips, three-dimensional integrated circuits (3D integrated circuits) composed of multiple stacked layers have emerged. The advent of 3D integrated circuits has overcome the physical and material limitations of existing integrated circuits. 3D integrated circuits consist of multiple planar devices stacked together. During manufacturing, bonding processes are used to achieve vertical interconnections between multiple chips, increasing chip space and improving transistor integration. Before packaging, the chips are located within a wafer, and wafer-to-wafer bonding achieves the stacking effect between chips.

[0003] Wafer-to-wafer bonding is a key technology for realizing 3D integrated circuits. In wafer bonding technology, bonding accuracy is a crucial performance parameter. A decrease in bonding accuracy can severely impact subsequent process steps, further affecting circuit connectivity and reducing wafer yield. Alignment accuracy during wafer bonding is particularly critical, directly affecting circuit connectivity and functionality. If alignment accuracy is not controlled to the required level, the wafer bonding process cannot meet process requirements.

[0004] In wafer alignment, maintaining a stable and precise alignment accuracy within a certain range is crucial. Only when the alignment accuracy is controllable can the bonding process avoid introducing high alignment errors into subsequent control ranges. Therefore, the smaller the error generated during alignment, the higher the wafer bonding accuracy. However, the spatial coordinate establishment and calculation processes relied upon for alignment control in existing alignment equipment are quite complex, and the numerous introduced error terms result in insufficient controllability. Consequently, current alignment processes rely on too many parameters from the alignment equipment, making it difficult to improve alignment accuracy, especially at the nanometer level.

[0005] During wafer alignment, calculating the coordinates of two wafers to be aligned within the three-dimensional coordinate system of the alignment equipment, and then adjusting the wafers to achieve perfect overlap using these coordinates, requires complex spatial geometric calculations, leading to increased computational and control complexity. Due to specific process requirements, the alignment equipment needs extremely high alignment accuracy. Precisely positioning, measuring, and calibrating the coordinates of each component of the alignment equipment is crucial and depends on stringent and complex conditions.

[0006] It is evident that in existing technologies, the alignment process relies on the absolute coordinate position of the wafer, resulting in complex alignment operations and low alignment accuracy. Summary of the Invention

[0007] To address the problems in the prior art, this invention proposes a wafer alignment method and apparatus that can greatly simplify wafer alignment operations and improve wafer alignment accuracy.

[0008] To achieve the above objectives, the technical solution of the present invention is implemented as follows:

[0009] In a first aspect, embodiments of the present invention provide a wafer alignment method, including a first wafer and a second wafer to be aligned, wherein the first wafer and the second wafer are arranged parallel to each other; the method includes:

[0010] S1: Obtain the line connecting the first preset alignment mark on the surface of the first wafer and the second preset alignment mark on the surface of the first wafer as the first alignment line;

[0011] S2: Obtain the line connecting the third preset alignment mark on the surface of the second wafer and the fourth preset alignment mark on the surface of the second wafer as the second alignment line;

[0012] S3: Map the first alignment line to the coordinate system where the second wafer surface is located to obtain the mapping line;

[0013] S4: Obtain the positional deviation between the mapping line and the second alignment line in the coordinate system;

[0014] S5: Based on the positional deviation, perform an alignment operation between the first wafer and the second wafer.

[0015] Furthermore, the method also includes:

[0016] Repeat steps S4 through S5 until the number of iterations reaches the preset threshold.

[0017] Preferably, the first preset alignment mark and the third preset alignment mark are mutual alignment points, and the second preset alignment mark and the fourth preset alignment mark are mutual alignment points; obtaining the positional deviation between the mapping line and the second alignment line in the coordinate system includes:

[0018] In the coordinate system, perform the following operations:

[0019] Obtain the angle value between the mapping line and the second alignment line;

[0020] Obtain the endpoint of the mapping line that corresponds to the first preset alignment mark as the first mapping mark;

[0021] The coordinate deviation value between the first mapping mark and the third preset alignment mark is obtained as the first coordinate deviation value;

[0022] The first coordinate deviation value and the angle between the mapping line and the second alignment line are obtained as the positional deviation between the mapping line and the second alignment line in the coordinate system. Preferably, obtaining the angle between the mapping line and the second alignment line includes: performing the following operations in the coordinate system:

[0023] The endpoint of the mapping line corresponding to the second preset alignment mark is obtained as the second mapping mark;

[0024] The coordinate deviation value between the second mapping mark and the fourth preset alignment mark is obtained as the second coordinate deviation value;

[0025] Based on the first coordinate deviation value and the second coordinate deviation value, the angle between the mapping line and the second alignment line is calculated.

[0026] Preferably, the first coordinate deviation value includes: the coordinate difference between the first mapping mark and the third preset alignment mark in the coordinate system in the X direction, and the coordinate difference between the first mapping mark and the third preset alignment mark in the coordinate system in the Y direction; the second coordinate deviation value includes: the coordinate difference between the second mapping mark and the fourth preset alignment mark in the coordinate system in the X direction, and the coordinate difference between the second mapping mark and the fourth preset alignment mark in the coordinate system in the Y direction; the angle between the mapping line and the second alignment line is calculated using the following expression:

[0027]

[0028] Wherein, θ is the angle between the mapping line and the second alignment line; X 111 -X 201 The coordinate difference between the first mapping mark and the third preset alignment mark in the coordinate system along the X direction; Y 111 -Y 201 The coordinate difference between the first mapping mark and the third preset alignment mark in the Y direction of the coordinate system; X 112 -X 202 The coordinate difference between the second mapping mark and the fourth preset alignment mark in the coordinate system along the X direction; Y 112 -Y 202 The coordinate difference between the second mapping mark and the fourth preset alignment mark in the Y direction of the coordinate system.

[0029] Preferably, both the first coordinate deviation value and the second coordinate deviation value are acquired using an image sensor.

[0030] Preferably, the alignment operation between the first wafer and the second wafer based on the positional deviation includes:

[0031] The first wafer is rotated relative to the second wafer by the included angle value so that the included angle between the mapping line and the second alignment line is 0;

[0032] The first wafer is controlled to translate the first coordinate deviation value relative to the second wafer so that the first mapping mark coincides with the third preset alignment mark.

[0033] Furthermore, the step of performing the alignment operation between the first wafer and the second wafer based on the positional deviation further includes:

[0034] The first wafer is controlled to translate the second coordinate deviation value relative to the second wafer so that the second mapping mark coincides with the fourth preset alignment mark.

[0035] In a second aspect, embodiments of the present invention provide a wafer alignment apparatus, including a first wafer and a second wafer to be aligned, wherein the first wafer and the second wafer are arranged parallel to each other; the apparatus includes:

[0036] The first alignment line acquisition unit is used to acquire the line connecting the first preset alignment mark on the surface of the first wafer and the second preset alignment mark on the surface of the first wafer as the first alignment line;

[0037] The second alignment line acquisition unit is used to acquire the line between the third preset alignment mark on the surface of the second wafer and the fourth preset alignment mark on the surface of the second wafer as the second alignment line;

[0038] A mapping unit is used to map the first alignment line to the coordinate system where the second wafer surface is located to obtain a mapping line;

[0039] A position deviation acquisition unit is used to acquire the position deviation between the mapping line and the second alignment line in the coordinate system;

[0040] An alignment unit is used to perform an alignment operation between the first wafer and the second wafer based on the positional deviation.

[0041] Furthermore, the device also includes:

[0042] The loop execution unit is used to repeatedly execute the steps performed by the position deviation acquisition unit and the alignment unit until the number of loop executions reaches a preset threshold.

[0043] Preferably, the first preset alignment mark and the third preset alignment mark are mutual alignment points, and the second preset alignment mark and the fourth preset alignment mark are mutual alignment points; the position deviation acquisition unit includes:

[0044] Angle value acquisition unit, used to acquire the angle value between the mapping line and the second alignment line in the coordinate system;

[0045] The first mapping mark acquisition unit is used to acquire, in the coordinate system, the endpoint of the mapping line corresponding to the first preset alignment mark as the first mapping mark;

[0046] The first coordinate deviation value acquisition unit is used to acquire the coordinate deviation value between the first mapping mark and the third preset alignment mark in the coordinate system as the first coordinate deviation value;

[0047] The position deviation acquisition subunit is used to acquire, in the coordinate system, the first coordinate deviation value and the angle value between the mapping line and the second alignment line as the position deviation between the mapping line and the second alignment line in the coordinate system.

[0048] Preferably, the included angle value acquisition unit includes:

[0049] The second mapping mark acquisition unit is used to acquire, in the coordinate system, the endpoint of the mapping line corresponding to the second preset alignment mark as the second mapping mark;

[0050] The second coordinate deviation value acquisition unit is used to acquire the coordinate deviation value between the second mapping mark and the fourth preset alignment mark in the coordinate system as the second coordinate deviation value;

[0051] The calculation unit is used to calculate the angle between the mapping line and the second alignment line in the coordinate system based on the first coordinate deviation value and the second coordinate deviation value.

[0052] Preferably, the first coordinate deviation value includes: the coordinate difference between the first mapping mark and the third preset alignment mark in the coordinate system along the X direction, and the coordinate difference between the first mapping mark and the third preset alignment mark in the coordinate system along the Y direction; the second coordinate deviation value includes: the coordinate difference between the second mapping mark and the fourth preset alignment mark in the coordinate system along the X direction, and the coordinate difference between the second mapping mark and the fourth preset alignment mark in the coordinate system along the Y direction; the calculation unit calculates the angle between the mapping line and the second alignment line using the following expression:

[0053]

[0054] Wherein, θ is the angle between the mapping line and the second alignment line; X 111 -X 201 The coordinate difference between the first mapping mark and the third preset alignment mark in the coordinate system along the X direction; Y 111 -Y 201 The coordinate difference between the first mapping mark and the third preset alignment mark in the Y direction of the coordinate system; X 112 -X 202 The coordinate difference between the second mapping mark and the fourth preset alignment mark in the coordinate system along the X direction; Y 112 -Y 202 The coordinate difference between the second mapping mark and the fourth preset alignment mark in the Y direction of the coordinate system.

[0055] Preferably, both the first coordinate deviation value and the second coordinate deviation value are acquired using an image sensor.

[0056] Preferably, the alignment unit includes:

[0057] A rotation control unit is used to control the first wafer to rotate relative to the second wafer by the included angle value, so that the included angle between the mapping line and the second alignment line is 0;

[0058] A translation control unit is used to control the first wafer to translate the first coordinate deviation value relative to the second wafer so that the first mapping mark coincides with the third preset alignment mark.

[0059] Furthermore, the translation control unit is also used to control the first wafer to translate the second coordinate deviation value relative to the second wafer so that the second mapping mark coincides with the fourth preset alignment mark.

[0060] This invention provides a wafer alignment method and apparatus. First, a line connecting a first preset alignment mark and a second preset alignment mark on the surface of a first wafer is obtained as a first alignment line. A line connecting a third preset alignment mark and a fourth preset alignment mark on the surface of a second wafer is obtained as a second alignment line. The first alignment line is then mapped onto the coordinate system of the second wafer surface to obtain a mapping line. Next, the positional deviation between the mapping line and the second alignment line in the coordinate system is obtained. Based on this positional deviation, an alignment operation is performed between the first wafer and the second wafer. It is evident that this invention performs the alignment operation based on the positional deviation between the mapping line and the second alignment line, i.e., the relative position between the alignment marks on the first and second wafers. Compared to existing technologies, this invention does not require calculating the absolute coordinate values ​​of each alignment mark, and correspondingly, it does not introduce calculation errors. Therefore, it can greatly simplify the wafer alignment operation and improve wafer alignment accuracy. Attached Figure Description

[0061] The scope of this invention can be better understood by reading the following detailed description of exemplary embodiments in conjunction with the accompanying drawings. The accompanying drawings are:

[0062] Figure 1 This is a flowchart of a method according to an embodiment of the present invention;

[0063] Figure 2 This is a schematic diagram of the first alignment line mapped onto the surface of the second wafer in an embodiment of the present invention;

[0064] Figure 3 This is a structural diagram of the device according to an embodiment of the present invention.

[0065] Explanation of reference numerals in the attached figures

[0066] 1-First wafer 2-Second wafer 101-First preset alignment mark

[0067] 102 - Second preset alignment mark; 103 - First alignment line; 201 - Third preset alignment mark

[0068] 202 - Fourth Preset Alignment Mark; 203 - Second Alignment Line; 111 - First Mapping Mark

[0069] 112 - Second mapping mark 113 - Mapping line Detailed Implementation

[0070] To make the objectives, technical solutions, and advantages of the present invention clearer, the implementation method of the present invention will be described in detail below with reference to the accompanying drawings and embodiments, so that the process of how the present invention uses technical means to solve technical problems and achieve technical effects can be fully understood and implemented accordingly.

[0071] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and therefore the scope of protection of the invention is not limited to the specific embodiments disclosed below.

[0072] Example 1

[0073] Current alignment control techniques in wafer bonding rely heavily on the coordinate system of the alignment equipment. This requires measuring the positional deviation of each unit component within the alignment equipment relative to a point on the substrate to establish the coordinate system. However, alignment equipment has a relatively large number of unit components, especially moving components, which are prone to errors. The numerous parameters involved in the measurement and calculation introduce significant errors, making the existing alignment process complex and impractical. This invention implements a wafer alignment control method that is almost entirely independent of the alignment equipment's coordinate system and features a simple calculation method. The purpose of this invention is to reduce the errors introduced by alignment equipment parameters during the alignment process, improve alignment accuracy, and consequently, improve the precision of wafer bonding.

[0074] According to an embodiment of the present invention, a wafer alignment method is provided, including a first wafer and a second wafer to be aligned, wherein the first wafer and the second wafer are arranged parallel to each other; as shown Figure 1 As shown, the method described in this embodiment of the invention includes:

[0075] Step S1: Obtain the line connecting the first preset alignment mark on the surface of the first wafer and the second preset alignment mark on the surface of the first wafer as the first alignment line;

[0076] Step S2: Obtain the line connecting the third preset alignment mark on the surface of the second wafer and the fourth preset alignment mark on the surface of the second wafer as the second alignment line;

[0077] This embodiment uses existing wafer alignment equipment to achieve the alignment process.

[0078] In this embodiment, a first wafer is fixed to the upper wafer stage of a wafer alignment device, and a second wafer is fixed to the lower wafer stage of the same device, so that both wafers are in a horizontal position. The first wafer has multiple preset alignment marks on its surface; two of these marks are selected as the first and second preset alignment marks, and the line connecting the first and second preset alignment marks is obtained as the first alignment line. Similarly, the second wafer has multiple preset alignment marks; two of these marks are selected as the third and fourth preset alignment marks, and the line connecting the third and fourth preset alignment marks is obtained as the second alignment line.

[0079] Step S3: Map the first alignment line to the coordinate system where the second wafer surface is located to obtain the mapping line;

[0080] When both the first and second wafers are horizontally positioned, the coordinate system of the second wafer surface is the horizontal plane on which the second wafer surface is located. In this case, the first alignment line is mapped onto the coordinate system of the second wafer surface, that is, the first alignment line is vertically mapped onto the horizontal plane on which the second wafer surface is located, thus obtaining the mapping line of the first alignment line on the second wafer surface.

[0081] Step S4: Obtain the positional deviation between the mapping line and the second alignment line in the coordinate system;

[0082] In this embodiment, the first preset alignment mark and the third preset alignment mark are mutual alignment points, and the second preset alignment mark and the fourth preset alignment mark are mutual alignment points. That is, the first preset alignment mark needs to be aligned with the third preset alignment mark, and the second preset alignment mark needs to be aligned with the fourth preset alignment mark, so that the first wafer and the second wafer are aligned.

[0083] Under the above premise, obtaining the positional deviation between the mapping line and the second alignment line in the coordinate system includes:

[0084] In the coordinate system, the following operations are performed: obtaining the angle between the mapping line and the second alignment line; obtaining the endpoint of the mapping line corresponding to the first preset alignment mark as the first mapping mark; obtaining the coordinate deviation between the first mapping mark and the third preset alignment mark as the first coordinate deviation; obtaining the first coordinate deviation and the angle between the mapping line and the second alignment line as the positional deviation between the mapping line and the second alignment line in the coordinate system.

[0085] Specifically, such as Figure 2 As shown, the line connecting the first preset alignment mark 101 and the second preset alignment mark 102 on the surface of the first wafer 1 is the first alignment line 103, and the line connecting the third preset alignment mark 201 and the fourth preset alignment mark 202 on the surface of the second wafer 2 is the second alignment line 203. The first alignment line 103 is mapped onto the surface of the second wafer 2 to obtain a mapping line 113. Then, the angle between the mapping line 113 and the second alignment line 203, and the coordinate deviation between the first mapping mark 111 and the third preset alignment mark 201 are obtained as the positional deviation between the mapping line 113 and the second alignment line 203 in the coordinate system on the surface of the second wafer 2.

[0086] In this embodiment, obtaining the angle value between the mapping line and the second alignment line includes:

[0087] In the coordinate system, the following operations are performed: the endpoint of the mapping line corresponding to the second preset alignment mark is obtained as the second mapping mark; the coordinate deviation value between the second mapping mark and the fourth preset alignment mark is obtained as the second coordinate deviation value; based on the first coordinate deviation value and the second coordinate deviation value, the included angle value between the mapping line and the second alignment line is calculated.

[0088] The first coordinate deviation value includes: the coordinate difference between the first mapping mark and the third preset alignment mark in the coordinate system in the X direction, and the coordinate difference between the first mapping mark and the third preset alignment mark in the coordinate system in the Y direction; the second coordinate deviation value includes: the coordinate difference between the second mapping mark and the fourth preset alignment mark in the coordinate system in the X direction, and the coordinate difference between the second mapping mark and the fourth preset alignment mark in the coordinate system in the Y direction.

[0089] Precise calculation of control output using a three-dimensional coordinate system relies on the position coordinates of each module of the alignment device within that system. However, in practical applications, measuring absolute coordinates is difficult and lacks sufficient accuracy. Because the accuracy of each axis of the alignment device is inconsistent throughout the coordinate system, the calibration and measurement processes are relatively complex and difficult to control, resulting in high time and equipment costs.

[0090] Based on the actual situation of the alignment equipment, the alignment marks are as follows: Figure 2 Measuring the absolute coordinates of points 101, 102, 201, and 202 is difficult and prone to significant errors, but the positional deviation value X of the markers in the X-direction is... 111 -X 201 The deviation value Y in the Y direction 111 -Y 201 The angle between the mapping line and the second alignment line can be directly measured using the image sensor of the alignment device. Therefore, in this embodiment, the angle between the mapping line and the second alignment line is calculated using the following expression:

[0091]

[0092] Wherein, θ is the angle between the mapping line and the second alignment line; X 111 -X 201 The coordinate difference between the first mapping mark and the third preset alignment mark in the coordinate system along the X direction; Y 111 -Y 201 The coordinate difference between the first mapping mark and the third preset alignment mark in the Y direction of the coordinate system; X 112 -X 202The coordinate difference between the second mapping mark and the fourth preset alignment mark in the coordinate system along the X direction; Y 112 -Y 202 The coordinate difference between the second mapping mark and the fourth preset alignment mark in the Y direction of the coordinate system.

[0093] In this embodiment, both the first coordinate deviation value and the second coordinate deviation value are obtained using an image sensor.

[0094] In practical applications, an image sensor is installed on a wafer alignment device to automatically acquire the first coordinate deviation value and the second coordinate deviation value, that is, to acquire the coordinate difference between the first mapping mark 111 and the third preset alignment mark 201 on the surface of the second wafer 2 in the X direction, the coordinate difference between the first mapping mark 111 and the third preset alignment mark 201 on the surface of the second wafer 2 in the Y direction, the coordinate difference between the second mapping mark 112 and the fourth preset alignment mark 202 on the surface of the second wafer 2 in the X direction, and the coordinate difference between the second mapping mark 112 and the fourth preset alignment mark 202 on the surface of the second wafer 2 in the Y direction.

[0095] Step S5: Based on the positional deviation, perform an alignment operation between the first wafer and the second wafer.

[0096] In this embodiment, the alignment operation between the first wafer and the second wafer based on the positional deviation includes:

[0097] The first wafer is rotated relative to the second wafer by the included angle value so that the included angle between the mapping line and the second alignment line is 0; the first wafer is translated relative to the second wafer by the first coordinate deviation value so that the first mapping mark coincides with the third preset alignment mark.

[0098] It is understood that the execution order of the above rotation and translation operations can be interchanged. That is, the rotation operation can be performed first and then the translation operation, or the translation operation can be performed first and then the rotation operation. This embodiment does not impose any restrictions on this.

[0099] Specifically, the wafer alignment equipment has a rotation device for rotating the upper wafer stage or the lower wafer stage. The rotation device is used to control the first wafer to rotate relative to the second wafer by the aforementioned included angle value θ, so that the included angle between the mapping line 113 and the second alignment line 203 is 0. At the same time, the wafer alignment equipment has a translation device for translating the upper wafer stage or the lower wafer stage. The translation device is used to control the first wafer to translate relative to the second wafer by the aforementioned first coordinate deviation value, so that the first mapping mark 111 coincides with the third preset alignment mark 201.

[0100] To perform wafer alignment operations more accurately, the alignment operation between the first wafer and the second wafer based on the positional deviation further includes: controlling the first wafer to translate the second coordinate deviation value relative to the second wafer so that the second mapping mark coincides with the fourth preset alignment mark.

[0101] Specifically, after performing the above-mentioned rotation and translation operations, this embodiment can further use the above-mentioned translation device to control the first wafer to translate the second coordinate deviation value relative to the second wafer, so that the second mapping mark 112 coincides with the fourth preset alignment mark 202, so as to achieve the purpose of performing wafer alignment operations more accurately.

[0102] To further improve alignment accuracy, the method described in this embodiment also includes: repeatedly executing the above steps S4 to S5 until the number of repeated executions reaches a preset threshold.

[0103] The principle behind this embodiment's ability to improve wafer alignment accuracy based on the above method and iterative approach is as follows:

[0104] (I) Derivation of Error Dependency

[0105] To simplify the model, the following derivation focuses only on the error generation in the Y-axis component due to the control error caused by the wafer alignment equipment error. We assume the eccentricity error between the stage and the wafer is 'a'.

[0106] For a point at a distance r from the center of the wafer, after rotating by an angle θ with radius r, the displacement ΔY1 in the Y direction is as follows:

[0107] ΔY1=rsinθ

[0108] When the rotation center deviates by a distance a in the Y direction, after rotating by an angle θ with a rotation radius of r+a, the actual displacement ΔY2 is shown in the following expression:

[0109] ΔY2=(r+a)sinθ

[0110] The wafer error ΔY2-ΔY1 caused by the system error of the wafer alignment equipment is shown in the following expression:

[0111] ΔY2-ΔY1=(r+a)sinθ-rsinθ

[0112] ΔY2-ΔY1=asinθ

[0113] As can be seen from the above expression, when the rotation angle is within μrad and the alignment equipment installation and mechanical errors are both within 1 mm, assuming an error 'a' of 3 mm, the error data shown in Table 1 can be obtained using the above expression:

[0114] Table 1

[0115] θ(urad) sin(θ) a(mm) ΔY(nm) 1 0.000001 3 3 2 0.000002 3 6 3 0.000003 3 9 4 0.000004 3 12 5 0.000005 3 15 6 0.000006 3 18 7 0.000007 3 21 8 0.000008 3 24 9 0.000009 3 27 10 0.000010 3 30 11 0.000011 3 33 12 0.000012 3 36 13 0.000013 3 39 14 0.000014 3 42 15 0.000015 3 45 16 0.000016 3 48 17 0.000017 3 51 18 0.000018 3 54 19 0.000019 3 57 20 0.000020 3 60

[0116] As can be seen from the table above, as long as the rotation control value is within 10 μrad, even if the error of the wafer alignment equipment reaches 3 mm, the resulting eccentricity error is very small. Since existing wafer alignment equipment can control the rotation value within 10 μrad, the aforementioned eccentricity error does not need to be considered in practical applications.

[0117] (ii) The need for iterative compensation

[0118] The above analysis shows that within the 3mm error range of the mechanical device, the error introduced by the calculation is small enough that after iterating step by step into 2μrad in the algorithm, the error can be completely ignored.

[0119] Because the error in the wafer alignment equipment results in a large θ value after the initial angle calculation, far exceeding 2μrad, the error after controlling the rotation cannot be ignored. However, the rotation control is an approximation; therefore, if... Figure 1 The alignment process described herein will enter a smaller rotation control range after a second iteration based on the results of the first control process, such as within 10 μrad, thereby achieving a negligible error.

[0120] If the alignment device's system stability is low, then using this control method for three or more iterations can achieve very high alignment accuracy. The principle is based on the fact that the output results in actual control do not meet the theoretical calculation requirements and have a certain deviation. However, after iterative compensation by this control algorithm, it gradually approaches a higher accuracy requirement. In practical applications, an iteration threshold can be set empirically based on user settings, i.e., the aforementioned preset threshold.

[0121] The method described in this embodiment does not rely on high-precision calibrated measurement data or coordinate system calculations of the alignment device. Instead, it utilizes the image sensor feedback of the alignment device and performs cyclical operations through multiple regression iterations, thereby greatly improving alignment accuracy.

[0122] After performing the alignment process using the above method, the first wafer fixed on the upper wafer stage and the second wafer fixed on the lower wafer stage are completely superimposed in a vertical mirror image, and the semiconductor chips on the two wafers are completely superimposed within a certain precision, thus achieving the alignment purpose. Afterwards, the wafer alignment equipment is controlled to perform a pre-bonding process.

[0123] The method described in this embodiment abstracts the wafers to be bonded into planes in space, and then calculates the control output quantity using derivation formulas derived from spatial geometry theorems. The planes abstracted from the first and second wafers are as follows: Figure 2 As shown, the alignment marks on the wafer are abstracted as points, with the points on the two faces being respectively Figure 2 Points 101, 102, 201, and 202 are connected by lines as shown in the diagram. Figure 2 The numbers 103 and 203 in the abstract space are used to derive the control method of this invention.

[0124] The derivation process transforms the absolute coordinates into relative positional deviations, which can be measured using the image sensor of the alignment device. The control output is then calculated using the feedback value from the image sensor, thus eliminating the need for initial absolute coordinate values ​​and relying instead on image sensor feedback to calculate the control quantity.

[0125] This invention provides a wafer alignment method. First, a line connecting a first preset alignment mark and a second preset alignment mark on the surface of a first wafer is obtained as a first alignment line. A line connecting a third preset alignment mark and a fourth preset alignment mark on the surface of a second wafer is obtained as a second alignment line. The first alignment line is then mapped onto the coordinate system of the second wafer surface to obtain a mapping line. Next, the positional deviation between the mapping line and the second alignment line in the coordinate system is obtained. Based on this positional deviation, an alignment operation is performed between the first wafer and the second wafer. It is evident that this invention performs the alignment operation based on the positional deviation between the mapping line and the second alignment line, i.e., the relative position between the alignment marks on the first and second wafers. Compared to existing technologies, this invention does not require calculating the absolute coordinate values ​​of each alignment mark, and correspondingly, it does not introduce calculation errors. Therefore, it can greatly simplify the wafer alignment operation and improve wafer alignment accuracy.

[0126] Example 2

[0127] Corresponding to the above method embodiments, the present invention also provides a wafer alignment apparatus, including a first wafer and a second wafer to be aligned, wherein the first wafer and the second wafer are arranged parallel to each other; as shown Figure 3 As shown, the device includes:

[0128] The first alignment line acquisition unit 301 is used to acquire the line between the first preset alignment mark on the surface of the first wafer and the second preset alignment mark on the surface of the first wafer as the first alignment line;

[0129] The second alignment line acquisition unit 302 is used to acquire the line between the third preset alignment mark on the surface of the second wafer and the fourth preset alignment mark on the surface of the second wafer as the second alignment line;

[0130] Mapping unit 303 is used to map the first alignment line to the coordinate system where the second wafer surface is located to obtain a mapping line;

[0131] Position deviation acquisition unit 304 is used to acquire the position deviation between the mapping line and the second alignment line in the coordinate system;

[0132] Alignment unit 305 is used to perform alignment operations between the first wafer and the second wafer based on the positional deviation.

[0133] Furthermore, the device also includes:

[0134] The loop execution unit is used to repeatedly execute the steps performed by the position deviation acquisition unit and the alignment unit until the number of loop executions reaches a preset threshold.

[0135] In this embodiment, the first preset alignment mark and the third preset alignment mark are mutual alignment points, and the second preset alignment mark and the fourth preset alignment mark are mutual alignment points; the position deviation acquisition unit includes:

[0136] Angle value acquisition unit, used to acquire the angle value between the mapping line and the second alignment line in the coordinate system;

[0137] The first mapping mark acquisition unit is used to acquire, in the coordinate system, the endpoint of the mapping line corresponding to the first preset alignment mark as the first mapping mark;

[0138] The first coordinate deviation value acquisition unit is used to acquire the coordinate deviation value between the first mapping mark and the third preset alignment mark in the coordinate system as the first coordinate deviation value;

[0139] The position deviation acquisition subunit is used to acquire, in the coordinate system, the first coordinate deviation value and the angle value between the mapping line and the second alignment line as the position deviation between the mapping line and the second alignment line in the coordinate system.

[0140] In this embodiment, the included angle value acquisition unit includes:

[0141] The second mapping mark acquisition unit is used to acquire, in the coordinate system, the endpoint of the mapping line corresponding to the second preset alignment mark as the second mapping mark;

[0142] The second coordinate deviation value acquisition unit is used to acquire the coordinate deviation value between the second mapping mark and the fourth preset alignment mark in the coordinate system as the second coordinate deviation value;

[0143] The calculation unit is used to calculate the angle between the mapping line and the second alignment line in the coordinate system based on the first coordinate deviation value and the second coordinate deviation value.

[0144] In this embodiment, the first coordinate deviation value includes: the coordinate difference between the first mapping mark and the third preset alignment mark in the X direction of the coordinate system, and the coordinate difference between the first mapping mark and the third preset alignment mark in the Y direction of the coordinate system; the second coordinate deviation value includes: the coordinate difference between the second mapping mark and the fourth preset alignment mark in the X direction of the coordinate system, and the coordinate difference between the second mapping mark and the fourth preset alignment mark in the Y direction of the coordinate system; the calculation unit calculates the angle between the mapping line and the second alignment line using the following expression:

[0145]

[0146] Wherein, θ is the angle between the mapping line and the second alignment line; X 111 -X 201 The coordinate difference between the first mapping mark and the third preset alignment mark in the coordinate system along the X direction; Y 111 -Y 201 The coordinate difference between the first mapping mark and the third preset alignment mark in the Y direction of the coordinate system; X 112 -X 202 The coordinate difference between the second mapping mark and the fourth preset alignment mark in the coordinate system along the X direction; Y 112 -Y 202 The coordinate difference between the second mapping mark and the fourth preset alignment mark in the Y direction of the coordinate system.

[0147] In this embodiment, both the first coordinate deviation value and the second coordinate deviation value are obtained using an image sensor.

[0148] In this embodiment, the alignment unit includes:

[0149] A rotation control unit is used to control the first wafer to rotate relative to the second wafer by the included angle value, so that the included angle between the mapping line and the second alignment line is 0;

[0150] A translation control unit is used to control the first wafer to translate the first coordinate deviation value relative to the second wafer so that the first mapping mark coincides with the third preset alignment mark.

[0151] In this embodiment, the translation control unit is also used to control the first wafer to translate the second coordinate deviation value relative to the second wafer so that the second mapping mark coincides with the fourth preset alignment mark.

[0152] For details regarding the working principle, workflow, and specific implementation methods of the aforementioned device, please refer to the specific implementation methods of the wafer alignment method provided by this invention. The same technical content will not be described in detail here.

[0153] This invention provides a wafer alignment apparatus. First, a line connecting a first preset alignment mark and a second preset alignment mark on the surface of a first wafer is obtained as a first alignment line. A line connecting a third preset alignment mark and a fourth preset alignment mark on the surface of a second wafer is obtained as a second alignment line. The first alignment line is then mapped onto the coordinate system of the second wafer surface to obtain a mapping line. Next, the positional deviation between the mapping line and the second alignment line in the coordinate system is obtained. Based on this positional deviation, an alignment operation is performed between the first wafer and the second wafer. It is evident that this invention performs the alignment operation based on the positional deviation between the mapping line and the second alignment line, i.e., the relative position between the alignment marks on the first and second wafers. Compared to existing technologies, this invention does not require calculating the absolute coordinate values ​​of each alignment mark, and correspondingly, it does not introduce calculation errors. Therefore, it can greatly simplify the wafer alignment operation and improve wafer alignment accuracy.

[0154] Example 3

[0155] According to an embodiment of the present invention, a storage medium is also provided, wherein program code is stored on the storage medium, and when the program code is executed by a processor, the wafer alignment method as described in any of the above embodiments is implemented.

[0156] Example 4

[0157] According to an embodiment of the present invention, an electronic device is also provided, the electronic device including a memory and a processor, wherein the memory stores program code that can run on the processor, and when the program code is executed by the processor, it implements the wafer alignment method as described in any of the above embodiments.

[0158] This invention provides a wafer alignment method, apparatus, storage medium, and electronic device. First, a line connecting a first preset alignment mark and a second preset alignment mark on the surface of a first wafer is obtained as a first alignment line. A line connecting a third preset alignment mark and a fourth preset alignment mark on the surface of a second wafer is obtained as a second alignment line. The first alignment line is then mapped onto the coordinate system of the second wafer surface to obtain a mapping line. Next, the positional deviation between the mapping line and the second alignment line in the coordinate system is obtained. Based on this positional deviation, an alignment operation is performed between the first wafer and the second wafer. It is evident that this invention performs alignment based on the positional deviation between the mapping line and the second alignment line, i.e., the relative position between the alignment marks on the first and second wafers. Compared to existing technologies, this invention does not require calculating the absolute coordinate values ​​of each alignment mark, and correspondingly, it does not introduce calculation errors. Therefore, it can greatly simplify the wafer alignment operation and improve wafer alignment accuracy.

[0159] This invention achieves precise alignment of two wafers. The method fully utilizes three-dimensional spatial coordinate positioning theory. First, two surfaces are established in space. Then, two points are located on these surfaces. A line is then drawn connecting these two points. The alignment device is then controlled to rotate and translate, causing the two lines to coincide, thus achieving perfect alignment of the two wafers. Furthermore, the alignment accuracy can be further improved through iterative processes.

[0160] This invention can achieve wafer-level bonding through control methods, thereby doubling the number of chip architecture layers and greatly reducing the complexity of chip manufacturing.

[0161] The present invention also has the following advantages: (1) It abstracts the bonding wafer to two different geometric planes, simplifies the control algorithm, simplifies and reduces the establishment of the coordinate system of the alignment device, simplifies the control dependency conditions, and reduces the amount of data involved in the control calculation, which greatly reduces the control complexity and measurement calibration data. (2) Through process iteration, the accuracy is gradually improved without introducing process system errors related to the alignment device coordinates, thereby improving the process indicators of the equipment and improving the standard of wafer bonding.

[0162] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed.

[0163] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of the embodiments of the present invention, depending on actual needs.

[0164] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0165] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause an electronic device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0166] While the embodiments disclosed in this invention are as described above, the content is merely for the purpose of facilitating understanding of the invention and is not intended to limit the invention. Any person skilled in the art to which this invention pertains may make any modifications and changes in form and detail of the implementation without departing from the spirit and scope disclosed herein; however, the scope of protection of this invention shall still be determined by the scope defined in the appended claims.

Claims

1. A wafer alignment method, comprising a first wafer and a second wafer to be aligned, characterized by, The first wafer and the second wafer are arranged in parallel; the method comprises: S1: obtaining a line between a first preset alignment mark on the surface of the first wafer and a second preset alignment mark on the surface of the first wafer as a first alignment line; S2: obtaining a line between a third preset alignment mark on the surface of the second wafer and a fourth preset alignment mark on the surface of the second wafer as a second alignment line; S3: mapping the first alignment line to a coordinate system in which the surface of the second wafer is located to obtain a mapping line; S4: obtaining a positional deviation of the mapping line and the second alignment line in the coordinate system; The method comprises: In the coordinate system, the following operations are performed: Obtain an included angle value between the mapping line and the second alignment line; Obtain an endpoint of the mapping line corresponding to the first preset alignment mark as a first mapping mark; Obtain a coordinate deviation value between the first mapping mark and the third preset alignment mark as a first coordinate deviation value; Obtain the first coordinate deviation value and the included angle value between the mapping line and the second alignment line as the positional deviation of the mapping line and the second alignment line in the coordinate system; S5: based on the positional deviation, performing an alignment operation between the first wafer and the second wafer.

2. The wafer alignment method of claim 1, wherein The method further comprises: Cyclically performing S4-S5 until the number of cyclically performed times reaches a preset number threshold.

3. The wafer alignment method of claim 1, wherein The first preset alignment mark and the third preset alignment mark are mutually aligned points, and the second preset alignment mark and the fourth preset alignment mark are mutually aligned points.

4. The wafer alignment method of claim 3, wherein The method comprises: In the coordinate system, the following operations are performed: Obtain an endpoint of the mapping line corresponding to the second preset alignment mark as a second mapping mark; Obtain a coordinate deviation value between the second mapping mark and the fourth preset alignment mark as a second coordinate deviation value; Based on the first coordinate deviation value and the second coordinate deviation value, the included angle value between the mapping line and the second alignment line is calculated.

5. The wafer alignment method of claim 4, wherein, The first coordinate deviation value comprises a coordinate difference value of the first mapping mark and the third preset alignment mark in the X direction of the coordinate system, and a coordinate difference value of the first mapping mark and the third preset alignment mark in the Y direction of the coordinate system; the second coordinate deviation value comprises a coordinate difference value of the second mapping mark and the fourth preset alignment mark in the X direction of the coordinate system, and a coordinate difference value of the second mapping mark and the fourth preset alignment mark in the Y direction of the coordinate system; the included angle value between the mapping line and the second alignment line is calculated by using the following expression: wherein, is a coordinate difference value of the first mapping mark and the third preset alignment mark in the X direction of the coordinate system; is a coordinate difference value of the first mapping mark and the third preset alignment mark in the Y direction of the coordinate system; is a coordinate difference value of the first mapping mark and the third preset alignment mark in the Y direction of the coordinate system; is a coordinate difference value of the second mapping mark and the fourth preset alignment mark in the X direction of the coordinate system; is a coordinate difference value of the second mapping mark and the fourth preset alignment mark in the Y direction of the coordinate system.

6. The wafer alignment method of claim 4, wherein, The first coordinate deviation value and the second coordinate deviation value are obtained by using an image sensor.

7. The wafer alignment method of claim 4, wherein, The method comprises: controlling the first wafer to rotate relative to the second wafer by the included angle value so that the included angle value between the mapping line and the second alignment line is 0; controlling the first wafer to translate relative to the second wafer by the first coordinate deviation value so that the first mapping mark coincides with the third preset alignment mark.

8. The wafer alignment method of claim 7, wherein, The alignment operation between the first wafer and the second wafer based on the position deviation further includes: controlling the first wafer to translate relative to the second wafer by the second coordinate deviation value so that the second mapping mark coincides with the fourth preset alignment mark.

9. A wafer alignment apparatus comprising a first wafer and a second wafer to be aligned, characterized by, The first wafer and the second wafer are arranged in parallel; the device comprises: a first alignment line acquisition unit configured to acquire a line between the first preset alignment mark on the surface of the first wafer and the second preset alignment mark on the surface of the first wafer as a first alignment line; a second alignment line acquisition unit configured to acquire a line between the third preset alignment mark on the surface of the second wafer and the fourth preset alignment mark on the surface of the second wafer as a second alignment line; a mapping unit configured to map the first alignment line to a coordinate system in which the surface of the second wafer is located to obtain a mapping line; a position deviation acquisition unit configured to acquire a position deviation of the mapping line and the second alignment line in the coordinate system; The position deviation acquisition unit comprises: an included angle value acquisition unit configured to acquire an included angle value between the mapping line and the second alignment line in the coordinate system; a first mapping mark acquisition unit configured to acquire an end point of the mapping line corresponding to the first preset alignment mark in the coordinate system as a first mapping mark; a first coordinate deviation value acquisition unit configured to acquire a coordinate deviation value between the first mapping mark and the third preset alignment mark in the coordinate system as a first coordinate deviation value; a position deviation acquisition subunit configured to acquire the first coordinate deviation value and the included angle value between the mapping line and the second alignment line in the coordinate system as the position deviation of the mapping line and the second alignment line in the coordinate system; an alignment unit configured to perform an alignment operation between the first wafer and the second wafer based on the position deviation.

10. The wafer alignment apparatus of claim 9, wherein, The device further comprises: a cyclic execution unit configured to cyclically execute steps performed by the position deviation acquisition unit and the alignment unit until a cyclic execution number reaches a preset number threshold.

11. The wafer alignment apparatus of claim 9, wherein, The first preset alignment mark and the third preset alignment mark are to-be-aligned points, and the second preset alignment mark and the fourth preset alignment mark are to-be-aligned points.

12. The wafer alignment apparatus of claim 11, wherein, The included angle value acquisition unit comprises: a second mapping mark acquisition unit configured to acquire an end point of the mapping line corresponding to the second preset alignment mark in the coordinate system as a second mapping mark; a second coordinate deviation value acquisition unit configured to acquire a coordinate deviation value between the second mapping mark and the fourth preset alignment mark in the coordinate system as a second coordinate deviation value; The computing unit is configured to calculate an included angle value between the mapping line and the second alignment line based on the first coordinate deviation value and the second coordinate deviation value in the coordinate system.

13. The wafer alignment apparatus of claim 12, wherein, The first coordinate deviation value includes a coordinate difference value of the first mapping mark and the third preset alignment mark in an X direction in the coordinate system, and a coordinate difference value of the first mapping mark and the third preset alignment mark in a Y direction in the coordinate system; the second coordinate deviation value includes a coordinate difference value of the second mapping mark and the fourth preset alignment mark in the X direction in the coordinate system, and a coordinate difference value of the second mapping mark and the fourth preset alignment mark in the Y direction in the coordinate system; and the computing unit calculates the included angle value between the mapping line and the second alignment line by using the following expression: wherein, is an angle value between the mapping line and the second alignment line; is a coordinate difference value of the first mapping mark and the third preset alignment mark in the X direction of the coordinate system; is a coordinate difference value of the first mapping mark and the third preset alignment mark in the Y direction of the coordinate system; is a coordinate difference value of the second mapping mark and the fourth preset alignment mark in the X direction of the coordinate system; is a coordinate difference value of the second mapping mark and the fourth preset alignment mark in the Y direction of the coordinate system.

14. The wafer alignment apparatus of claim 12, wherein, The first coordinate deviation value and the second coordinate deviation value are obtained by using an image sensor.

15. The wafer alignment apparatus of claim 12, wherein, The alignment unit includes: A rotation control unit configured to control the first wafer to rotate relative to the second wafer by the included angle value, so that the included angle value between the mapping line and the second alignment line is 0; A translation control unit configured to control the first wafer to translate relative to the second wafer by the first coordinate deviation value, so that the first mapping mark coincides with the third preset alignment mark.

16. The wafer alignment apparatus of claim 15, wherein, The translation control unit is further configured to control the first wafer to translate relative to the second wafer by the second coordinate deviation value, so that the second mapping mark coincides with the fourth preset alignment mark.

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