Display device

Abstract

A display device includes a substrate including a main display area, a component area, and a peripheral area; a main pixel electrode at the main display area of the substrate; a main thin film transistor at the main display area of the substrate and electrically connected to the main pixel electrode; an auxiliary pixel electrode at the component area of the substrate; an auxiliary thin film transistor at the peripheral area of the substrate; and a connection wiring connected to the auxiliary pixel electrode and including a thin portion having a thickness smaller than a thickness of the auxiliary pixel electrode, wherein the connection wiring electrically connects the auxiliary thin film transistor to the auxiliary pixel electrode.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority and benefit to Korean Patent Application No. 10-2020-0149600, filed on November 10, 2020, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. Technical Field

[0003] Some aspects of embodiments of this disclosure relate to display devices. Background Technology

[0004] Display devices typically include a display device and electronic devices for controlling electrical signals applied to the display device. The electronic devices may include at least one thin-film transistor (TFT), at least one storage capacitor, and multiple wirings.

[0005] Recently, the applications of display devices have become more diverse. Furthermore, the thickness and weight of display devices are generally decreasing, and therefore, the potential range of applications for display devices is expanding. As the applications of display devices become more diverse, various methods are being explored to design the shape of display devices.

[0006] The information disclosed in this background section is only intended to enhance the understanding of the background art, and therefore, the information discussed in this background section does not necessarily constitute prior art. Summary of the Invention

[0007] Aspects of some embodiments of this disclosure relate to display devices, and, for example, to display devices that improve light transmittance in local areas.

[0008] Typical display devices do not have high light transmittance in certain areas.

[0009] In this respect, the present disclosure provides a display device that improves light transmittance in local areas. However, this is merely an example, and the scope of the present disclosure is not limited thereto.

[0010] Additional aspects will be set forth in part in the description which follows, and will be partially apparent from the description, or may be learned by practicing the embodiments provided in this disclosure.

[0011] According to some embodiments of this disclosure, a display device includes: a substrate including a main display area, a component area, and a peripheral area; a main pixel electrode located in the main display area of ​​the substrate; a main thin-film transistor located in the main display area of ​​the substrate and electrically connected to the main pixel electrode; an auxiliary pixel electrode located in the component area of ​​the substrate; an auxiliary thin-film transistor located in the peripheral area of ​​the substrate; and a connection wiring connected to the auxiliary pixel electrode and including a thin portion having a thickness less than that of the auxiliary pixel electrode, wherein the connection wiring electrically connects the auxiliary thin-film transistor to the auxiliary pixel electrode.

[0012] According to some embodiments, the thin portion of the connecting wiring and the auxiliary pixel electrode may comprise the same material.

[0013] According to some embodiments, the auxiliary pixel electrode may include multiple layers, and the thin portion of the connecting wiring and at least one layer of the multiple layers of the auxiliary pixel electrode may include the same material.

[0014] According to some embodiments, the auxiliary pixel electrode may include multiple layers, and the thin portion of the connecting wiring and one layer of the multiple layers of the auxiliary pixel electrode may include the same material.

[0015] According to some embodiments, the auxiliary pixel electrode may include multiple layers, and the thin portion of the connecting wiring is integrally formed with one layer of the multiple layers of the auxiliary pixel electrode as a single unit.

[0016] According to some embodiments, the auxiliary pixel electrode may include multiple layers, and the thin portion of the connecting wiring and the lowest layer of the multiple layers of the auxiliary pixel electrode are integrally formed as a single unit in the direction toward the substrate.

[0017] According to some embodiments, the etch rate of the bottommost layer of the auxiliary pixel electrode may be less than the etch rate of the layer of the auxiliary pixel electrode located on the bottommost layer.

[0018] According to some embodiments, the bottommost layer of the auxiliary pixel electrode may include ITO, IZO, AZO or GZO, and the layer of the auxiliary pixel electrode located on the bottommost layer of the auxiliary pixel electrode may include Ag or Al.

[0019] According to some embodiments, the bottommost layer of the auxiliary pixel electrode may include a transparent conductive material, and the layer of the auxiliary pixel electrode located on the bottommost layer of the auxiliary pixel electrode may include metal.

[0020] According to some embodiments, the bottommost layer of the auxiliary pixel electrode may include a conductive oxide, and the layer of the auxiliary pixel electrode located on the bottommost layer of the auxiliary pixel electrode may include a metal.

[0021] According to some embodiments, the thickness of the thin portion of the connecting wiring may be less than the thickness of the bottommost layer of the auxiliary pixel electrode.

[0022] According to some embodiments, the multilayer of the auxiliary pixel electrode may include: a bottom layer, an intermediate layer located on the bottom layer, and a top layer located on the intermediate layer, and the thickness of the bottom layer may be greater than the thickness of the top layer.

[0023] According to some embodiments, the thickness of the lowest layer is equal to or greater than 100 angstroms and less than or equal to 2000 angstroms.

[0024] According to some embodiments, the uppermost layer and the lowermost layer may comprise the same material.

[0025] According to some embodiments, the thin portion of the connection wiring may extend up to the upper portion of the auxiliary thin-film transistor.

[0026] According to some embodiments, the connection wiring may consist only of the thin portion.

[0027] Other aspects, features, and characteristics, in addition to those described above, will become more apparent from the specific embodiments, scope of claims, and drawings used to implement the disclosure below. Attached Figure Description

[0028] The above and other aspects, features, and characteristics of certain embodiments of the present disclosure will become more apparent from the following description taken in conjunction with the accompanying drawings, in which:

[0029] Figures 1A to 1C This is a perspective view schematically illustrating a display device according to some embodiments of the present disclosure;

[0030] Figure 2 This is a cross-sectional view schematically showing a portion of a display device according to some embodiments of the present disclosure;

[0031] Figure 3 It is an illustrative representation of what can be included Figure 1B A plan view of the display panel in the display device;

[0032] Figure 4 It can be included Figures 1A to 1C The equivalent circuit diagram of the pixel circuit in a display device;

[0033] Figure 5This is a schematic plan view of a partial area of ​​a display device according to some embodiments of the present disclosure;

[0034] Figure 6 It is shown schematically. Figure 5 A cross-sectional view of a part of the structure;

[0035] Figure 7 It is shown schematically. Figure 6 A cross-sectional view of part A;

[0036] Figures 8A to 8D This is a cross-sectional view schematically illustrating a part of the process for manufacturing the display device of this disclosure;

[0037] Figure 9 This is a schematic cross-sectional view of a portion of a display device according to some embodiments of the present disclosure;

[0038] Figure 10 This is a schematic cross-sectional view illustrating a portion of a display device according to some embodiments of the present disclosure; and

[0039] Figure 11 This is a schematic plan view of a partial area of ​​a display device according to some embodiments of the present disclosure. Detailed Implementation

[0040] Reference will now be made in detail to embodiments, examples of which are illustrated in the accompanying drawings, wherein the same reference numerals refer to the same elements throughout. In this respect, the embodiments may take different forms and should not be construed as limited to the description set forth herein. Therefore, the embodiments are described below only by reference to the accompanying drawings to explain various aspects of this specification. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. Throughout this disclosure, the expression “at least one of a, b, and c” means only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variations thereof.

[0041] One or more embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. Regardless of the reference numerals, the same or corresponding components are given the same reference numerals, and redundant descriptions are omitted.

[0042] It will be understood that when a layer, area, or component is referred to as being "formed" "on" another layer, area, or component, the layer, area, or component may be formed directly or indirectly on the other layer, area, or component. That is, for example, intermediate layers, areas, or components may exist. For ease of illustration, the dimensions of the elements in the figures may be exaggerated. In other words, since the dimensions and thicknesses of the components in the figures are arbitrarily shown for ease of illustration, the following embodiments are not limited thereto.

[0043] According to some embodiments, the x-axis, y-axis, and z-axis are not limited to the three axes of a Cartesian coordinate system, but can be interpreted in a general sense that includes the three axes. For example, the x-axis, y-axis, and z-axis can be perpendicular to each other, or they can represent different directions that are not perpendicular to each other.

[0044] Figures 1A to 1C This is a perspective view schematically illustrating display devices 1, 1' and 1" according to some embodiments of the present disclosure.

[0045] like Figure 1A As shown, display device 1 includes a display area DA and a peripheral area NDA located outside the display area DA. The display area DA includes a component area CA and a main display area MDA that at least partially surrounds the component area CA. The component area CA displays auxiliary images, and the main display area MDA displays the main image or primary image. According to some embodiments or examples, the component area CA and the main display area MDA may be configured to display images independently (e.g., separate and / or different images) or to display images jointly (e.g., as a single tightly coupled image or a single combined image, wherein the component area CA and the main display area MDA respectively display portions of the image). The peripheral area NDA may be a non-display area where no display device is disposed. The display area DA may be completely surrounded by the peripheral area NDA. The inclusion of the main display area MDA, component area CA, and peripheral area NDA in display device 1 can be understood as the substrate included in display device 1 including the main display area MDA, component area CA, and peripheral area NDA.

[0046] exist Figure 1A In this configuration, the main display area MDA is arranged or formed to surround at least a portion of a component area CA. In other words, at least one edge of the component area CA may match at least one edge of the main display area MDA. According to some embodiments, the display device 1 may include two or more component areas CA (i.e., multiple component areas CA), and the shapes and sizes of the multiple component areas CA may differ from each other. When viewed in a direction approximately perpendicular to the top surface of the display device 1, the component area CA may have any of a variety of shapes, such as circular, elliptical, and polygonal shapes, such as rectangular, star-shaped, or rhomboid.

[0047] exist Figure 1AIn the present invention, when viewed in a direction approximately perpendicular to the top surface of the display device 1 (e.g., when viewed in a plan view), the component region CA is arranged at the upper center (+y direction) of the main display area MDA, which has an approximately rectangular shape. However, the present disclosure is not limited thereto, and the component region CA may be arranged on one side of the rectangular main display area MDA, for example, the upper right or upper left side. For example, as Figure 1B As shown, the circular component area CA can be positioned within the main display area MDA, or as... Figure 1C As shown, the rectangular component area CA can be positioned on one side of the main display area MDA.

[0048] Display device 1 may include a plurality of main sub-pixels Pm arranged in the main display area MDA and a plurality of auxiliary sub-pixels Pa arranged in the component area CA.

[0049] Display device 1 may include component 40 (see...) Figure 2 ), component 40 is positioned on display panel 10 (see Figure 2 The electronic device corresponding to component area CA is shown below. Component 40 can be an electronic device that uses light or sound. For example, the electronic device can be: a sensor configured to measure distance, such as a proximity sensor; a sensor configured to identify a part of the user's body (such as a fingerprint, iris, or face); a small light configured to output light; or an image sensor (such as a camera) configured to capture images.

[0050] Electronic devices using light can use light of various wavelengths, such as visible light, infrared light, or ultraviolet light. Electronic devices using sound can use ultrasound or sound in another frequency band. According to some embodiments, component 40 may include sub-components, such as a light-emitting unit or a light-receiving unit. The light-emitting unit and the light-receiving unit may have an integral structure or a physically separate structure, and a pair of light-emitting units and light-receiving units may form a component 40. To improve the functionality of component 40, component region CA may include a transmission region TA through which light and / or sound (or other wireless spectrum) output from component 40 to the outside or traveling from the outside toward component 40 can be transmitted.

[0051] In a display device 1 according to some embodiments of the present disclosure, when light is transmitted through the component region CA, the transmittance may be about 10% or more, and more specifically, the transmittance may be 40% or more, 50% or more, 85% or more, or 90% or more.

[0052] Multiple auxiliary subpixels Pa can be arranged in the component region CA. These auxiliary subpixels Pa emit light to provide a specific image. The image displayed in the component region CA is an auxiliary image and may have a lower resolution than the image displayed in the main display region MDA. In other words, the component region CA includes a transmission region TA through which light and sound are transmitted, and when subpixels are not arranged in the transmission region TA, the number of auxiliary subpixels Pa that can be arranged per unit area can be less than the number of main subpixels Pm that can be arranged per unit area in the main display region MDA.

[0053] In the following description, an organic light-emitting display device will be used as an example of a display device 1 according to some embodiments of the present disclosure. However, the display device 1 of the present disclosure is not limited thereto. In other words, the display device 1 of the present disclosure may be an inorganic light-emitting display or an inorganic EL display (i.e., an inorganic electroluminescent display), or it may be a quantum dot light-emitting display. For example, the emitting layer of the display device included in the display device 1 may include organic or inorganic materials. Moreover, the display device 1 may include: quantum dots; organic materials and quantum dots; or inorganic materials and quantum dots.

[0054] Figure 2 This is a cross-sectional view schematically showing a portion of the cross-section of a display device 1 according to some embodiments of the present disclosure. Figure 2 As shown, the display device 1 may include a display panel 10 and a component 40 arranged to overlap with the display panel 10. The display device 1 may also include a cover window arranged above the display panel 10 to protect the display panel 10.

[0055] Display panel 10 includes a component area CA that overlaps with component 40 and a main display area MDA that displays the main image. Display panel 10 may include a substrate 100, a display layer DISL on substrate 100, a touch screen layer TSL, an optical functional layer OFL, and a panel protection member PB positioned below substrate 100. A buffer layer 111 may be provided between substrate 100 and display layer DISL.

[0056] The display layer DISL may include a pixel layer PCL, a display device layer EDL, and an encapsulation component ENCM. The pixel layer PCL may include thin-film transistors TFTm and TFTa (see...). Figure 6 The display device layer (EDL) may include light-emitting elements (EDm) and EDA, which serve as display devices. The encapsulation component (ENCM) may include a thin-film encapsulation layer (300) or an encapsulation substrate. According to some embodiments, the insulating layer (IL) may be positioned inside the display layer (DISL), etc.

[0057] The substrate 100 may include an insulating material, such as glass, quartz, or polymer resin. The substrate 100 may be a rigid substrate or a flexible substrate that can be bent, folded, or rolled.

[0058] The main light-emitting element EDm and the main pixel circuit PCm connected to the main light-emitting element EDm can be arranged in the main display area MDA of the display panel 10. The main pixel circuit PCm includes at least one main thin-film transistor TFTm and can be configured to control the operation of the main light-emitting element EDm. The main sub-pixel Pm may include the main light-emitting element EDm.

[0059] The auxiliary light-emitting element EDA can be arranged in the component area CA of the display panel 10. The auxiliary light-emitting element EDA is also connected to the auxiliary pixel circuit PCa (see...). Figure 3 Furthermore, the auxiliary pixel circuit PCa can be positioned in the peripheral region NDA (see...). Figure 3 The auxiliary pixel circuit PCa is located in the component region CA, not in the component region CA. The auxiliary pixel circuit PCa includes at least one thin-film transistor and can be configured to control the operation of the auxiliary light-emitting element EDA. The auxiliary sub-pixel Pa may include the auxiliary light-emitting element EDA.

[0060] Within the component area CA, the area where the auxiliary light-emitting element EDa is arranged can be defined as the auxiliary display area ADA, and the area where the auxiliary light-emitting element EDa is not arranged can be defined as the transmission area TA.

[0061] The transmission area TA can be the area through which light / signal emitted from the component area CA or incident on the component area CA is transmitted. The auxiliary display area ADA and the transmission area TA can be arranged alternately in the component area CA.

[0062] like Figure 2 As shown, the display device layer EDL can be covered by the thin-film encapsulation layer 300. For example, as... Figure 2 As shown, the thin-film encapsulation layer 300 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. Figure 2 In the process, the thin film encapsulation layer 300 includes a first inorganic encapsulation layer 310, a second inorganic encapsulation layer 330, and an organic encapsulation layer 320 located between the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330.

[0063] The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may each include one or more inorganic insulating materials, such as silicon oxide (SiO2) and silicon nitride (SiN). x ), silicon oxynitride (SiO) x N yAluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), and zinc oxide (ZnO) x Zinc oxide (ZnO) can be formed via chemical vapor deposition (CVD). x The encapsulation layer 310 can be ZnO or ZnO2. The materials of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 can be the same or different. The organic encapsulation layer 320 can include polymer-based materials. Polymer-based materials can include silicone-based resins, acrylic resins (e.g., polymethyl methacrylate or polyacrylic acid), epoxy resins, polyimide, or polyethylene. Each of the first inorganic encapsulation layer 310, the organic encapsulation layer 320, and the second inorganic encapsulation layer 330 can be integrally formed into a single unit to cover the main display area MDA and the component area CA.

[0064] However, this disclosure is not limited thereto, and the display panel 10 may include an encapsulation substrate positioned above the display device layer EDL. In this case, the encapsulation substrate may be arranged facing the substrate 100, with the display device layer EDL located between the encapsulation substrate and the substrate 100. A gap may exist between the encapsulation substrate and the display device layer EDL. The encapsulation substrate may include glass. A sealant formed from glass frit or the like may be formed between the substrate 100 and the encapsulation substrate, and the sealant may be disposed in the aforementioned peripheral region NDA. The sealant disposed in the peripheral region NDA may surround the display area DA and prevent or reduce the penetration of moisture or other contaminants from the side surfaces.

[0065] The Touch Screen Layer (TSL) can obtain coordinate information based on external input (e.g., touch events). The TSL may include touch electrodes and touch wiring connected to them. The TSL can detect external input via magnetocapacitance or mutual capacitance methods.

[0066] The touch screen layer (TSL) can be positioned on the thin-film encapsulation layer 300. Alternatively, the touch screen layer (TSL) can be formed separately on the touch substrate and then bonded to the thin-film encapsulation layer 300 via an adhesive layer, such as an optically clear adhesive (OCA). According to some embodiments, the touch screen layer (TSL) can be formed directly on the thin-film encapsulation layer 300, and in this case, no adhesive layer may be provided between the touch screen layer (TSL) and the thin-film encapsulation layer 300.

[0067] The optical functional layer OFL may include an anti-reflective layer. The anti-reflective layer reduces the reflectivity of light incident from the outside toward the display device 1 (external light). For example, the optical functional layer OFL may be a polarizing film. The optical functional layer OFL may include an opening OFL_OP corresponding to the transmission region TA. Therefore, the transmittance of the transmission region TA can be significantly improved. The opening OFL_OP may be filled with a transparent material, such as optically transparent resin (OCR). Alternatively, the optical functional layer OFL may be implemented as a filter plate including a black matrix and color filters.

[0068] A panel protection member PB can be attached below the substrate 100 to support and protect the substrate 100. The panel protection member PB may include an opening PB_OP corresponding to the component region CA. The panel protection member PB includes the opening PB_OP, and therefore can increase the light transmittance of the component region CA. The panel protection member PB may include polyethylene terephthalate or polyimide.

[0069] The area of ​​component region CA can be larger than the area occupied by component 40. Therefore, the area of ​​the opening PB_OP included in the panel protection member PB may not match the area of ​​component region CA. Figure 2 In the display panel 10, component 40 is spaced apart from the display panel 10 on one side (in the -z direction), but at least a portion of component 40 can be inserted into the opening PB_OP included in the panel protection member PB.

[0070] Furthermore, multiple components 40 can be arranged in the component area CA. In this case, the multiple components 40 can have different functions. For example, the multiple components 40 may include at least two of a camera (imaging device), a solar cell, a flash, a proximity sensor, an illumination sensor, and an iris sensor.

[0071] Figure 3 This is a schematic plan view of a display panel 10 that can be included in one of the aforementioned display devices 1, 1', and 1" . Specifically, Figure 3 This can be understood as schematically showing that it can be included Figure 1B A plan view of the display panel 10 in the display device 1'. (Refer to...) Figure 2 and Figure 3 Various components forming the display panel 10 are arranged above the substrate 100.

[0072] Multiple primary sub-pixels Pm are arranged in the main display area MDA. Each of the primary sub-pixels Pm can be made of an organic light-emitting diode (OLED) or similar material. Figure 4The display device is implemented in this way. A main pixel circuit PCm configured to drive the main sub-pixel Pm can be arranged in the main display area MDA and can overlap with the main sub-pixel Pm. Each of the main sub-pixels Pm can emit, for example, red, green, blue, or white light. The main display area MDA is covered by a sealing member to protect it from external air or moisture.

[0073] As described above, the component region CA can be positioned to one side of the main display region MDA, or it can be arranged inside the display region DA to be surrounded by the main display region MDA. Multiple auxiliary sub-pixels Pa are arranged within the component region CA. Each of the multiple auxiliary sub-pixels Pa can be made of, for example, an organic light-emitting diode (OLED) (see [link to OLED documentation]). Figure 4 The display device is implemented as follows. An auxiliary pixel circuit PCa, electrically connected to an auxiliary sub-pixel Pa located in the component region CA, can be arranged in the peripheral region NDA. Each of the auxiliary sub-pixels Pa can emit, for example, red, green, blue, or white light. The component region CA, together with the main display region MDA, can be covered by a sealing member to protect the component region CA and the main display region MDA from external air or moisture.

[0074] Thus, the auxiliary pixel circuit PCa, configured to drive multiple auxiliary sub-pixels Pa of the component region CA, can be arranged in the peripheral region NDA adjacent to the component region CA. Figure 3 As shown, when the component region CA is arranged above the display region DA (in the +y direction), the auxiliary pixel circuit PCa can be arranged in the upper peripheral region of the peripheral region NDA. The display device implementing the auxiliary pixel circuit PCa and the auxiliary sub-pixel Pa can be connected to a connection wiring TWL extending in one direction (e.g., the y direction). Figure 3 In this embodiment, the auxiliary pixel circuit PCa is positioned directly above the component region CA, but this disclosure is not limited thereto. Various modifications can be made; for example, the auxiliary pixel circuit PCa can be positioned to the left (-x direction) or right (+x direction) of the main display region MDA.

[0075] Furthermore, as described above, the component region CA may include a transmissive region TA. The transmissive region TA may be arranged around a plurality of auxiliary sub-pixels Pa. Alternatively, the transmissive region TA may be arranged in a grid pattern with the plurality of auxiliary sub-pixels Pa. Because the component region CA includes the transmissive region TA, the resolution of the component region CA may be lower than the resolution of the main display region MDA. For example, the resolution of the component region CA may be approximately 1 / 2, 3 / 8, 1 / 3, 1 / 4, 2 / 9, 1 / 8, 1 / 9, or 1 / 16 of the resolution of the main display region MDA. For example, the resolution of the main display region MDA may be approximately 400 ppi or higher, and the resolution of the component region CA may be approximately 200 ppi or 100 ppi.

[0076] The main pixel circuit PCm, configured to drive the main sub-pixel Pm, and the auxiliary pixel circuit PCa, configured to drive the auxiliary sub-pixel Pa, can be electrically connected to external circuitry arranged in the peripheral region NDA. The first scan drive circuit SDR1, the second scan drive circuit SDR2, the terminal portion PAD, the drive voltage supply line 11, and the common voltage supply line 13 can be arranged in the peripheral region NDA.

[0077] The first scan drive circuit SDR1 and the second scan drive circuit SDR2 can be arranged symmetrically based on the main display area MDA. The first scan drive circuit SDR1 and the second scan drive circuit SDR2 can apply scan signals via scan lines SL to the main pixel circuit PCm configured to drive the main sub-pixel Pm. Furthermore, the first scan drive circuit SDR1 and the second scan drive circuit SDR2 can apply emission control signals via emission control lines EL to each pixel circuit (e.g., the main pixel circuit PCm and the auxiliary pixel circuit PCa). A portion of the main pixel circuit PCm of the main sub-pixel Pm in the main display area MDA can be electrically connected to the first scan drive circuit SDR1, and the remaining portion of the main pixel circuit PCm of the main sub-pixel Pm in the main display area MDA can be electrically connected to the second scan drive circuit SDR2.

[0078] The terminal portion PAD can be disposed on one side of the substrate 100. The terminal portion PAD may not be covered by an insulating layer, but may be exposed to electrically connect to the display circuit board 30. The display driving unit 32 may be disposed in the display circuit board 30.

[0079] The display driving unit 32 can be configured to generate control signals that are transmitted to the first scan driving circuit SDR1 and the second scan driving circuit SDR2. The display driving unit 32 is configured to generate data signals, and the generated data signals can be transmitted to the main pixel circuit PCm via the fan-out wiring FW and the data line DL connected to the fan-out wiring FW.

[0080] Reference Figure 3 and Figure 4 The display driving unit 32 can be configured to supply a driving voltage ELVDD to the driving voltage supply line 11 and a common voltage ELVSS to the common voltage supply line 13. The driving voltage ELVDD is applied to the main pixel circuit PCm of the main sub-pixel Pm and the auxiliary pixel circuit PCa of the auxiliary sub-pixel Pa via the driving voltage line PL connected to the driving voltage supply line 11, and the common voltage ELVSS can be applied to the opposite electrode of the display device (e.g., the display device included in the main sub-pixel Pm or the display device included in the auxiliary sub-pixel Pa) via the common voltage supply line 13.

[0081] The drive voltage supply line 11 may extend in the x direction below the main display area MDA. The common voltage supply line 13 may partially surround the main display area MDA by having a shape that opens from one side of the ring shape.

[0082] exist Figure 3 The diagram shows a single component area CA, but the display panel 10 may include multiple component areas CA. In this case, the multiple component areas CA are spaced apart from each other, wherein a first camera can be arranged in one component area CA and a second camera can be arranged in another component area CA. Alternatively, a camera can be arranged in one component area CA and an infrared sensor can be arranged in another component area CA. The shapes and sizes of the multiple component areas CA may differ from each other.

[0083] Figure 4 It can be included Figure 1A Display devices 1 to Figure 1C The equivalent circuit diagram of the pixel circuit in display device 1". For example... Figure 4 As shown, the auxiliary sub-pixel Pa includes an auxiliary pixel circuit PCa and an organic light-emitting diode (OLED) connected to the auxiliary pixel circuit PCa as a display device. Also refer to... Figure 3 The principal sub-pixel Pm can also include... Figure 4 The auxiliary pixel circuit PCa shown is the same as / similar to the main pixel circuit PCm and the organic light-emitting diode (OLED) connected to the main pixel circuit PCm as a display device.

[0084] like Figure 4As shown, the auxiliary pixel circuit PCa includes a driving thin-film transistor T1, a switching thin-film transistor T2, and a storage capacitor Cst. The switching thin-film transistor T2 is connected to the auxiliary scan line SLa and the auxiliary data line DLa, and is configured to transmit a data signal Dm input via the auxiliary data line DLa to the driving thin-film transistor T1 according to the scan signal Sn input via the auxiliary scan line SLa. The storage capacitor Cst is connected to the switching thin-film transistor T2 and the auxiliary drive voltage line PLA, and is configured to store a voltage corresponding to the difference between the voltage received from the switching thin-film transistor T2 and the drive voltage ELVDD supplied to the auxiliary drive voltage line PLA.

[0085] A driving thin-film transistor T1 is connected to an auxiliary driving voltage line PLA and a storage capacitor Cst, and is configured to control the driving current flowing from the auxiliary driving voltage line PLA through the organic light-emitting diode (OLED) in response to the voltage value stored in the storage capacitor Cst. The OLED can emit light of a specific brightness according to the driving current.

[0086] exist Figure 4 In this embodiment, the auxiliary pixel circuit PCa includes two thin-film transistors and a storage capacitor, but embodiments of the present disclosure are not limited thereto. According to some embodiments, the auxiliary pixel circuit PCa may include seven thin-film transistors and a storage capacitor. According to some embodiments, the auxiliary pixel circuit PCa may include two or more storage capacitors.

[0087] Figure 5 This is a schematic plan view illustrating a partial area of ​​a display device according to some embodiments of the present disclosure. Specifically, Figure 5 The component area CA, a portion of the main display area MDA adjacent to the component area CA, and a portion of the peripheral area NDA are shown.

[0088] Reference Figure 5 Multiple main sub-pixels Pm can be arranged in the main display area MDA. Here, a sub-pixel is the smallest unit for realizing an image and represents the emission area that emits light through the display device. When an organic light-emitting diode (OLED) is used as the display device, the emission area can be defined by an opening in the pixel-defining layer, as described above. Each of the multiple main sub-pixels Pm can emit any one of red, green, blue, and white light.

[0089] The primary sub-pixel Pm arranged in the main display area MDA can include a first sub-pixel Pmr, a second sub-pixel Pmg, and a third sub-pixel Pmb. The first sub-pixel Pmr, the second sub-pixel Pmg, and the third sub-pixel Pmb can respectively represent red, green, and blue. The primary sub-pixel Pm can be arranged in a Pentile structure.

[0090] For example, a first sub-pixel Pmr can be positioned at the first and third vertices facing each other within the vertices of a virtual rectangle, wherein the center point of the second sub-pixel Pmg is the center point of the virtual rectangle, and a third sub-pixel Pmb can be positioned at the second and fourth vertices, which are the remaining vertices. According to some embodiments, the size (i.e., emission area) of the second sub-pixel Pmg can be smaller than the size (i.e., emission area) of the first sub-pixel Pmr and the third sub-pixel Pmb.

[0091] This pixel arrangement structure is called the Pentile matrix structure or Pentile structure, and by applying rendering that uses shared adjacent pixels to represent colors, high resolution can be achieved with a small number of pixels.

[0092] exist Figure 5 In this embodiment, multiple principal sub-pixels Pm are arranged in a Pentile matrix structure, but this disclosure is not limited thereto. For example, multiple principal sub-pixels Pm can be arranged in various structures, such as stripe structures, mosaic arrangements, and triangular arrangements.

[0093] Reference Figure 3 In the main display area MDA, the main pixel circuit PCm can overlap with the main sub-pixel Pm, and the main pixel circuit PCm can be arranged in a matrix along the x and y directions. In the present specification, the main pixel circuit PCm can represent a unit of pixel circuit that implements a main sub-pixel Pm.

[0094] Multiple auxiliary sub-pixels Pa can be arranged in the component region CA. Each of the multiple auxiliary sub-pixels Pa can emit any one of red, green, blue, and white light. The auxiliary sub-pixels Pa can include a first sub-pixel Par, a second sub-pixel Pag, and a third sub-pixel Pab that present different colors. The first sub-pixel Par, the second sub-pixel Pag, and the third sub-pixel Pab can respectively realize red, green, and blue.

[0095] The number of auxiliary subpixels Pa per unit area arranged in the component region CA can be less than the number of primary subpixels Pm per unit area arranged in the main display region MDA. For example, the ratio of the number of auxiliary subpixels Pa per unit area to the number of primary subpixels Pm per unit area can be 1:2, 1:4, 1:8, or 1:9. In other words, the resolution of the component region CA can be 1 / 2, 1 / 4, 1 / 8, or 1 / 9 of the resolution of the main display region MDA. Figure 5 In this context, the resolution of the component region CA is 1 / 8.

[0096] The auxiliary subpixels Pa arranged in the component region CA can be arranged in various shapes. Some auxiliary subpixels Pa can be clustered to form pixel groups, and can be arranged in various structures within the pixel groups, such as pentile structures, stripe structures, mosaic arrangements, and triangular arrangements. Here, the distance between the auxiliary subpixels Pa arranged in the pixel group can be the same as the distance between the main subpixels Pm.

[0097] Alternatively, such as Figure 5 As shown, auxiliary sub-pixels Pa can be distributed within the component region CA. In other words, the distance between auxiliary sub-pixels Pa can be greater than the distance between main sub-pixels Pm. Meanwhile, as mentioned above, the area of ​​component region CA where no auxiliary sub-pixels Pa are arranged can be referred to as a transmission region TA with high light transmittance.

[0098] The auxiliary pixel circuit PCa that enables the emission of the auxiliary sub-pixel Pa can be arranged in the peripheral region NDA. The auxiliary pixel circuit PCa is not arranged in the component region CA, and therefore it can be ensured that the transmission region TA is larger than the auxiliary sub-pixel Pa (i.e., it can be ensured that the area of ​​the transmission region TA is larger than the area occupied by the auxiliary sub-pixel Pa).

[0099] The auxiliary pixel circuit PCa can be connected to the auxiliary sub-pixel Pa via the connecting wiring TWL. Therefore, as the length of the connecting wiring TWL increases, RC delay may occur, and thus, the auxiliary pixel circuit PCa can be arranged taking into account the length of the connecting wiring TWL.

[0100] According to some embodiments, the auxiliary pixel circuit PCa can be arranged on an extension line connecting the auxiliary sub-pixels Pa arranged along the y-direction. Furthermore, the number of auxiliary pixel circuits PCa along the y-direction can be the same as the number of auxiliary sub-pixels Pa arranged along the y-direction. For example, as... Figure 5 As shown, when two auxiliary sub-pixels Pa are arranged along the y-direction in the component region CA, two auxiliary pixel circuits PCa can be arranged along the y-direction in the upper peripheral region of the peripheral region NDA.

[0101] The connecting wiring TWL can extend in the y-direction to connect the auxiliary sub-pixel Pa to the auxiliary pixel circuit PCa. When the connecting wiring TWL is connected to the auxiliary sub-pixel Pa, the connecting wiring TWL can be electrically connected to the pixel circuit of the display device that implements the auxiliary sub-pixel Pa.

[0102] The scan line SL may include a main scan line SLm connected to the main pixel circuit PCm and an auxiliary scan line SLa connected to the auxiliary pixel circuit PCa. The main scan line SLm may extend in the x-direction to connect to the main pixel circuit PCm arranged in the same row. The main scan line SLm may not be arranged in the component region CA. In other words, the main scan line SLm may be disconnected in the component region CA between the left and right sides of the component region CA. In this case, the main scan line SLm arranged on the left side of the component region CA can receive signals from... Figure 3 The first scan drive circuit SDR1 receives the signal, and the main scan line SLm, located to the right of component area CA, can receive the signal from... Figure 3 The signal of the second scan drive circuit SDR2.

[0103] The auxiliary scan line SLa can extend in the x-direction to connect to the auxiliary pixel circuit PCa arranged in the same row. The auxiliary scan line SLa can be arranged in the upper peripheral region of the peripheral region NDA.

[0104] The main scan line SLm and the auxiliary scan line SLa are connected via a scan connection line SWL, and therefore, the same signal can be applied to the main pixel circuit PCm and the auxiliary pixel circuit PCa, which are configured to drive the main sub-pixel Pm and the auxiliary sub-pixel Pa arranged in the same row, respectively. The scan connection line SWL can be arranged on a different layer from the main scan line SLm and the auxiliary scan line SLa, and can be connected to each of the main scan line SLm and the auxiliary scan line SLa via contact holes. The scan connection line SWL can be arranged in the upper peripheral region of the peripheral region NDA.

[0105] The data line DL may include a main data line DLm connected to the main pixel circuit PCm and an auxiliary data line DLa connected to the auxiliary pixel circuit PCa. The main data line DLm may extend in the y-direction to connect to the main pixel circuit PCm arranged in the same column. The auxiliary data line DLa may extend in the y-direction to connect to the auxiliary pixel circuit PCa arranged in the same column.

[0106] The main data line DLm and the auxiliary data line DLa can be spaced apart from each other, with the component area CA located between them. The main data line DLm and the auxiliary data line DLa can be connected to the data connection line DWL, and the same signal can be applied to the main pixel circuit PCm and the auxiliary pixel circuit PCa. The main pixel circuit PCm and the auxiliary pixel circuit PCa are configured to drive the main sub-pixel Pm and the auxiliary sub-pixel Pa, respectively, arranged in the same column.

[0107] Data connection lines (DWLs) can be arranged to bypass component areas (CAs). According to some embodiments, the data connection lines (DWLs) can overlap with the main pixel circuitry (PCm) arranged in the main display area (MDA). When the data connection lines (DWLs) are arranged in the main display area (MDA), it is not required to ensure dedicated space for the data connection lines (DWLs), and therefore the area of ​​dead space can be reduced.

[0108] According to some embodiments, the data connection line (DWL) can be arranged in the intermediate area between the main display area (MDA) and the component area (CA).

[0109] The data connection line DWL can be arranged in a different layer from the main data line DLm and the auxiliary data line DLa, and can be connected to each of the main data line DLm and the auxiliary data line DLa via contact holes.

[0110] Figure 6 It is shown schematically. Figure 5 A cross-sectional view of a part of the structure. Figure 6 This shows a portion of the component region CA and a portion of the peripheral region NDA. Figure 7 It is shown schematically. Figure 6 A cross-sectional view of part A.

[0111] The substrate 100 may include various materials, and such as Figure 6 As shown, the substrate 100 may include a multilayer structure. For example, the substrate 100 may include a first substrate layer 101, a first inorganic layer 102, a second substrate layer 103, and a second inorganic layer 104 stacked sequentially.

[0112] The first substrate layer 101 and the second substrate layer 103 may each comprise a polymer resin. The polymer resin may include: polyethersulfone, polyarylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyimide, polycarbonate, cellulose triacetate, or cellulose acetate propionate. The polymer resin may be transparent.

[0113] The first inorganic layer 102 and the second inorganic layer 104 may be barrier layers to prevent or reduce the infiltration of foreign impurities. Each of the first inorganic layer 102 and the second inorganic layer 104 may be a single layer or multiple layers of inorganic materials including silicon nitride, silicon oxynitride and / or silicon oxide.

[0114] The buffer layer 111 can reduce or prevent the infiltration of foreign matter, moisture, or ambient air from the bottom of the substrate 100, and can planarize the top surface of the substrate 100. The buffer layer 111 may include an inorganic insulating material, such as silicon oxide, silicon oxynitride, or silicon nitride, and the buffer layer 111 may have a single-layer or multi-layer structure including such material.

[0115] The auxiliary pixel circuit PCa, including the auxiliary thin-film transistor TFTa and the storage capacitor Cst, located in the peripheral region NDA, can be positioned above the buffer layer 111. See also... Figure 3 According to some embodiments, the main pixel circuit PCm can be arranged in the main display area MDA. The main pixel circuit PCm of the main display area MDA and the auxiliary pixel circuit PCa of the peripheral area NDA can have the same structure.

[0116] The rear metal layer BML can be positioned between the substrate 100 and the auxiliary light-emitting element EDa disposed in the component region CA. For example, in the component region CA, the rear metal layer BML can be positioned between the substrate 100 and the insulating layer IL. The rear metal layer BML can prevent light emitted from or transmitted toward the component 40 from diffracting through the narrow gaps between the wirings in the component region CA, or the rear metal layer BML can reduce the degree of diffraction of light emitted from or transmitted toward the component 40. The rear metal layer BML is not present in the transmission region TA. For example, the rear metal layer BML may include an opening portion BMLA corresponding to the transmission region TA. In other words, the opening portion BMLA of the rear metal layer BML can define the transmission region TA of the component region CA.

[0117] When needed, the rear metal layer BML can be positioned within the main display area MDA to improve the performance of the main thin-film transistor TFTm of the main pixel circuit PCm. In this case, the rear metal layer BML is positioned below the main semiconductor layer of the main thin-film transistor TFTm.

[0118] The auxiliary thin-film transistor TFTa of the auxiliary pixel circuit PCa located in the peripheral region NDA may include an auxiliary semiconductor layer A1a, an auxiliary gate electrode G1a overlapping the channel region of the auxiliary semiconductor layer A1a, and a source electrode S1a and a drain electrode D1a respectively connected to the source region and drain region of the auxiliary semiconductor layer A1a. A gate insulating layer 112 may be provided between the auxiliary semiconductor layer A1a and the auxiliary gate electrode G1a, and a first interlayer insulating layer 113 and a second interlayer insulating layer 115 may be provided between the auxiliary gate electrode G1a and the source electrode S1a and / or between the auxiliary gate electrode G1a and the drain electrode D1a.

[0119] The storage capacitor Cst may overlap with the thin-film transistor. The storage capacitor Cst may include a first capacitor plate CE1 and a second capacitor plate CE2 that overlap each other. According to some embodiments, the auxiliary gate electrode G1a of the auxiliary thin-film transistor TFTa and the first capacitor plate CE1 of the storage capacitor Cst may be integrally formed as a single unit. A first interlayer insulating layer 113 may be present between the first capacitor plate CE1 and the second capacitor plate CE2.

[0120] The auxiliary semiconductor layer A1a may include polycrystalline silicon. According to some embodiments, the auxiliary semiconductor layer A1a may include amorphous silicon. According to some embodiments, the auxiliary semiconductor layer A1a may include an oxide of at least one material selected from the group consisting of indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), chromium (Cr), titanium (Ti), and zinc (Zn). The auxiliary semiconductor layer A1a may include a channel region and impurity-doped source and drain regions.

[0121] The gate insulating layer 112 may include an inorganic insulating material, such as silicon oxide, silicon oxynitride, or silicon nitride, and the gate insulating layer 112 may have a single-layer or multi-layer structure including such material.

[0122] The auxiliary gate electrode G1a may comprise a low-resistivity conductive material such as molybdenum (Mo), aluminum (Al), copper (Cu), and / or titanium (Ti), and may have a single-layer or multi-layer structure comprising such material. For example, the auxiliary gate electrode G1a may have a three-layer structure of molybdenum layer / aluminum layer / molybdenum layer.

[0123] The first interlayer insulation layer 113 may include an inorganic insulating material, such as silicon oxide, silicon oxynitride, or silicon nitride, and the first interlayer insulation layer 113 may have a single-layer or multi-layer structure including such material.

[0124] The second capacitor plate CE2 may include aluminum (Al), platinum (P), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and / or copper (Cu), and may have a single-layer or multi-layer structure including such materials.

[0125] The second interlayer insulation layer 115 may include an inorganic insulating material, such as silicon oxide, silicon oxynitride, or silicon nitride, and the second interlayer insulation layer 115 may have a single-layer or multi-layer structure including such material.

[0126] The source electrode S1a or drain electrode D1a may comprise aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and / or copper (Cu), and may have a single-layer or multi-layer structure comprising such materials. For example, the source electrode S1a or drain electrode D1a may have a three-layer structure of titanium layer / aluminum layer / titanium layer.

[0127] The auxiliary pixel circuit PCa, including the auxiliary thin-film transistor TFTa and the storage capacitor Cst, can be electrically connected to the auxiliary pixel electrode 221a located in the component region CA. For example, as... Figure 6 As shown, the auxiliary pixel circuit PCa and the auxiliary pixel electrode 221a can be electrically connected via a connection wiring TWL. In an embodiment, as... Figure 6 As shown, the connection wiring TWL can electrically connect the auxiliary thin-film transistor TFTa to the auxiliary pixel electrode 221a. Figure 6 In the present invention, the connecting wiring TWL electrically connects the auxiliary pixel electrode 221a and the source electrode S1a of the auxiliary pixel circuit PCa, but this disclosure is not limited thereto. Various modifications can be made; for example, the connecting wiring TWL can electrically connect the auxiliary pixel electrode 221a and the drain electrode D1a of the auxiliary pixel circuit PCa.

[0128] The first planarization layer 117 covering the auxiliary thin-film transistor TFTa may include an organic insulating material. The first planarization layer 117 may include an organic insulating material such as acrylic resin, benzocyclobutene (BCB), polyimide, or hexamethyldisiloxane (HMDSO). The organic insulating material of the first planarization layer 117 may be a photosensitive organic insulating material.

[0129] The second planarization layer 118, located on the first planarization layer 117, may include an organic insulating material. The second planarization layer 118 may include organic insulating materials such as acrylic resin, benzocyclobutene (BCB), polyimide, or hexamethyldisiloxane (HMDSO). The organic insulating material of the second planarization layer 118 may be a photosensitive organic insulating material. When needed, wiring can be positioned between the first planarization layer 117 and the second planarization layer 118.

[0130] The auxiliary pixel electrode 221a can be positioned on the second planarization layer 118. The auxiliary pixel electrode 221a can be electrically connected to the auxiliary thin-film transistor TFTa via the connection wiring TWL.

[0131] The auxiliary pixel electrode 221a may include a reflective layer comprising silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or compounds thereof. The auxiliary pixel electrode 221a may include a reflective layer comprising such a material and a transparent conductive layer located above and / or below the reflective layer. The transparent conductive layer may include indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In₂O₃), indium gallium oxide (IGO), or aluminum zinc oxide (AZO).

[0132] According to some embodiments, the auxiliary pixel electrode 221a may have a three-layer structure of sequentially stacked ITO layers / Ag layers / ITO layers. In this case, the uppermost ITO layer can reduce the energy level difference between the auxiliary pixel electrode 221a and the first functional layer 222a, the middle Ag layer can enable the auxiliary pixel electrode 221a to operate as a reflective electrode, and the lowermost ITO layer can prevent the Ag in the middle layer from diffusing below it, or reduce the diffusion of Ag in the middle layer.

[0133] The auxiliary pixel electrode 221a located in the component region CA and the auxiliary pixel circuit PCa located in the peripheral region NDA have been described above, and the same description can be applied to the auxiliary pixel circuit located in the main display region MDA (see [link to documentation]). Figure 3 The main pixel electrode and main pixel circuit PCm in ) (see Figure 3 In other words, the main thin-film transistor TFTm of the main pixel circuit PCm located in the main display area MDA can have the same / similar structure as the auxiliary thin-film transistor TFTa of the auxiliary pixel circuit PCa located in the peripheral area NDA, and the main pixel electrode located in the main display area MDA can have the same / similar structure as the auxiliary pixel electrode 221a of the component area CA. However, the main pixel electrode can be located above the main pixel circuit PCm to be electrically connected to the main pixel circuit PCm located below the main pixel electrode.

[0134] A pixel defining layer 119 may be positioned on the main pixel electrode and the auxiliary pixel electrode 221a. The pixel defining layer 119 covers the edges of the main pixel electrode and the auxiliary pixel electrode 221a, and may include an opening 119OP overlapping the central portion of each of the main pixel electrode and the auxiliary pixel electrode 221a. The pixel defining layer 119 may comprise an organic insulating material, such as polyimide, polyamide, acrylic resin, benzocyclobutene, HMDSO, or phenolic resin.

[0135] The first functional layer 222a and the second functional layer 222c are positioned on the pixel defining layer 119, the main pixel electrode, and the auxiliary pixel electrode 221a. Each of the first functional layer 222a and the second functional layer 222c can be integrally formed into a single unit to completely cover the main display area MDA and the component area CA.

[0136] The first functional layer 222a can be a single layer or multiple layers. For example, when the first functional layer 222a is formed of a polymer material, it is a hole transport layer (HTL) with a single-layer structure and may include poly(3,4)-ethylene-dihydroxythiophene (PEDOT) or polyaniline. When the first functional layer 222a is formed of a low molecular weight material, it may include a hole injection layer (HIL) and an HTL.

[0137] The second functional layer 222c may be optional. For example, when the first functional layer 222a is formed of a polymer material, the second functional layer 222c may be positioned above the first functional layer 222a. The second functional layer 222c may be a single layer or multiple layers. The second functional layer 222c may include an electron transport layer (ETL) and / or an electron injection layer (EIL).

[0138] The main emitting layer or auxiliary emitting layer 222ab may be positioned on the first functional layer 222a, or positioned between the first functional layer 222a and the second functional layer 222c. The main emitting layer may have a shape patterned to correspond to the main pixel electrode, and the auxiliary emitting layer 222ab may have a shape patterned to correspond to the auxiliary pixel electrode 221a. The main emitting layer and the auxiliary emitting layer 222ab may comprise organic materials. The main emitting layer and the auxiliary emitting layer 222ab may comprise polymeric organic materials or low molecular weight organic materials that emit light of a specific color.

[0139] An auxiliary relative electrode 223a, overlapping with the auxiliary pixel electrode 221a, is positioned on the auxiliary emitter layer 222ab, and a main relative electrode, overlapping with the main pixel electrode, is positioned on the main emitter layer. Each of the auxiliary relative electrode 223a and the main relative electrode can be integrally formed as a single unit. The auxiliary relative electrode 223a and the main relative electrode can comprise conductive materials having a relatively low work function. For example, the auxiliary relative electrode 223a and the main relative electrode can comprise a (semi-)transparent layer comprising Ag, Mg, Al, Ni, Cr, Li, Ca, or alloys thereof. On the (semi-)transparent layer comprising such a material, each of the auxiliary relative electrode 223a and the main relative electrode can also comprise a layer comprising ITO, IZO, ZnO, or In2O3. According to some embodiments, each of the auxiliary relative electrode 223a and the main relative electrode can comprise Ag and Mg.

[0140] The sequentially stacked auxiliary pixel electrode 221a, auxiliary emission layer 222ab, and auxiliary counter electrode 223a can form a light-emitting diode, such as an organic light-emitting diode (OLED). Figure 4 The stacked structure of the main pixel electrode, the main emitting layer, and the main opposing electrode can also form a light-emitting diode, such as an organic light-emitting diode (OLED). An OLED can emit red, green, or blue light, and the emitting region of each OLED can correspond to a pixel. For example, a main sub-pixel Pm corresponds to the emitting region of an OLED arranged in the main display area MDA, and an auxiliary sub-pixel Pa corresponds to the emitting region of an OLED arranged in the component area CA. Since the opening 119OP of the pixel defining layer 119 defines the size and / or width of the emitting region, the size and / or width of the main sub-pixel Pm and the size and / or width of the auxiliary sub-pixel Pa can each depend on the opening 119OP of the corresponding pixel defining layer 119.

[0141] As described above, an organic light-emitting diode (OLED) can be covered by a first inorganic encapsulation layer 310, a second inorganic encapsulation layer 330, and an organic encapsulation layer 320 located between the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330. A capping layer 250 comprising organic material can be located between the auxiliary electrode 223a and the thin-film encapsulation layer 300 and / or between the main electrode and the thin-film encapsulation layer 300. The capping layer 250 can protect the auxiliary electrode 223a and / or the main electrode and can improve light extraction efficiency. The capping layer 250 can include an organic material having a refractive index higher than that of the auxiliary electrode 223a and / or the main electrode. Alternatively, the capping layer 250 can include layers having different refractive indices from each other. For example, the capping layer 250 can include a high-refractive-index layer, a low-refractive-index layer, and a high-refractive-index layer stacked sequentially. In this case, the refractive index of the high-refractive-index layer can be equal to or greater than 1.7, and the refractive index of the low-refractive-index layer can be equal to or less than 1.3.

[0142] refer to Figure 6 The insulating layer on the substrate 100, located in the transmission region TA, may each include a hole formed in the transmission region TA. For example, as Figure 6 As shown, the gate insulating layer 112, the first interlayer insulating layer 113, the second interlayer insulating layer 115, the first planarization layer 117, the second planarization layer 118, and the pixel defining layer 119 may each include a first hole H1 to a sixth hole H6 that overlap each other and are positioned in the transmission region TA. In this case, the first functional layer 222a may be positioned on the buffer layer 111.

[0143] The first functional layer 222a and the second functional layer 222c can cover the transmission region TA. On the other hand, the auxiliary opposite electrode 223a can include an opening 223aH formed in the transmission region TA to improve the transmittance in the transmission region TA. The opening 223aH of the auxiliary opposite electrode 223a can correspond to the opening portion BMLA of the rear metal layer BML.

[0144] The opening 223aH of the auxiliary relative electrode 223a can be formed by irradiating a laser beam. In other words, the auxiliary relative electrode 223a can be formed to cover the transmission region TA, and then a laser beam can be irradiated on the portion of the auxiliary relative electrode 223a corresponding to the transmission region TA to remove said portion, thereby forming the opening 223aH of the auxiliary relative electrode 223a. In such a process, by irradiating the back metal layer BML through the substrate 100, the laser beam can irradiate the portion of the auxiliary relative electrode 223a corresponding to the opening portion BMLA of the back metal layer BML, and thus the opening 223aH of the auxiliary relative electrode 223a can be formed. Furthermore, while irradiating the laser beam, the back metal layer BML can shield the laser beam, thereby effectively preventing damage to the OLED positioned on the back metal layer BML by the laser beam or reducing the damage to the OLED. In this respect, the back metal layer BML can be referred to as a shielding layer.

[0145] When a laser beam is irradiated onto the opening portion BMLA of the rear metal layer BML, the width of the laser beam may slightly increase due to diffraction, etc., as the laser beam penetrates the opening portion BMLA of the rear metal layer BML. Therefore, when viewed in a direction perpendicular to the substrate 100, as... Figure 6 As shown, the area of ​​the transmission region TA' defined by each of the openings 223aH of the auxiliary counter electrode 223a may be slightly wider than the area of ​​the transmission region TA defined by the corresponding opening portion BMLA of the rear metal layer BML. In some cases, the area of ​​the transmission region TA' defined by each of the openings 223aH of the auxiliary counter electrode 223a may be the same as the area of ​​the transmission region TA defined by the corresponding opening portion BMLA of the rear metal layer BML.

[0146] While the laser beam is being irradiated, the portion of the auxiliary electrode 223a that has already been irradiated is removed, but the portion of the rear metal layer BML that has already been irradiated should not be removed. Therefore, the melting point of the material contained in the rear metal layer BML, which serves as a shielding layer, needs to be higher than the melting point of the material contained in the auxiliary electrode 223a. For example, the rear metal layer BML may include Mo, Cu, and / or Ti. The rear metal layer BML can be formed by selecting a material from these materials that has a melting point higher than that of the material contained in the auxiliary electrode 223a.

[0147] As described above, the auxiliary pixel electrode 221a, located in the component region CA, is electrically connected via a connection wiring TWL to the auxiliary thin-film transistor TFTa, located in the peripheral region NDA. The connection wiring TWL includes a detail connected to the auxiliary pixel electrode 221a and has a thickness thinner than that of the auxiliary pixel electrode 221a. In the following description, reference will be made to... Figures 8A to 8D A method for forming auxiliary pixel electrode 221a and connecting wiring TWL is described.

[0148] First, such as Figure 6 and Figure 8A As shown, a bottom layer 221a3', an intermediate layer 221a2', and an upper layer 221a1' are formed on the substrate 100 in the -z direction, approximately corresponding to the entire surface of the substrate 100. Then, a first photoresist PR1 and a second photoresist PR2 are formed on the upper layer 221a1'. Here, the first photoresist PR1 and the second photoresist PR2 cover the portion where the main pixel electrode, the auxiliary pixel electrode 221a, and the connecting wiring TWL will be located. Specifically, the first photoresist PR1, which is larger than (i.e., thicker than) the second photoresist PR2 (e.g., larger in size or thickness than the second photoresist PR2), is positioned on the upper layer 221a1' to correspond to the portion where the main pixel electrode and the auxiliary pixel electrode 221a will be formed. A second photoresist PR2, which is smaller (i.e. thinner) than the first photoresist PR1, is positioned on the uppermost layer 221a1' to correspond to the portion where the connecting wiring TWL will be formed.

[0149] First photoresist PR1 and second photoresist PR2 with different thicknesses can be formed simultaneously (or concurrently). For example, by forming a photoresist material on the uppermost layer 221a1', irradiating the area where the first photoresist PR1 and second photoresist PR2 will be formed with light of different intensities using a halftone mask, and then developing and removing parts of the photoresist material, first photoresist PR1 and second photoresist PR2 with different thicknesses can be formed simultaneously (or concurrently).

[0150] When etching is performed in this state using methods such as wet etching, such as Figure 8B As shown, portions of the bottommost layer 221a3', the middle layer 221a2', and the topmost layer 221a1' that were not covered by the first photoresist PR1 or the second photoresist PR2 were removed. Furthermore, as... Figure 8C As shown, a second photoresist PR2 with a thin thickness can be removed using a conventional photoresist removal method. In this process, a portion of the first photoresist PR1 is also removed. However, unlike the second photoresist PR2, the first photoresist PR1 is sufficiently thick, and therefore, even if the thickness of the first photoresist PR1 is reduced, as... Figure 8C As shown, the first photoresist PR1 is still positioned on the topmost layer 221a1' to correspond to the portion where the main pixel electrode and the auxiliary pixel electrode 221a will be formed.

[0151] exist Figure 8C In the state shown, by performing an etching process such as wet etching, the uppermost layer 221a1' and the middle layer 221a2' not covered by the first photoresist PR1 are removed, while the lowermost layer 221a3' is retained, thereby achieving the desired effect. Figure 8D As shown, auxiliary pixel electrodes 221a, including the bottom layer 221a3, the middle layer 221a2 and the top layer 221a1, main pixel electrodes with the same structure and connecting wiring TWL are formed simultaneously (or concurrently).

[0152] Here, by utilizing the etch rate difference between the intermediate layer 221a2' and the bottommost layer 221a3', it is possible to perform... Figure 8CThe illustrated state involves a process such as wet etching to remove the topmost layer 221a1' and the intermediate layer 221a2' not covered by the first photoresist PR1, leaving the bottommost layer 221a3'. In other words, by setting the etching rate of the bottommost layer 221a3' to be lower than the etching rate of the intermediate layer 221a2' positioned on the bottommost layer 221a3', and ending the etching process after etching and removing the intermediate layer 221a2' with a high etching rate but before completely etching the bottommost layer 221a3' with a low etching rate, the topmost layer 221a1' and the intermediate layer 221a2' not covered by the first photoresist PR1 can be removed, while the bottommost layer 221a3' can be retained. According to some embodiments, the topmost layer 221a1' not covered by the first photoresist PR1 can be etched before etching the intermediate layer 221a2'.

[0153] Thus, since the main pixel electrode, auxiliary pixel electrode 221a and the connecting wiring TWL are formed simultaneously (or concurrently) through the same process, the manufacturing efficiency of the display device can be significantly improved.

[0154] Depend on Figure 8D The portion indicated by the connection wiring TWL in the diagram can be the thin portion described above. The thin portion of the connection wiring TWL is connected to the auxiliary pixel electrode 221a and has a thickness less than that of the auxiliary pixel electrode 221a. Furthermore, as described above, when forming the thin portion of the connection wiring TWL, the thin portion of the connection wiring TWL and the auxiliary pixel electrode 221a can comprise the same material. For example, at least one layer of the multilayer of the connection wiring TWL and the auxiliary pixel electrode 221a can comprise the same material. (Referring to...) Figures 8A to 8D In the described embodiment, the thin portion of the connection wiring TWL and the bottommost layer 221a3, which is one of the multilayers of the auxiliary pixel electrode 221a, comprise the same material. For example, the thin portion of the connection wiring TWL and one layer of the multilayers of the auxiliary pixel electrode 221a can be integrally formed into a single unit. Furthermore, as... Figure 8D As shown, the connecting wiring TWL and the bottommost layer 221a3, which is one of the multilayers serving as auxiliary pixel electrodes 221a, can be integrally formed into a single unit. For example, specifically, as Figure 6 and Figure 8D As shown, the thin portion of the connecting wiring TWL and the lowermost layer 221a3 of the multilayer auxiliary pixel electrode 221a in the direction toward the substrate 100 can be integrally formed into a single unit.

[0155] Also refer to Figure 6The interconnect wiring TWL may include a transparent conductive material, such that the area of ​​the transmission region TA is maximized within the component region CA. In other words, the bottommost layer 221a3 may include a transparent conductive material. The intermediate layer 221a2 located on the bottommost layer 221a3 may include a metal, such as a reflective metal, making the auxiliary pixel electrode 221a a reflective electrode. Meanwhile, as described above, the etching rate of the bottommost layer 221a3 needs to be lower than the etching rate of the intermediate layer 221a2. In other words, the etching rate of the bottommost layer 221a3 of the auxiliary pixel electrode 221a can be lower than the etching rate of the intermediate layer 221a2 of the auxiliary pixel electrode 221a, which is located on the bottommost layer 221a3. In this respect, the bottommost layer 221a3 may include a conductive oxide, and the intermediate layer 221a2 located on the bottommost layer 221a3 may include Ag or Al. The conductive oxide may be ITO, IZO, AZO, or GZO.

[0156] Since the uppermost layer 221a1 of the auxiliary pixel electrode 221a contacts the first functional layer 222a, such as a hole injection layer or a hole transport layer, the uppermost layer 221a1 and the lowermost layer 221a3 of the auxiliary pixel electrode 221a can comprise the same material, taking into account the energy levels of the auxiliary pixel electrode 221a and the first functional layer 222a. For example, like the lowermost layer 221a3, the uppermost layer 221a1 can comprise a conductive oxide such as ITO, IZO, AZO, or GZO.

[0157] Here, the thickness of the lowest layer 221a3 can be greater than the thickness of the highest layer 221a1. Specifically, the highest layer 221a1 can have a thickness of approximately 70 angstroms. The thickness of the bottom layer 221a3 can be between 100 angstroms and 2000 angstroms. In other words, the thickness of the bottom layer 221a3 can be equal to or greater than 100 angstroms and less than or equal to 2000 angstroms. The connecting wiring TWL and the bottom layer 221a3 can be integrally formed into a single unit, and when the thickness of the bottom layer 221a3 is less than 100 angstroms, the resistance of the connecting wiring TWL increases rapidly, and therefore the thickness of the bottom layer 221a3 needs to be equal to or greater than 100 angstroms. On the other hand, when the thickness of the bottom layer 221a3 is greater than 2000 angstroms, it may not be possible to completely remove the bottom layer 221a3 while removing the portions not covered by the first photoresist PR1 and the second photoresist PR2. In this case, components that need to be insulated from each other may be electrically connected, resulting in defects. Therefore, the thickness of the bottom layer 221a3 needs to be equal to or less than 2000 angstroms. For reference, the thickness of the intermediate layer 221a2, including Al or Ag, can be between 800 angstroms and 1000 angstroms.

[0158] exist Figure 6 and Figure 7 In this configuration, the thin portion of the connecting wiring TWL extends to the top of the auxiliary thin-film transistor TFTa. In other words, in... Figure 6 and Figure 7 In the present invention, the connection wiring TWL comprises only a thin portion. However, this disclosure is not limited thereto. In other words, the thin portion of the connection wiring TWL contacts the auxiliary pixel electrode 221a and has a shape extending into the peripheral region NDA, and the connection wiring TWL may include a thick portion in the peripheral region NDA. The thick and thin portions may be disposed on the same layer. According to some embodiments, in the peripheral region NDA, the connection wiring TWL may include a portion located on a different layer than the thin portion.

[0159] In addition, such as Figure 9 As shown, the contact metal CM can be provided between the connection wiring TWL and the auxiliary thin-film transistor TFTa. Figure 9 This is a schematic cross-sectional view illustrating a portion of a display device according to some embodiments of the present disclosure. The contact metal CM is positioned on the first planarization layer 117 and can contact the auxiliary pixel circuit PCa (see [link to related documentation]) via contact holes formed in the first planarization layer 117. Figure 6 The contact metal CM may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and / or copper (Cu), and may have a single-layer or multi-layer structure comprising such materials. A second planarization layer 118 covers the contact metal CM, and the interconnect wiring TWL may be connected to the contact metal CM via contact holes formed in the second planarization layer 118. The contact metal CM can be considered as part of the interconnect wiring TWL.

[0160] As referenced above Figure 8C The process involves removing the topmost layer 221a1' and the middle layer 221a2' not covered by the first photoresist PR1, leaving the bottommost layer 221a3'. This includes the bottommost layer 221a3, the middle layer 221a2, the auxiliary pixel electrode 221a of the topmost layer 221a1, the main pixel electrode with the same structure, and the connecting wiring TWL. Figure 8D The layers shown are formed simultaneously (or concurrently). Here, by ending the etching process after etching and removing the intermediate layer 221a2' with a high etch rate and before fully etching the bottommost layer 221a3' with a low etch rate, the topmost layer 221a1' and the intermediate layer 221a2' not covered by the first photoresist PR1 can be removed, while the bottommost layer 221a3' can be retained. During this process, a portion of the upper part of the bottommost layer 221a3' can be removed. Therefore, as... Figure 10As shown, the thickness of the thin portion of the connecting wiring TWL can be less than the thickness of the bottommost layer 221a3 of the auxiliary pixel electrode 221a. Figure 10 This is a schematic cross-sectional view of a portion of a display device according to some embodiments of the present disclosure.

[0161] Figure 11 This is a schematic plan view of a partial area of ​​a display device according to some embodiments of the present disclosure.

[0162] exist Figure 5 In this context, the integrated topology of the connecting wiring TWL is considered as a single entity extending from the upper peripheral region of the peripheral region NDA to the auxiliary sub-pixel Pa (e.g., from the auxiliary pixel circuit PCa located in the upper peripheral region of the peripheral region NDA to the auxiliary sub-pixel Pa located in the component region CA), but this disclosure is not limited thereto. For example, as Figure 11 As shown, the connection wiring TWL may include a first connection wiring TWL1 and a second connection wiring TWL2 containing different materials.

[0163] The first connection wiring TWL1 can be a wiring connected to the auxiliary pixel circuit PCa by being arranged in the peripheral region NDA. The first connection wiring TWL1 can include a conductive material containing molybdenum (Mo), aluminum (Al), copper (Cu), or titanium (Ti), and can have a multilayer or single-layer structure containing said conductive material.

[0164] Multiple first connection wirings TWL1 can be positioned between auxiliary pixel circuits PCa. For example, the first connection wirings TWL1 may include first-1 connection wiring TWL1a and first-2 connection wiring TWL1b arranged in different layers. First-1 connection wiring TWL1a and... Figure 6 The data lines DL in the circuit can be located on the same layer and can be formed of the same material. An insulating layer can be placed between the first-second connection wiring TWL1b and the first-first connection wiring TWL1a. For example, the first-second connection wiring TWL1b and... Figure 9 The contact metal CM can be positioned on the same layer and can be formed of the same material. When viewed from a direction perpendicular to the substrate 100, the first-1 connection wiring TWL1a and the first-2 connection wiring TWL1b can be positioned between the auxiliary pixel circuits PCa and can have at least a partially curved shape. Multiple first-1 connection wirings TWL1a and multiple first-2 connection wirings TWL1b positioned in different layers can exist, and multiple first-1 connection wirings TWL1a and multiple first-2 connection wirings TWL1b can be alternately arranged in the area between multiple auxiliary pixel circuits PCa.

[0165] The second connection wiring TWL2 may be a wiring disposed in the component region CA and connected to the first connection wiring TWL1 at the edge of the component region CA. The second connection wiring TWL2 may include a transparent conductive material. In other words, the second connection wiring TWL2 may be connected to the first connection wiring TWL1 according to the embodiments described above (e.g., Figure 5 The TWL (connection wiring) of the embodiment is formed of the same material and in the same structure.

[0166] The first connection wiring TWL1 and the second connection wiring TWL2 can be located on the same layer or on different layers. When the first connection wiring TWL1 and the second connection wiring TWL2 are located on different layers, the first connection wiring TWL1 and the second connection wiring TWL2 can be connected to each other via contact holes.

[0167] The conductivity of the first connection wiring TWL1 can be higher than that of the second connection wiring TWL2. Since the first connection wiring TWL1 is located in the upper peripheral region of the peripheral region NDA, ensuring light transmittance is not required, and therefore the first connection wiring TWL1 can be made of a material with higher conductivity but lower light transmittance than the second connection wiring TWL2. Therefore, the resistance value of the connection wiring TWL can be reduced.

[0168] like Figure 11 As shown, the lengths of the multiple second connection lines TWL2 can be the same. For example, the ends of the multiple second connection lines TWL2 can extend to the boundary of the component region CA on the opposite side where the auxiliary pixel circuit PCa is arranged. This is to match the electrical load through the second connection lines TWL2. Therefore, luminance deviation in the component region CA can be reduced. The number of second connection lines TWL2 in the component region CA can be the same as the number of auxiliary pixel circuits PCa.

[0169] According to some embodiments of the present disclosure as described above, a display device that improves the light transmittance of a local area can be realized. However, the scope of the embodiments according to the present disclosure is not limited to such effects.

[0170] It should be understood that the embodiments described herein should be considered descriptive in nature only and not for limiting purposes. The description of features or aspects within each embodiment should generally be considered as other similar features or aspects that can be used in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, those skilled in the art will understand that various changes in form and detail may be made without departing from the spirit and scope defined by the claims and their equivalents.

Claims

1. A display device, wherein, The display device includes: The base includes the main display area, component area, and peripheral area; The main pixel electrode is located at the main display area of ​​the substrate; The main thin-film transistor is located in the main display area of ​​the substrate and is electrically connected to the main pixel electrode; An auxiliary pixel electrode is located in the component region of the substrate, and the auxiliary pixel electrode comprises multiple layers; An auxiliary thin-film transistor is located in the peripheral region of the substrate; and The connection wiring is connected to the auxiliary pixel electrode and includes a thin portion having a thickness smaller than that of the auxiliary pixel electrode. The connection wiring electrically connects the auxiliary thin-film transistor to the auxiliary pixel electrode. The bottom layer of the auxiliary pixel electrode is integrally formed with the thin portion of the connecting wiring to form a single unit, and the bottom layer of the auxiliary pixel electrode and the thin portion of the connecting wiring include the same transparent conductive material, and the intermediate layer of the auxiliary pixel electrode located on the bottom layer includes reflective metal.

2. The display device according to claim 1, wherein, The etching rate of the bottommost layer of the auxiliary pixel electrode is less than the etching rate of the middle layer of the auxiliary pixel electrode located on the bottommost layer.

3. The display device according to claim 2, wherein, The bottom layer of the auxiliary pixel electrode includes ITO, IZO, AZO or GZO, and the intermediate layer of the auxiliary pixel electrode located on the bottom layer of the auxiliary pixel electrode includes Ag or Al.

4. The display device according to claim 2, wherein, The bottommost layer of the auxiliary pixel electrode comprises a conductive oxide, and the intermediate layer of the auxiliary pixel electrode located on the bottommost layer of the auxiliary pixel electrode comprises a metal.

5. The display device according to claim 1, wherein, The thickness of the thin portion of the connecting wiring is less than the thickness of the bottommost layer of the auxiliary pixel electrode.

6. The display device according to claim 1, wherein, The multilayer of the auxiliary pixel electrode includes the uppermost layer located on the middle layer, and The thickness of the bottom layer is greater than the thickness of the top layer.

7. The display device according to claim 6, wherein, The thickness of the lowest layer is equal to or greater than 100 angstroms and less than or equal to 2000 angstroms.

8. The display device according to claim 6, wherein, The uppermost layer and the lowermost layer consist of the same material.

9. The display device according to claim 1, wherein, The thin portion of the connection wiring extends to the upper part of the auxiliary thin-film transistor.

10. The display device according to claim 1, wherein, The connection wiring includes only the thin portion.

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