Parametric amplifier for qubits

Abstract

A traveling wave parametric amplifier (200) is disclosed, wherein the amplifier includes a coplanar waveguide, wherein the coplanar waveguide includes at least one Josephson junction (210) interrupting a center trace (204) of the coplanar waveguide; and at least one shunt capacitor coupled to the coplanar waveguide, wherein each of the at least one shunt capacitor includes a corresponding superconductor trace (214) extending above an upper surface of the center trace of the coplanar waveguide, and wherein a gap separates the superconductor trace from the upper surface of the center trace, and wherein the coplanar waveguide including the at least one Josephson junction and the shunt capacitor establish a predefined total impedance for the traveling wave parametric amplifier.

Description

Technical Field

[0001] This disclosure relates to parametric amplifiers for qubits. Background Technology

[0002] Quantum computing is a novel computing technique that leverages quantum mechanical phenomena such as the superposition of two quantum states and entanglement between quantum states belonging to different entities. Compared to digital computers that use "bits" configured to exist in two bistable states (e.g., "0" and "1") to store and manipulate information, quantum computing systems aim to manipulate information using "qubits" configured as superpositions of quantum states (e.g., a|0> + b|1>). The quantum states of each qubit can be entangled with each other, making a measurement of one qubit strongly correlated with a measurement of another qubit. In some implementations, these properties can provide advantages over classical computing techniques. Summary of the Invention

[0003] Traveling-wave parametric amplifiers (TWPAs) are amplifiers based on transmission lines made of lumped-element inductors and capacitors. In some types of TWPAs (called Josephson junction TWPAs, also known as Josephson TWPAs), the inductor is formed from a transmission line containing a Josephson junction, which provides nonlinear inductance. Modulating this inductance with a large pump tone can be used to transfer energy to other signals propagating through the device, thus enabling parametric amplification. TWPAs could be a useful tool in superconductor-based quantum computing systems because parametric amplification can provide high-fidelity state measurements of superconducting qubits with near-quantum-confined noise.

[0004] In some implementations, the TWPA is designed to have an impedance that matches the impedance of the load to which the TWPA is connected, thereby reducing electromagnetic reflections. This impedance matching may require modification of the TWPA's capacitance. Generally, in some aspects, the subject matter of this disclosure covers techniques and apparatuses in which capacitance can be incorporated within the TWPA without introducing detrimental dielectric materials that might otherwise absorb signals and add noise to the operation of the TWPA.

[0005] Specifically, the subject matter of this disclosure includes a TWPA comprising: a coplanar waveguide having at least one Josephson junction having a central trace that interrupts the coplanar waveguide; and at least one parallel capacitor formed by a grounded superconducting trace that crosses the central trace of the coplanar waveguide and is separated from the central trace by a gap. Thus, the superconducting trace and the coplanar waveguide form plates of the parallel capacitor, separated by a gap height. Because the space between the plates is formed by a gap (e.g., made of air or vacuum) rather than a lossy dielectric solid, signal absorption and noise within the TWPA can be reduced, especially when the TWPA operates under vacuum conditions.

[0006] A traveling-wave parametric amplifier device includes: a coplanar waveguide, wherein the coplanar waveguide includes at least one Josephson junction that interrupts the center trace of the coplanar waveguide; and at least one parallel capacitor coupled to the coplanar waveguide, wherein each of the at least one parallel capacitor includes a corresponding superconducting trace extending above the upper surface of the center trace of the coplanar waveguide, wherein a gap separates the superconducting trace from the upper surface of the center trace, and the coplanar waveguide including the at least one Josephson junction and the parallel capacitor establish a predefined total impedance for the traveling-wave parametric amplifier.

[0007] The implementation of this device may include one or more of the following features: The impedance of the traveling-wave parametric amplifier is a function of the height of the gap between each parallel capacitor. In this device, the superconducting trace extends above the center trace but not above at least one Josephson junction. In this device, the superconducting trace extends in a direction orthogonal to the extension direction of the center trace. In this device, the superconducting trace provides an air bridge above the center trace. In this device, the coplanar waveguide includes a first ground plane extending along a first side of the center trace and a second ground plane extending along a second side of the center trace, wherein a first end of the air bridge is electrically connected to the first ground plane, and a second end of the air bridge is electrically connected to the second ground plane. The device includes: a first substrate; and a second substrate, bonded to the first substrate, wherein the coplanar waveguide is disposed on an upper surface of the first substrate, and the superconducting trace is disposed on the second substrate. In this device, bumps on the first substrate are bonded to the second substrate. In this device, the coplanar waveguide includes: a first ground plane extending along a first side of the center trace; and a second ground plane extending along a second side of the center trace, wherein the superconductor trace is electrically connected to the first ground plane at a first end via a first bump connection and to the second ground plane at a second end via a second bump connection. The device includes a second component in which the predefined total impedance of the traveling-wave parametric amplifier is impedance-matched to the second component. In this device, the predefined total impedance is approximately 50 ohms.

[0008] One general aspect includes a method of manufacturing a traveling-wave parametric amplifier, the method comprising: providing a first substrate; forming a coplanar waveguide on the first substrate, the coplanar waveguide including at least one Josephson junction interrupting a central trace of the coplanar waveguide; fixing at least one superconducting trace over the coplanar waveguide to respectively form at least one parallel capacitor, wherein each superconducting trace of the at least one parallel capacitor extends above an upper surface of the central trace of the coplanar waveguide and is separated from the upper surface by a corresponding gap, and the coplanar waveguide including at least one Josephson junction and the at least one parallel capacitor establish a predefined total impedance for the traveling-wave parametric amplifier.

[0009] Implementations may include one or more of the following features. In the method, for each superconducting trace, anchoring the at least one superconducting trace onto a coplanar waveguide includes: providing a layer of dielectric material over the coplanar waveguide;

[0010] A layer of patterned dielectric material is used to form a pad of dielectric material and expose a portion of the coplanar waveguide; a superconducting layer is formed on the pad of dielectric material and on the portion of the coplanar waveguide; the superconducting layer is patterned to form a superconducting trace; and the pad of dielectric material is removed to form a gap, wherein the superconducting trace provides an air bridge above the central trace. In this method, the coplanar waveguide includes a first ground plane extending along a first side of the central trace and a second ground plane extending along a second side of the central trace, and wherein patterning the superconducting layer to form the superconducting trace includes forming a first electrical contact between a first end of the superconducting trace and the first ground plane and forming a second electrical contact between a second end of the superconducting trace and the second ground plane. In this method, for each of the at least one superconducting trace, securing the superconducting trace to the coplanar waveguide includes: providing a second substrate including the superconducting trace; bonding the second substrate to a first substrate such that the superconducting trace is positioned above and separated from the upper surface of the central trace by a corresponding gap.

[0011] In this method, the coplanar waveguide includes a first ground plane extending along a first side of a central trace and a second ground plane extending along a second side of the central trace, and wherein the joining includes: forming a first bump joint between a first end of the superconducting trace and the first ground plane; and forming a second bump joint between a second end of the superconducting trace and the second ground plane. In this method, each of the at least one superconducting trace extends in a direction orthogonal to the elongation direction of the central trace. In this method, each of the at least one superconducting trace extends above the central trace but not above the at least one Josephson junction. The method forms a second component wherein a predefined total impedance is matched to the impedance of the second component. In this method, the predefined impedance is approximately 50 ohms.

[0012] Various embodiments of the subject matter disclosed herein may have one or more advantages. For example, in some embodiments,

[0013] For the purposes of this disclosure, a superconductor (or superconducting) material can be understood as a material that exhibits superconducting properties at or below a superconducting critical temperature. Examples of superconducting materials include, but are not limited to, aluminum (e.g., a superconducting critical temperature of 1.2 Kelvin), niobium (e.g., a superconducting critical temperature of 9.3 Kelvin), and titanium nitrides (e.g., a superconducting critical temperature of 5.6 Kelvin).

[0014] Details of one or more embodiments are set forth in the accompanying drawings and the following description. Other features and advantages will be apparent from the description, drawings, and claims. Attached Figure Description

[0015] Figure 1 This is a diagram illustrating a circuit schematic of an exemplary traveling-wave parametric amplifier.

[0016] Figure 2A This is a schematic diagram showing a top view of an exemplary traveling wave parametric amplifier.

[0017] Figure 2B It is shown Figure 2A A schematic diagram of the cross-section of the traveling wave parametric amplifier along line AA.

[0018] Figure 3A-3I It is a description Figure 2A-2B A schematic diagram of the manufacturing process of an air bridge.

[0019] Figure 4A This is a schematic diagram showing a top view of an exemplary traveling wave parametric amplifier.

[0020] Figure 4B It is shown Figure 4A A schematic diagram of the cross-section of the traveling wave parametric amplifier along line AA.

[0021] Figure 5A This is a schematic diagram showing a top view of an exemplary traveling wave parametric amplifier.

[0022] Figure 5B It is shown Figure 5A A schematic diagram of the cross-section of the traveling wave parametric amplifier along line AA.

[0023] Figures 6A-6D It is a description used for Figure 5A A schematic diagram of the manufacturing process of TWPA. Detailed Implementation

[0024] Qubit readout can be accomplished using the dispersive interaction between the qubit and the readout device (e.g., a measurement resonator). For example, a probe tone can be generated to sample the frequency of the readout device to measure the phase shift, which depends on the qubit's state / frequency. However, in some cases, the signal obtained from the readout device may attenuate on the output line, reducing the signal-to-noise ratio and making measurements more difficult. To improve the signal-to-noise ratio, an amplifier can be placed at the output of the readout device. An example of an amplifier that can be used to enhance the output signal is a traveling-wave parametric amplifier (TWPA). TWPAs offer relatively high bandwidth, dynamic range, and saturation power, thus potentially allowing frequency reuse and improving the scaling of quantum processors.

[0025] Figure 1 This is a circuit schematic illustrating an exemplary TWPA 100. The TWPA 100 is an amplifier based on a transmission line 102 that includes lumped elements such as an inductor and a capacitor. In some embodiments, the transmission line 102 may include, for example, a coplanar waveguide, such as a superconducting coplanar waveguide. A coplanar waveguide, including a superconducting coplanar waveguide, may include a center trace formed on a substrate and defined on both sides by a ground plane, wherein the ground plane is spaced apart from the center trace. In the case of a superconducting coplanar waveguide, the ground plane and the center trace may be formed of a superconducting material such as, for example, aluminum.

[0026] The TWPA 100's inductors include the Josephson junction 104, which provides non-linear inductance. It uses a large pump tone ω. p Modulating the inductor will transfer energy to other signals propagating through the device (e.g., the signal ω obtained from the qubit measurement resonator). s This leads to parameter amplification. Specifically, the pump tone ω... p The current-dependent inductance of the TWPA 100 is modulated to generate the pump tone ω through mixing. p Coupled to the idle tone ω i and the signal ω from the measuring resonator s , so that ω s +ω i =2ω p The relationship between the pump frequency, signal frequency, and idle frequency is adjusted to satisfy energy conservation. The gain, bandwidth, and dynamic range of the TWPA can be determined by the mode equations of the coupled nonlinear transmission line. For more detailed information on the operation and fabrication of the TWPA, see “Traveling wave parametric amplifier with Josephson junctions using minimal resonator phase matching,” TC White et al., Applied Physics Letters, Vol. 106, 242601-1 to 242601-5 (2015), the entire contents of which are incorporated herein by reference.

[0027] To improve performance, the junction inductance should be relatively large. For example, the junction inductance can be approximately 10 times or more the geometric inductance of the coplanar waveguide. However, to avoid unwanted reflections, the impedance of the TWPA 100 should also be matched to the impedance of the load. In many embodiments, this impedance is set to 50 ohms. Since the impedance Z of the TWPA 100 varies with the square root of the inductance per unit length (L / l) divided by the capacitance per unit length (C / l), an additional capacitor 106, also known as a parallel capacitor, can be added to the TWPA 100 at ground 108 to adjust the impedance to near the desired impedance. In some embodiments, the additional capacitance is large enough to implement capacitor 106 using a parallel-plate capacitor design, where the dielectric of the parallel-plate capacitor is provided by an insulator deposited such as, for example, SiO2. In some embodiments, the geometric inductance added by the additional capacitor can be ignored.

[0028] The deposited insulator is typically lossy at microwave frequencies and can absorb signals within the TWP 100 as well as increase noise in the TWP. However, this loss can be detrimental when such an amplifier is used as the first stage of amplification, because in some implementations, the signal loss will be equivalent to an increase in noise.

[0029] The TWPA of this disclosure can be formed as a parallel-plate capacitor without using deposited insulators. For example, the parallel-plate capacitor of this disclosure can be formed using air or vacuum as the dielectric. By eliminating deposited insulators, signal absorption and noise within the TWPA can be reduced in some embodiments.

[0030] The TWPA disclosed herein can be formed in various embodiments. For example, in some embodiments, the superconducting trace used to form the parallel-plate capacitor may be an air bridge connected at one end to ground (e.g., a ground plane of the coplanar waveguide), across the center trace of the coplanar waveguide, and connected at the second end to ground (e.g., a second ground plane of the coplanar waveguide). In other embodiments, the center trace of the coplanar waveguide itself is an air bridge extending above the superconducting trace, which is connected at one end to ground (e.g., a ground plane of the coplanar waveguide) and at the second end to ground (e.g., a second ground plane of the coplanar waveguide). In other embodiments, the coplanar waveguide is formed on a first substrate, and the superconducting trace is formed on a second substrate, which is joined to and spaced apart from the first substrate (e.g., by bump bonding). In any of the foregoing embodiments, the spacing between the center trace of the coplanar waveguide and the superconducting trace can be used to adjust the impedance of the parallel capacitor. In any of the foregoing embodiments, the center trace and the superconducting trace may be orthogonal to each other along their direction of extension. Furthermore, the superconductor trace can overlap with the center trace without extending above any Josephson junction.

[0031] Figure 2A This is a schematic diagram showing a top view of an exemplary traveling wave parametric amplifier 200 according to the present disclosure. Figure 2B It is shown Figure 2A A schematic diagram of the cross section of the traveling wave parametric amplifier 200 along line AA. Figure 2A The TWPA 200 shown is a Josephson TWPA and includes a substrate 202 and a coplanar waveguide formed on the substrate 202. In this example, the substrate 202 is a dielectric material, such as silicon or sapphire, but other dielectrics may be used alternatively.

[0032] The coplanar waveguide formed on the substrate includes a center trace 204. The coplanar waveguide also includes a first ground plane 206 and a second ground plane 208 extending along a first side and a second side of the center trace 204, respectively. The ground planes 206, 208 and the center trace are formed of a conductive material. In a particular example, the conductive material is a superconducting thin film, such as aluminum, niobium, or titanium nitride. The ground planes 206, 208 are spaced apart from the center trace 204 by a distance 201, which may be constant along the length of the center trace 204.

[0033] The TWPA 200 also includes at least one Josephson junction 210, with a center trace 204 of a discontinuous coplanar waveguide. Figure 2A The example shows two Josephson junctions 210 connected in series. At least one Josephson junction 210 provides the nonlinear inductive portion of the TWPA 200. A Josephson junction is a quantum mechanical device made of two superconducting electrodes separated by a barrier, such as a thin insulating film. For example, in this example, at least one Josephson junction 210 may be formed from a three-layer Al / Al2O3 / Al thin film.

[0034] To provide additional capacitance to provide a predefined total impedance for the TWPA 200, together with the inductance of the coplanar waveguide and the Josephson junction, the TWPA 200 also includes at least one parallel capacitor. In this example, the at least one parallel capacitor is a parallel-plate capacitor, wherein the first plate of the capacitor is provided by the center trace 204 of the coplanar waveguide, and the second plate of the capacitor is provided by a conductive trace forming an air-bridge structure. Specifically, the conductive trace may be a superconducting trace (also referred to as a "bridge" or "air-bridge structure") 214. In this example, the superconducting trace 214 spans the upper surface of the center trace 204 of the coplanar waveguide. For the purposes of this example, the upper surface is understood to be the surface of the center trace 204 opposite to the surface of the center trace 204 facing the substrate 202. The superconducting trace 214 may extend in a direction orthogonal to the extension direction of the center trace 204.

[0035] like Figure 2BAs shown, the first end of the superconducting trace 214 is in physical contact with and therefore electrically connected to the first ground plane 206. The second end of the superconducting trace 214 is in physical contact with and therefore electrically connected to the second ground plane 208. Thus, the superconducting trace 214 is grounded and forms the ground plane of the parallel capacitor. Similarly, as... Figure 2B As shown, the superconducting trace 214 spans the upper surface of the central trace 204. The gap 212 between the upper surface of the central trace 204 and the lower surface of the air bridge formed by the superconducting trace 214 does not include a dielectric film. That is, a gap 212 is provided between the superconducting trace 214 and the central trace 204. This gap may include air. Alternatively, the device including the TWPA200 can be used in a vacuum environment, so the gap 212 can be a vacuum. The height 203 of the gap (understood here as the distance measured directly across the opposing surfaces of the central trace 204 and the superconducting trace 214) can be, for example, between approximately 30 nm and up to approximately 10 micrometers. The capacitance of the parallel capacitor varies proportionally to 1 / d, where d corresponds to the gap height 203. Therefore, by adjusting the height 203 of the gap 212, the value of the parallel capacitance can be changed. Similarly, adjusting the overlap area between the central trace 204 and the superconducting trace 214 can also be used to change the value of the parallel capacitance. Specifically, the height and / or overlap area of ​​the superconductor trace 214 can be predefined to achieve a corresponding capacitance, which, together with the inductance of the center trace 204 and the inductance of at least one Josephson junction, establishes a predefined total impedance for the traveling-wave parametric amplifier 200. As an example, for a separation gap of approximately 300 nm between the superconductor trace 214 and the center trace 204, the overlap area can be approximately 100 μm multiplied by approximately 14 μm. The predefined total impedance of the traveling-wave parametric amplifier can be set to closely match the impedance of a second component on the chip. For example, the predefined total impedance of the TWPA 200 can be set to an impedance of approximately 50 ohms (which can correspond to the impedance of a standard microwave coupler), such as within 1 ohm, 2 ohms, 3 ohms, 4 ohms, or 5 ohms of a 50-ohm impedance. This is because a large portion of the TWPA's impedance originates from the inductance of at least one Josephson junction in the center trace 204. When a TWPA device is pumped, the average inductance increases, but the increase is relatively small (e.g., about 10%) compared to the impedance difference between a coplanar waveguide with and without at least one Josephson junction. Therefore, a TWPA design including at least one parallel capacitor can have an impedance of, for example, about 47-48 ohms when no pump signal is applied, and then this impedance increases to 50 ohms when the pump is at optimal power. As an example, the total inductance can be expressed as…

[0036]

[0037] Where L junctionFor the inductance of the Josephson junction, L stray For stray inductance, C shunt For parallel capacitors, C stray This is for stray capacitance. It is assumed that all values ​​are per unit length.

[0038] The superconductor TWPA 200 can be manufactured using the same or similar processing techniques used in integrated circuit manufacturing, such as photolithography, material deposition such as sputtering or chemical vapor deposition, and material removal such as etching or stripping. Figure 3A-3I It is a description Figure 2A-2B A schematic diagram of an exemplary fabrication process for the superconductor trace 214 portion of the TWPA 200. Specifically, Figure 3A-3I The processing steps are described as follows Figure 2A A schematic diagram of the cross-section at section AA. In the first step, as... Figure 3A As shown, a substrate 202 is provided. The substrate 202 is a dielectric material comprising, for example, silicon or sapphire. Preferably, monocrystalline silicon or sapphire can be used for the substrate to reduce the density of bipolar states (TLS) within the substrate 202.

[0039] Subsequently, a first conductive layer 300, such as a layer of superconducting material, can be uniformly deposited over the substrate 202. The first conductive layer 300 may include, for example, aluminum, niobium, or titanium nitride, and other superconducting materials. The first conductive layer 300 is then patterned, as shown below. Figure 3C As shown. In this example, two openings 301 are formed in the first conductive layer 300 and extend into and out of the page (e.g., along the y-axis), such that the substrate 202 is exposed through the openings 301. The openings 301 establish a first ground plane 206, a center trace 204, and a second ground plane 208. In other words, the openings 301 correspond to two trenches that separate the first ground plane 206 from the center trace 204 and the second ground plane 208 from the center trace 204. The first conductive layer 300 can be patterned by depositing a photoresist layer, UV exposure, developing the photoresist layer, and wet or dry etching the exposed areas of the first conductive layer 300. Alternatively, in some embodiments, a stripping process is used to form the openings 301.

[0040] After patterning the first conductive layer 300, a dielectric material layer 302, such as a silicon dioxide layer, can be deposited over the substrate 202 to cover the first conductive layer 300 and the opening 301, as shown below. Figure 3D As shown. Layer 302 corresponds to the interlayer dielectric intended to support the conductive bridge structure to be formed. (Refer to...) Figure 3E The device can be planarized by chemical mechanical polishing (CMP). This step reduces the roughness caused by pits around the two openings, which can affect the thickness and uniformity of subsequent layers.

[0041] Subsequently, the dielectric material layer 302 can be patterned to form a support structure 305 or pad region that supports the conductive bridge to be formed, such as... Figure 3F As shown. In particular, the dielectric material layer 302 can be patterned such that openings 304 are formed within the layer 302 to expose portions of the first ground plane 206 and portions of the second ground plane 208. The openings can be formed using, for example, dry or wet etching processes.

[0042] Reference Figure 3G A second conductive layer 306 can be deposited over layer 302 and opening 304, such that the deposited second conductive layer 306 contacts and forms on the exposed portions of ground planes 206 and 208. The conductive material of the second conductive layer 306 may include a superconducting material, such as aluminum, niobium, or titanium nitride. Subsequently, as Figure 3H As shown, the second conductive layer 306 can be patterned such that only the portion of the second conductive layer corresponding to the bridge 214 is retained, while the remainder is removed. Patterning can include, for example, wet or dry etching processes. After patterning the second conductive layer 306 to form the bridge 214, as... Figure 3I As shown, the remaining layer 302 below and around bridge 214 is removed. For example, removing layer 302 may include performing dry-vaporetch. Specifically, if layer 302 is silicon dioxide, it can be selectively removed using dry-vapor HF (VHF) etching. Alternatively, in some embodiments, depending on the specific material used for layer 302, layer 302 can be selectively removed using a plasma-based etching process (e.g., plasma generated with tetrafluoromethane vapor, nitrogen trifluoride vapor, or xenon difluoride). Thus, the removal of layer 302 leaves an "air bridge" structure that spans the central trace 204 and is supported at one end by a first ground plane 206 and at the other end by a second ground plane 208.

[0043] although Figure 2A-2B TWPA 200 describes the air bridge structure 214 as being used to connect two ground planes, but in some implementations, the air bridge structure can replace the terrain and become part of the center trace 204. For example, Figure 4A This is a schematic top view of an exemplary traveling-wave parametric amplifier 400, wherein the center trace 204 crosses the connection portion 402 between the first ground plane 206 and the second ground plane 208. Figure 4B It is shown Figure 4A A schematic diagram of the cross-section of the traveling wave parametric amplifier along line AA.

[0044] Specifically, in the exemplary TWPA 400, the connection portion 402 can be formed as a portion of the same layer of conductive material forming the first ground plane 206 and the second ground plane 208, and therefore can be patterned in the same processing steps as the first ground plane 206 and the second ground plane 208. In contrast, a portion 404 of the center trace 204 is configured as an air bridge across the connection portion 402. Figure 4A and Figure 4B As shown, the air bridge portion 404 of the center trace 204 is positioned above the connection portion 402 with a corresponding gap height 203. The remaining portion of the center trace 204 can be formed in the same layer as the first ground plane 206, the second ground plane 208, and the connection portion 402. The air bridge portion 404 can be fixed at a first end 401 to the portion of the center trace 204 formed in the same layer as the ground planes 206 and 208, and can be fixed at a second end 403 to another portion of the center trace 204 formed in the same layer as the ground planes 206 and 208. Similar to the TWPA 200, the gap height 203 and the overlap area between the air bridge portion 404 and the connection portion 402 can be adjusted to change the capacitance, which can in turn be used to change the overall impedance of the TWPA 400 to a predefined value.

[0045] The 404 used as an air bridge part can be with Figure 2A The air bridge is manufactured in a similar manner. For example, manufacturing the air bridge portion 404 may include: forming and patterning a first conductive layer including an underlying connection portion 402, a first ground plane 206 and a second ground plane 208, and a portion of a center trace 204; depositing and patterning an insulating layer over the first conductive layer; depositing and patterning a second conductive layer over the patterned insulating layer to define the air bridge structure; and removing the insulating layer to form the air bridge structure.

[0046] In some implementations, a stacked structure can be used instead of an air bridge structure to form parallel capacitors. Figure 5A This is a schematic top view illustrating an exemplary traveling wave parametric amplifier 500 formed using a stacked structure. Figure 5B It is shown Figure 5A A schematic diagram of the cross-section of the traveling wave parametric amplifier 500 along line AA. Figure 5A In the diagram, dashed lines are used to depict the first ground plane 206, the center trace 204, the second ground plane 208, and the superconductor trace 504 that crosses the center trace 204 to indicate their relative positions in the TWPA 500.

[0047] like Figure 5BAs shown, a superconducting trace 504 is formed on a second substrate 502 and stacked to a first substrate 202 via a bonding element 506. The second substrate 502 may include, for example, a dielectric substrate, such as silicon or sapphire. The superconducting trace 504 may extend in a direction orthogonal to the extension direction of the central trace 204. The bonding element 506 provides a direct physical and electrical connection between a first end of the superconducting trace 504 and a first ground plane 206, and a direct physical and electrical connection between a second end of the superconducting trace 504 and a second ground plane 208. In addition to providing electrical connections, the bonding element 506 also provides a gap height 203. The bonding element 506 may be formed, for example, of a superconducting material such as aluminum, niobium, or titanium nitride. In some embodiments, a diffusion barrier is provided between the bonding element 506 and the ground plane to which the bonding element 506 is connected and / or the superconducting trace 504. For example, in some cases, the barrier layer may be formed of titanium nitride, platinum, or tungsten.

[0048] One advantage of using bump bonding over using an air-bridge structure to establish parallel capacitors is that bump bonding allows the capacitance of the TWPA to be set on a device-by-device basis rather than on a wafer-by-wafer basis in some embodiments. For example, in some embodiments, a bottom portion of the stack (i.e., the portion of the TWPA including the ground plane and the center trace) can be fabricated, and then the wafer including the bottom portion can be diced into individual chips. The top portion of the stack (i.e., the portion including the superconducting trace 504 designed to cross the center trace 204) can then be bonded to the bottom portion using flip-chip bonding. The total impedance of the TWPA can then be adjusted in situ during the bonding process by changing the gap height 203, thereby adjusting the capacitance of the parallel capacitors. Thus, the need to redesign the TWPA structure in case of impedance changes can be avoided. As explained herein, the height 203 and / or the overlap area of ​​the superconducting trace 504 with the center trace 204 can be predefined to achieve the corresponding capacitance, which, together with the inductance of the center trace 204 and the inductance of at least one Josephson junction, establishes a predefined total impedance for the traveling-wave parametric amplifier 500. The predefined total impedance of a traveling wave parametric amplifier can be set to closely match the impedance of a second component on the chip. For example, the predefined total impedance of the TWPA 500 can be set to an impedance of approximately 50 ohms (which can correspond to the impedance of a standard microwave coupler), such as within 1 ohm, 2 ohms, 3 ohms, 4 ohms, or 5 ohms of a 50-ohm impedance.

[0049] Figures 6A-6D It is a description Figure 5A A schematic diagram of the TWPA manufacturing process. In the first step, as... Figure 6AAs shown, a first substrate 202 is provided, including a first ground plane 206, a center trace 204, and a second ground plane 208. The ground plane can be separated from the center trace through a corresponding opening 301. This can be compared with the description herein. Figures 3A-3C The substrate is manufactured in the same manner. Furthermore, as... Figure 6B As shown, a second substrate 502 including a superconducting trace 504 is provided. The superconducting trace 504 can be fabricated by first depositing a layer of superconducting material on the substrate 502 and patterning (e.g., by photolithography and wet or dry etching processes or by a lift-off process) the deposited layer to form the superconducting trace 504. Subsequently, as Figure 6C As shown, bonding element 506 can be formed. In some embodiments, bonding element 506 can be formed on ground planes 206 and 208. Alternatively, bonding element 506 can be formed on superconductor trace 504. Bonding element 506 can be formed by deposition processes such as, for example, thermal evaporation and can be patterned using a combination of photolithography and wet or dry etching processes or stripping processes.

[0050] Then the substrates are bonded together, such as Figure 6D As shown. Two substrates can be bonded to each other using, for example, pressure bonding. Pressure bonding can be performed without applying heat (e.g., at room temperature). An example of the pressure used to form the bond is 25 Newtons for 1000 bumps in a 6 square millimeter chip. One advantage of performing the bonding at room temperature (e.g., in the range of approximately 18°C ​​to approximately 30°C) is that it reduces the formation of hillocks and voids at the material interfaces.

[0051] The thickness of the bonding element 506 can be set such that the gap height 203 is spaced by a desired amount. For example, the height 203 between the opposing surfaces of the first chip and the second chip can be set to be between approximately 0.5 μm and approximately 100 μm (e.g., between approximately 0.5 μm and approximately 20 μm, between approximately 0.5 μm and approximately 15 μm, between approximately 0.5 μm and approximately 10 μm, between approximately 0.5 μm and approximately 5 μm, or between approximately 0.5 μm and approximately 2.5 μm).

[0052] The implementations of the quantum themes and quantum operations described in this specification can be implemented in suitable quantum circuits, or more generally, in quantum computing systems, including the structures disclosed in this specification and their structural equivalents, or one or more combinations thereof. The term "quantum computing system" may include, but is not limited to, a quantum computer, a quantum information processing system, a quantum cryptography system, a topological quantum computer, or a quantum simulator.

[0053] The terms quantum information and quantum data refer to information or data carried, stored, or preserved by quantum systems, the smallest nontrivial system being a qubit, for example, a system that defines the unit of quantum information. It should be understood that the term "qubit" includes all quantum systems that can be suitably approximated as a two-level system in the appropriate context. Such quantum systems can include multi-level systems, for example, systems with two or more levels. As examples, such systems can include atoms, electrons, photons, ions, or superconducting qubits. In some implementations, the computational fundamental state is identified as the ground state and the first excited state; however, it should be understood that other settings where the computational fundamental state is identified as a higher-level excited state are possible. It should be understood that a quantum memory is a device capable of storing quantum data for a long time, with high fidelity and high efficiency, such as a light-matter interface for transmission, and matter with quantum characteristics such as superposition or quantum coherence for storing and preserving quantum data.

[0054] Quantum circuit elements (also known as quantum computing circuit elements and quantum information processing devices) include circuit elements used to perform quantum processing operations. That is, quantum circuit elements are configured to utilize quantum mechanical phenomena, such as superposition and entanglement, to perform operations on data in a nondeterministic manner. Some quantum circuit elements, such as qubits, can be configured to simultaneously represent and manipulate information in more than one state. Examples of superconducting quantum circuit elements include circuit elements such as quantum LC oscillators, qubits (e.g., flux qubits, phase qubits, or charge qubits), and superconducting quantum interference devices (SQUIDs) (e.g., RF-SQUIDs or DC-SQUIDs).

[0055] In contrast, classical circuit elements typically process data in a deterministic manner. Classical circuit elements can be configured to collectively execute the instructions of a computer program by performing basic arithmetic, logic, and / or input / output operations on data, where the data is represented in analog or digital form. In some implementations, classical circuit elements can be used to transmit data to and / or receive data from quantum circuit elements via electrical or electromagnetic connections. Examples of classical circuit elements include CMOS-based circuit elements, fast single-throughput quantum (RSFQ) devices, reciprocal quantum logic (RQL) devices, and ERSFQ devices (which are energy-efficient versions of RSFQs that do not use bias resistors).

[0056] The fabrication of the quantum and classical circuit elements described herein may require the deposition of one or more materials, such as superconductors, dielectrics, and / or metals. Depending on the materials chosen, these materials may be deposited using deposition processes such as chemical vapor deposition, physical vapor deposition (e.g., evaporation or sputtering), or epitaxy, as well as other deposition processes. The processes described herein for fabricating circuit elements may require the removal of one or more materials from the device during fabrication. Depending on the material to be removed, the removal process may include, for example, wet etching, dry etching, or a stripping process. The materials forming the circuit elements described herein can be patterned using known photolithography techniques (e.g., photolithography or electron beam lithography).

[0057] During the operation of a quantum computing system using superconducting quantum circuit elements and / or superconducting classical circuit elements (such as those described herein), the superconducting circuit elements are cooled within a cryostat to a temperature that allows the superconducting material to exhibit superconducting properties. A superconducting (or superconducting) material can be understood as a material that exhibits superconducting properties at or below its superconducting critical temperature. Examples of superconducting materials include aluminum (superconducting critical temperature of 1.2 Kelvin), niobium (superconducting critical temperature of 9.3 Kelvin), and titanium nitride (superconducting critical temperature of 5.6 Kelvin).

[0058] While this specification contains numerous specific implementation details, these should not be construed as limiting the scope of possible claims, but rather as descriptions of features that may be specific to particular embodiments. Certain features described in the context of different embodiments may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented individually or in any suitable sub-combination in multiple embodiments. Furthermore, although features may be described above as functioning in certain combinations and even initially required, in some cases one or more features from the required combination may be removed from said combination, and the required combination may be for sub-combinations or variations thereof.

[0059] Similarly, although the operations are depicted in a specific order in the accompanying drawings, this should not be construed as requiring these operations to be performed in the specific order shown or in sequential order, or that all shown operations be performed to obtain the desired result. For example, the actions recited in the claims may be performed in a different order, but the desired result may still be achieved. In some cases, multitasking and parallel processing may be advantageous. Furthermore, the separation of various components in the above embodiments should not be construed as requiring such separation in all embodiments.

[0060] Many embodiments have been described. However, it will be understood that various modifications can be made without departing from the spirit and scope of the invention. For example, in some embodiments, the TWPA is a dynamic inductance TWPA, which may be at least in part composed of a high dynamic inductance L exhibiting a high dynamic inductance in the microwave frequency range (e.g., between approximately 300 MHz and 300 GHz). K The material formation of dynamic inductors (TWPAs) is described. TWPAs typically operate at higher impedances (e.g., around 200 ohms) because designing capacitors using the geometry disclosed herein can be difficult. Because TWPAs exhibit relatively weak nonlinearity, they tend to be much longer to achieve the desired gain.

[0061] Therefore, as described herein, the dynamic inductor TWPA can benefit more from a low-loss approach that increases its capacitance per unit length. As shown in the examples described herein, the superconducting trace across the center trace does this without extending over at least one Josephson junction. However, in some embodiments, the superconducting trace may extend over at least one Josephson junction, provided the overlap is designed with a predefined geometry to provide a pre-designed capacitance per unit length. Therefore, other embodiments are within the scope of the appended claims.

Claims

1. A traveling-wave parametric amplifier, comprising: A coplanar waveguide, wherein the coplanar waveguide includes at least one Josephson junction that interrupts the center trace of the coplanar waveguide; as well as At least one parallel capacitor is connected to the coplanar waveguide, wherein each of the at least one parallel capacitor includes a corresponding superconducting trace extending above the upper surface of the central trace of the coplanar waveguide to provide an air bridge above the central trace, wherein a gap separates the superconducting trace from the upper surface of the central trace, the gap comprising air or vacuum, and This includes the coplanar waveguide of the at least one Josephson junction and the parallel capacitor establishing a predefined total impedance for the traveling-wave parametric amplifier.

2. The traveling-wave parametric amplifier of claim 1, wherein the impedance of the traveling-wave parametric amplifier is a function of the height of the gap between each parallel capacitor.

3. The traveling-wave parametric amplifier of claim 1, wherein the superconductor trace extends above the center trace and not above the at least one Josephson junction.

4. The traveling-wave parametric amplifier according to claim 1, wherein the superconductor trace extends in a direction orthogonal to the extension direction of the center trace.

5. The traveling-wave parametric amplifier of claim 1, wherein the coplanar waveguide includes a first ground plane extending along a first side of the center trace and a second ground plane extending along a second side of the center trace, wherein a first end of the air bridge is electrically connected to the first ground plane and a second end of the air bridge is electrically connected to the second ground plane.

6. The traveling-wave parametric amplifier of claim 1, comprising a second component, wherein the predefined total impedance of the traveling-wave parametric amplifier is impedance-matched to the second component.

7. The traveling-wave parametric amplifier according to claim 1, wherein the predefined total impedance is 50 ohms.

8. A traveling-wave parametric amplifier, comprising: First substrate; as well as The second substrate is bonded to the first substrate; A coplanar waveguide, wherein the coplanar waveguide includes at least one Josephson junction that interrupts the center trace of the coplanar waveguide; as well as At least one parallel capacitor is connected to the coplanar waveguide, wherein each of the at least one parallel capacitor includes a corresponding superconducting trace extending above the upper surface of the center trace of the coplanar waveguide, wherein a gap separates the superconducting trace from the upper surface of the center trace, and This includes the coplanar waveguide of the at least one Josephson junction and the at least one parallel capacitor establishing a predefined total impedance for the traveling-wave parametric amplifier. The coplanar waveguide is disposed on the upper surface of the first substrate, and the superconductor trace is disposed on the second substrate.

9. The traveling wave parametric amplifier of claim 8, wherein the first substrate bump is bonded to the second substrate.

10. The traveling-wave parametric amplifier according to claim 9, wherein the coplanar waveguide comprises: A first ground plane extending along the first side of the central trace; as well as A second ground plane extending along the second side of the central trace, wherein the superconductor trace is electrically connected to the first ground plane at the first end via a first bump connection and to the second ground plane at the second end via a second bump connection.

11. A method for manufacturing a traveling-wave parametric amplifier, the method comprising: Provide a first substrate; A coplanar waveguide is formed on the first substrate, the coplanar waveguide including at least one Josephson junction that interrupts the center trace of the coplanar waveguide; At least one superconducting trace is fixed on the coplanar waveguide to form at least one parallel capacitor. Each superconductor trace in the at least one parallel capacitor extends above the upper surface of the central trace of the coplanar waveguide and is separated from the upper surface by a corresponding gap, the gap comprising air or vacuum, and This includes the coplanar waveguide of the at least one Josephson junction and the at least one parallel capacitor establishing a predefined total impedance for the traveling-wave parametric amplifier. Specifically, for each superconductor trace, fixing the at least one superconductor trace onto the coplanar waveguide includes: A layer of dielectric material is provided above the coplanar waveguide; The layer of patterned dielectric material is used to form a pad of dielectric material and expose a portion of the coplanar waveguide; A superconductor layer is formed on the pad of the dielectric material and on the portion of the coplanar waveguide; Patterning the superconducting layer to form the superconducting traces; and The pad of dielectric material is removed to form the corresponding gap, wherein the superconductor trace provides a corresponding air bridge above the center trace.

12. The method of claim 11, wherein the coplanar waveguide includes a first ground plane extending along a first side of the central trace and a second ground plane extending along a second side of the central trace, and wherein patterning the superconducting layer to form the superconducting trace includes forming a first electrical contact between a first end of the superconducting trace and the first ground plane and forming a second electrical contact between a second end of the superconducting trace and the second ground plane.

13. The method of claim 11, comprising: A second component is formed, wherein the predefined total impedance is matched with the impedance of the second component.

14. The method of claim 13, wherein the predefined total impedance is 50 ohms.

15. A method for manufacturing a traveling-wave parametric amplifier, the method comprising: Provide a first substrate; A coplanar waveguide is formed on the first substrate, the coplanar waveguide including at least one Josephson junction that interrupts the center trace of the coplanar waveguide; At least one superconducting trace is fixed on the coplanar waveguide to form at least one parallel capacitor. Each superconductor trace in the at least one parallel capacitor extends above the upper surface of the central trace of the coplanar waveguide and is separated from the upper surface by a corresponding gap, the gap comprising air or vacuum, and This includes the coplanar waveguide of the at least one Josephson junction and the at least one parallel capacitor establishing a predefined total impedance for the traveling-wave parametric amplifier. Wherein, for each of the at least one superconducting traces, fixing the superconducting trace onto the coplanar waveguide includes: A second substrate including the superconductor trace is provided; The second substrate is bonded to the first substrate such that the superconductor trace is positioned above the upper surface of the central trace and separated from the upper surface by the corresponding gap.

16. The method of claim 15, wherein the coplanar waveguide includes a first ground plane extending along a first side of the central trace and a second ground plane extending along a second side of the central trace, and wherein the joining comprises: A first bump engagement is formed between the first end of the superconductor trace and the first ground plane; as well as A second bump engagement is formed between the second end of the superconductor trace and the second ground plane.

17. The method according to claim 11 or 15, wherein each of the at least one superconducting traces extends in a direction orthogonal to the extension direction of the central trace.

18. The method of claim 11 or 15, wherein each of the at least one superconducting traces extends above the central trace and not above the at least one Josephson junction.

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