Stretchable display device

Abstract

A display device according to an aspect of the disclosure includes a lower substrate that is stretchable, and a plurality of first substrates disposed on the lower substrate and having pixels disposed therein. The display device also includes a plurality of second substrates connecting first substrates adjacent to each other among the plurality of first substrates. The display device also includes a plurality of connection lines disposed on the plurality of second substrates and connecting the pixels.

Description

Technical Field

[0001] This disclosure relates to display devices, and more specifically, to stretchable display devices in which connecting lines can be arranged in various ways. Background Technology

[0002] Display devices used in computer monitors, TVs, mobile phones, etc., include self-emissive organic light-emitting displays (OLEDs) and liquid crystal displays (LCDs) that require a separate light source.

[0003] As display devices are increasingly used in various fields such as computer monitors, TVs, and personal mobile devices, display devices with large effective area and reduced size and weight have been researched. Summary of the Invention

[0004] The inventors of this disclosure have recognized the benefits of display elements, wiring, etc., being formed on a flexible substrate made of flexible plastic, and being able to be stretched in a specific direction and manufactured into a display device capable of being changed into various shapes.

[0005] One or more embodiments of this disclosure provide a display device that can reduce the step in the display area.

[0006] One or more embodiments of this disclosure provide a display device that can reduce line resistance.

[0007] Other embodiments of this disclosure provide a display device that will not be damaged even with repeated stretching.

[0008] The technical benefits of this disclosure are not limited to those described above, and other benefits not mentioned above will be clearly understood by those skilled in the art through the following description.

[0009] According to one aspect of this disclosure, a display device includes a stretchable lower substrate and a plurality of first substrates disposed on the lower substrate and wherein pixels are disposed therein. The display device also includes a plurality of second substrates connecting adjacent first substrates. The display device further includes a plurality of connecting lines disposed on the plurality of second substrates and connecting the pixels. The first substrates include a first lower insulating substrate, a first conductive substrate, and a first upper insulating substrate laminated in sequence. The second substrates include a second lower insulating substrate, a second conductive substrate, and a second upper insulating substrate laminated in sequence. A plurality of display elements are disposed in a first region of the first substrate, and driving elements for driving all the plurality of display elements and an inorganic layer are disposed in a second region of the first substrate. An organic layer covering the plurality of display elements and the driving elements is disposed in the first and second regions of the first substrate. Therefore, driving failures of the display device can be suppressed.

[0010] According to another aspect of this disclosure, the display device includes a flexible substrate capable of reversibly expanding and contracting. The display device also includes a plurality of first rigid substrates disposed on the flexible substrate and having a plate-like shape. The display device further includes a plurality of second rigid substrates disposed between the plurality of first rigid substrates and having a curved shape. The display device also includes a plurality of connecting lines disposed on the plurality of second rigid substrates. The first rigid substrates are provided with first conductive substrates, and the second rigid substrates are provided with second conductive substrates. The multiple connecting lines, the plurality of first conductive substrates, and the plurality of second conductive substrates are electrically connected. Therefore, the step in the display area can be reduced, thereby improving process stability.

[0011] According to this disclosure, multiple display elements are connected to a single driving element. Therefore, driving failures of subpixels can be suppressed.

[0012] Further details regarding the implementation methods are included in the detailed description and accompanying drawings.

[0013] According to this disclosure, the step size in the display area can be reduced. Therefore, process stability can be significantly improved.

[0014] According to this disclosure, the voltage drop between the low-potential power supply and the high-potential power supply can be reduced or minimized. Therefore, images can be displayed stably.

[0015] According to this disclosure, the components will not be damaged when the display device is repeatedly stretched. Therefore, the stretching reliability can be improved.

[0016] The effects of this disclosure are not limited to those illustrated above, and many more effects are included in this specification. Attached Figure Description

[0017] The above and other aspects, features and other advantages of this disclosure will become clearer from the following detailed description taken in conjunction with the accompanying drawings, wherein: Figure 1 This is an exploded perspective view of a display device according to an embodiment of the present disclosure; Figure 2 This is an enlarged plan view illustrating a plurality of pixels of a display device according to an embodiment of the present disclosure; Figure 3 This is an enlarged plan view illustrating the pixels of a display device according to an embodiment of the present disclosure; Figure 4 It is along Figure 3 A schematic cross-sectional view of line IV-IV'; Figure 5 This is a circuit diagram of a sub-pixel of a display device according to an embodiment of the present disclosure; Figure 6 This is a cross-sectional view of a sub-pixel of a display device according to another embodiment of the present disclosure; and Figure 7 This is a cross-sectional view of a sub-pixel of a display device according to yet another embodiment of the present disclosure. Detailed Implementation

[0018] The advantages and features of this disclosure, as well as the methods for implementing it, will become clearer from the embodiments described below with reference to the accompanying drawings. However, this disclosure is not limited to the following embodiments, but can be implemented in various different forms. The embodiments are provided only to complete and fully provide the scope of this disclosure to those skilled in the art to which this disclosure pertains.

[0019] The shapes, dimensions, scales, angles, quantities, etc., illustrated in the accompanying drawings to describe embodiments of the present disclosure are merely examples, and the present disclosure is not limited thereto. Throughout the specification, similar reference numerals generally denote similar elements. Furthermore, in the following description of the present disclosure, detailed descriptions of known related technologies may be omitted to avoid unnecessarily obscuring the subject matter of the disclosure. Terms such as “comprising,” “having,” and “consisting of” as used herein are generally intended to allow for the addition of other components, unless these terms are used in conjunction with the term “only.” Unless otherwise expressly stated, any reference to the singular may include the plural.

[0020] Even if not explicitly stated, components are interpreted as including the normal error range.

[0021] When using terms such as “above,” “over,” “below,” and “next to” to describe the positional relationship between two parts, one or more parts may be placed between the two parts unless these terms are used in conjunction with the terms “immediately” or “directly.”

[0022] When a component or layer is referred to as being "on" another component or layer, it can be directly on the other component or layer, or there can be intermediate components or layers.

[0023] Although the terms "first," "second," etc., are used to describe various components, these components are not limited by these terms. These terms are only used to distinguish one component from other components. Therefore, in the technical concept of this disclosure, the first component mentioned below can be the second component.

[0024] Throughout the instruction manual, the same reference numerals denote the same elements.

[0025] Since the dimensions and thicknesses of each component shown in the figures are for ease of interpretation, this disclosure is not necessarily limited to the dimensions and thicknesses shown for each component.

[0026] The features of the various embodiments of this disclosure can be partially or wholly linked or combined with each other and can be interlocked and operated in various technical ways, and the embodiments can be performed independently or in association with each other.

[0027] In the following, various embodiments of this disclosure will be described in detail with reference to the accompanying drawings.

[0028] Display device

[0029] A display device that can display images even when bent or stretched can be called a stretchable display device. This display device can be more flexible than a typical conventional display device and can be stretchable. Therefore, a user can bend or stretch the display device, and the shape of the display device can be freely changed in response to the user's manipulation. For example, when a user grasps one end of the display device and pulls it, the display device can be stretched in the direction of the pull. When a user places the display device on an uneven outer surface, the display device can bend along the shape of the outer surface of the wall. Furthermore, when the force applied by the user is removed, the display device can return to its original shape.

[0030] Figure 1 This is an exploded perspective view of a display device according to an embodiment of the present disclosure. (Refer to...) Figure 1 The display device 100 includes a lower substrate 111, an upper substrate 112, a plurality of first substrates 121, a plurality of second substrates 122, a plurality of third substrates 123, and a printed circuit board 130. Furthermore, the display device 100 may include a plurality of pixels PX, a gating driver GD, and a data driver DD.

[0031] The lower substrate 111 is a substrate used to support and protect the various components of the display device 100. In addition, the upper substrate 112 is a substrate used to cover and protect the various components of the display device 100.

[0032] Each of the lower substrate 111 and the upper substrate 112 is a flexible substrate and may be made of a flexible or stretchable insulating material. For example, each of the lower substrate 111 and the upper substrate 112 may be made of silicone rubber such as polydimethylsiloxane (PDMS) and elastomers such as polyurethane (PU) or polytetrafluoroethylene (PTFE). Therefore, each of the lower substrate 111 and the upper substrate 112 may have flexible properties. Furthermore, the lower substrate 111 and the upper substrate 112 may be made of the same material, but are not limited thereto, and the material may be modified in various ways.

[0033] Each of the lower substrate 111 and the upper substrate 112 is a ductile substrate and can reversibly expand and contract. Therefore, the lower substrate 111 can also be referred to as a lower ductile substrate or a first ductile substrate, and the upper substrate 112 can also be referred to as an upper ductile substrate or a second ductile substrate. Furthermore, the lower substrate 111 and the upper substrate 112 can have an elastic modulus in the range of several MPa to several hundred MPa. Furthermore, the lower substrate 111 and the upper substrate 112 can have a ductile fracture rate of 100% or higher. In this document, the ductile fracture rate refers to the distance extended when a stretched object breaks or fractures. The lower substrate can have a thickness from 10 μm to 1 mm, but is not limited to this.

[0034] The lower substrate 111 may have a display area AA and a non-display area NA surrounding the display area AA.

[0035] The display area AA is the area on the display device 100 where an image is displayed. A plurality of pixels PX are disposed within the display area AA. Furthermore, each pixel PX may include at least one display element and various driving elements for driving the at least one display element. The various driving elements may include at least one thin-film transistor (TFT) and a capacitor, but are not limited thereto. Furthermore, each of the plurality of pixels PX may be connected to various lines. For example, each of the plurality of pixels PX may be connected to various lines such as a gate line, a data line, a high-potential power line, a low-potential power line, and a reference voltage line.

[0036] The non-display area NA is the area where no image is displayed. The non-display area NA can be an area adjacent to and surrounding the display area AA, but is not limited to this. The non-display area NA is the area in the lower substrate 111 other than the display area AA and can be deformed and separated in various shapes. In the non-display area NA, driving elements for driving the multiple pixels PX disposed in the display area AA are provided. A gating driver GD can be provided in the non-display area NA. Furthermore, multiple pads connected to the gating driver GD and the data driver DD can be provided in the non-display area NA. Each pad can be connected to each pixel among the multiple pixels PX disposed in the display area AA.

[0037] On the lower substrate 111, a plurality of first substrates 121, a plurality of second substrates 122 and a plurality of third substrates 123 are disposed.

[0038] Multiple first substrates 121 are disposed in the display area AA of the lower substrate 111, and multiple pixels PX are disposed on the multiple first substrates 121. In addition, multiple third substrates 123 are disposed in the non-display area NA of the lower substrate 111, and a gate driver GD and multiple pads are formed on the multiple third substrates 123.

[0039] like Figure 1As shown, the gate driver GD can be mounted on one of the multiple third substrates 123 located on the X-axis side of the display area AA. When manufacturing various components on the first substrate 121, the gate driver GD can be formed on the third substrate 123 using a gate-in-panel (GIP) method. Therefore, various circuit components (such as various transistors, capacitors, lines, etc.) constituting the gate driver GD can be disposed on the multiple third substrates 123. However, this disclosure is not limited to this. The gate driver GD can be mounted using a chip-on-film (COF) method. Furthermore, the multiple third substrates 123 can be disposed in a non-display area NA located on the other side of the display area AA in the X-axis direction. The gate driver GD can also be mounted on the multiple third substrates 123 located on the other side of the display area AA in the X-axis direction.

[0040] Reference Figure 1 The plurality of third substrates 123 may be larger in size than the plurality of first substrates 121. Specifically, each of the plurality of third substrates 123 may be larger in size than each of the plurality of first substrates 121. As described above, a gate driver GD may be disposed on each of the plurality of third substrates 123. For example, a stage of the gate driver GD may be disposed on each of the plurality of third substrates 123. Therefore, the area of ​​the various circuit components constituting a stage of the gate driver GD is relatively larger than the area of ​​the pixel PX disposed on the first substrate 121. Therefore, each of the plurality of third substrates 123 may be larger in size than each of the plurality of first substrates 121.

[0041] Figure 1 An example is shown where multiple third substrates 123 are disposed on one side of the Y-axis direction and one side of the X-axis direction in the non-display area NA. However, this disclosure is not limited thereto. The multiple third substrates 123 can be disposed in any part of the non-display area NA. Furthermore, Figure 1 An example is shown where each of the plurality of first substrates 121 and the plurality of third substrates 123 has a quadrilateral shape. However, this disclosure is not limited thereto. Each of the plurality of first substrates 121 and the plurality of third substrates 123 may have various shapes.

[0042] Each of the plurality of second substrates 122 connects adjacent first substrates 121, adjacent third substrates 123, or adjacent first substrates 121 and third substrates 123. Therefore, each of the plurality of second substrates 122 can also be referred to as a connecting substrate. That is, the plurality of second substrates 122 are disposed between the plurality of first substrates 121, between the plurality of third substrates 123, or between the plurality of first substrates 121 and the plurality of third substrates 123.

[0043] Reference Figure 1The plurality of second substrates 122 have a curved shape. For example, the plurality of second substrates 122 may have a sine wave shape. However, the shape of the plurality of second substrates 122 is not limited to this. The plurality of second substrates 122 may have various shapes. For example, the plurality of second substrates 122 may extend in a zigzag manner, or a plurality of rhomboid substrates may extend by connecting to each other at their vertices. Figure 1 The number and shape of the plurality of second substrates 122 shown are provided as an example. The number and shape of the plurality of second substrates 122 can vary depending on the design.

[0044] The plurality of first substrates 121, the plurality of second substrates 122, and the plurality of third substrates 123 are rigid substrates. That is, the plurality of first substrates 121, the plurality of second substrates 122, and the plurality of third substrates 123 are harder than the lower substrate 111. The plurality of first substrates 121, the plurality of second substrates 122, and the plurality of third substrates 123 may have a higher elastic modulus than the lower substrate 111. The elastic modulus is a parameter that shows the rate of deformation of a substrate caused by stress applied to the substrate, and when the elastic modulus is relatively high, the hardness can be relatively high. Therefore, the first substrates 121, the second substrates 122, and the third substrates 123 may also be referred to as a first rigid substrate, a second rigid substrate, and a third rigid substrate, respectively. The elastic modulus of the plurality of first substrates 121, the plurality of second substrates 122, and the plurality of third substrates 123 may be 100 times or more the elastic modulus of the lower substrate 111, but is not limited thereto.

[0045] The plurality of first substrates 121, the plurality of second substrates 122 and the plurality of third substrates 123, which are rigid substrates, can be made of a material that is less flexible than the lower substrate 111.

[0046] Specifically, in the display device 100 according to an embodiment of the present disclosure, the first substrate 121 may include a first lower insulating substrate, a first conductive substrate, and a first upper insulating substrate laminated sequentially. Furthermore, the second substrate 122 may include a second lower insulating substrate, a second conductive substrate, and a second upper insulating substrate laminated sequentially.

[0047] That is, each of the first substrate 121 and the second substrate 122 can have a three-layer structure including an insulating layer, a conductive layer, and an insulating layer. (Refer to the following...) Figure 4 The lamination relationship between the first substrate 121 and the second substrate 122 is described in detail.

[0048] Each of the first lower insulating substrate, the first upper insulating substrate, the second lower insulating substrate, and the second upper insulating substrate may be made of a plastic material with low flexibility. For example, each of the first lower insulating substrate, the first upper insulating substrate, the second lower insulating substrate, and the second upper insulating substrate may be made of polyimide (PI), polyacrylate, polyacetate, etc., but is not limited thereto.

[0049] As described above, the first and second conductive substrates can be made of metallic materials with low flexibility. For example, the first and second conductive substrates can be made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Alternatively, the first and second conductive substrates can be made of alloys of two or more of them, or of multiple layers thereof, but are not limited thereto.

[0050] Furthermore, unlike the first substrate 121 and the second substrate 122, each of the plurality of third substrates 123 may be a single layer made of a plastic material with low flexibility, but is not limited thereto.

[0051] In some embodiments, the lower substrate 111 may be defined as including a plurality of first lower patterns and second lower patterns. The plurality of first lower patterns may be disposed in the region of the lower substrate 111 overlapping with the plurality of first substrates 121 and the plurality of third substrates 123. Furthermore, the second lower patterns may be disposed in regions other than those of the plurality of first substrates 121 and the plurality of third substrates 123. Alternatively, the second lower patterns may be disposed throughout the entire area of ​​the display device 100.

[0052] In this case, the first lower pattern can have a higher elastic modulus than the second lower pattern. For example, the plurality of first lower patterns can be made of the same material as the plurality of first substrates 121 and the plurality of third substrates 123. Furthermore, the second lower pattern can be made of a material with a lower elastic modulus than the plurality of first substrates 121 and the plurality of third substrates 123.

[0053] In other words, the first pattern can be made of polyimide (PI), polyacrylate, polyacetate, etc. The second pattern can be made of silicone rubber such as polydimethylsiloxane (PDMS) and elastomers such as polyurethane (PU) or polytetrafluoroethylene (PTFE).

[0054] A gating driver GD is a component that provides gating voltages to multiple pixels PX disposed in a display area AA. The gating driver GD includes multiple stages formed on multiple third substrates 123, and the stages of the gating driver GD can be electrically connected to each other. Therefore, a gating voltage output from one stage can be transferred to another stage. Furthermore, each stage sequentially provides gating voltages to the multiple pixels PX connected to that stage.

[0055] A power supply can be connected to a gating driver GD and can provide a gating drive voltage and a gating clock voltage to the gating driver GD. Furthermore, the power supply can be connected to multiple pixels PX and can provide a pixel drive voltage to each of the multiple pixels PX. That is, the power supply can also be formed on multiple third substrates 123. The power supply can be formed adjacent to the gating driver GD on an outer substrate. Furthermore, the power supplies formed on the multiple third substrates 123 can be electrically connected to each other. That is, the multiple power supplies formed on the multiple third substrates 123 can be connected via gating power connection lines and pixel power connection lines. Therefore, each of the multiple power supplies can provide a gating drive voltage, a gating clock voltage, and a pixel drive voltage.

[0056] The printed circuit board 130 is configured to transmit signals and voltages from a controller to a display element for driving the display element. Therefore, the printed circuit board 130 can also be referred to as a driving substrate. A controller, such as an IC chip or circuit, can be mounted on the printed circuit board 130. Furthermore, a memory, processor, etc., can also be mounted on the printed circuit board 130. Moreover, the printed circuit board 130 disposed in the display device 100 may include stretchable and non-stretchable regions to ensure stretchability. Furthermore, IC chips, circuits, memory, processors, etc., can be mounted on the non-stretchable regions. Furthermore, lines electrically connected to the IC chips, circuits, memory, and processor can be provided in the stretchable regions. Furthermore, the printed circuit board 130 can be bonded to multiple pads of multiple third substrates 123 disposed in a non-display area NA.

[0057] The data driver DD is a component that provides data voltage to multiple pixels PX disposed in the display area AA. The data driver DD can be configured as an IC chip and is therefore also referred to as a data integrated circuit (D-IC). Furthermore, the data driver DD can be disposed in a non-stretchable area of ​​the printed circuit board 130. That is, the data driver DD can be mounted on the printed circuit board 130 as a chip-on-board (COB). Moreover, the data driver DD provides data voltage to each of the multiple pixels PX disposed in the display area AA via multiple pads disposed on multiple third substrates 123. However, Figure 1 An example of mounting a data driver DD using the COB method is illustrated. However, this disclosure is not limited to this. The data driver DD can also be mounted using the COF method, the chip-on-glass (COG) method, the tape-on-package (TCP) method, etc.

[0058] also, Figure 1 An example is shown where a third substrate 123 is disposed in a non-display area NA above the display area AA, corresponding to the first substrate 121 disposed in a row within the display area AA. Furthermore, Figure 1An example is shown where the data driver DD is disposed on the printed circuit board 130. However, this disclosure is not limited thereto. That is, the third substrate 123 and the data driver DD may be configured to correspond to the first substrate 121 disposed on multiple rows.

[0059] In the following text, reference will be made to Figures 2 to 4 The display area AA of the display device 100 according to an embodiment of the present disclosure will be described in more detail.

[0060] Layout in the display area

[0061] Figure 2 This is an enlarged plan view illustrating a plurality of pixels of a display device according to an embodiment of the present disclosure. Figure 3 This is an enlarged plan view illustrating the pixels of a display device according to an embodiment of the present disclosure. Figure 4 It is along Figure 3 A schematic cross-sectional view taken from line IV-IV'.

[0062] For ease of description, Figure 3 Only the arrangement relationship between the pixels and the first connecting line 181 is illustrated. Figure 3 In the diagram, the first lower insulating substrate 121a and the first upper insulating substrate 121c are shown in solid lines, while the first conductive substrate 121b and the second conductive substrate 122b are shown in dashed lines.

[0063] Reference Figure 1 and Figure 2 A plurality of first substrates 121 are disposed on a lower substrate 111 in the display area AA. The plurality of first substrates 121 are configured to be spaced apart from each other on the lower substrate 111. For example, the plurality of first substrates 121 may be disposed on the lower substrate 111 in a matrix configuration, such as... Figure 1 As shown, but not limited to.

[0064] Reference Figure 2A pixel PX comprising multiple sub-pixels SPX is disposed on a first substrate 121. Furthermore, each sub-pixel SPX may include an LED 170 as a display element, and a driving transistor 160 and a switching transistor 150 as driving elements for driving the LED 170. Specifically, a sub-pixel SPX may include a first LED 170a and a second LED 170b, and the first LED 170a and the second LED 170b may be electrically connected to the same driving element. Therefore, a single driving element can drive both the first LED 170a and the second LED 170b. Furthermore, the first LED 170a and the second LED 170b disposed in the sub-pixel SPX can display the same color. Therefore, in the sub-pixel SPX, the first LED 170a and the second LED 170b can be driven by a single driving element to display a single color.

[0065] However, in a sub-pixel SPX, the display element is not limited to LEDs, and organic LEDs can be used. Furthermore, multiple sub-pixel SPXs can include, but are not limited to, red, green, and blue sub-pixels. The colors of multiple sub-pixel SPXs can be changed in various ways if desired.

[0066] In conventional display devices, display elements are matched one-to-one with driving elements. In this case, when a display element is not aligned with a driving element, the display element is not driven.

[0067] However, in the display device 100 according to the embodiments of the present disclosure, multiple display elements are connected to a single driving element. Therefore, even when a display element is not aligned with the driving element, another display element can still be connected to the driving element. Therefore, in the display device 100 according to the embodiments of the present disclosure, driving failures of sub-pixels can be suppressed. Therefore, the driving failure rate of the display device 100 according to the embodiments of the present disclosure can be improved.

[0068] Additionally, refer to Figure 2 The connecting line 180 includes a first connecting line 181 and a second connecting line 182. The first connecting line 181 and the second connecting line 182 are disposed between a plurality of first substrates 121. Specifically, the first connecting line 181 refers to the line in the connecting line 180 that extends in the X-axis direction between the plurality of first substrates 121. The second connecting line 182 refers to the line in the connecting line 180 that extends in the Y-axis direction between the plurality of first substrates 121.

[0069] The connecting wire 180 may be made of a metallic material such as copper (Cu), aluminum (Al), titanium (Ti), or molybdenum (Mo). Alternatively, the connecting wire 180 may have a laminated structure of metallic materials, such as copper / molybdenum-titanium (Cu / MoTi) or titanium / aluminum / titanium (Ti / Al / Ti), but is not limited thereto.

[0070] In typical display devices, various lines, such as multiple gate lines and multiple data lines, extend in straight lines and are arranged between multiple sub-pixels. Furthermore, multiple sub-pixels are connected to a single signal line. Therefore, in typical display devices, various lines, such as gate lines, data lines, high-potential power lines, and reference voltage lines, extend continuously from one side of the organic light-emitting display device to the other on the substrate.

[0071] In contrast, in the display device 100 according to the embodiments of the present disclosure, various lines formed as straight lines and considered to be used in general organic light-emitting display devices, such as gate lines, data lines, high-potential power lines, and reference voltage lines, are provided only on the plurality of first substrates 121 and the plurality of third substrates 123. That is, in the display device 100 according to the embodiments of the present disclosure, lines formed as straight lines are provided only on the plurality of first substrates 121 and the plurality of third substrates 123.

[0072] In the display device 100 according to an embodiment of the present disclosure, pads on two adjacent first substrates 121 or two adjacent third substrates 123 can be connected by connecting lines 180 to connect discontinuous lines on the first substrates 121 or third substrates 123. That is, the connecting lines 180 electrically connect two adjacent first substrates 121, two adjacent third substrates 123, and pads on adjacent first substrates 121 and third substrates 123. Therefore, the display device 100 according to an embodiment of the present disclosure may include multiple connecting lines 180 to electrically connect various lines such as gate lines, data lines, high-potential power lines, and reference voltage lines between multiple first substrates 121, between multiple third substrates 123, and between multiple first substrates 121 and multiple third substrates 123. For example, gate lines may be provided on multiple first substrates 121 arranged adjacent to each other in the X-axis direction. Furthermore, gate pads may be provided at both ends of the gate lines. In this configuration, multiple gate pads on a plurality of first substrates 121 arranged adjacent to each other in the X-axis direction can be connected to each other via a first connecting line 181 serving as a gate line. Therefore, the gate lines provided on the plurality of first substrates 121 and the first connecting line 181 provided on the third substrate 123 can be used as a single gate line. Furthermore, lines that can extend in the X-axis direction, such as light-emitting signal lines, low-potential power lines, and high-potential power lines, which can be included in all the various lines in the display device 100, can also be electrically connected via the first connecting line 181 as described above.

[0073] Reference Figure 2 The first connection line 181 can connect to pads on two first substrates 121 arranged side-by-side among a plurality of first substrates 121 arranged adjacent to each other in the X-axis direction. Each first connection line 181 can be used as a gate line, a light-emitting signal line, a high-potential power line, or a low-potential power line, but is not limited thereto. For example, the first connection line 181 can be used as a gate line and electrically connected to gate pads on two first substrates 121 arranged side-by-side in the X-axis direction. Therefore, as described above, the gate pads on a plurality of first substrates 121 arranged along the X-axis direction can be connected by the first connection line 181 used as a gate line. A single gate voltage can be transmitted to the gate pad.

[0074] Furthermore, the second connection line 182 can connect to pads on two first substrates 121 arranged side-by-side among a plurality of first substrates 121 arranged adjacent to each other in the Y-axis direction. Each second connection line 182 can be used as a data line or a reference voltage line, but is not limited thereto. For example, the second connection line 182 can be used as a data line and electrically connected to data lines on two first substrates 121 arranged side-by-side in the Y-axis direction. Therefore, as described above, the internal lines provided on the plurality of first substrates 121 in the Y-axis direction can be connected by multiple second connection lines 182 used as data lines. A single data voltage can be transmitted to the data line.

[0075] In the following text, reference will be made to Figure 3 and Figure 4 Describe in detail the planar and cross-sectional structure of the display area.

[0076] The planar and cross-sectional structure of the display area

[0077] In the display device 100 according to an embodiment of the present disclosure, a first lower insulating substrate 121a, a first conductive substrate 121b and a first upper insulating substrate 121c constituting a first substrate 121 may be sequentially laminated on the lower substrate 111.

[0078] Furthermore, the second lower insulating substrate 122a, the second conductive substrate 122b, and the second upper insulating substrate 122c constituting the second substrate 122 can be sequentially laminated onto the lower substrate 111.

[0079] Reference Figure 4 The second lower insulating substrate 122a can be disposed on the same layer as the first lower insulating substrate 121a. Furthermore, the second conductive substrate 122b can be disposed on the same layer as the first conductive substrate 121b. Additionally, the second upper insulating substrate 122c can be disposed on the same layer as the first upper insulating substrate 121c.

[0080] Reference Figure 3The first conductive substrate 121b can be divided into multiple conductive substrates or multiple conductive layers spaced apart from each other. For example, the first conductive substrate 121b can be divided into a (1-1) conductive substrate 121b-1 and a (1-2) conductive substrate 121b-2. Furthermore, the (1-1) conductive substrate 121b-1 can have the same dimensions as the (1-2) conductive substrate 121b-2, but its dimensions can vary according to design requirements.

[0081] Furthermore, the second conductive substrate 122b may be included in all of the second substrates 122, but is not limited thereto. For example, the second conductive substrate 122b may be included in only some of the plurality of second substrates 122.

[0082] like Figure 3 As shown, if the plurality of first connection lines 181 include connection line (1-1) 181-1, connection line (1-2) 181-2, and connection line (1-3) 181-3, the conductive substrate (2-1) 122b-1 may be included in the second substrate 122 overlapping with the connection line (1-1) 181-1. Furthermore, the conductive substrate (2-2) 122b-2 may be included in the second substrate 122 overlapping with the connection line (1-2) 181-2. However, the second conductive substrate 122b may not be included in the second substrate 122 overlapping with the connection line (1-3) 181-3.

[0083] The second conductive substrate 122b may include a (2-1) conductive substrate 122b-1 and a (2-2) conductive substrate 122b-2. The (2-1) conductive substrate 122b-1 may overlap with the (1-1) connecting line 181-1, and the (2-2) conductive substrate 122b-2 may overlap with the (1-2) connecting line 181-2.

[0084] Furthermore, the (1-1) conductive substrate 121b-1 can be connected to the (2-1) conductive substrate 122b-1 in the display area. The (2-1) conductive substrate 122b-1 can be electrically connected to the (1-1) connecting line 181-1 in the non-display area.

[0085] Furthermore, the (1-1) conductive substrate 121b-1 and the (2-1) conductive substrate 122b-1 can be connected in series with each other. In addition, the (1-1) conductive substrate 121b-1 and the (2-1) conductive substrate 122b-1 connected in series with each other can be connected in parallel to the (1-1) connecting line 181-1.

[0086] The (1-2) conductive substrate 121b-2 can be connected to the (2-2) conductive substrate 122b-2 in the display area. The (2-2) conductive substrate 122b-2 can be electrically connected to the (1-2) connecting line 181-2 in the non-display area.

[0087] Therefore, the (1-2) conductive substrate 121b-2 and the (2-2) conductive substrate 122b-2 can be connected in series with each other. In addition, the (1-2) conductive substrate 121b-2 and the (2-2) conductive substrate 122b-2 connected in series with each other can be connected in parallel to the (1-2) connecting line 181-2.

[0088] Therefore, when the (1-1) connecting line 181-1 is used as a low-potential power supply line, all the (1-1) conductive substrates 121b-1 and (2-1) conductive substrates 122b-1 connected in parallel with the (1-1) connecting line 181-1 can be applied with a low-potential power supply. Therefore, the (1-1) conductive substrates 121b-1 and (2-1) conductive substrates 122b-1, as well as the (1-1) connecting line 181-1, can be used as low-potential power supply lines.

[0089] Furthermore, when the (1-2) connecting line 181-2 is used as a high-potential power supply line, all the (1-2) conductive substrates 121b-2 and (2-2) conductive substrates 122b-2 connected in parallel with the (1-2) connecting line 181-2 can be applied with a high-potential power supply. Therefore, the (1-2) conductive substrates 121b-2 and (2-2) conductive substrates 122b-2, as well as the (1-2) connecting line 181-2, can be used as high-potential power supply lines.

[0090] In other words, in the display device according to the embodiments of this disclosure, the low-potential power line and the high-potential power line are not only implemented through the first connecting line 181. The first conductive substrate 121b and the second conductive substrate 122b, which are connected in series with each other, can be connected in parallel to the first connecting line 181 to implement the low-potential power line and the high-potential power line.

[0091] Therefore, the line resistance of the low-potential power line and the high-potential power line can be significantly reduced. Therefore, the voltage drop of the low-potential power supply and the high-potential power supply can be reduced or minimized. Therefore, the display device according to the embodiments of this disclosure can stably display images.

[0092] In addition, refer to Figure 3 and Figure 4 The first substrate 121 can be divided into a first region A1 in which a first LED 170a and a second LED 170b, which serve as multiple display elements, are disposed, and a second region A2 in which a driving transistor 160 and a switching transistor 150, which serve as driving elements for driving the multiple display elements, are disposed.

[0093] A reflective layer RF is disposed in a first region A1 of the first substrate 121. The reflective layer RF is used to reflect light emitted from LEDs 170a and 170b toward the lower substrate 111 to the upper part of the display device 100 and output the light to the outside. The reflective layer RF may be made of a metallic material with high reflectivity.

[0094] Furthermore, the first conductive substrate 121b disposed below the reflective layer RF can also be made of a metallic material with high reflectivity. Therefore, the light extraction efficiency of the display device 100 can be further increased.

[0095] An adhesive layer AD covering the reflective layer RF can be disposed on the reflective layer RF. The adhesive layer AD is used to attach LEDs 170a and 170b to the reflective layer RF and to insulate the reflective layer RF, which is made of metallic material, from LEDs 170a and 170b. The adhesive layer AD can be made of thermosetting or photocurable materials, but is not limited to these. Figure 4 The example illustrates an adhesive layer AD configured to cover only the reflective layer RF. However, the location of the adhesive layer AD is not limited to this.

[0096] A first LED 170a and a second LED 170b are disposed on an adhesive layer AD. Each of the first LED 170a and the second LED 170b is configured to overlap with a reflective layer RF. The first LED 170a and the second LED 170b respectively include n-type layers 171a and 171b, active layers 172a and 172b, p-type layers 173a and 173b, n-electrodes 175a and 175b, and p-electrodes 174a and 174b. In the following text, each of the first LED 170a and the second LED 170b may have a lateral structure.

[0097] Specifically, the n-type layers 171a and 171b of LEDs 170a and 170b are configured to overlap with the reflective layer RF on the adhesive layer AD. The n-type layers 171a and 171b can be formed by implanting n-type impurities into gallium nitride, which has excellent crystallinity. Active layers 172a and 172b are disposed on the n-type layers 171a and 171b. The active layers 172a and 172b are light-emitting layers in LEDs 170a and 170b and can be made of a nitride semiconductor (e.g., indium gallium nitride). P-type layers 173a and 173b are disposed on the active layers 172a and 172b. The p-type layers 173a and 173b can be formed by implanting p-type impurities into gallium nitride. However, the materials of the n-type layers 171a and 171b, the active layers 172a and 172b, and the p-type layers 173a and 173b are not limited to these.

[0098] p-electrodes 174a and 174b are disposed on p-type layers 173a and 173b of LEDs 170a and 170b. Furthermore, n-electrodes 175a and 175b are disposed on n-type layers 171a and 171b of LEDs 170a and 170b. The n-electrodes 175a and 175b are spaced apart from the p-electrodes 174a and 174b. Specifically, LEDs 170a and 170b can be manufactured by sequentially laminating n-type layers 171a and 171b, active layers 172a and 172b, and p-type layers 173a and 173b, and then etching predetermined areas of the active layers 172a and 172b and the p-type layers 173a and 173b, thereby forming the n-electrodes 175a and 175b and the p-electrodes 174a and 174b. In this case, the predetermined area can be the space separating the n-electrodes 175a and 175b from the p-electrodes 174a and 174b, and can be etched to expose a portion of the n-type layers 171a and 171b. In other words, the surfaces on which the n-electrodes 175a and 175b and the p-electrodes 174a and 174b are disposed may not be flat and may have different height levels. Therefore, the p-electrodes 174a and 174b are disposed on the p-type layers 173a and 173b, and the n-electrodes 175a and 175b are disposed on the n-type layers 171a and 171b. Furthermore, the p-electrodes 174a and 174b and the n-electrodes 175a and 175b are arranged to be spaced apart from each other at different height levels. Therefore, the n-electrodes 175a and 175b can be positioned closer to the reflective layer RF than the p-electrodes 174a and 174b. Furthermore, the n electrodes 175a and 175b and the p electrodes 174a and 174b can be made of a conductive material (e.g., a transparent conductive oxide). Additionally, the n electrodes 175a and 175b and the p electrodes 174a and 174b can be made of the same material. However, this disclosure is not limited thereto.

[0099] Reference Figure 4 In the second region A2 of the first substrate 121, a plurality of inorganic insulating layers are disposed on the plurality of first substrates 121. For example, the plurality of inorganic insulating layers may include a buffer layer 141, a gate insulating layer 142, a first interlayer insulating layer 143, a second interlayer insulating layer 144, and a passivation layer 145, and these layers may be collectively referred to as inorganic insulating layers or inorganic layers. However, this disclosure is not limited thereto. For example, various inorganic insulating layers may also be disposed on the plurality of first substrates 121. One or more of the buffer layer 141, the gate insulating layer 142, the first interlayer insulating layer 143, the second interlayer insulating layer 144, and the passivation layer 145 may be omitted.

[0100] A buffer layer 141 is disposed on a plurality of first substrates 121. The buffer layer 141 is formed on the plurality of first substrates 121 to protect the various components of the display device 100 from moisture (H2O) and oxygen (O2) seeping in from the outer side of the lower substrate 111 and the plurality of first substrates 121. The buffer layer 141 may be made of an insulating material. For example, the buffer layer 141 may be formed as a single inorganic layer or multiple inorganic layers of silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiON). However, depending on the structure or characteristics of the display device 100, the buffer layer 141 may be omitted.

[0101] Here, the buffer layer 141 may be formed only in the second region A2. As described above, the buffer layer 141 may be made of an inorganic material. Therefore, when the display device 100 is stretched, the buffer layer 141 may be damaged, for example, easily broken. Therefore, in the display device 100 according to the embodiment of the present disclosure, the buffer layer 141 is formed only in the second region A2. Therefore, even when the display device 100 is deformed, for example, bent or stretched, damage to the buffer layer 141 can be suppressed.

[0102] Reference Figure 4 A switching transistor 150, including a gate electrode 151, an active layer 152, a source electrode 153, and a drain electrode 154, is formed on a buffer layer 141. Furthermore, a driving transistor 160, including a gate electrode 161, an active layer 162, a source electrode 163, and a drain electrode 164, is formed on the buffer layer 141.

[0103] First, refer to Figure 4 The active layer 152 of the switching transistor 150 and the active layer 162 of the driving transistor 160 are disposed on the buffer layer 141. For example, each of the active layer 152 of the switching transistor 150 and the active layer 162 of the driving transistor 160 may be made of oxide semiconductor. Alternatively, each of the active layer 152 of the switching transistor 150 and the active layer 162 of the driving transistor 160 may be made of amorphous silicon (a-Si), polycrystalline silicon (poly-Si), organic semiconductor, etc.

[0104] A gate insulating layer 142 is disposed on the active layer 152 of the switching transistor 150 and the active layer 162 of the driving transistor 160. The gate insulating layer 142 is configured to electrically insulate the gate electrode 151 of the switching transistor 150 from the active layer 152 of the switching transistor 150, and to electrically insulate the gate electrode 161 of the driving transistor 160 from the active layer 162 of the driving transistor 160. Furthermore, the gate insulating layer 142 may be made of an insulating material. For example, the gate insulating layer 142 may be formed as a single inorganic layer or multiple inorganic layers of silicon nitride (SiNx) or silicon oxide (SiOx), but is not limited thereto.

[0105] The gate electrode 151 of the switching transistor 150 and the gate electrode 161 of the driving transistor 160 are disposed on the gate insulating layer 142. The gate electrode 151 of the switching transistor 150 and the gate electrode 161 of the driving transistor 160 are spaced apart from each other on the gate insulating layer 142. Furthermore, the gate electrode 151 of the switching transistor 150 overlaps with the active layer 152 of the switching transistor 150, and the gate electrode 161 of the driving transistor 160 overlaps with the active layer 162 of the driving transistor 160.

[0106] Each of the gate electrode 151 of the switching transistor 150 and the gate electrode 161 of the driving transistor 160 may be made of any of the following metallic materials, for example: molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Alternatively, each of the gate electrode 151 of the switching transistor 150 and the gate electrode 161 of the driving transistor 160 may be made of an alloy of two or more of them, or of multiple layers thereof, but is not limited thereto.

[0107] A first interlayer insulating layer 143 is disposed on the gate electrode 151 of the switching transistor 150 and the gate electrode 161 of the driving transistor 160. The first interlayer insulating layer 143 insulates the gate electrode 161 of the driving transistor 160 from the intermediate metal layer IM. The first interlayer insulating layer 143 may also be made of an inorganic material, like the buffer layer 141. For example, the first interlayer insulating layer 143 may be formed as a single inorganic layer or multiple inorganic layers of silicon nitride (SiNx) or silicon oxide (SiOx), but is not limited thereto.

[0108] An intermediate metal layer IM is disposed on the first interlayer insulating layer 143. Furthermore, the intermediate metal layer IM overlaps with the gate electrode 161 of the driving transistor 160. Therefore, a storage capacitor is formed in the region where the intermediate metal layer IM overlaps with the gate electrode 161 of the driving transistor 160. Specifically, the gate electrode 161 of the driving transistor 160, the first interlayer insulating layer 143, and the intermediate metal layer IM form a storage capacitor. However, the location of the intermediate metal layer IM is not limited to this. The intermediate metal layer IM can overlap with another electrode in various ways to form a storage capacitor.

[0109] The intermediate metal layer IM can be made of any of the following metallic materials, such as molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Alternatively, the intermediate metal layer IM can be made of an alloy of two or more of these, or of multiple layers thereof, but is not limited thereto.

[0110] The second interlayer insulating layer 144 is disposed on the intermediate metal layer IM. The second interlayer insulating layer 144 insulates the gate electrode 151 of the switching transistor 150 from the source electrode 153 and drain electrode 154 of the switching transistor 150. Furthermore, the second interlayer insulating layer 144 insulates the intermediate metal layer IM from the source electrode 163 and drain electrode 164 of the driving transistor 160. The second interlayer insulating layer 144 may also be made of an inorganic material, like the buffer layer 141. For example, the second interlayer insulating layer 144 may be formed as a single inorganic layer or multiple inorganic layers of silicon nitride (SiNx) or silicon oxide (SiOx), but is not limited thereto.

[0111] The source electrode 153 and drain electrode 154 of the switching transistor 150 are disposed on the second interlayer insulating layer 144. Furthermore, the source electrode 163 and drain electrode 164 of the driving transistor 160 are disposed on the second interlayer insulating layer 144. The source electrode 153 and drain electrode 154 of the switching transistor 150 are configured to be spaced apart from each other on the same layer. Furthermore, although... Figure 3 The source electrode of the driving transistor 160 is not illustrated, but the source electrode and drain electrode 164 of the driving transistor 160 are also configured to be spaced apart from each other on the same layer. In the switching transistor 150, the source electrode 153 and drain electrode 154 can be electrically connected to the active layer 152 to contact the active layer 152. Furthermore, in the driving transistor 160, the source electrode and drain electrode 164 can be electrically connected to the active layer 162 to contact the active layer 162. Additionally, the drain electrode 154 of the switching transistor 150 can be electrically connected to the gate electrode 161 of the driving transistor 160 to contact the gate electrode 161 of the driving transistor 160.

[0112] The source electrode 153 and drain electrodes 154 and 164 can be made of any of the following metallic materials, for example: molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Alternatively, the source electrode 153 and drain electrodes 154 and 164 can be made of an alloy of two or more of them, or of multiple layers thereof, but are not limited thereto.

[0113] Furthermore, in this disclosure, the driving transistor 160 has been described as having a coplanar structure, but various types of transistors having interleaved structures, etc., may also be used.

[0114] Furthermore, despite Figure 4Although not shown, gating pads and data pads may be disposed on the second interlayer insulating layer 144. The gating pads are used to transmit gating voltages to multiple sub-pixels (SPXs). The gating voltages can be transmitted from the gating pads to the gate electrode 151 of the switching transistor 150 via gating lines formed on the first substrate 121. The data pads are used to transmit data voltages to the multiple sub-pixels (SPXs). The data voltages can be transmitted from the data pads to the source electrode 153 of the switching transistor 150 via data lines formed on the first substrate 121. The gating pads and data pads may be made of the same material as the source electrode 153 and the drain electrodes 154 and 164, but are not limited thereto.

[0115] Reference Figure 4 A passivation layer 145 is formed on the switching transistor 150 and the driving transistor 160. That is, the passivation layer 145 covers the switching transistor 150 and the driving transistor 160 to protect them from the penetration of moisture, oxygen, etc. The passivation layer 145 can be made of inorganic materials and formed as a single layer or multiple layers, but is not limited thereto.

[0116] Furthermore, the gate insulating layer 142, the first interlayer insulating layer 143, the second interlayer insulating layer 144, and the passivation layer 145 can be patterned and formed only in the plurality of second regions A2. The gate insulating layer 142, the first interlayer insulating layer 143, the second interlayer insulating layer 144, and the passivation layer 145 can also be made of inorganic materials, like the buffer layer 141. Therefore, when the display device 100 is stretched, the gate insulating layer 142, the first interlayer insulating layer 143, the second interlayer insulating layer 144, and the passivation layer 145 may be damaged, for example, easily broken. Therefore, the gate insulating layer 142, the first interlayer insulating layer 143, the second interlayer insulating layer 144, and the passivation layer 145 may not be formed in the region between the plurality of first substrates 121. The gate insulating layer 142, the first interlayer insulating layer 143, the second interlayer insulating layer 144, and the passivation layer 145 can be patterned only in the second regions A2 of the plurality of first substrates 121.

[0117] In other words, the buffer layer 141, gate insulating layer 142, first interlayer insulating layer 143, second interlayer insulating layer 144, and passivation layer 145 can be disposed in the region corresponding to the second region A2 between the first LED 170a and the second LED 170b. (Refer to...) Figure 4The two ends of the first interlayer insulating layer 143, the second interlayer insulating layer 144, and the passivation layer 145 can contact the side surfaces of the first LED 170a and the second LED 170b. The ends on one side of the first interlayer insulating layer 143, the second interlayer insulating layer 144, and the passivation layer 145 can contact the n-type layer 171a of the first LED 170a. Furthermore, the ends on the other side of the first interlayer insulating layer 143, the second interlayer insulating layer 144, and the passivation layer 145 can contact the n-type layer 171b of the second LED 170b.

[0118] However, this disclosure is not limited thereto. The ends of the buffer layer 141, gate insulating layer 142, first interlayer insulating layer 143, second interlayer insulating layer 144, and passivation layer 145 may contact the side surfaces of the first LED 170a and the second LED 170b. Alternatively, the ends of the gate insulating layer 142, first interlayer insulating layer 143, second interlayer insulating layer 144, and passivation layer 145 may contact the side surfaces of the first LED 170a and the second LED 170b.

[0119] A planarization layer 146 is formed to penetrate the first region A1 and the second region A2 to cover the passivation layer 145, the first LED 170a, and the second LED 170b. The planarization layer 146 is used to planarize the upper portions of the switching transistor 150 and the driving transistor 160, and to planarize the upper and side surfaces of the first LED 170a and the second LED 170b. The planarization layer 146 can be formed as a single layer or multiple layers and can be made of organic materials. Therefore, the planarization layer 146 can also be referred to as an organic insulating layer or an organic layer. For example, the planarization layer 146 can be made of an acrylic-based organic material, but is not limited thereto. Therefore, the planarization layer 146 can compensate for the step between the side surfaces of the first LED 170a and the second LED 170b. Furthermore, the planarization layer 146 can enhance the adhesive strength between the planarization layer 146 and the connecting lines 181 disposed on the upper and side surfaces of the planarization layer 146.

[0120] Reference Figure 3 and Figure 4 Contact line CL1 is disposed on planarization layer 146. Contact line CL1 is used to electrically connect drive transistor 160 to LEDs 170a and 170b. Contact line CL1 can be made of the same material and layer as connecting line 180. Therefore, contact line CL1 can be made of a metallic material such as copper (Cu), aluminum (Al), titanium (Ti), or molybdenum (Mo). Alternatively, contact line CL1 can have a laminated structure of metallic material such as copper / molybdenum-titanium (Cu / MoTi) or titanium / aluminum / titanium (Ti / Al / Ti), but is not limited thereto.

[0121] Contact line CL1 is connected to the n electrodes 175a and 175b of LEDs 170a and 170b through contact holes formed in planarization layer 146. Furthermore, contact line CL1 is connected to the drain electrode 164 of driving transistor 160 through contact holes formed in passivation layer 145 and planarization layer 146. However, this disclosure is not limited thereto. Depending on the type of driving transistor 160, contact line CL1 may be connected to the source electrode of driving transistor 160. The n electrodes 175a and 175b of LEDs 170a and 170b can be electrically connected to the drain electrode 164 of driving transistor 160 via contact line CL1.

[0122] Furthermore, the first connection line 181 is connected to the p-electrodes 174a and 174b of LEDs 170a and 170b through contact holes formed in the planarization layer 146. More specifically, as Figure 4 As shown, the first connection line 181 connecting the p electrodes 174a and 174b of LEDs 170a and 170b can contact a portion of the upper surface and side surface of the planarization layer 146 disposed on the first substrate 121 and can extend to the upper surface of the second substrate 122. Therefore, a low-potential power supply as a common voltage can be applied to the p electrodes 174a and 174b of LEDs 170a and 170b through the first connection line 181.

[0123] When the display device 100 is turned on, a driving voltage corresponding to the data voltage is applied to the drain electrode 164 of the driving transistor 160. Therefore, the driving voltage corresponding to the data voltage is applied to the n electrodes 175a and 175b of LEDs 170a and 170b via contact line CL1. Furthermore, a low-potential power supply, serving as a common voltage, is applied to the p electrodes 174a and 174b of LEDs 170a and 170b via the first connection line 181. Therefore, driving voltages and low-potential power supplies of different levels can be applied to the n electrodes 175a and 175b and the p electrodes 174a and 174b, respectively. Thus, LEDs 170a and 170b can emit light.

[0124] Although not shown in the accompanying drawings, a dam may also be formed on the planarization layer 146 to prevent overlap with LEDs 170a and 170b. The dam is used to define the sub-pixel PXL. Therefore, the dam may be made of an insulating material containing a black material. The dam may be made of, for example, a transparent carbon-based mixture. Specifically, the dam may contain carbon black, but is not limited thereto. The dam may also be made of a transparent insulating material.

[0125] Reference Figure 4 The upper substrate 112 is disposed on the contact line CL1 so as to face the lower substrate 111.

[0126] The upper substrate 112 is used to support various components disposed below it. The upper substrate 112 can be made of the same material as the lower substrate 111. For example, the upper substrate 112 can be made of silicone rubber such as polydimethylsiloxane (PDMS) and elastomers such as polyurethane (PU) or polytetrafluoroethylene (PTFE). Therefore, the upper substrate 112 can be flexible. However, the material of the upper substrate 112 is not limited to this.

[0127] Furthermore, the filler layer 113 can be disposed on the front surface of the lower substrate 111 and can be used to fill the space between the upper substrate 112 and the components disposed on the lower substrate 111. For example... Figure 4 As shown, the filler layer 113 can fill the space between the upper substrate 112 and the first connecting line 181 and the contact line CL1, and attach the upper substrate 112 to the first connecting line 181 and the contact line CL1. The filler layer 113 can be made of a curable adhesive. Specifically, the material of the filler layer 113 can be coated on the front surface of the lower substrate 111 and then cured to form the filler layer 113. Therefore, the filler layer 113 can be disposed between the upper substrate 112 and the first connecting line 181 and the contact line CL1.

[0128] In conventional display devices, the display element is mounted on the driving element, which increases the step height of the display area within the device. Therefore, in conventional display devices, the high step height can lead to an increased process failure rate during subsequent processes after the driving and display elements are formed.

[0129] However, in the display device 100 according to an embodiment of the present disclosure, a plurality of display elements (e.g., LEDs) are disposed in a first region A1 on the first substrate 121. Furthermore, a plurality of driving elements (e.g., driving transistors and switching transistors) are disposed in a second region A2 on the first substrate 121. Therefore, since the display elements are disposed on both sides of the driving elements, the step height of the display area in the display device can be reduced. Thus, in the display device according to an embodiment of the present disclosure, the low step height significantly improves process stability.

[0130] Circuit structure of the display area

[0131] Figure 5 This is a circuit diagram of a sub-pixel of a display device according to an embodiment of the present disclosure.

[0132] In the following description, for ease of description, the structure and operation of the sub-pixel SPX of the display device according to embodiments of the present disclosure will be described when it is a pixel circuit of 2T (transistors) 1C (capacitors). However, the present disclosure is not limited thereto.

[0133] Reference Figure 4 and Figure 5 In a display device according to an embodiment of the present disclosure, each sub-pixel SPX may include a switching transistor 150, a driving transistor 160, a storage capacitor C, and an LED 170.

[0134] In response to the strobe signal SCAN provided via the first connection line 181, the switching transistor 150 applies the data signal DATA provided via the second connection line 182 to the driving transistor 160 and the storage capacitor C.

[0135] Furthermore, the gate electrode 151 of the switching transistor 150 is electrically connected to the first connection line 181. Furthermore, the source electrode 153 of the switching transistor 150 is connected to the second connection line 182. Furthermore, the drain electrode 154 of the switching transistor 150 is connected to the gate electrode 161 of the driving transistor 160.

[0136] The drive transistor 160 can be operated in response to the data voltage DATA stored in the storage capacitor C, enabling the drive current to flow based on the high-potential power supply VDD and the data voltage DATA supplied through the first connection line 181.

[0137] Furthermore, the gate electrode 161 of the driving transistor 160 is electrically connected to the drain electrode 154 of the switching transistor 150. Additionally, the source electrode of the driving transistor 160 is connected to the first connection line 181. Furthermore, the drain electrode 164 of the driving transistor 160 is connected to the LED 170.

[0138] LED 170 can be operated to emit light according to the drive current generated by drive transistor 160. Furthermore, as described above, the n-electrode 175 of LED 170 can be connected to the first connection line 181, and thus a low-potential power supply VSS can be applied. Additionally, the p-electrode 174 of LED 170 can be connected to the drain electrode 164 of drive transistor 160, and thus a drive voltage corresponding to the drive current can be applied.

[0139] Each sub-pixel SPX of the display device according to embodiments of the present disclosure is configured as an example to have a 2T1C structure including a switching transistor 150, a driving transistor 160, a storage capacitor C, and an LED 170. However, when a compensation circuit is added, each sub-pixel SPX can be configured in various ways, such as 3T1C, 4T2C, 5T2C, 6T1C, 6T2C, 7T1C, or 7T2C.

[0140] As described above, a display device according to embodiments of the present disclosure may include a plurality of sub-pixels on a first substrate, which is a rigid substrate. Each of the plurality of sub-pixels SPX may include a switching transistor, a driving transistor, a storage capacitor, and an LED.

[0141] Therefore, the display device according to the embodiments of this disclosure may be stretched due to the lower substrate. Furthermore, each first substrate includes a pixel circuit with a 2T1C structure. Therefore, light can be emitted according to the data voltage at each gating timing.

[0142] As described above, in the display device 100 according to the embodiments of the present disclosure, a plurality of display elements are connected to a single driving element. Therefore, even when a display element is not aligned with the driving element, another display element can still be connected to the driving element. Therefore, in the display device according to the embodiments of the present disclosure, driving failures of sub-pixels can be suppressed. Therefore, the failure rate of the display device according to the embodiments of the present disclosure can be improved.

[0143] Furthermore, in the display device 100 according to the embodiments of the present disclosure, the first conductive substrate 121b and the second conductive substrate 122b, which are connected in series with each other, can be connected in parallel to the first connecting line 181 to realize a low-potential power line and a high-potential power line. Therefore, the line resistance of the low-potential power line and the high-potential power line can be significantly reduced. Therefore, the voltage drop of the low-potential power supply and the high-potential power supply can be reduced or minimized. Therefore, the display device according to the embodiments of the present disclosure can stably display images.

[0144] Furthermore, in the display device 100 according to an embodiment of the present disclosure, a plurality of display elements (e.g., LEDs) are disposed in a first region A1 on a first substrate 121. Additionally, a plurality of driving elements (e.g., driving transistors and switching transistors) are disposed in a second region A2 on the first substrate 121. That is, the driving elements are disposed between the first LED 170a and the second LED 170b. Since the display elements are disposed on both sides of the driving elements, the step height of the display area in the display device can be reduced. Therefore, in the display device according to an embodiment of the present disclosure, the low step height significantly improves process stability.

[0145] In the following, a display device 200 according to another embodiment of the present disclosure will be described in detail. The display device 200 according to another embodiment of the present disclosure differs from the display device 100 according to an embodiment of the present disclosure in terms of the arrangement of the plurality of inorganic layers and planarization layers. Therefore, detailed descriptions of components identical to those of the display device 100 according to an embodiment of the present disclosure will be omitted, and the aforementioned differences will be described in detail.

[0146] Another embodiment of this disclosure

[0147] Figure 6 This is a cross-sectional view of a sub-pixel of a display device according to another embodiment of the present disclosure.

[0148] like Figure 6As shown, in a display device 200 according to another embodiment of the present disclosure, the buffer layer 241, gate insulating layer 242, first interlayer insulating layer 243, second interlayer insulating layer 244, and passivation layer 245 can be patterned and formed only in a plurality of second regions A2. Specifically, the buffer layer 241, gate insulating layer 242, first interlayer insulating layer 243, second interlayer insulating layer 244, and passivation layer 245 can be disposed in the region corresponding to the second region A2 between the first LED 170a and the second LED 170b.

[0149] More specifically, the ends of the buffer layer 241 and the gate insulating layer 242 may not contact the side surface of the adhesive layer AD, but may be spaced apart from it by a predetermined distance. Furthermore, the ends of the first interlayer insulating layer 243, the second interlayer insulating layer 244, and the passivation layer 245 may not contact the side surface of the first LED 170a and the side surface of the second LED 170b, but may be spaced apart from them by a predetermined distance.

[0150] Therefore, a separation space X can be formed between the two ends of the buffer layer 241 and the gate insulating layer 242 and the side surface of the adhesive layer AD. Furthermore, a separation space X can also be formed between the two ends of the first interlayer insulating layer 243, the second interlayer insulating layer 244, and the passivation layer 245 and the side surface of the first LED 170a and the second LED 170b. Additionally, a planarization layer 246 is formed to penetrate the first region A1 and the second region A2 to cover the passivation layer 245, the first LED 170a, and the second LED 170b. The planarization layer 246 is used to planarize the upper portions of the switching transistor 150 and the driving transistor 160, and to planarize the upper and side surfaces of the first LED 170a and the second LED 170b. In addition, the planarization layer 246 can fill the separation space X between the two ends of the buffer layer 241, the gate insulating layer 242, the first interlayer insulating layer 243, the second interlayer insulating layer 244 and the passivation layer 245 and the side surface of the first LED 170a and the side surface of the second LED 170b.

[0151] The planarization layer 246 can be formed as a single layer or multiple layers and can be made of organic materials. Therefore, the planarization layer 246 can also be referred to as an organic insulating layer or an organic layer. For example, the planarization layer 246 can be made of acrylic-based organic materials, but is not limited thereto. Therefore, the planarization layer 246 can compensate for the step between the side surfaces of the first LED 170a and the second LED 170b. In addition, the planarization layer 246 can enhance the adhesive strength between the planarization layer 246 and the connecting lines 181 disposed on the upper surface and side surfaces of the planarization layer 246.

[0152] The buffer layer 241, gate insulating layer 242, first interlayer insulating layer 243, second interlayer insulating layer 244, and passivation layer 245 can also be made of inorganic materials, like the buffer layer 241. Therefore, when the display device 100 is stretched, the buffer layer 241, gate insulating layer 242, first interlayer insulating layer 243, second interlayer insulating layer 244, and passivation layer 245 may be damaged, for example, easily cracked.

[0153] Therefore, in a display device 200 according to another embodiment of the present disclosure, the planarization layer 246 fills the separation space X between the two ends of the buffer layer 241, the gate insulating layer 242, the first interlayer insulating layer 243, the second interlayer insulating layer 244, and the passivation layer 245 and the side surfaces of the first LED 170a and the second LED 170b. Therefore, when the display device 200 is stretched, the impact on the buffer layer 241, the gate insulating layer 242, the first interlayer insulating layer 243, the second interlayer insulating layer 244, and the passivation layer 245 can be reduced or minimized.

[0154] Therefore, the tensile reliability of the display device 200 according to another embodiment of the present disclosure can be improved.

[0155] In the following, a display device 300 according to another embodiment of the present disclosure will be described in detail. The display device 300 according to another embodiment of the present disclosure differs from the display device 100 according to the embodiment of the present disclosure in terms of the arrangement of contact lines. Therefore, detailed descriptions of components identical to those of the display device 100 according to the embodiment of the present disclosure will be omitted, and the aforementioned differences will be described in detail.

[0156] Another embodiment of this disclosure

[0157] Figure 7 This is a cross-sectional view of a sub-pixel of a display device according to yet another embodiment of the present disclosure.

[0158] Reference Figure 7 In another embodiment of the display device 300 according to this disclosure, a contact line CL2 is disposed on a passivation layer 145. The contact line CL2 is used to electrically connect the driving transistor 160 to LEDs 170a and 170b. The contact line CL2 can be made of the same material as the source electrode 153 and the drain electrodes 154 and 164. Therefore, the contact line CL2 can be made of a metallic material such as copper (Cu), aluminum (Al), titanium (Ti), or molybdenum (Mo). Alternatively, the contact line CL2 can have a laminated structure of a metallic material such as copper / molybdenum-titanium (Cu / MoTi) or titanium / aluminum / titanium (Ti / Al / Ti), but is not limited thereto.

[0159] Contact line CL2 is connected to the n electrodes 175a and 175b of LEDs 170a and 170b and the drain electrode 164 of the driving transistor 160. However, this disclosure is not limited thereto. Depending on the type of driving transistor 160, contact line CL2 may be connected to the source electrode of the driving transistor 160. The n electrodes 175a and 175b of LEDs 170a and 170b may be electrically connected to the drain electrode 164 of the driving transistor 160 via contact line CL2.

[0160] Furthermore, the planarization layer 346 is formed to penetrate the first region A1 and the second region A2 to cover the contact line CL2, the first LED 170a, and the second LED 170b. That is, the contact line CL2 can be disposed below the planarization layer 346. The planarization layer 346 is used to planarize the upper part of the contact line CL2 and the upper and side surfaces of the first LED 170a and the second LED 170b. The planarization layer 346 can be formed as a single layer or multiple layers and can be made of organic materials. Therefore, the planarization layer 346 can also be referred to as an organic insulating layer. For example, the planarization layer 346 can be made of an acrylic-based organic material, but is not limited thereto. Therefore, the planarization layer 346 can compensate for the step between the side surfaces of the first LED 170a and the second LED 170b. Furthermore, the planarization layer 346 can enhance the adhesive strength between the planarization layer 346 and the connecting lines 381 disposed on the upper and side surfaces of the planarization layer 346.

[0161] Furthermore, the first connection line 381 is connected to the p-electrodes 174a and 174b of LEDs 170a and 170b through contact holes formed in the planarization layer 346. More specifically, as Figure 7 As shown, the first connection line 381 connecting the p electrodes 174a and 174b of LEDs 170a and 170b can contact the upper and side surfaces of the planarization layer 346 disposed on the first substrate 121 and can extend to the upper surface of the second substrate 122. More specifically, the first connection line 381 can extend on the planarization layer 346 without being disconnected. Therefore, a low-potential power supply as a common voltage can be applied to the p electrodes 174a and 174b of LEDs 170a and 170b through the first connection line 381.

[0162] When the display device 300 is turned on, a driving voltage corresponding to the data voltage is applied to the drain electrode 164 of the driving transistor 160. Therefore, the driving voltage corresponding to the data voltage is applied to the n electrodes 175a and 175b of LEDs 170a and 170b via contact line CL2. Furthermore, a low-potential power supply, serving as a common voltage, is applied to the p electrodes 174a and 174b of LEDs 170a and 170b via the first connection line 381. Therefore, driving voltages and low-potential power supplies of different levels can be applied to the n electrodes 175a and 175b and the p electrodes 174a and 174b, respectively. Thus, LEDs 170a and 170b can emit light.

[0163] In a display device 300 according to another embodiment of the present disclosure, a plurality of display elements are connected to a single driving element via a contact line CL3. Therefore, even when a display element is not aligned with the driving element, another display element can still be connected to the driving element. Therefore, in the display device 300 according to another embodiment of the present disclosure, driving failures of sub-pixels can be suppressed. Therefore, the failure rate of the display device 300 according to another embodiment of the present disclosure can be improved.

[0164] The embodiments of this disclosure can also be described as follows: According to one aspect of this disclosure, a display device includes a stretchable lower substrate and a plurality of first substrates disposed on the lower substrate and wherein pixels are disposed therein. The display device also includes a plurality of second substrates connecting adjacent first substrates among the plurality of first substrates. The display device further includes a plurality of connecting lines disposed on the plurality of second substrates and connecting the pixels. The first substrates include a first lower insulating substrate, a first conductive substrate, and a first upper insulating substrate laminated in sequence. The second substrates include a second lower insulating substrate, a second conductive substrate, and a second upper insulating substrate laminated in sequence. A plurality of display elements are disposed in a first region of the first substrate, and driving elements for driving all the plurality of display elements and an inorganic layer are disposed in a second region of the first substrate. An organic layer covering the plurality of display elements and the driving elements is disposed in the first and second regions of the first substrate. Therefore, driving failures of the display device can be suppressed.

[0165] Multiple display elements can be connected to a single drive element via contact lines.

[0166] The contact wire can be placed on the organic layer.

[0167] The contact wire can be made of the same material as the multiple connecting wires.

[0168] The contact wire can be placed below the organic layer.

[0169] The contact wires can be made of the same material as the source and drain electrodes of the drive element.

[0170] The first conductive substrate and the second conductive substrate can be connected in series with each other.

[0171] The first and second conductive substrates, which are connected in series, can be connected in parallel to any one of the multiple connecting lines.

[0172] The first conductive substrate and the second conductive substrate can be supplied with a low-potential power supply or a high-potential power supply.

[0173] The first conductive substrate and the second conductive substrate can be disposed in the same layer and made of the same material.

[0174] Multiple display elements can emit light of the same color.

[0175] The driving element can be a horizontal LED.

[0176] The two ends of the inorganic layer can contact the side surfaces of multiple display elements.

[0177] The two ends of the inorganic layer can be spaced apart from the side surfaces of multiple display elements.

[0178] The organic layer can fill the space between the two ends of the inorganic layer and the side surfaces of multiple display elements.

[0179] According to another aspect of this disclosure, the display device includes a flexible substrate that can reversibly expand and contract. The display device also includes a plurality of first rigid substrates disposed on the flexible substrate and having a plate-like shape. The display device further includes a plurality of second rigid substrates disposed between the plurality of first rigid substrates and having a curved shape. The display device also includes a plurality of connecting lines disposed on the plurality of second rigid substrates. The first rigid substrates are provided with first conductive substrates, and the second rigid substrates are provided with second conductive substrates. The multiple connecting lines, the plurality of first conductive substrates, and the plurality of second conductive substrates are electrically connected. Therefore, the step in the display area can be reduced, thereby improving process stability.

[0180] The first conductive substrate and the second conductive substrate can be connected in series with each other.

[0181] The first and second conductive substrates, which are connected in series, can be connected in parallel to any one of the multiple connecting lines.

[0182] A first LED and a second LED emitting the same color of light can be disposed on a first rigid substrate, and a driving element for driving all the first LEDs and the second LEDs can be disposed between the first LEDs and the second LEDs. LEDs on the first rigid substrate.

[0183] Each of the first LED and the second LED can be a horizontal LED.

[0184] Although embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, the present disclosure is not limited thereto and can be implemented in many different forms without departing from the technical concept of the present disclosure. Therefore, the embodiments of the present disclosure are provided for illustrative purposes only and are not intended to limit the technical concept of the present disclosure. The scope of the technical concept of the present disclosure is not limited thereto. Therefore, it should be understood that the above embodiments are illustrative in all respects and do not limit the present disclosure. The scope of protection of the present disclosure should be interpreted based on the appended claims, and all technical concepts within their equivalents should be interpreted as falling within the scope of the present disclosure.

[0185] Cross-references to related applications

[0186] This application claims priority to Korean Patent Application No. 10-2020-0156713, filed with the Korean Intellectual Property Office on November 20, 2020, the disclosure of which is incorporated herein by reference.

Claims

1. A display device, the display device comprising: Stretchable lower substrate; A plurality of first substrates are disposed on the lower substrate and pixels are disposed in the plurality of first substrates; A plurality of second substrates are disposed on the lower substrate and each of the plurality of first substrates is connected to an adjacent first substrate among the plurality of first substrates; Multiple connecting lines are disposed on the multiple second substrates and connect the pixels. The first substrate includes a first lower insulating substrate, a first conductive substrate disposed on the first lower insulating substrate, and a first upper insulating substrate disposed on the first conductive substrate. In this configuration, one surface of the first lower insulating substrate contacts one surface of the first conductive substrate, and one surface of the first upper insulating substrate contacts another surface of the first conductive substrate, wherein the other surface of the first conductive substrate is opposite to the first surface of the first conductive substrate. Each of the pixels is disposed on the first upper insulating substrate included in each of the plurality of first substrates. At least one of the second substrates comprises a second lower insulating substrate, a second conductive substrate, and a second upper insulating substrate laminated sequentially. The first conductive substrate and the second conductive substrate are connected in series with each other, and The first conductive substrate and the second conductive substrate, which are connected in series with each other, are connected in parallel to any one of the multiple connecting lines.

2. The display device according to claim 1, wherein, The first conductive substrate and the second conductive substrate are supplied with a low-potential power supply or a high-potential power supply.

3. The display device according to claim 1, wherein, The first conductive substrate and the second conductive substrate are disposed on the same layer and are made of the same material.

4. The display device according to claim 1, wherein, In each of the plurality of first substrates, Multiple display elements are disposed in a first region of the first substrate. The driving element and inorganic layer for driving all of the plurality of display elements are disposed in the second region of the first substrate, and An organic layer covering the plurality of display elements and the driving elements is disposed in the first region and the second region of the first substrate.

5. The display device according to claim 4, wherein, The plurality of display elements are connected to a single driving element via contact lines.

6. The display device according to claim 5, wherein, The contact wire is disposed on the organic layer.

7. The display device according to claim 6, wherein, The contact wire is made of the same material as the plurality of connecting wires.

8. The display device according to claim 5, wherein, The contact line is located below the organic layer.

9. The display device according to claim 8, wherein, The contact wire is made of the same material as the source electrode and drain electrode of the drive element.

10. The display device according to claim 4, wherein, The multiple display elements emit light of the same color.

11. The display device according to claim 4, wherein, The display element is a horizontal light-emitting diode.

12. The display device according to claim 4, wherein, The two ends of the inorganic layer are in contact with the side surfaces of the plurality of display elements.

13. The display device according to claim 4, wherein, The two ends of the inorganic layer are spaced apart from the side surfaces of the plurality of display elements.

14. The display device according to claim 13, wherein, The organic layer fills the space between the two ends of the inorganic layer and the side surfaces of the plurality of display elements.

15. The display device according to claim 4, wherein, The first region and the second region do not overlap.

16. The display device according to claim 1, wherein, The first conductive substrate is made of a reflective metallic material.

17. The display device according to claim 1, wherein, The plurality of first substrates and the plurality of second substrates are more rigid than the lower substrate.

18. A display device, the display device comprising: A resilient substrate that can reversibly expand and contract; A plurality of first rigid substrates are disposed on the flexible substrate and have a plate shape, and each of the plurality of first rigid substrates is provided with a pixel; A plurality of second rigid substrates are disposed on the flexible substrate between the plurality of first rigid substrates; and Multiple connecting lines are disposed on the multiple second rigid substrates. The first rigid substrate includes a first lower insulating substrate, a first conductive substrate disposed on the first lower insulating substrate, and a first upper insulating substrate disposed on the first conductive substrate. In this configuration, one surface of the first lower insulating substrate contacts one surface of the first conductive substrate, and one surface of the first upper insulating substrate contacts another surface of the first conductive substrate, wherein the other surface of the first conductive substrate is opposite to the first surface of the first conductive substrate. Each of the pixels is disposed on the first upper insulating substrate included in each of the plurality of first rigid substrates. At least one of the second rigid substrates is provided with a second conductive substrate. The first conductive substrate and the second conductive substrate are connected in series with each other, and The first conductive substrate and the second conductive substrate, which are connected in series with each other, are connected in parallel to any one of the multiple connecting lines.

19. The display device according to claim 18, wherein, A first LED and a second LED emitting light of the same color are disposed on the first rigid substrate, and A driving element for driving all the first LEDs and the second LEDs is disposed on the first rigid substrate between the first LEDs and the second LEDs.

20. The display device according to claim 19, wherein, Each of the first LED and the second LED is a horizontal LED.

21. The display device according to claim 19, wherein, The first LED and the second LED are disposed in a first region of the first rigid substrate. The driving element is disposed in the second region of the first rigid substrate, and The first region and the second region do not overlap.

22. The display device according to claim 18, wherein, The first conductive substrate is made of a reflective metallic material.

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