Method of inspecting a display device

CN114550626BActive Publication Date: 2026-10-27SAMSUNG DISPLAY CO LTD
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Patent Information

Application Number
CN202111184345.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2020-11-11
Filing Date
2021-10-11
Publication Date
2026-10-27
Estimated Expiration
2041-10-11

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Abstract

A method of inspecting a display device is provided. The display device includes a substrate, a light emitting element on the substrate, a first contact electrode on one end of the light emitting element, and a second contact electrode spaced apart from the first contact electrode and on the other end of the light emitting element. The method of inspecting the display device includes applying a first inspection voltage and a second inspection voltage to the first contact electrode and the second contact electrode, respectively, and measuring a first inspection current, and irradiating the light emitting element with an inspection light and measuring a second inspection current while the first inspection voltage and the second inspection voltage are applied to the first contact electrode and the second contact electrode, respectively.
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Description

[0001] Cross-references to related applications

[0002] This application claims priority and benefit to Korean Patent Application No. 10-2020-0150123, filed on November 11, 2020, with the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to a method for inspecting display devices. Background Technology

[0004] With the development of multimedia, the importance of display devices has increased. Therefore, various types of display devices have been adopted, such as organic light-emitting diode (OLED) displays and liquid crystal displays (LCDs).

[0005] A display device is a device for displaying images and includes a display panel such as a light-emitting display panel or a liquid crystal display panel. The light-emitting display panel may include a light-emitting element such as a light-emitting diode (LED). Examples of light-emitting diodes (LEDs) in this context may include organic light-emitting diodes (OLEDs) that use organic materials as fluorescent and / or phosphorescent materials, and inorganic light-emitting diodes that use inorganic materials as fluorescent and / or phosphorescent materials. Summary of the Invention

[0006] One aspect of the embodiments of this disclosure provides a method for inspecting a display device, wherein the inspection time is shortened and the inspection efficiency is improved.

[0007] According to an aspect of the present disclosure, a method for inspecting a display device is provided. The display device includes a substrate, a light-emitting element on the substrate, a first contact electrode on one end of the light-emitting element, and a second contact electrode spaced apart from the first contact electrode and on the other end of the light-emitting element. The method includes: applying a first test voltage and a second test voltage to the first contact electrode and the second contact electrode, respectively, and measuring a first test current; and while applying the first test voltage and the second test voltage to the first contact electrode and the second contact electrode, respectively, illuminating the light-emitting element with test light and measuring the second test current.

[0008] In an implementation, the method further includes: calculating a test current change, which is the change between a first test current and a second test current; and determining a contact fault between the light-emitting element and the first contact electrode and the second contact electrode based on the calculated test current change.

[0009] In an implementation, the method further includes: determining that the contact between the light-emitting element and the first contact electrode and the second contact electrode is defective when the test current change is less than the reference current change; and determining that the contact between the light-emitting element and the first contact electrode and the second contact electrode is normal when the test current change is greater than or equal to the reference current change.

[0010] In this implementation, the change in the test current is obtained by subtracting the first test current from the second test current.

[0011] In one embodiment, the test light comprises light with a high-energy short-wavelength band. In another embodiment, the light-emitting element comprises a first semiconductor layer at one end of the light-emitting element, a second semiconductor layer at one end of the light-emitting element, and a light-emitting layer between the first semiconductor layer and the second semiconductor layer, wherein the first semiconductor layer comprises an n-type semiconductor layer, and the second semiconductor layer comprises a p-type semiconductor layer.

[0012] In one embodiment, when test light is irradiated, electrons move toward the first semiconductor layer in the light-emitting element, and holes move toward the second semiconductor layer in the light-emitting element, thereby generating a photocurrent in the light-emitting element. In another embodiment, the display device further includes a first electrode and a second electrode spaced apart from each other on a substrate, wherein one end of the light-emitting element is on the first electrode and the other end of the light-emitting element is on the second electrode, wherein a first contact electrode is on the first electrode to contact the first electrode, and a second contact electrode is on the second electrode to contact the second electrode, and wherein a first test voltage is applied to the first contact electrode through the first electrode, and a second test voltage is applied to the second contact electrode through the second electrode.

[0013] In an embodiment, the display device further includes: a first electrode and a second electrode, on a substrate and spaced apart from each other; a first transistor electrically connected to the first electrode; a first voltage line electrically connected to the first transistor; and a second voltage line electrically connected to the second electrode, wherein one end of a light-emitting element is on the first electrode and the other end of the light-emitting element is on the second electrode, and wherein a first test current and a second test current are measured as currents flowing through the second voltage line.

[0014] In one embodiment, a first test voltage is applied to the first contact electrode via a first voltage line, and a second test voltage is applied to the second contact electrode via a second voltage line.

[0015] However, the embodiments of this disclosure are not limited to those set forth herein. The above and other aspects of the embodiments of this disclosure will become more apparent to those skilled in the art upon which this disclosure pertains by referring to the following detailed description of this disclosure. Attached Figure Description

[0016] The above and other aspects and features of this disclosure will become more apparent from the detailed description of embodiments thereof with reference to the accompanying drawings, in which:

[0017] Figure 1 This is a schematic plan view of a display device according to an embodiment;

[0018] Figure 2 It is a schematic layout diagram of lines included in a display device according to an embodiment;

[0019] Figure 3 This is an equivalent circuit diagram of a sub-pixel of a display device according to an embodiment;

[0020] Figure 4 This is a schematic plan view of a pixel of a display device according to an embodiment;

[0021] Figure 5 It is along Figure 4 A cross-sectional view taken by lines Q1-Q1', Q2-Q2', and Q3-Q3';

[0022] Figure 6 This is a schematic diagram of a light-emitting element according to an embodiment;

[0023] Figure 7 yes Figure 5 A magnified view of region A in the image;

[0024] Figure 8 This is a schematic perspective view of an inspection apparatus for a display device according to an embodiment;

[0025] Figure 9 This is a flowchart illustrating a method for inspecting a display device according to an embodiment;

[0026] Figures 10 to 15 This is a cross-sectional view showing the steps of the inspection process for the display device according to an embodiment;

[0027] Figure 16 This is a layout diagram showing the data lines, scan lines, and sensor lines of a display device, used to explain the contact inspection method for each sub-pixel; and

[0028] Figure 17 and Figure 18 It is a cross-sectional view showing the steps in the manufacturing process of a display device. Detailed Implementation

[0029] This disclosure will now be described more fully below with reference to the accompanying drawings, in which embodiments of the disclosure are illustrated. However, this disclosure may be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of this disclosure to those skilled in the art.

[0030] It will also be understood that when a layer is referred to as being "on" another layer or substrate, it can be directly on said other layer or substrate, or an intervening layer may be present. Throughout the specification, the same reference numerals denote the same components.

[0031] It will be understood that although the terms “first,” “second,” etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, without departing from the teachings of this disclosure, the first element discussed below may be referred to as the second element. Similarly, the second element may also be referred to as the first element.

[0032] For ease of description, spatially relative terms such as “below,” “under,” “below,” “below,” “above,” and “above” are used herein to describe the relationship between one element or feature as shown in the figures and another element(s). It will be understood that these spatially relative terms are intended to include different orientations of the device in use or operation, in addition to those depicted in the figures. For example, if the device in the figures is flipped, the element described as “below,” “below,” or “below” other elements or features will then be oriented “above” other elements or features. Thus, the exemplary terms “below” and “below” can include both above and below orientations. The device may be oriented in other ways (e.g., rotated 90 degrees or in other orientations), and the spatially relative descriptive terms used herein should be interpreted accordingly. Furthermore, it will be understood that when a layer is referred to as “between” two layers, it can be the only layer between the two layers, or there may be one or more intervening layers.

[0033] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. As used herein, the terms “substantially,” “about,” and similar terms are used as approximate terms rather than as terms of degree and are intended to explain inherent deviations in measurements or calculations that would be recognized by one of ordinary skill in the art.

[0034] As used herein, unless the context clearly indicates otherwise, the singular forms “a” and “an” are intended to include the plural forms as well. It will also be understood that, when used in this specification, the terms “comprising” and / or “including” specify the presence of the stated features, integrals, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof. As used herein, the terms “and / or” include any and all combinations of one or more of the associated listed items. When appearing after a list of elements, expressions such as “at least one of…” modify the entire list of elements, not individual elements in the list. Furthermore, when describing embodiments of this disclosure, the use of “may” indicates “one or more embodiments of this disclosure.” Additionally, the term “exemplary” is intended to indicate an example or illustration. As used herein, the terms “use,” “using,” and “used” may be considered synonymous with the terms “utilize,” “utilizing,” and “utilized.”

[0035] It will be understood that when an element or layer is referred to as being "on," "connected to," "linked to," or "adjacent to" another element or layer, it can be directly on, directly connected to, directly linked to, or directly adjacent to the other element or layer, or one or more intermediary elements or layers may be present. Conversely, when an element or layer is referred to as being "directly on," "directly connected to," "directly linked to," or "directly adjacent to" another element or layer, no intermediary element or layer is present.

[0036] Any numerical range described herein is intended to include all subranges containing the same numerical precision within the range. For example, the range “1.0 to 10.0” is intended to include all subranges between (and including) the minimum value 1.0 and the maximum value 10.0, i.e., a minimum value equal to or greater than 1.0 and a maximum value equal to or less than 10.0, such as, for example, 2.4 to 7.6. Any maximum value numerical limit described herein is intended to include all lower numerical limits contained therein, and any minimum value numerical limit described herein is intended to include all higher numerical limits contained therein.

[0037] In the following description, embodiments of the present disclosure will be described with reference to the accompanying drawings.

[0038] Figure 1 This is a schematic plan view of a display device according to an embodiment.

[0039] refer to Figure 1 Display device 10 displays moving or still images. Display device 10 can refer to any electronic device that provides a display screen. Examples of display device 10 may include televisions, laptop computers, monitors, billboards, Internet of Things (IoT) devices, mobile phones, smartphones, tablet PCs, electronic watches, smartwatches, watch phones, head-mounted displays, mobile communication terminals, electronic notebooks, e-books, portable multimedia players (PMPs), navigators, game consoles, digital cameras, and portable video cameras.

[0040] Display device 10 includes a display panel for providing a display screen. Examples of display panels may include inorganic light-emitting diode (LED) display panels, organic light-emitting diode (OLED) display panels, quantum dot (QD) light-emitting diode (OLED) display panels, plasma display panels, and field emission display panels. The use of an inorganic LED display panel as an example will be described below, but this disclosure is not limited thereto. Other display panels may also be used, as long as the same technical spirit can be applied.

[0041] In the accompanying drawings illustrating embodiments of the display device 10, a first direction DR1, a second direction DR2, and a third direction DR3 are defined. The first direction DR1 and the second direction DR2 may be directions perpendicular to each other in a plane. The third direction DR3 may be a direction perpendicular to the plane in which the first direction DR1 and the second direction DR2 are positioned. The third direction DR3 is perpendicular to each of the first direction DR1 and the second direction DR2. In embodiments illustrating the display device 10, the third direction DR3 represents the thickness direction (or display direction) of the display device 10.

[0042] Display device 10 may have a rectangular shape, wherein, in a plan view, the side in the first direction DR1 is longer than the side in the second direction DR2. In a plan view, the angle where the longer and shorter sides of display device 10 intersect may be a right angle, but is not limited to this, and may have a rounded curved shape. The shape of display device 10 is not limited to the shape provided as an example and may vary. For example, in a plan view, display device 10 may have a shape such as a square, a rectangle with rounded corners (vertices), a polygon, or a circle.

[0043] The display surface of the display device 10 may be disposed on one side of the third direction DR3, which is the thickness direction. In the embodiment used to explain the display device 10, unless otherwise stated, "upper" indicates the display direction facing the side of the third direction DR3, and similarly, "upper surface" indicates the surface facing the side of the third direction DR3. "Lower" indicates the direction opposite to the display direction, facing the other side of the third direction DR3, and "lower surface" indicates the surface facing the other side of the third direction DR3. Here, the surface facing the other side refers to the "surface facing one side". In addition, "left", "right", "upper", and "lower" indicate the direction when the display device 10 is viewed on a plane. For example, "right side" indicates one side of the first direction DR1, "left side" indicates the other side of the first direction DR1, "upper side" indicates one side of the second direction DR2, and "lower side" indicates the other side of the second direction DR2.

[0044] Display device 10 may include a display area DPA and a non-display area NDA surrounding the display area DPA along its edge or periphery. The display area DPA is the area where an image is displayed, and the non-display area NDA is the area where no image is displayed.

[0045] The shape of the display area DPA can follow the shape of the display device 10. For example, the display area DPA can have a planar rectangular shape similar to the overall shape of the display device 10. The display area DPA can typically occupy the center (or central area) of the display device 10.

[0046] The display area DPA may include multiple pixels PX. The multiple pixels PX may be arranged along a matrix direction (e.g., multiple pixels PX may be arranged along rows and columns). The shape of each pixel PX in a planar view may be rectangular or square. In an embodiment, each pixel PX may include multiple light-emitting elements made of inorganic particles.

[0047] The non-display area NDA can be positioned around the display area DPA. The non-display area NDA can completely or partially surround the display area DPA. The non-display area NDA can form the bezel of the display device 10. The non-display area NDA can be provided with wired, circuit drivers or pads on which external devices are mounted.

[0048] Figure 2 It is a schematic layout diagram of lines included in a display device according to an embodiment.

[0049] refer to Figure 2The display device 10 may include multiple lines. These lines may include a scan line SCL, a sensing line SSL, a data line DTL, an initialization voltage line VIL, a first voltage line VL1, and a second voltage line VL2. Although not shown in the figures, the display device 10 may include other lines.

[0050] As used herein, “connection” can mean not only that any component is physically connected to another component, but also that it is connected to another component through yet another component. Furthermore, it can be understood that one part of a whole component is connected to another part of it. Additionally, it can be understood that the connection between any component and another component includes both direct contact connection and electrical connection through yet another component.

[0051] The scan line SCL and the sensing line SSL can extend along the first direction DR1. The scan line SCL and the sensing line SSL can be connected to the scan driver SDR. The scan driver SDR can include driving circuitry. The scan driver SDR can be disposed in the non-display area NDA. In one embodiment, the scan driver SDR can be disposed on the first short side of the display device 10 (…). Figure 1 The scan driver SDR is connected to the signal connection line CWL, and at least one end of the signal connection line CWL can be connected to an external device by forming a wiring pad WPD_CW in the non-display area NDA.

[0052] The data line DTL and the initialization voltage line VIL can extend in a second direction DR2 that intersects with the first direction DR1. In addition to the portion extending in the second direction DR2, the initialization voltage line VIL may also include a portion branching off in the first direction DR1.

[0053] The first voltage line VL1 and the second voltage line VL2 may extend in the second direction DR2. Each of the first voltage line VL1 and the second voltage line VL2 may also include a portion extending in the first direction DR1. Each of the first voltage line VL1 and the second voltage line VL2 may have a mesh structure, but its structure is not limited thereto.

[0054] Although not shown in the accompanying drawings, each of the pixels PX of the display device 10 can be connected to at least one data line DTL, an initialization voltage line VIL, a first voltage line VL1, and a second voltage line VL2.

[0055] Data line DTL, initialization voltage line VIL, first voltage line VL1, and second voltage line VL2 can be electrically connected to at least one wiring pad WPD. Each wiring pad WPD can be located in a pad area PDA included in the non-display area NDA. The pad area PDA can be located on the first long side of the display device 10 (…). Figure 1 In the non-display area NDA adjacent to the upper side of the display device 10, and disposed on the second long side of the display device 10 ( Figure 1 (In the lower part of the middle) in the adjacent non-display area NDA.

[0056] In one implementation, the data line DTL's wiring pad (WPD_DT, hereinafter referred to as the "data pad") can be located in the lower pad area PDA, and the initialization voltage line VIL's wiring pad (WPD_VINT, hereinafter referred to as the "initialization voltage pad"), the first voltage line VL1's wiring pad (WPD_VDD, hereinafter referred to as the "first voltage pad"), and the second voltage line VL2's wiring pad (WPD_VSS, hereinafter referred to as the "second voltage pad") can be located in the upper pad area PDA. As another example, the data pad WPD_DT, the initialization voltage pad WPD_VINT, the first voltage pad WPD_VDD, and the second voltage pad WPD_VSS can all be located in the same area, i.e., in the upper pad area PDA. External devices can be mounted on the wiring pad WPD. External devices can be mounted on the wiring pad WPD using anisotropic conductive films, ultrasonic bonding, or the like. In addition, during the process of inspecting whether the display device 10 has a contact fault, the current measuring device of the inspection apparatus is electrically connected to the wiring pad WPD of the display device 10 to measure the current or apply voltage.

[0057] Each pixel PX or each sub-pixel SPX (SPX1, SPX2 or SPX3) of the display device 10 (see...) Figure 3 and Figure 4 The display device 10 includes pixel driving circuits. The aforementioned lines can apply a driving signal to each pixel driving circuit while passing through each pixel PX or its periphery. The pixel driving circuit may include transistors and capacitors. The number of transistors and capacitors in each pixel driving circuit can vary. Each sub-pixel SPX of the display device 10 according to an embodiment may have a 3T1C structure in which the pixel driving circuit includes three transistors and one capacitor. Hereinafter, the case of a pixel driving circuit having a 3T1C structure included in the display device 10 will be described as an example, but the invention is not limited thereto, and various other modified pixel structures, such as 2T1C, 7T1C, and 6T1C structures, can also be applied.

[0058] Figure 3This is an equivalent circuit diagram of a sub-pixel of a display device according to an embodiment.

[0059] refer to Figure 3 Each sub-pixel SPX of the display device 10 according to the embodiment may include a light source unit LU, a plurality of transistors T1, T2 and T3, and a storage capacitor CST. The plurality of transistors T1, T2 and T3 may include a first transistor T1, a second transistor T2 and a third transistor T3.

[0060] The light source unit LU emits light according to the current supplied through the first transistor T1. The light source unit LU may include a first electrode, a second electrode, and at least one light-emitting element ED, which is disposed between the first electrode and the second electrode and connected in parallel with each other. The light-emitting element ED can emit light of a specific wavelength band by means of an electrical signal transmitted from the first electrode and the second electrode.

[0061] Furthermore, although the accompanying drawings show multiple light-emitting elements ED included in the light source unit LU arranged in the same direction and connected in parallel with each other, this disclosure is not limited thereto. For example, some of the multiple light-emitting elements ED and other light-emitting elements ED may be arranged in opposite directions to each other.

[0062] One end of the light source unit LU can be connected to the source electrode of the first transistor T1, and the other end can be connected to the second voltage line VL2, providing the second voltage line VL2 with a low potential voltage (hereinafter referred to as the second power supply voltage) lower than the high potential voltage (hereinafter referred to as the first power supply voltage) of the first voltage line VL1. For example, one end of the light-emitting element ED included in the light source unit LU can be connected to the source electrode of the first transistor T1 through the first electrode of the light source unit LU, and the other end of the light-emitting element ED can be connected to the second voltage line VL2 through the second electrode of the light source unit LU.

[0063] The first transistor T1 adjusts the current flowing from the first voltage line VL1, which supplies the first power supply voltage to it, to the light source unit LU based on the voltage difference between its gate electrode and source electrode. For example, the first transistor T1 can be a driving transistor for driving the light source unit LU. The gate electrode of the first transistor T1 can be connected to the second source / drain electrode of the second transistor T2, the source electrode of the first transistor T1 can be connected to the first electrode of the light source unit LU, and the drain electrode of the first transistor T1 can be connected to the first voltage line VL1, to which the first power supply voltage is applied.

[0064] The second transistor T2 is turned on by the scan signal of the scan line SCL to connect the data line DTL to the gate electrode of the first transistor T1. The gate electrode of the second transistor T2 can be connected to the scan line SCL, the second source / drain electrode of the second transistor T2 can be connected to the gate electrode of the first transistor T1, and the first source / drain electrode of the second transistor T2 can be connected to the data line DTL.

[0065] The third transistor T3 is turned on by the sensing signal of the sensing line SSL to connect the initialization voltage line VIL to the source electrode of the first transistor T1. The gate electrode of the third transistor T3 can be connected to the sensing line SSL, and the first source / drain electrode of the third transistor T3 can be connected to the initialization voltage line VIL, and the second source / drain electrode of the third transistor T3 can be connected to the source electrode of the first transistor T1.

[0066] In an implementation, the first source / drain electrode of each of the second transistor T2 and the third transistor T3 may be a source electrode, and its second source / drain electrode may be a drain electrode, but this disclosure is not limited thereto, and vice versa.

[0067] A storage capacitor CST is formed between the gate electrode and the source electrode of the first transistor T1. The storage capacitor CST stores the voltage difference between the gate voltage and the source voltage of the first transistor T1.

[0068] Each of the first transistor T1, the second transistor T2, and the third transistor T3 can be formed as a thin-film transistor. Although in Figure 3 The diagram shows that the first transistor T1, the second transistor T2, and the third transistor T3 are formed as N-type MOSFETs (metal-oxide-semiconductor field-effect transistors), but this disclosure is not limited thereto. That is, the first transistor T1, the second transistor T2, and the third transistor T3 can be formed as P-type MOSFETs, or some of the first transistor T1, the second transistor T2, and the third transistor T3 can be formed as N-type MOSFETs, while the others can be formed as P-type MOSFETs.

[0069] Figure 4 This is a schematic plan view of a pixel of a display device according to an embodiment. Figure 5 It is along Figure 4 The sectional views taken by lines Q1-Q1', Q2-Q2', and Q3-Q3'.

[0070] refer to Figure 4Each pixel PX may include multiple sub-pixels (SPX: SPX1, SPX2, SPX3). For example, a pixel PX may include a first sub-pixel SPX1, a second sub-pixel SPX2, and a third sub-pixel SPX3. The first sub-pixel SPX1 may emit light of a first color, the second sub-pixel SPX2 may emit light of a second color, and the third sub-pixel SPX3 may emit light of a third color. The first color may be blue, the second color may be green, and the third color may be red. However, this disclosure is not limited to this, and sub-pixels SPX may emit light of the same color. Although in Figure 4 The diagram shows that each pixel PX includes three sub-pixels SPX1, SPX2 and SPX3, but this disclosure is not limited thereto, and each pixel PX may include a larger number of sub-pixels SPX.

[0071] Each of the sub-pixels SPX of the display device 10 may include a light-emitting region EMA and a non-light-emitting region. The light-emitting region EMA may be defined as the area through which light emitted from the light-emitting element ED is output, and the non-light-emitting region may be defined as the area where light emitted from the light-emitting element ED does not reach and therefore does not output light.

[0072] The luminous area EMA may include the area in which the light-emitting element ED is disposed and the area adjacent to it. The luminous area EMA may also include the area in which light emitted from the light-emitting element ED is reflected or refracted by another component and output.

[0073] Each sub-pixel SPX may also include a cut-off region CBA located in the non-light-emitting area. The cut-off region CBA may be located above the light-emitting region EMA (or on one side in the second direction DR2) in a sub-pixel SPX. The cut-off region CBA may be located between the light-emitting regions EMA of adjacent sub-pixels SPX in the second direction DR2.

[0074] The luminescent regions EMA of each sub-pixel SPX included in a pixel PX can be arranged to be spaced apart from each other along a first direction DR1. Similarly, the cut-off regions CBA of each sub-pixel SPX included in a pixel PX can be arranged to be spaced apart from each other along the first direction DR1. Although the luminescent regions EMA and the cut-off regions CBA can be arranged to be spaced apart from each other along the first direction DR1, the luminescent regions EMA and the cut-off regions CBA can be arranged alternately along a second direction DR2.

[0075] The cut-off region CBA can be a region in which electrodes 210 and 220 in sub-pixels SPX adjacent to each other along the second direction DR2 are separated from each other. Electrodes 210 and 220 configured for each sub-pixel SPX can be separated from each other in the cut-off region CBA, and portions of electrodes 210 and 220 configured for each sub-pixel SPX can be located within the cut-off region CBA. The light-emitting element ED may not be located within the cut-off region CBA.

[0076] refer to Figure 5 The display device 10 may include a substrate SUB, a circuit layer CCL disposed on the substrate SUB, and a light-emitting element layer EML disposed on the circuit layer CCL. The circuit layer CCL includes a buffer layer 161, a lower metal layer BML, a semiconductor layer, multiple conductive layers, multiple insulating layers, and a via layer 165 disposed on the substrate SUB. The light-emitting element layer EML may be disposed on the via layer 165 of the circuit layer CCL, and may include a first electrode 210 and a second electrode 220, a first dam 400, a light-emitting element ED, a first contact electrode 710 and a second contact electrode 720, multiple insulating layers 510, 520, 530 and 540, and a second dam 600.

[0077] The substrate SUB can be an insulating substrate. The substrate SUB can be made of insulating materials such as glass, quartz, or polymer resin. The substrate SUB can be a rigid substrate, but it can also be a flexible substrate that can be bent, folded, rolled, etc.

[0078] The circuit layer CCL can be disposed on the substrate SUB. The circuit layer CCL may include at least one transistor or the like to drive the light-emitting element layer EML.

[0079] The lower metal layer (BML) can be disposed on the substrate (SUB). The lower metal layer (BML) has a patterned shape. The lower metal layer (BML) can be disposed on the third-direction DR3, overlapping the active layer ACT of the first transistor T1 of the display device 10. The lower metal layer (BML) can be a light-blocking layer for protecting the semiconductor layer from external light. The lower metal layer (BML) can include a light-blocking material. For example, the lower metal layer (BML) can be formed of an opaque metallic material that blocks light transmission. The lower metal layer (BML) can be omitted.

[0080] A buffer layer 161 may be disposed on the lower metal layer BML. The buffer layer 161 may be configured to cover the entire surface of the substrate SUB on which the lower metal layer BML is disposed. The buffer layer 161 can be used to protect the transistor from moisture penetration through the moisture-sensitive substrate SUB. The buffer layer 161 may be formed from a plurality of alternately stacked inorganic layers. For example, the buffer layer 161 may be formed in which silicon oxide (SiO2) is alternately stacked. x ), silicon nitride (SiN)x ) and silicon oxynitride (SiO) x N y Multilayer of at least one of the inorganic layers in )

[0081] A semiconductor layer may be disposed on buffer layer 161. The semiconductor layer may include the active layer ACT of the first transistor T1. The active layer ACT of the first transistor T1 may be configured to overlap with the lower metal layer BML and the gate electrode GE of the first transistor T1, which will be described later, on third-direction DR3.

[0082] The semiconductor layer may include polycrystalline silicon, oxide semiconductors, etc. In one embodiment, when the semiconductor layer includes polycrystalline silicon, the semiconductor layer can be formed by crystallizing amorphous silicon. In another embodiment, the semiconductor layer may include an oxide semiconductor. Examples of oxide semiconductors may include indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium oxide (IGO), indium zinc tin oxide (IZTO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), and indium gallium zinc tin oxide (IGZTO).

[0083] Gate insulating layer 162 may be disposed on buffer layer 161 and semiconductor layer including active layer ACT. Gate insulating layer 162 may be used as gate insulating layer for each of transistors.

[0084] A first conductive layer 110 may be disposed on a gate insulating layer 162. The first conductive layer 110 may include the gate electrode GE of a first transistor T1 and the first capacitance electrode CSE1 of a storage capacitor CST. The gate electrode GE may be configured to overlap with the channel region of the active layer ACT of the first transistor T1 on a third-direction DR3. The first capacitance electrode CSE1 of the storage capacitor CST may be configured to overlap with the second capacitance electrode CSE2 of the storage capacitor CST, which will be described later on a third-direction DR3.

[0085] A first interlayer insulating layer 163 is disposed on the first conductive layer 110. The first interlayer insulating layer 163 can serve as an insulating layer between the first conductive layer 110 and other layers disposed thereon. Furthermore, the first interlayer insulating layer 163 can be configured to cover the first conductive layer 110 and can also protect the first conductive layer 110. The first interlayer insulating layer 163 may include an inorganic insulating material, such as silicon oxide (SiO2). x ), silicon nitride (SiN) x ) or silicon oxynitride (SiO) x N y ).

[0086] The second conductive layer 120 is disposed on the first interlayer insulating layer 163. The second conductive layer 120 may include the drain electrode SD1 and source electrode SD2 of the first transistor T1 and the second capacitance electrode CSE2 of the storage capacitor CST. Although not shown in the figures, the second conductive layer 120 may also include data lines connected to each sub-pixel SPX.

[0087] The drain electrode SD1 and source electrode SD2 of the first transistor T1 can contact the two end regions of the active layer ACT of the first transistor T1 through corresponding contact holes penetrating the first interlayer insulating layer 163 and the gate insulating layer 162. Furthermore, the source electrode SD2 of the first transistor T1 can be electrically connected to the lower metal layer BML through contact holes penetrating the first interlayer insulating layer 163, the gate insulating layer 162, and the buffer layer 161. In some embodiments, the second capacitor electrode CSE2 of the storage capacitor CST and the source electrode SD2 of the first transistor T1 can be integrally formed into a single layer. A portion of the integral layer may include the second capacitor electrode CSE2, and another portion may include the source electrode SD2 of the first transistor T1.

[0088] A second interlayer insulating layer 164 is disposed on the second conductive layer 120. The second interlayer insulating layer 164 can serve as an insulating layer between the second conductive layer 120 and other layers disposed thereon. Furthermore, the second interlayer insulating layer 164 can be configured to cover the second conductive layer 120 and can also protect the second conductive layer 120. The second interlayer insulating layer 164 may include an inorganic insulating material, such as silicon oxide (SiO2). x ), silicon nitride (SiN) x ) or silicon oxynitride (SiO) x N y ).

[0089] The third conductive layer 130 is disposed on the second interlayer insulating layer 164. The third conductive layer 130 includes a first voltage line VL1, a second voltage line VL2, and a conductive pattern CDP.

[0090] A high potential voltage (or a first power supply voltage) supplied to the first transistor T1 can be applied to the first voltage line VL1, and a low potential voltage (or a second power supply voltage) supplied to the second electrode 220 can be applied to the second voltage line VL2. The first voltage line VL1 can contact the drain electrode SD1 of the first transistor T1 through a contact hole penetrating the second interlayer insulating layer 164.

[0091] The conductive pattern CDP can be electrically connected to the source electrode SD2 of the first transistor T1. Although not shown in the figures, the conductive pattern CDP can contact the source electrode SD2 of the first transistor T1 through a contact hole penetrating the second interlayer insulating layer 164. The conductive pattern CDP can be electrically connected to the first electrode 210 through the first contact hole CT1, which will be described later, to transmit the first power supply voltage applied from the first voltage line VL1 to the first electrode 210.

[0092] A via layer 165 is disposed on the third conductive layer 130. The via layer 165 can perform a surface planarization function, flattening the steps formed by the underlying layers. The via layer 165 may include an organic insulating material, such as an organic material like polyimide (PI).

[0093] In the following text, reference will be made to Figure 4 and Figure 5 The structure of the light-emitting element layer EML disposed on the via layer 165 of the circuit layer CCL is described in detail.

[0094] The first dam 400 may be disposed on the circuit layer CCL. The first dam 400 may be disposed on the via layer 165 of the circuit layer CCL. In a plan view, the first dam 400 has a shape extending in the second direction DR2 in each sub-pixel SPX. The first dam 400 may include a first sub-dam 410 and a second sub-dam 420 spaced apart from each other in the first direction DR1. The space formed by the spaced-apart first sub-dam 410 and second sub-dam 420 can provide an area in which a plurality of light-emitting elements ED are arranged.

[0095] Each of the first sub-dike portion 410 and the second sub-dike portion 420 may include a structure in which at least a portion protrudes from the upper surface of the circuit layer CCL. The protruding portion of each of the first sub-dike portion 410 and the second sub-dike portion 420 may have a sloping side surface. Because each of the first sub-dike portion 410 and the second sub-dike portion 420 includes a sloping side surface, the direction of travel of light emitted from the light-emitting element ED and traveling toward the side surface of each of the first sub-dike portion 410 and the second sub-dike portion 420 can be changed to an upward direction (e.g., a display direction). In other words, light emitted from the light-emitting element ED and traveling toward the side surface of each of the first sub-dike portion 410 and the second sub-dike portion 420 can be reflected to travel in an upward direction.

[0096] The first electrode 210 and the second electrode 220 can be respectively disposed on the first sub-dike portion 410 and the second sub-dike portion 420. The first electrode 210 and the second electrode 220 can be disposed spaced apart from each other in the first direction DR1.

[0097] The first electrode 210 may extend in the second direction DR2 in the plan view so as to overlap with a portion of the second embankment 600 extending in the first direction DR1 (see, for example, see...). Figure 4 The first electrode 210 can be electrically connected to the conductive pattern CDP through the first contact hole CT1 penetrating the through-hole layer 165.

[0098] The second electrode 220 may extend in the second direction DR2 in the plan view so as to overlap with a portion of the second embankment 600 extending in the first direction DR1 (see, for example, see...). Figure 4 The second electrode 220 can be electrically connected to the second voltage line VL2 through the second contact hole CT2.

[0099] The first electrode 210 can be electrically connected to the first transistor T1 via the conductive pattern CDP to apply a first power supply voltage, and the second electrode 220 can be electrically connected to the second voltage line VL2 to apply a second power supply voltage.

[0100] The first electrode 210 and the second electrode 220 can be electrically connected to the light-emitting element ED, and a suitable voltage (e.g., a set or predetermined voltage) can be applied to it, causing the light-emitting element ED to emit light. For example, a plurality of electrodes 210 and 220 are electrically connected to the light-emitting element ED disposed between the first electrode 210 and the second electrode 220 via contact electrodes 710 and 720, which will be described later, and electrical signals applied to the electrodes 210 and 220 can be transmitted to the light-emitting element ED via the contact electrodes 710 and 720.

[0101] Each of the first electrode 210 and the second electrode 220 may include a conductive material with high reflectivity. For example, each of the first electrode 210 and the second electrode 220 may include a metal such as silver (Ag), copper (Cu), or aluminum (Al), or may include an alloy containing aluminum (Al), nickel (Ni), or lanthanum (La) as a conductive material with high reflectivity. Each of the first electrode 210 and the second electrode 220 may reflect light emitted from the light-emitting element ED and traveling toward the side surface of the first embankment 400 in the display direction (e.g., third direction DR3).

[0102] However, this disclosure is not limited thereto, and each of the first electrode 210 and the second electrode 220 may also include a transparent conductive material. For example, each of the first electrode 210 and the second electrode 220 may include a material such as ITO, IZO, or ITZO. In some embodiments, each of the first electrode 210 and the second electrode 220 may have a structure in which one or more layers of transparent conductive material and one or more metal layers with high reflectivity are stacked, or may be formed as a single layer including these layers. For example, each of the first electrode 210 and the second electrode 220 may have a stacked structure of ITO / Ag / ITO, ITO / Ag / IZO, or ITO / Ag / IZO / IZO.

[0103] A first insulating layer 510 is disposed on the plurality of electrodes 210 and 220 and the first embankment 400. The first insulating layer 510 is disposed on the first electrode 210 and the second electrode 220, but may also be disposed to expose at least a portion of each of the first electrode 210 and the second electrode 220. In an embodiment, the first insulating layer 510 may have an opening OP and another opening OP, the opening OP exposing a portion of the upper surface of the first electrode 210 disposed on the first sub-embankment 410, and the other opening OP exposing a portion of the upper surface of the second electrode 220 disposed on the second sub-embankment 420. The first contact electrode 710, described later, can contact the first electrode 210 through the opening OP penetrating the first insulating layer 510, and the second contact electrode 720, described later, can contact the second electrode 220 through the other opening OP penetrating the first insulating layer 510.

[0104] The first insulating layer 510 protects the first electrode 210 and the second electrode 220 and insulates them from each other. Furthermore, the first insulating layer 510 prevents the light-emitting element ED disposed on the first insulating layer 510 from being damaged due to direct contact with other components.

[0105] The second dam portion 600 is disposed on the first insulating layer 510. By including portions extending in the first direction DR1 and the second direction DR2 in the plan view, the second dam portion 600 can be arranged in a grid pattern (e.g., see...). Figure 4 The second embankment 600 can be configured to span the boundary of each sub-pixel SPX to distinguish adjacent sub-pixels SPX, and can be configured to define the light-emitting region EMA and the cut-off region CBA around each sub-pixel SPX.

[0106] The second dam 600 can be formed to have a greater height than the first dam 400. In the inkjet printing process of manufacturing the display device 10, the second dam 600 can perform the function of preventing ink from overflowing into adjacent pixels PX or sub-pixels SPX.

[0107] A light-emitting element (ED) can be disposed on the first insulating layer 510 between electrodes 210 and 220. The ED can have a shape extending in one direction, and its two ends can be respectively placed on the first electrode 210 and the second electrode 220. The direction in which electrodes 210 and 220 extend can be substantially perpendicular to the direction in which the ED extends. However, this disclosure is not limited thereto, and some of the plurality of EDs can be arranged such that the direction in which the ED extends is substantially perpendicular to the direction in which the first electrode 210 and the second electrode 220 extend, and others of the plurality of EDs can be arranged such that the direction in which the ED extends is inclined to the direction in which the first electrode 210 and the second electrode 220 extend.

[0108] The second insulating layer 520 may be partially disposed on the light-emitting element ED. The second insulating layer 520 may be configured to partially surround the outer surface (e.g., the outer peripheral surface) of the light-emitting element ED, but may be configured not to cover the two ends of the light-emitting element ED.

[0109] Furthermore, the second insulating layer 520 may also be disposed on the first embankment 400 and the second embankment 600. In addition to the light-emitting element ED, the second insulating layer 520 may also be disposed on the first insulating layer 510 and the second embankment 600 in the light-emitting region EMA, but may be disposed in a manner that exposes a portion of the first insulating layer 510 disposed on the side surfaces of the first sub-embankment 410 and the second sub-embankment 420 that face each other (or are opposite to each other), as well as exposes both ends of the light-emitting element ED.

[0110] The shape of the second insulating layer 520 can be formed by an etching process in which the second insulating material layer is completely deposited on the substrate SUB to cover the first insulating layer 510, the light-emitting element ED, and the second embankment 600, and the two ends of the light-emitting element ED and the area adjacent to it are exposed by subsequent processes during the manufacturing process of the display device 10.

[0111] A portion of the second insulating layer 520 disposed on the light-emitting element ED can be configured to extend in a second direction DR2 on the first insulating layer 510 in a planar view, thereby forming a linear pattern or an island pattern within each sub-pixel SPX. The second insulating layer 520 can be used to protect and fix the light-emitting element ED during the manufacturing process of the display device 10.

[0112] The first contact electrode 710 and the second contact electrode 720 may be disposed on the second insulating layer 520. Each of the first contact electrode 710 and the second contact electrode 720 may have a shape extending in one direction in a plan view. Each of the first contact electrode 710 and the second contact electrode 720 may have a shape extending in a second direction DR2 in a plan view (e.g., see...). Figure 4 The first contact electrode 710 and the second contact electrode 720 may be spaced apart from each other and face each other (or opposite each other) in the first direction DR1. The first contact electrode 710 and the second contact electrode 720 may form a stripe pattern in the light-emitting area EMA of each sub-pixel SPX.

[0113] The first contact electrode 710 can be disposed on the first electrode 210, and the second contact electrode 720 can be disposed on the second electrode 220.

[0114] A portion of the first contact electrode 710 may contact the first electrode 210 exposed through the opening OP of the first insulating layer 510, and another portion of the first contact electrode 710 may contact the end of the light-emitting element ED exposed by the second insulating layer 520. The first contact electrode 710 may be used to electrically connect the light-emitting element ED and the first electrode 210 by contacting one end of the light-emitting element ED and the first electrode 210. The first contact electrode 710 may extend from one end of the light-emitting element ED toward the third insulating layer 530, which will be described later, and may therefore be disposed on a portion of the third insulating layer 530.

[0115] A portion of the second contact electrode 720 may contact the second electrode 220 exposed through another opening OP of the first insulating layer 510, and another portion of the second contact electrode 720 may contact the other end of the light-emitting element ED exposed by the second insulating layer 520. The second contact electrode 720 may be used to electrically connect the light-emitting element ED and the second electrode 220 by contacting the other end of the light-emitting element ED. The second contact electrode 720 may extend from the other end of the light-emitting element ED toward the second insulating layer 520, and therefore may be disposed on a portion of the second insulating layer 520.

[0116] Each of the first contact electrode 710 and the second contact electrode 720 may include a conductive material. For example, each of the first contact electrode 710 and the second contact electrode 720 may include ITO, IZO, ITZO, or aluminum (Al). As an example, each of the first contact electrode 710 and the second contact electrode 720 may include a transparent conductive material, but the material is not limited thereto.

[0117] A third insulating layer 530 is disposed on the second contact electrode 720. For example, in addition to the second contact electrode 720, the third insulating layer 530 may also be disposed on the second insulating layer 520 except for the area where the first contact electrode 710 is disposed. The third insulating layer 530 can electrically insulate the first contact electrode 710 and the second contact electrode 720 from each other. The third insulating layer 530 is configured to cover the second contact electrode 720, but may not be disposed on one end of the light-emitting element ED, so that the light-emitting element ED can contact the first contact electrode 710.

[0118] In one embodiment, the first contact electrode 710 and the second contact electrode 720 may be disposed on different layers. A portion of the second contact electrode 720 may be disposed directly on the second insulating layer 520 disposed on the light-emitting element ED, and a portion of the first contact electrode 710 may be disposed directly on the third insulating layer 530. However, this disclosure is not limited thereto, and in some other embodiments, the first contact electrode 710 and the second contact electrode 720 may be disposed on the same layer, for example, on the second insulating layer 520.

[0119] The fourth insulating layer 540 can be completely disposed on the substrate SUB. The fourth insulating layer 540 can protect the components disposed on the substrate SUB from the influence of the external environment.

[0120] Figure 6 This is a schematic diagram of a light-emitting element according to an embodiment.

[0121] refer to Figure 6 The light-emitting element (ED) is a particulate element and may have a rod shape or a cylindrical shape with an appropriate aspect ratio (e.g., a set or predetermined aspect ratio). The length of the light-emitting element (ED) is greater than the diameter of the light-emitting element (ED), and its aspect ratio may be from 1.2:1 to 100:1, but is not limited thereto.

[0122] The light-emitting element (ED) can have dimensions ranging from nanometer-scale (1 nm or larger and less than 1 μm) to micrometer-scale (1 μm or larger and less than 1 mm). In some embodiments, both the diameter and length of the ED can be nanometer-scale or micrometer-scale. In some embodiments, the diameter of the ED can be nanometer-scale, while the length can be micrometer-scale. In some embodiments, some of the EDs can have nanometer-scale diameters and / or lengths, while others can have micrometer-scale diameters and / or lengths.

[0123] A light-emitting element (ED) may include an inorganic light-emitting diode (LED). An inorganic LED may include multiple semiconductor layers. For example, an inorganic LED may include a first conductive semiconductor layer (e.g., an n-type semiconductor layer), a second conductive semiconductor layer (e.g., a p-type semiconductor layer), and an active semiconductor layer interposed therebetween. The active semiconductor layer may receive holes and electrons from the first and second conductive semiconductor layers, respectively, and the holes and electrons that have reached the active semiconductor layer may combine with each other to emit light.

[0124] In this embodiment, the semiconductor layers described above can be stacked sequentially along the length of the light-emitting element (ED). For example... Figure 6 As shown, the light-emitting element ED may include a first semiconductor layer 31, a light-emitting layer 33, and a second semiconductor layer 32 stacked sequentially in the length direction. The first semiconductor layer 31, the light-emitting layer 33, and the second semiconductor layer 32 may be the first conductive semiconductor layer, the active semiconductor layer, and the second conductive semiconductor layer, respectively.

[0125] The first semiconductor layer 31 may be doped with a first conductive dopant. The first conductive dopant may be Si, Ge, Sn, etc. In an embodiment, the first semiconductor layer 31 may be n-GaN doped with n-type Si.

[0126] The second semiconductor layer 32 may be spaced apart from the first semiconductor layer 31, and the light-emitting layer 33 may be interposed between the second semiconductor layer 32 and the first semiconductor layer 31. The second semiconductor layer 32 may be doped with a second conductive dopant such as Mg, Zn, Ca, Se, or Ba. In an embodiment, the second semiconductor layer 32 may be p-GaN doped with p-type Mg.

[0127] The light-emitting layer 33 may comprise a material having a single quantum well structure or a multiple quantum well structure. As described above, the light-emitting layer 33 can emit light based on the combination of electron-hole pairs according to the electrical signal applied through the first semiconductor layer 31 and the second semiconductor layer 32.

[0128] In some embodiments, the light-emitting layer 33 may have a structure in which semiconductor materials with high bandgap energy and semiconductor materials with low bandgap energy are stacked alternately, and may include other group III to group V semiconductor materials depending on the wavelength band of the emitted light.

[0129] Light emitted from the light-emitting layer 33 can be emitted not only to the outer surface of the light-emitting element ED in the longitudinal direction, but also to its two side surfaces. That is, the direction of light emitted from the light-emitting layer 33 is not limited to one direction.

[0130] The light-emitting element ED may further include an electrode layer 37 disposed on the second semiconductor layer 32. The electrode layer 37 may be in contact with the second semiconductor layer 32. The electrode layer 37 may be an ohmic contact electrode, but is not limited thereto, and may also be a Schottky contact electrode.

[0131] When the two ends of the light-emitting element ED are electrically connected to contact electrodes 710 and 720 to apply an electrical signal to the first semiconductor layer 31 and the second semiconductor layer 32, the electrode layer 37 can be disposed between the second semiconductor layer 32 and the contact electrodes 710 and / or 720 to reduce resistance. The electrode layer 37 may include at least one of aluminum (Al), titanium (Ti), indium (In), gold (Au), silver (Ag), indium tin oxide (ITO), indium zinc oxide (IZO), and indium tin zinc oxide (ITZO). The electrode layer 37 may include a semiconductor material doped with n-type or p-type dopants.

[0132] The light-emitting element (ED) may further include an insulating layer 38 surrounding the outer surface (e.g., outer peripheral surface) of the first semiconductor layer 31, the second semiconductor layer 32, the light-emitting layer 33, and / or the electrode layer 37. The insulating layer 38 may be configured to surround at least the outer surface (e.g., outer peripheral surface) of the light-emitting layer 33 and may extend in one direction in which the light-emitting element ED extends. The insulating layer 38 may function to protect the components of the light-emitting element ED. The insulating layer 38 is made of a material with insulating properties and can prevent short circuits that may occur when the light-emitting layer 33 comes into direct contact with the electrodes through which electrical signals are transmitted to the light-emitting element ED. Furthermore, because the insulating layer 38 protects the outer surface (e.g., outer peripheral surface) of the first semiconductor layer 31, the second semiconductor layer 32, and the light-emitting layer 33, it is able to prevent a reduction in luminous efficiency.

[0133] Figure 7 yes Figure 5 A magnified view of region A.

[0134] In the following text, reference will be made to Figure 6 and Figure 7 Describe the contact relationship between the two ends of the light-emitting element ED and the first contact electrode 710 and the second contact electrode 720.

[0135] As described above, the light-emitting element (ED) may include semiconductor layers 31 and 32 doped with dopants of different conductivity types. The ED may include multiple semiconductor layers 31 and 32, and may be aligned such that one end of the ED faces a specific direction according to the direction of the electric field generated between electrodes 210 and 220. For example, the ED may have a shape extending in one direction, and a first end and a second end of the ED in the extending direction may be respectively disposed on the first electrode 210 and the second electrode 220.

[0136] For example, the light-emitting element ED can be configured such that one of its extension directions is parallel to the substrate SUB, and multiple semiconductor layers included in the light-emitting element ED can be sequentially arranged along a direction parallel to the upper surface of the substrate SUB.

[0137] One end of the second semiconductor layer 32 of the light-emitting element ED is positioned thereon may be placed on the first electrode 210, and the other end of the first semiconductor layer 31 of the light-emitting element ED is positioned thereon may be placed on the second electrode 220. However, this disclosure is not limited thereto, and in some light-emitting elements ED, one end of the second semiconductor layer 32 of the light-emitting element ED is positioned thereon may be placed on the second electrode 220, and the other end of the first semiconductor layer 31 of the light-emitting element ED is positioned thereon may be placed on the first electrode 210.

[0138] The first contact electrode 710 can contact one end of the light-emitting element ED. The first contact electrode 710 can contact the electrode layer 37 disposed at one end of the light-emitting element ED. The first contact electrode 710 can be electrically connected to the second semiconductor layer 32 through the electrode layer 37 of the light-emitting element ED.

[0139] The second contact electrode 720 can contact the other end of the light-emitting element ED. The second contact electrode 720 can contact the first semiconductor layer 31 disposed at the other end of the light-emitting element ED.

[0140] One end of the second semiconductor layer 32 of the light-emitting element ED, where it is located, can be electrically connected to the first electrode 210 via the first contact electrode 710, and the other end of the first semiconductor layer 31 of the light-emitting element ED, where it is located, can be electrically connected to the second electrode 220 via the second contact electrode 720. That is, because both ends of the light-emitting element ED are in contact with the first contact electrode 710 and the second contact electrode 720, the light-emitting element ED can receive electrical signals from the first electrode 210 and the second electrode 220, and light can be emitted from the light-emitting layer 33 of the light-emitting element ED according to the electrical signals.

[0141] In some embodiments, the brightness characteristics of each pixel PX or sub-pixel SPX of the display device 10 can be determined based on the contact state between the two ends of the light-emitting element ED and the first contact electrode 710 and the second contact electrode 720. For example, when the contact state between the two ends of the light-emitting element ED and the first contact electrode 710 and the second contact electrode 720 is defective, electrical signals will not be transmitted to the semiconductor layer of the light-emitting element ED, and therefore the light-emitting element ED may not emit light. In some embodiments, when the contact state between the two ends of the light-emitting element ED and the first contact electrode 710 and the second contact electrode 720 is defective, the contact area between the first contact electrode 710 and the second contact electrode 720 and the light-emitting element ED is small to increase resistance, thereby reducing the amount of light emitted from the light-emitting element ED, and therefore the brightness of each pixel PX may be reduced. Therefore, the reliability of the display device 10 can be improved by inspecting the contact state between the light-emitting element ED included in each pixel PX and the contact electrodes 710 and 720. In some embodiments, as the resolution of the display device 10 increases, the size of each pixel PX decreases, and therefore, the reliability of optical inspection of the display device 10 may decrease, or the inspection time may be too long. Therefore, by detecting electrical characteristics and inspecting the contact state between the light-emitting element ED in the pixel PX of the display device 10 and the contact electrodes 710 and 720, the inspection time can be shortened. Hereinafter, an inspection apparatus for inspecting the contact state between the light-emitting element ED and the contact electrodes 710 and 720, and an inspection method for inspecting the contact state between the light-emitting element ED and the contact electrodes 710 and 720 will be described.

[0142] Figure 8 This is a schematic perspective view of an inspection apparatus for a display device according to an embodiment.

[0143] refer to Figure 8 The inspection device 1 for inspecting whether the display device 10 according to the embodiment has a contact fault may include a platform STA, a light source component LS, a current measuring device ES, a moving unit SUP, and a control unit CU.

[0144] The platform STA provides space for mounting the display device 10 to test for contact failures. The display device 10 can be mounted on the platform STA while the process of testing for contact failures is being performed. The platform STA can be made of quartz or ceramic material and can be provided in the form of an electrostatic chuck, but this disclosure is not limited thereto.

[0145] In the following text, Figure 8The document defines an inspection device 1, a fourth direction DR4, a fifth direction DR5, and a sixth direction DR6 for inspecting contact faults in a display device 10. The fourth direction DR4 and the fifth direction DR5 can be directions perpendicular to each other in a plane. The sixth direction DR6 can be a direction perpendicular to the plane in which the fourth direction DR4 and the fifth direction DR5 are positioned. The sixth direction DR6 is perpendicular to each of the fourth direction DR4 and the fifth direction DR5. In some embodiments of the inspection device 1 for inspecting contact faults in the display device 10 and the inspection method for inspecting the display device 10 using the inspection device 1, the sixth direction DR6 indicates the direction in which the light source component LS is set based on the platform STA.

[0146] The light source component LS can be mounted on the platform STA. The light source component LS is mounted above the platform STA (e.g., on one side in the sixth direction DR6) to emit a test beam L1 (reference) toward the platform STA. Figure 12 In this embodiment, the test light L1 emitted from the light source component LS may include light with a short wavelength band having high energy. Details of the test light L1 emitted by the light source component LS will be described later.

[0147] The current measuring device ES can be positioned on one side of the platform STA. When the display device 10 is mounted on the platform STA, the current measuring device ES can be moved by the moving unit SUP to be positioned on the upper surface of the display device 10. While performing the contact inspection process of the display device 10, the current measuring device ES can measure the current of each pixel PX or sub-pixel SPX of the display device 10, and can transmit the measured current data of each pixel PX or sub-pixel SPX to the control unit CU.

[0148] When the display device 10 is mounted on the platform STA and the current measuring device ES is disposed on the upper surface of the display device 10, the control unit CU applies a contact test reference signal to each pixel PX of the display device 10. The contact test reference signal includes a first test voltage applied to a first electrode 210 included in the display device 10 and a second test voltage applied to a second electrode 220 included in the display device 10.

[0149] For example, combining Figure 3 and Figure 5 refer to Figure 8 The testing device 1 provides a first testing voltage to a first voltage line VL1 connected to the drain electrode SD1 of the first transistor T1, and a second testing voltage to a second voltage line VL2. As described above, the first electrode 210 can be electrically connected to the source electrode SD2 of the first transistor T1 via a conductive pattern CDP, and the second electrode 220 can be electrically connected to the second voltage line VL2.

[0150] The control unit CU can provide a first test voltage to a first voltage line VL1 connected to the drain electrode SD1 of the first transistor T1, and can apply test signals to the scan line SCL and the data line DTL, such that the second transistor T2 can be turned on by the scan signal of the scan line SCL to connect the data line DTL to the gate electrode GE of the first transistor T1. Furthermore, the control unit CU can provide a second test voltage to the second voltage line VL2. The first electrode 210 can be electrically connected to the source electrode SD2 of the first transistor T1, and therefore the first test voltage provided to the first voltage line VL1 can be applied to the first electrode 210. The second electrode 220 can be electrically connected to the second voltage line VL2, and therefore the second test voltage can be applied to the second electrode 220. An appropriate current (e.g., a set or predetermined current) can flow through each sub-pixel SPX of the display device 10 through the first and second test voltages.

[0151] Furthermore, the control unit CU can detect sub-pixels that have experienced contact failures based on the current data of each sub-pixel SPX measured by the current measurement device ES. Details will be described later using additional figures.

[0152] The following will describe the use of Figure 8 A method for inspecting display device 10 using an inspection device 1 for display devices.

[0153] Figure 9 This is a flowchart illustrating a method for inspecting a display device according to an embodiment. Figures 10 to 15 This is a cross-sectional view showing the steps of the inspection process for a display device according to an embodiment.

[0154] refer to Figure 9 The method for inspecting a display device according to an embodiment includes the following steps: providing a display device on a platform (S100); applying a first test voltage and a second test voltage to a first electrode and a second electrode respectively, and measuring a first test current (S200); applying the first test voltage and the second test voltage to the first electrode and the second electrode respectively, irradiating the display device with light, and measuring a second test current (S300); and determining whether the display device has a contact fault based on the difference between the first test current and the second test current (S400).

[0155] First, a display device 10 (S100) is provided on the platform STA. Figure 9 and Figure 10 ).

[0156] For example, refer to Figure 10The display device 10 is mounted on the platform STA of the inspection apparatus 1 to inspect for contact faults in the display device 10. The display device 10, which is the object to be inspected for contact faults, may include a substrate SUB, a first electrode 210, a second electrode 220, a first insulating layer 510, a light-emitting element ED, a first contact electrode 710, and a second contact electrode 720.

[0157] For example, the first electrode 210 and the second electrode 220 may be spaced apart from each other on one surface of the substrate SUB in the fourth direction DR4. A first insulating layer 510 disposed on the first electrode 210 and the second electrode 220 may be configured to expose at least a portion of the upper surface of the first electrode 210 and at least a portion of the upper surface of the second electrode 220. A light-emitting element ED may be disposed on the first insulating layer 510 in the space between the spaced-apart first electrode 210 and the second electrode 220. A first contact electrode 710 may be disposed on the first electrode 210 to contact the upper surface of the first electrode 210 exposed by the first insulating layer 510 and one end of the light-emitting element ED. A second contact electrode 720 may be disposed on the second electrode 220, spaced apart from the first contact electrode 710, thereby contacting the upper surface of the second electrode 220 exposed by the first insulating layer 510 and the other end of the light-emitting element ED.

[0158] Subsequently, a first test voltage and a second test voltage are applied to the first electrode 210 and the second electrode 220 respectively, and the first test current I1 (S200) is measured. Figure 9 and Figure 11 ).

[0159] For example, refer to Figure 8 and Figure 11 When the display device 10 is provided on the platform STA, the control unit CU of the inspection device 1 for inspecting whether the display device 10 has a contact fault applies a first inspection voltage and a second inspection voltage to the first electrode 210 and the second electrode 220 of the display device 10, respectively, so that a desired current (e.g., a set or predetermined current) flows along the light-emitting element ED, the first contact electrode 710, the first electrode 210, the second electrode 220, and the second contact electrode 720. Subsequently, the first inspection current I1 flowing along the first electrode 210, the first contact electrode 710, the light-emitting element ED, the second contact electrode 720, and the second electrode 220 by applying the first inspection voltage and the second inspection voltage is measured using the current measuring device ES.

[0160] For example, combining Figure 3 A method is described for applying a first test voltage and a second test voltage to a first electrode 210 and a second electrode 220, respectively.

[0161] A first test voltage can be provided to a first voltage line VL1 connected to the drain electrode of the first transistor T1, and a second test voltage can be provided to a second voltage line VL2. A first electrode 210 can be electrically connected to the source electrode of the first transistor T1, and a second electrode 220 can be electrically connected to the second voltage line VL2.

[0162] The control unit CU can provide a first test voltage to the first voltage line VL1 connected to the drain electrode of the first transistor T1, and can apply a scan signal to the scan line SCL to turn on the second transistor T2, thereby connecting the data line DTL to the gate electrode of the first transistor T1. Furthermore, the control unit CU can provide a second test voltage to the second voltage line VL2. The first electrode 210 can be electrically connected to the source electrode of the first transistor T1 to allow the first test voltage provided to the first voltage line VL1 to be transmitted to the first electrode 210, and the second electrode 220 can be electrically connected to the second voltage line VL2 to allow the second test voltage provided to the second voltage line VL2 to be transmitted to the second electrode 220. Due to the voltage difference between the first test voltage and the second test voltage, a first test current I1 can flow along the light-emitting element ED, the first contact electrode 710, the first electrode 210, the second electrode 220, and the second contact electrode 720. Subsequently, the first test current I1 flowing along the first electrode 210, the first contact electrode 710, the light-emitting element ED, the second contact electrode 720, and the second electrode 220 is measured using a current measuring device ES.

[0163] Subsequently, a first test voltage and a second test voltage are applied to the first electrode 210 and the second electrode 220 respectively, the display device 10 is illuminated with test light L1, and the second test current I2 is measured (S300). Figure 9 and Figure 12 ).

[0164] For example, refer to Figure 8 and Figure 12 With the first test voltage and the second test voltage applied to the first electrode 210 and the second electrode 220, respectively, the display device 10 can be illuminated by a test light L1 using a light source component LS. As described above, the test light L1 can include light with a high-energy short-wavelength band. For example, the test light L1 can include ultraviolet light, a high-energy laser beam, etc.

[0165] Subsequently, the test light L1 is emitted from the light source component LS, and the second test current I2 flowing along the first electrode 210, the first contact electrode 710, the light-emitting element ED, the second contact electrode 720, and the second electrode 220 through the first test voltage, the second test voltage, and the test light L1 is measured using the current measuring device ES.

[0166] Since the methods for applying the first test voltage to the first electrode 210 and the second test voltage to the second electrode 220 are the same as those described above, a detailed description thereof will be omitted.

[0167] refer to Figure 13 When the first electrode 210 and the second electrode 220 receive a voltage (e.g., a set or predetermined voltage) to allow the desired current (e.g., a set or predetermined current) to flow and a high-energy test light L1 is applied to the light-emitting element ED, electrons and holes are separated in the light-emitting element ED by the test light L1, so that the photocurrent IE2 can flow in the light-emitting element ED.

[0168] For example, as described above, the first semiconductor layer 31, doped with a first conductive dopant, can be n-GaN doped with n-type Si, and the second semiconductor layer 32, doped with a second conductive dopant, can be p-GaN doped with p-type Mg. When the light-emitting element ED is irradiated with light in a high-energy, short-wavelength band, electrons and holes are separated from the interface between the first semiconductor layer 31 and the light-emitting layer 33 by light energy, allowing the separated electrons to move toward the first semiconductor layer 31. Furthermore, when the light-emitting element ED is irradiated with light in a high-energy, short-wavelength band, electrons and holes are separated from the interface between the second semiconductor layer 32 and the light-emitting layer 33 by light energy, allowing the separated holes to move toward the second semiconductor layer 32. Therefore, because electrons move to the first semiconductor layer 31 and holes move to the second semiconductor layer 32 by the high-energy test light L1, a photocurrent IE2 flowing from the first semiconductor layer 31 to the second semiconductor layer 32 can be generated in the light-emitting element ED.

[0169] Subsequently, the second test current I2, which is emitted from the light source component LS and measured by the current measuring device ES, can be different from the first test current I1 by the photocurrent IE2 generated from the light-emitting element ED.

[0170] Subsequently, the difference between the first test current I1 and the second test current I2 is used to determine whether the display device 10 has a contact fault (S400). Figure 9 and Figure 14 ).

[0171] In some embodiments, the difference between the first test current I1 and the second test current I2 can vary depending on whether there is a defect in the contact between the two ends of the light-emitting element ED and the first contact electrode 710 and the second contact electrode 720. For example, although a photocurrent IE2 is generated in the light-emitting element ED, the difference between the first test current I1 and the second test current I2 may be small when there is a defect in the contact between the two ends of the light-emitting element ED and at least one of the first contact electrodes 710 and 720. Therefore, current may not flow easily because at least one end of the light-emitting element ED is not in contact with the contact electrodes 710 and 720, or it may not flow easily because the contact area between the light-emitting element ED and the contact electrodes 710 and 720 is small and therefore the resistance increases. Conversely, when the contact between the two ends of the light-emitting element ED and the first contact electrode 710 and the second contact electrode 720 is normal, the difference between the second test current I2 and the first test current I1 may be relatively large because the photocurrent IE2 flows in the light-emitting element ED. Therefore, whether the display device 10 has a contact fault can be determined by using the measured difference between the second test current I2 and the first test current I1.

[0172] For example, refer to Figure 8 , Figure 14 and Figure 15 The control unit CU can use the current measuring device ES to calculate the amount of change in current ΔIa or ΔIb caused by the irradiation of the test light L1, that is, the change in test current ΔIa or ΔIb, which is the amount of change between each of the first test current I1 and the second test current I2a or I2b.

[0173] Figure 14 This is a cross-sectional view showing the normal contact between the two ends of the light-emitting element ED and the first contact electrode 710 and the second contact electrode 720. When the calculated test current change ΔIa is determined to be greater than or equal to the reference current change by comparing it with the reference current change, the control unit CU can determine that the display device 10 is normal. That is, the control unit CU can determine that the contact between the light-emitting element ED and the contact electrodes 710 and 720 is normal.

[0174] Figure 15 This is a cross-sectional view showing a defective contact between the two ends of the light-emitting element ED and the first contact electrode 710 and the second contact electrode 720. When the calculated test current change ΔIb is determined to be less than the reference current change by comparing the test current change ΔIb with the reference current change, the control unit CU can determine that the display device 10 is defective. That is, the control unit CU can determine that the light-emitting element ED has a defective contact with the contact electrodes 710 and 720 (or 720', as shown in the image). Figure 15The contact between (as shown in the diagram) is defective.

[0175] Figure 16 This is a layout diagram showing the data lines, scan lines, and sensor lines of a display device, used to explain the contact inspection method for each sub-pixel. Figure 16 The diagram shows the first data lines DTL1 to DTLm arranged in the first column to the m-th column, and the first scan lines SCL1 to SCLn and the first sensing lines SSL1 to SSLn arranged in the first row to the n-th row. Figure 17 and Figure 18 It is a cross-sectional view showing the steps in the manufacturing process of a display device.

[0176] First, refer to Figure 5 The system provides a substrate SUB, a circuit layer CCL disposed on the substrate SUB and including a first transistor T1, a first voltage line VL1 and a second voltage line VL2, and a light-emitting element layer EML disposed on the circuit layer CCL and including a first electrode 210 and a second electrode 220, a light-emitting element ED, a first contact electrode 710 and a second contact electrode 720, and a plurality of insulating layers 510, 520, 530 and 540.

[0177] Subsequently, reference Figure 3 , Figure 16 and Figure 17 A first test voltage can be applied to the first voltage line VL1 of the circuit layer CCL, a second test voltage can be applied to the second voltage line VL2 of the circuit layer CCL, a scan signal can be applied to the first scan line SCL1, such that a desired current (e.g., a set or predetermined current) flows through each of the plurality of sub-pixels SPX arranged in the first row, and a first data signal to a data signal can be applied to the first data lines DTL1 to the m-th data lines DTLm arranged in the first to m-th columns, respectively.

[0178] In this scenario, a desired current (e.g., a set or predetermined current) flows through multiple sub-pixels SPX located in the first row and arranged in the first to m columns, respectively, via a first test voltage and a second test voltage. Then, the first test current I1 flowing through the second voltage line VL2 arranged in each column can be measured using the aforementioned current measuring device ES (refer to...). Figure 11 ).

[0179] The method of applying a first test voltage to the first voltage line VL1, applying a second test voltage to the second voltage line VL2, applying a scan signal to the first scan line SCL1 located in the first row, and applying a first data signal to the first data line DTL1 to the m-th data line DTLm respectively is not particularly limited. For example, it can be done by applying the first voltage pad WPD_VDD, the second voltage pad WPD_VSS, the data pad WPD_DT, and the routing pad WPD_CW respectively (see, for example, see...). Figure 2 Electrical signals are applied to apply the first test voltage, the second test voltage, the data signal, and the scan signal.

[0180] Subsequently, reference Figure 3 , Figure 16 and Figure 18 When a first test voltage is applied to the first voltage line VL1 of the circuit layer CCL, a second test voltage is applied to the second voltage line VL2 of the circuit layer CCL, and a scan signal is applied to the first scan line SCL1, a desired current (e.g., a set or predetermined current) flows through each of the plurality of sub-pixels SPX arranged in the first row, and the first data signal to the m-th data signal is applied to the first data line DTL1 to the m-th data line DTLm arranged in the first column to the m-th column, respectively. The test light L1 can be applied to the display device 10 from the light source member LS disposed above the display device 10.

[0181] In this configuration, a desired current (e.g., a set or predetermined current) flows through a plurality of sub-pixels SPX located in the first row and arranged in the first to m columns, respectively, via the first test voltage, the second test voltage, and the test light L1. Then, the test light L1 can be applied to the display device 10, and the second test current I2 flowing through the second voltage line VL2 disposed in each column can be measured using the aforementioned current measuring device ES (see reference). Figure 12 ).

[0182] As described above, the photocurrent IE2 can flow through the light-emitting element ED via the test light L1. Therefore, during the illumination of the test light L1, the second test current I2 flowing through the second voltage line VL2 can be measured using the current measuring device ES (reference). Figure 12A second test current I2 flowing through the second voltage line VL2 can be measured for each sub-pixel SPX arranged in the first column to the m-th column. Therefore, among the plurality of sub-pixels SPX arranged in the first row, the difference between the second test current I2 and the first test current I1 for each of the plurality of sub-pixels SPX arranged in the first row and the first column to the m-th column can be used to detect rows in which a contact failure occurs between the first contact electrode 710 and the second contact electrode 720 and the light-emitting element ED. Therefore, among the plurality of sub-pixels SPX arranged in the first row, defective sub-pixels SPX can be detected.

[0183] For example, when the difference between the second test current I2 and the first test current I1 measured in some of the multiple sub-pixels SPX arranged in the first to m columns is less than the reference current change, it can be determined that a defect has occurred in the corresponding sub-pixel SPX. Furthermore, when the difference between the second test current I2 and the first test current I1 measured in other sub-pixels of the multiple sub-pixels SPX arranged in the first to m columns is greater than or equal to the reference current change, it can be determined that the corresponding sub-pixel SPX is normal.

[0184] Subsequently, after completing the inspection of contact faults for the multiple sub-pixel SPXs arranged in the first row, the inspection of contact faults for the multiple sub-pixel SPXs arranged in the second row can be performed. The inspection of contact faults for the multiple sub-pixel SPXs arranged in the second row can be performed in the same manner as the inspection of contact faults for the multiple sub-pixel SPXs arranged in the first row. This inspection can be repeated to inspect the contact faults of each of the multiple sub-pixel SPXs arranged in the first to nth rows.

[0185] In some embodiments of this disclosure, a method for detecting contact faults in each sub-pixel SPX is discussed by applying a scan signal to a scan line SCL arranged in the same row and applying a data signal to multiple data lines DTL1 to DTLm arranged in the first to m columns respectively; however, this disclosure is not limited thereto. For example, contact faults in each sub-pixel SPX can be detected by applying a data signal to a data line DTL arranged in the same row and applying a scan signal to multiple scan lines SCL1 to SCLn arranged in the first to n rows respectively.

[0186] In the method for inspecting a display device according to this disclosure, suitable voltages (e.g., set or predetermined voltages) can be applied to the first electrode 210 and the second electrode 220 of the display device 10 via a first voltage line VL1 and a second voltage line VL2, respectively, to measure a first test current I1. While the suitable voltages (e.g., set or predetermined voltages) are applied to the first electrode 210 and the second electrode 220, a test light L1 can be applied to the display device 10 to measure a second test current I2. A contact fault between the light-emitting element ED and the contact electrodes 710 and 720 can be determined based on the difference between the first test current I1 and the second test current I2. Furthermore, by using transistors (e.g., first transistor T1 and second transistor T2) included in the circuit layer CCL of the display device 10, multiple pixels PX or sub-pixels SPX arranged in the same row or column can be driven simultaneously, thereby inspecting multiple pixels PX or sub-pixels SPX arranged in the same row or column at once. As described above, since the current is specified using the electrical characteristics of the display device 10 or the light-emitting element ED, it is possible to determine whether there is a contact fault between the light-emitting element ED included in multiple pixels PX or sub-pixels SPX arranged in the same row or column and the contact electrodes 710 and 720. This allows for a shorter inspection time compared to methods that use optical characteristics to inspect for contact faults, and thus improves the efficiency of the inspection process.

[0187] In the method for inspecting a display device according to the embodiment, the presence of defects in the display device can be determined based on electrical characteristics, thereby shortening the inspection time. Furthermore, by using transistors included in the circuit layer of the display device, multiple pixels or sub-pixels arranged in the same row or column can be driven simultaneously, enabling the simultaneous inspection of multiple pixels or sub-pixels arranged in the same row or column, thereby shortening the inspection time.

[0188] The embodiments disclosed herein are not limited to the foregoing, and various other aspects can be understood by those skilled in the art.

[0189] Although embodiments of this disclosure have been disclosed for illustrative purposes, those skilled in the art will understand that various modifications, additions, and substitutions are possible without departing from the scope and spirit of this disclosure as disclosed in the appended claims and their equivalents.

[0190] In concluding this detailed description, those skilled in the art will understand that many changes and modifications can be made to the embodiments without substantially departing from the principles of this disclosure. Therefore, the embodiments of this disclosure are used in a general and descriptive sense only and not for limiting purposes.

Claims

1. A method for inspecting a display device, the display device comprising a substrate, a light-emitting element on the substrate, a first contact electrode at one end of the light-emitting element, and a second contact electrode spaced apart from the first contact electrode and at the other end of the light-emitting element, the method comprising: A first test voltage and a second test voltage are applied to the first contact electrode and the second contact electrode, respectively, and a first test current is measured. While applying the first test voltage and the second test voltage to the first contact electrode and the second contact electrode respectively, the light-emitting element is illuminated with test light and the second test current is measured. as well as The contact fault between the light-emitting element and the first contact electrode and the second contact electrode is determined based on the first test current and the second test current.

2. The method according to claim 1, further comprising: The change in test current is calculated, whereby the change in test current is the amount of variation between the first test current and the second test current. The contact fault between the light-emitting element and the first and second contact electrodes is determined based on the calculated change in the test current.

3. The method according to claim 2, further comprising: If the change in the test current is less than the change in the reference current, it is determined that there is a defect in the contact between the light-emitting element and the first contact electrode and the second contact electrode. as well as If the change in the test current is greater than or equal to the change in the reference current, it is determined that the contact between the light-emitting element and the first contact electrode and the second contact electrode is normal.

4. The method according to claim 2, wherein, The change in the test current is obtained by subtracting the first test current from the second test current.

5. The method according to claim 1, wherein, The test light includes light with a short wavelength band of high energy.

6. The method according to claim 1, wherein, The light-emitting element includes a first semiconductor layer at the other end of the light-emitting element, a second semiconductor layer at one end of the light-emitting element, and a light-emitting layer between the first semiconductor layer and the second semiconductor layer, wherein the first semiconductor layer includes an n-type semiconductor layer and the second semiconductor layer includes a p-type semiconductor layer.

7. The method according to claim 6, wherein, When the test light is irradiated, electrons move toward the first semiconductor layer in the light-emitting element, and holes move toward the second semiconductor layer in the light-emitting element, thereby generating a photocurrent in the light-emitting element.

8. The method according to claim 1, wherein, The display device further includes a first electrode and a second electrode spaced apart from each other on the substrate, and Wherein, one end of the light-emitting element is on the first electrode, and the other end of the light-emitting element is on the second electrode. Wherein, the first contact electrode is on the first electrode to contact the first electrode, and the second contact electrode is on the second electrode to contact the second electrode, and The first test voltage is applied to the first contact electrode through the first electrode, and the second test voltage is applied to the second contact electrode through the second electrode.

9. The method according to claim 1, wherein, The display device further includes: The first electrode and the second electrode are on the substrate and spaced apart from each other; The first transistor is electrically connected to the first electrode; A first voltage line is electrically connected to the first transistor; and The second voltage line is electrically connected to the second electrode; and Wherein, one end of the light-emitting element is on the first electrode, and the other end of the light-emitting element is on the second electrode, and The first test current and the second test current are measured as the current flowing through the second voltage line.

10. The method according to claim 9, wherein, The first test voltage is applied to the first contact electrode through the first voltage line, and the second test voltage is applied to the second contact electrode through the second voltage line.

Citation Information

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