Display device

Abstract

This application relates to a display device. The display device includes a display panel having a first display area and a second display area. The first display area has a first light transmittance, and the second display area has a second light transmittance higher than the first light transmittance. The display device also includes a drive controller that divides an image signal into a first image signal corresponding to a first pixel unit in the first display area and a second image signal corresponding to a second pixel unit and non-pixel units adjacent to the second pixel unit. The display controller performs calculations on the second image signal and a preset kernel matrix, and outputs a data signal corresponding to the second pixel unit in the second display area.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2020-0155991, filed on November 19, 2020, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] One or more embodiments described herein relate to display devices. Background Technology

[0004] Display devices have been developed to include infrared sensors, proximity sensors, cameras, and other functional circuits to meet consumer needs. Some of these circuits and their associated components are located in the image display area. The number of pixels in the area overlapping with the components of the functional circuits can be reduced to prevent performance degradation of the functional circuits, but this may adversely affect display quality. Summary of the Invention

[0005] One or more embodiments described herein provide a display device capable of improving the display quality of a display area in which an electronic module is disposed.

[0006] According to one or more embodiments, a display device includes: a display panel including a first display area having a first light transmittance and a second display area having a second light transmittance higher than the first light transmittance; and a drive controller configured to receive an image signal and output a data signal for the display panel. The drive controller is configured to: divide the image signal into a first image signal corresponding to a first pixel unit in the first display area of ​​the display panel and a second image signal corresponding to a second pixel unit and a non-pixel unit adjacent to the second pixel unit in the second display area of ​​the display panel; perform a calculation on the second image signal with a preset kernel matrix; and output a data signal corresponding to the second pixel unit in the second display area.

[0007] According to one or more embodiments, a display device includes: an electronic module; a display panel including a first display area that does not overlap with the electronic module and a second display area that overlaps with the electronic module and is adjacent to the first display area; and a drive controller configured to receive an image signal and output a data signal to be provided to the display panel. The drive controller is configured to: divide the image signal into a first image signal corresponding to a first pixel unit in the first display area of ​​the display panel and a second image signal corresponding to a second pixel unit and a non-pixel unit adjacent to the second pixel unit in the second display area of ​​the display panel; perform a calculation on the second image signal with a preset kernel matrix; and output a data signal corresponding to a pixel unit in the second display area.

[0008] According to one or more embodiments, a display device includes: a display panel including a first display area having a first light transmittance and a second display area having a second light transmittance higher than the first light transmittance; and a drive controller configured to receive an image signal and output a data signal to be provided to the display panel. The drive controller includes: a gamma converter configured to convert the image signal into a gamma image signal; a memory configured to store the gamma image signal and output a first image signal corresponding to a first pixel unit in the first display area and a second image signal corresponding to a second pixel unit and a non-pixel unit adjacent to the second pixel unit in the second display area; a compensator configured to perform operations on the second image signal and a kernel matrix and output a compensated image signal; and mapping logic configured to map the compensated image signal to the second pixel unit in the second display area. Attached Figure Description

[0009] The accompanying drawings are included to provide a further understanding of the inventive concept and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the inventive concept and, together with the description, serve to explain the principles of the inventive concept. In the drawings:

[0010] Figure 1 The illustration shows a perspective view of an embodiment of the display device;

[0011] Figure 2 The diagram shows an exploded perspective view of the display device;

[0012] Figure 3 The diagram illustrates along Figure 2 An example of a cross-sectional view of line I-I';

[0013] Figure 4 A plan view of an embodiment of the display panel is shown;

[0014] Figure 5 The diagram shows Figure 4 An example of an enlarged region AA';

[0015] Figure 6 The illustration shows a plan view of an embodiment of the light-emitting region in a pixel unit;

[0016] Figure 7 The diagram shows Figure 4 A floor plan of an embodiment of area BB';

[0017] Figure 8 The diagram shows Figure 7 A plan view of an embodiment of a portion of area BB' shown;

[0018] Figure 9An embodiment is illustrated by a cross-sectional view of a portion of a second display area in a display panel;

[0019] Figure 10 An embodiment of the display device is illustrated;

[0020] Figure 11 An embodiment of the drive controller is illustrated;

[0021] Figure 12 An embodiment of an image signal processing circuit is illustrated;

[0022] Figure 13A and Figure 13B The illustration shows an embodiment of a second image signal and kernel data provided from memory;

[0023] Figures 14A to 14C An example of a kernel matrix is ​​illustrated;

[0024] Figures 15A to 15I An example illustrating the correspondence between the second image signal and the kernel matrix is ​​shown; and

[0025] Figure 16A and Figure 16B An example of the operation of the compensator is illustrated. Detailed Implementation

[0026] In this specification, when an element (or area, layer, portion, etc.) is referred to as being "on," "connected to," or "coupled to" another element, it means that it can be placed directly on, connected to, or coupled to (coupled to) another element, or a third component can be arranged between them. The same reference numerals denote the same elements. Additionally, in the drawings, the thickness, scale, and dimensions of components are exaggerated for effective description. "And / or" includes all of one or more combinations defined by the relevant components.

[0027] It will be understood that the terms "first" and "second" are used herein to describe various components, but these components should not be limited by these terms. The terms above are used only to distinguish one component from another. For example, a first component may be referred to as a second component without departing from the scope of the inventive concept, and vice versa. Unless otherwise specified, singular terms may include plural forms.

[0028] Additionally, terms such as “below,” “lower side,” “upper,” and “upper side” are used to describe the relationships of the configurations shown in the accompanying drawings. These terms are described as relative concepts based on the directions shown in the drawings. In embodiments of the inventive concept, the terms “comprising” or “including” indicate properties, areas, fixed quantities, steps, processes, elements, and / or components, but do not exclude other properties, areas, fixed quantities, steps, processes, elements, and / or components.

[0029] Unless otherwise specified, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. Furthermore, terms defined in commonly used dictionaries shall be interpreted as having the meaning consistent with their meaning in the context of the relevant art and shall not be interpreted in an idealized or overly formal sense unless the term is expressly defined herein.

[0030] In the following description, embodiments of the inventive concept will be described with reference to the accompanying drawings.

[0031] Figure 1 This is a perspective view of a display device DD according to an embodiment, and... Figure 2 This is an exploded perspective view of the display device DD according to an embodiment.

[0032] refer to Figure 1 and Figure 2 The display device DD can be activated based on an electrical signal. The display device DD can be used in a variety of applications. For example, the display device DD can be used in small and medium-sized electronic devices (e.g., personal computers, laptops, personal digital terminals, car navigation units, game consoles, portable electronic devices, and cameras) and large electronic devices such as televisions, monitors, or external billboards, as well as other electronic devices. In this embodiment, the display device DD is illustrated as a smartphone.

[0033] The display device DD can display an image IM on a display surface FS parallel to each of the first direction DR1 and the second direction DR2, facing a third direction DR3. The image IM can be a still image or a moving image. Figure 1 In the illustration, a clock and icons are shown as an example of an image IM. The display surface FS on which the image IM is displayed can correspond to the front surface of the display device DD, and can also correspond to the front surface of the window panel WP.

[0034] In this embodiment, the front (or upper) and rear (or lower) surfaces of each component are defined based on the orientation in which the image IM is displayed. The front and rear surfaces are opposite to each other on a third direction DR3, and the normal direction of each of the front and rear surfaces may be parallel to the third direction DR3. Furthermore, the directions indicated by the first to third directions DR1, DR2, and DR3 are relative concepts and may be in other directions.

[0035] The display device DD according to an embodiment of the present invention can detect externally applied user input. User input can be generated, for example, by a body part (e.g., a finger), light, heat, or pressure. Furthermore, the display device DD can detect user input applied to the side or rear surface of the display device DD according to its structure, and is not limited to any particular embodiment.

[0036] The display device DD may include a window panel WP, an antireflector RPP, a display module DM, an electronic module EM, and a housing HU. In this embodiment, the window panel WP and the housing HU are combined to form the exterior of the display device DD. The window panel WP may include an optically transparent insulating material. For example, the window panel WP may include glass or plastic. The window panel WP may have a multilayer structure or a single-layer structure. For example, the window panel WP may include multiple plastic films bonded together with an adhesive, or it may include a glass substrate and plastic films bonded together with an adhesive.

[0037] The display surface FS of the window panel WP can define the front surface of the display device DD and can include a transmissive region TA and a bezel region BZA. The transmissive region TA can be an optically transparent region. For example, the transmissive region TA can be a region with a visible light transmittance of approximately 90% or more. The bezel region BZA can be a region with a relatively low transmittance compared to the transmissive region TA. The bezel region BZA can have a predetermined color and can correspond to the shape of the transmissive region TA. The bezel region BZA is adjacent to the transmissive region TA and can completely or partially surround the transmissive region TA. According to an embodiment, the bezel region BZA can be omitted in the window panel WP.

[0038] An antireflector RPP can be placed below the window panel WP. The antireflector RPP reduces the reflectivity of external light incident from the upper side of the window panel WP. In one embodiment of the invention, the antireflector RPP can be omitted or can be embedded in the display module DM.

[0039] The display module DM can display the image IM and detect external input. The display module DM includes a front surface IS containing an active area AA and a peripheral area NAA. The active area AA can be a region activated according to an electrical signal.

[0040] In this embodiment, the effective area AA displays the image IM and may also be the area in which external input is detected. The transmission area TA may at least overlap with the effective area AA. For example, the transmission area TA may overlap the entire surface or at least a portion of the effective area AA. Therefore, a user can visually identify the image IM or provide external input through the transmission area TA. However, this is illustrated as an example, and within the effective area AA, the area in which the image IM is displayed and the area in which external input is detected may be separate from each other, and this is not limited to any one embodiment.

[0041] The peripheral region NAA can be the area covered by the border region BZA and can be adjacent to the active region AA. The peripheral region NAA can surround the active region AA. The drive circuitry or drive wiring used to drive the active region AA can be within the peripheral region NAA.

[0042] In this embodiment, the display module DM is assembled in a flat state, with the active area AA and the peripheral area NAA facing the window panel WP. However, this is illustrated by way of example, and in some embodiments, a portion of the peripheral area NAA of the display module DM can be bent. In this case, a portion of the peripheral area NAA can face the rear surface of the display device DD, such that the bezel area BZA of the front surface of the display device DD can be reduced. In one embodiment, the display module DM can be assembled in a state in which a portion of the active area AA is also bent.

[0043] The display module (DM) may include a display panel (DP), an input sensor (ISU), a drive circuit, and a printed circuit board (FCB). The display panel (DP) is the component that essentially generates the image (IM). The image (IM) generated by the display panel (DP) can be visually recognized by the user through the transmissive area (TA).

[0044] The input sensor (ISU) detects external input, and as described above, it can detect external input provided to the window panel (WP).

[0045] The display panel DP may include a pad area PP. In one embodiment, multiple signal pads may be disposed in the pad area PP of the display panel DP. The display panel DP can be electrically connected to the printed circuit board FCB via the signal pads. In an embodiment, a driver chip that generates signals for the operation of the display panel DP may be mounted in the pad area PP.

[0046] The printed circuit board (FCB) may include various drive circuits for driving the display panel (DP) and the input sensors (ISU), or connectors for supplying power. In an embodiment, the FCB may include a panel driver circuit (PDC) for driving the display panel (DP). The panel driver circuit (PDC) is formed of an integrated circuit and may be mounted on the FCB.

[0047] The electronic module EM can be disposed below the display module DM. In an embodiment, the electronic module EM can be attached to the rear surface of the display module DM via an adhesive component. In a plane, the electronic module EM can overlap with the effective area AA. Therefore, the space used to accommodate the electronic module EM in the bezel area BZA can be omitted, which prevents an increase in the size of the bezel area BZA.

[0048] For example, when the electronic module EM includes a light source element for outputting light (e.g., an infrared light-emitting diode, an organic light-emitting diode, a laser diode, or a phosphor), the electronic module EM can output light through the transmission region TA. When the electronic module EM is a light receiving module (e.g., an infrared detection sensor, a proximity sensor, a charge-coupled device (CCD), a light detection sensor, a phototransistor, or a photodiode), the electronic module EM can receive external light transmitted through the transmission region TA. In embodiments, the electronic module EM can be a camera or another functional circuit or module. The electronic module EM does not necessarily need to be configured as a single element, and in one embodiment, multiple elements can be aggregated and configured in an array.

[0049] A functional module can be considered, for example, a functional area dedicated to performing predetermined functions of a display device DD or an electronic device including a display device DD. Predetermined functions can be associated with, for example, an application or feature of the electronic device or display device DD, and therefore can correspond to functions other than the camera functions described above.

[0050] The housing HU is attached to the window panel WP. In one embodiment, the housing HU may be attached to the window panel WP to provide space for accommodating the antireflector RPP, the display module DM, and the electronic module EM. The housing HU may comprise a material with relatively high rigidity. For example, the housing HU may comprise multiple frames and / or panels made of glass, plastic, or metal, or combinations thereof. The housing HU can stably protect the components of the display device DD housed within the internal space from external impacts.

[0051] Figure 3 It is according to the embodiment along Figure 2 The cross-sectional view shown is taken by line I-I'. Figure 3In the diagram, the cross-section of the display device DD corresponds to the first direction DR1 and the third direction DR3, and the constituent elements of the display device DD are illustrated in a simplified form to explain their stacking relationship.

[0052] According to embodiments of the present invention, the display device DD may include a display panel DP, an input sensor ISU, an antireflector RPP, and a window panel WP. At least some of the components of the display panel DP, the input sensor ISU, the antireflector RPP, and the window panel WP may be formed by a continuous process, or at least some of the components may be bonded together by an adhesive member. For example, the input sensor ISU and the antireflector RPP may be joined by an adhesive member AD1. The antireflector RPP and the window panel WP may be joined together by an adhesive member AD2.

[0053] Adhesive components AD1 and AD2 can be transparent adhesive components such as pressure-sensitive adhesive film (PSA), optically clear adhesive film (OCA), or optically clear resin (OCR). The adhesive components described below can include conventional adhesives or pressure-sensitive adhesives. In embodiments of the invention, the antireflector RPP and window panel WP can be replaced by other components or omitted.

[0054] exist Figure 3 In the input sensor ISU, antireflector RPP, and window panel WP, the input sensor ISU (which can be formed together with the display panel DP via a continuous process) is directly disposed on the display panel DP. In one embodiment, an indication that the configuration of B is directly disposed on the configuration of A can indicate that a separate adhesive layer / adhesive component is not disposed between the configuration of A and the configuration of B. After the configuration of A is formed, the configuration of B can be formed on the substrate surface provided by the configuration of A via a continuous process.

[0055] In one embodiment, the antireflector RPP and window panel WP are panel-type, and the input sensor ISU is layer-type. A panel-type element may include a base layer providing a substrate surface such as a synthetic resin film, composite film, or glass substrate. A layer-type element may omit the base layer. For example, layer-type elements may be disposed on a substrate surface provided by other components. In embodiments of the invention, the antireflector RPP and window panel WP may be layer-type.

[0056] The display panel DP generates an image, and the input sensor ISU acquires coordinate information of external inputs (e.g., touch events). According to embodiments of the invention, the display device DD may further include a protective member on the lower (or rear) surface of the display panel DP. The protective member and the display panel DP can be connected by an adhesive member.

[0057] According to embodiments of the present invention, the display panel DP can be a light-emitting display panel, but is not specifically limited to any type. For example, the display panel DP can be an organic light-emitting display panel or a quantum dot light-emitting display panel. Display panels can be classified according to the material of the light-emitting element. In an organic light-emitting display panel, the light-emitting layer may include organic light-emitting materials. The light-emitting layer of a quantum dot light-emitting display panel may include quantum dots and / or quantum rods. Hereinafter, the display panel DP is described as an organic light-emitting display panel.

[0058] An antireflective refractive index (RPP) reduces the reflectivity of external light incident from the upper side of the window panel (WP). According to embodiments of the invention, the antireflective RPP may include a phase retarder and a polarizer. The phase retarder may be a film-type or a liquid crystal coated type. The polarizer may also be a film-type or a liquid crystal coated type. The film-type may include a stretchable synthetic resin film, and the liquid crystal coated type may include liquid crystals arranged in a predetermined pattern. The retarder and polarizer may further include a protective film. The retarder and polarizer themselves or the protective film may be defined as the base layer of the antireflective RPP.

[0059] According to embodiments of the present invention, the antireflector RPP may include color filters having a predetermined arrangement. The arrangement of the color filters may be determined based on, for example, the color of light emitted from pixels in the display panel DP. The antireflector RPP may further include a black matrix adjacent to the color filters.

[0060] According to embodiments of the present invention, the antireflector RPP may include a destructive interference structure. For example, the destructive interference structure may include a first reflective layer and a second reflective layer disposed on different layers. First reflected light and second reflected light reflected from the first reflective layer and the second reflective layer, respectively, can be destructively interfered with each other. Therefore, the reflectivity of external light can be reduced.

[0061] According to embodiments of the present invention, a window panel WP may include a glass substrate and / or a synthetic resin film. The window panel WP is not limited to a single layer. The window panel WP may include two or more films bonded together by an adhesive component. The window panel WP may further include a functional coating layer. The functional coating layer may include, for example, an anti-fingerprint layer, an anti-reflective layer, and / or a hard coating layer.

[0062] Figure 4 This is a plan view of an embodiment of a display panel DP. The display panel DP may include a scan drive circuit SDC, multiple signal lines SGL, multiple signal pads DP-PD, and multiple pixels PX.

[0063] The scan drive circuit SDC generates multiple scan signals and sequentially outputs them to multiple scan lines SL, which will be described later. The scan drive circuit SDC can output not only scan signals to pixel PX, but also other control signals to pixel PX. The scan drive circuit SDC may include multiple transistors formed using substantially the same process as the transistors in pixel PX.

[0064] The signal line SGL includes the scan line SL, data line DL, power line PL, transmit control line EL, and control signal line CSL. Each of the scan line SL, data line DL, and transmit control line EL is connected to the corresponding pixel PX. The power line PL is collectively connected to pixel PX. The control signal line CSL provides control signals to the scan drive circuit SDC. The power line PL provides the voltage for the operation of pixel PX. The power line PL may include multiple lines providing different voltages.

[0065] The signal pads DP-PD can be electrically connected to the data line DL, power line PL, and control signal line CSL. The signal pads DP-PD are adjacent to each other in the pad area PP within a portion of the peripheral area NAA.

[0066] The effective area AA may include pixels PX. Multiple electronic components may be present in the effective area AA. These electronic components may include an organic light-emitting diode (OLED) provided in a corresponding pixel PX and a corresponding pixel driving circuit connected thereto. For example, such as... Figure 4 As shown in the diagram, the scan drive circuit SDC, signal line SGL, signal pad DP-PD, and pixel drive circuit can be located on the circuit element layer DP-CL (see, for example, see...). Figure 9 )middle.

[0067] Each pixel PX may include multiple transistors, capacitors, and organic light-emitting diodes. Pixel PX emits light in response to signals received via scan line SL, data line DL, transmit control line EL, and power line PL.

[0068] The DP-PD signal pads on the display panel DP can be electrically connected to... Figure 2 The printed circuit board FCB shown in the figure.

[0069] Figure 4 A portion of the display panel DP shown in the diagram can be bent. A portion of the peripheral area NAA of the display panel DP can be bent, for example, based on a bending axis parallel to the first direction DR1. The bending axis can be defined to overlap with a portion of the data line DL.

[0070] The first display area DA1 and the second display area DA2 can be in the display panel DP and can constitute the effective area AA of the display panel DP. The first display area DA1 can surround the second display area DA2. The second display area DA2 can be on a plane with the electronic module EM (e.g., reference). Figure 2 The two display areas overlap and can be adjacent to the first display area DA1. The resolution of the first display area DA1 can be different from the resolution of the second display area DA2. For example, the resolution of the second display area DA2 can be lower than the resolution of the first display area DA1.

[0071] The transmittance of the second display area DA2 can be higher than that of the first display area DA1. Therefore, optical signals can be easily transmitted to / received from / to the electronic module EM located below the second display area DA2.

[0072] Figure 5 It's a diagram. Figure 4 A plan view of an embodiment of the enlarged area AA'. Figure 5 In the middle, a simplified and illustrated diagram is shown of the arrangement in Figure 4 The pixel unit in region AA'. Figure 6 The illustration shows an embodiment. Figure 5 A planar diagram showing the configuration of the luminous regions in a pixel unit.

[0073] refer to Figure 4 and Figure 5 The first display area DA1 can be divided into first pixel units AR1. At least one pixel PX can be in each of the first pixel units AR1. The first pixel unit AR1 can be an area providing an image. The first pixel units AR1 can be arranged along each of a first direction DR1 and a second direction DR2. The pixels PX in the first pixel unit AR1 can provide light.

[0074] refer to Figures 4 to 6 The light-emitting regions EA-B, EA-G, and EA-R can be located in each of the first pixel units AR1 set in the first display area DA1. The first light-emitting region EA-B is the light-emitting region of the first color pixel, the second light-emitting region EA-G is the light-emitting region of the second color pixel, and the third light-emitting region EA-R is the light-emitting region of the third color pixel. Each of the light-emitting regions EA-B, EA-G, and EA-R can correspond to a pixel PX.

[0075] The first pixel unit AR1 may include a first light-emitting area EA-B, a second light-emitting area EA-G, and a third light-emitting area EA-R. Figure 6In the embodiment illustrated in the figure, each of the first pixel units AR1 includes a first light-emitting region EA-B, two second light-emitting regions EA-G, and a third light-emitting region EA-R. However, the embodiment is not limited thereto.

[0076] Furthermore, the shape of each of the light-emitting regions EA-B, EA-G, and EA-R in the first pixel unit AR1 is illustrated as having a rhomboid shape on a plane, but in another embodiment, they may have different shapes.

[0077] refer to Figure 6 In a first pixel unit AR1, two second light-emitting regions EA-G are spaced apart from each other in a first direction DR1, and the first light-emitting region EA-B and the third light-emitting region EA-R can also be spaced apart from each other. The second light-emitting region EA-G is interposed between the first light-emitting region EA-B and the third light-emitting region EA-R. The light-emitting regions EA-B, EA-G, and EA-R can be separated by a non-light-emitting region NPA (e.g., see [reference]). Figure 9 The light-emitting regions EA-B, EA-G, and EA-R are distinguished from each other by a pixel-defined film PDL (see, for example, see...). Figure 9 The region is divided into areas. The non-luminescent area (NPA) can overlap with the pixel-defined film (PDL).

[0078] In one embodiment, one of the two second light-emitting regions EA-G in a first pixel unit AR1 can correspond to a fourth light-emitting region distinct from the second light-emitting regions EA-G. Figure 6 In the illustration, the two second emitting regions EA-G are shown to have substantially the same shape and substantially the same area on a plane, but the embodiment is not limited thereto. In the embodiment, the second emitting regions EA-G and the fourth emitting region may have different planar shapes and / or different areas.

[0079] In this embodiment, the configuration of the first pixel unit AR1 in the first display area DA1 is not limited to the configuration illustrated in the figures. The number of light-emitting regions in a first pixel unit AR1, the area ratio between different light-emitting regions, the arrangement of the light-emitting regions, and / or the shape of each light-emitting region can be varied in the embodiment and / or combined according to the display quality of the display panel DP.

[0080] In one embodiment, a first emitting region EA-B can generate blue light. Each of the two second emitting regions EA-G can generate green light. A third emitting region EA-R can generate red light. In another embodiment, blue, green, and red light can be altered to different combinations of the three primary colors of light.

[0081] Figure 7 It shows Figure 4A floor plan of an embodiment of area BB'. Figure 7 In the middle, a simplified and illustrated diagram is shown of the arrangement in Figure 4 The pixel unit in region BB'. Figure 8 It shows Figure 7 A floor plan of an embodiment of a portion of area BB' shown.

[0082] refer to Figure 4 and Figure 7 The second display area DA2 may include a second pixel unit AR1' and a non-pixel unit AR2. The second pixel unit AR1' may be connected with... Figure 5 The first pixel unit AR1 is basically the same.

[0083] A pixel PX can be set in a second pixel unit AR1', and the second pixel unit AR1' can be an area providing an image. At least one missing pixel can be set in a non-pixel unit AR2. The missing pixel can be a pixel in which one or more elements constituting pixel PX are omitted. Pixel PX in the second pixel unit AR1' can provide light, and the missing pixel in the non-pixel unit AR2 can not provide light. Semiconductor patterns, conductive patterns, metal patterns, and / or signal lines may not be in the non-pixel unit AR2. In addition, reflective electrodes and non-transmissive electrodes, etc., may not be in the non-pixel unit AR2. In addition, light signals can substantially move through the non-pixel unit AR2. For example, from an electronic module EM (e.g., reference...) Figure 2 The signal provided can be output through the non-pixel unit AR2, or the input signal can be received by the electronic module EM.

[0084] For example, the non-pixel unit AR2 can be an area that does not contain any pixels. The non-pixel unit AR2 can be a low-reflection area, a transmissive area, a non-display area, a non-emitting area, or a semi-transmissive area. Since the second display area DA2 includes the non-pixel unit AR2, which cannot provide an image, its resolution can be lower than that of the first display area DA1.

[0085] Multiple second pixel units AR1' can be provided in the second display area DA2, and multiple non-pixel units AR2 can also be provided. The second pixel units AR1' and non-pixel units AR2 can be arranged, for example, according to a predetermined rule. Figure 7 In one embodiment, 29 non-pixel units AR2 can be arranged around a second pixel unit AR1'. Figure 7In the illustration, the arrangement between the second pixel unit AR1' and the non-pixel unit AR2 is shown as an example. However, the invention is not limited thereto. If the second display area DA2 has a structure that includes both the second pixel unit AR1' and the non-pixel unit AR2, various modifications can be made, for example, based on the arrangement between the second pixel unit AR1' and the non-pixel unit AR2.

[0086] Figure 8 This is a plan view illustrating an embodiment of a second pixel unit AR1' and non-pixel unit AR2 in a second display area DA2. As illustrated, the second pixel unit AR1' may include at least three light-emitting regions EA-B, EA-G, and EA-R. The second pixel unit AR1' may include a first light-emitting region EA-B, a second light-emitting region EA-G, and a third light-emitting region EA-R. In another embodiment, the color and / or number of light-emitting regions and their relative arrangement may be different. Furthermore, the shape of each of the light-emitting regions EA-B, EA-G, and EA-R in the second pixel unit AR1' is shown as having a rectangular shape on the plane, but in another embodiment, they may have different shapes.

[0087] refer to Figure 8 In a second pixel unit AR1', a second light-emitting region EA-G and a third light-emitting region EA-R may be spaced apart along a second direction DR2. A first light-emitting region EA-B may be spaced apart from the second light-emitting region EA-G and the third light-emitting region EA-R along a first direction DR1. In one embodiment, the first light-emitting region EA-B may have an area larger than the sum of the areas of the second light-emitting region EA-G and the third light-emitting region EA-R. However, in another embodiment, the relative sizes may be different.

[0088] In one embodiment, Figure 5 The first pixel unit AR1 and Figure 7 The second pixel unit AR1' can have substantially the same light-emitting area. In one embodiment, the size of the second pixel unit AR1' can be different from the size of the first pixel unit AR1. For example, the size of the second pixel unit AR1' can be larger than the size of the first pixel unit AR1. However, in another embodiment, these sizes can be different.

[0089] Figure 9 This is a cross-sectional view illustrating a portion of the second display area DA2 in the display panel DP of the display device DD according to an embodiment.

[0090] refer to Figure 9The display panel DP may include multiple insulating layers, semiconductor patterns, conductive patterns, metal patterns, and signal lines. The insulating layers, semiconductor layers, conductive layers, and metal layers can be formed, for example, by coating or vapor deposition methods. Subsequently, the insulating layers, semiconductor layers, conductive layers, and metal layers can be selectively patterned using photolithography. In this way, semiconductor patterns, conductive patterns, shielding patterns, metal patterns, and signal lines are formed in the circuit element layer DP-CL and the light-emitting element layer DP-ED. Subsequently, an upper insulating layer TFL covering the light-emitting element layer DP-ED can be formed.

[0091] The transistor TR and the light-emitting element ED can be disposed on the substrate layer BL. The light-emitting element ED may include a first electrode AE ​​and a second electrode CE, and a light-emitting layer EML between the first electrode AE ​​and the second electrode CE. In addition, the light-emitting element ED may include a hole transport region HTR between the first electrode AE ​​and the light-emitting layer EML and an electron transport region ETR between the light-emitting layer EML and the second electrode CE.

[0092] A first buffer layer BFL1 may be present on a substrate layer BL to improve the bonding strength between the substrate layer BL and a metallic pattern, such as a shielding pattern BML. The first buffer layer BFL1 may include at least one of a silicon oxide layer and a silicon nitride layer. In one embodiment, the silicon oxide layer and the silicon nitride layer may be stacked alternately.

[0093] The shielding pattern BML can be on the first buffer layer BFL1. In an embodiment, the first buffer layer BFL1 can be omitted. In this case, the shielding pattern BML can be on the upper surface of the base layer BL.

[0094] The shielding pattern BML can overlap with the transistor TR and the active region AP1, and can serve as a protective layer to prevent degradation of the electrical characteristics of the active region AP1. Additionally, in the manufacturing process of electronic devices, it can protect the transistor TR from light or moisture introduced from below the substrate layer BL. The shielding pattern BML can be formed from a metallic material with, for example, low light transmittance. For example, the shielding pattern BML can be a metallic pattern formed from molybdenum (Mo).

[0095] Light incident on the shielding pattern BML can be reflected from either the upper or lower surface of the shielding pattern BML. In an embodiment, the second buffer layer BFL2 may be on the shielding pattern BML and may cover all or part of the shielding pattern BML. A semiconductor pattern is disposed on the second buffer layer BFL2 and may include a silicon semiconductor material. The semiconductor pattern may include, for example, polycrystalline silicon, amorphous silicon, or metal oxide semiconductor materials.

[0096] Semiconductor patterns exhibit different electrical properties depending on whether they are doped. Depending on the degree of doping, semiconductor patterns can include doped and undoped regions. Doped regions can be doped with N-type or P-type dopants. A P-type transistor includes a doped region doped with P-type dopants.

[0097] The doped region can have a higher doping concentration than the undoped region, and the doped region can have a higher conductivity than the undoped region. The doped region can essentially be used as, for example, an electrode or a signal line. The undoped region can correspond to the active region (or channel) of the transistor. For example, a portion of the semiconductor pattern can be the active region (or channel) of the transistor, another portion can be the source region (or input electrode) or drain region (or output electrode) of the transistor, and yet another portion can be a connection signal line (or connection electrode). In one embodiment, a dopant can also be doped into the active region (or channel) of the transistor.

[0098] like Figure 9 As shown, the source S1, active region AP1, and drain D1 of transistor TR are formed from a semiconductor pattern. A first insulating layer 10 may be on the semiconductor pattern. The gate G1 of transistor TR may be on the first insulating layer 10. A second insulating layer 20 may be on the gate G1. Third to fifth insulating layers 30 may be on the second insulating layer 20.

[0099] The transistor TR and the light-emitting element ED can be electrically connected via connecting electrodes. For example, the connecting electrodes can electrically connect the transistor TR and the light-emitting element ED through contact holes in the third insulating layer 30 to the fifth insulating layer 50. A sixth insulating layer 60 may be present on the fifth insulating layer 50. Figure 9 In this process, the first insulating layer 10 to the sixth insulating layer 60 are stacked, but the number of insulating layers can be reduced or additionally added. Figure 9 The number of insulating layers shown is different.

[0100] The layers from the first buffer layer BFL1 to the sixth insulating layer 60 may correspond to the circuit element layer DP-CL. The circuit element layer DP-CL may include at least one metal pattern such as the shielding pattern BML, semiconductor patterns S1, AP1, and D1, a gate G1, or a connection electrode. At least one metal pattern may not be present in the non-pixel unit AR2. The non-pixel unit AR2 does not include the shielding pattern BML, semiconductor patterns S1, AP1, and D1, or the gate G1, and may include multiple insulating layers. The non-pixel unit AR2 may correspond to a transmissive region having a higher transmittance than the second pixel unit AR1'. In embodiments of the display device DD, the portion corresponding to the non-pixel unit AR2 may be referred to as a non-pixel region, and the portion corresponding to the second pixel unit AR1' may be referred to as a pixel region.

[0101] The first electrode AE ​​can be on the sixth insulating layer 60 and can be used as an anode electrode. A pixel-defining film PDL can be on the first electrode AE ​​and the sixth insulating layer 60. In the pixel-defining film PDL, an opening portion PX_OP can expose a predetermined portion of the first electrode AE. The pixel-defining film PDL can be formed from a polymer resin. For example, the pixel-defining film PDL can be formed from a polyacrylate resin or a polyimide resin. Alternatively, the pixel-defining film PDL can be formed by further including inorganic materials in addition to the polymer resin.

[0102] In one embodiment, the pixel-defined film (PDL) can be formed by including a light-absorbing material, or by including a black pigment or black dye. A pixel-defined film PDL formed by including a black pigment or black dye can achieve a black pixel-defined film. Carbon black or the like can be used as a black pigment or black dye when forming the pixel-defined film PDL, but the embodiments are not limited to this.

[0103] The hole transport region (HTR) can be located on the first electrode (AE) and the pixel-defining film (PDL). The HTR can be co-located within the first light-emitting region (EA-B) and the non-light-emitting region (NPA). The HTR may include a hole transport layer and a hole injection layer.

[0104] The light-emitting layer (EML) can be located on the hole transport region (HTR) and can be in the region corresponding to the opening portion (PX_OP). The EML can include organic and / or inorganic materials. Figure 9 In this process, the emissive layer EML can, for example, emit blue light in the first emissive region EA-B. The emissive layer can also emit blue light in the second emissive region EA-G (e.g., see...). Figure 8 Green light is generated in the third emitting region EA-R (e.g., see [reference]). Figure 8 Red light is generated in the region. The second emitting region EA-G and the third emitting region EA-R can also have the same characteristics as the region. Figure 9 The diagram shows the stacked structure corresponding to the first luminescent region EA-B.

[0105] The electron transport region (ETR) can be located on the emissive layer (EML) and the hole transport region (HTR). The ETR can be jointly located in the first emissive region (EA-B) and the non-emissive region (NPA). The ETR may include an electron transport layer and an electron injection layer.

[0106] The second electrode CE can be located on the electron transport region ETR and can be used as a cathode electrode. The second electrode CE can be provided as a common layer.

[0107] In one embodiment, the hole transport region HTR, the electron transport region ETR, and the second electrode CE are shown extending into the non-luminescent region NPA, but the embodiment is not limited thereto. In one embodiment, the hole transport region HTR, the electron transport region ETR, and the second electrode CE may also be patterned and provided to correspond to the luminescent region.

[0108] The layer in which the light-emitting element (ED) is disposed can be defined as a light-emitting element layer DP-ED. An upper insulating layer TFL can be disposed on the light-emitting element ED.

[0109] The first electrode AE ​​may not be included in the non-pixel unit AR2. The non-pixel unit AR2 may overlap with the upper insulating layer TFL. When the second electrode CE is a transparent electrode, the non-pixel unit AR2 may include at least a portion of the second electrode CE.

[0110] In this section corresponding to the non-pixel unit AR2, the light signal provided from outside the display device DD can pass through the display panel DP and can be provided to the electronic module EM (e.g., reference). Figure 2 Alternatively, the light signal emitted from the electronic module EM can pass through the display panel DP and be provided to the outside of the display device DD. Therefore, since the metal pattern or conductive pattern in the circuit element layer DP-CL of the display panel DP is not set in the part corresponding to the non-pixel unit AR2, the light signal provided as transmitted light can be freely transmitted.

[0111] Figure 10 This is a block diagram illustrating the configuration of a display device DD according to an embodiment of the present invention.

[0112] refer to Figure 10 The display device DD includes a display panel DP and a panel driving circuit PDC. The display panel DP can be, for example, a liquid crystal display panel, an organic light-emitting diode display panel, an electrophoretic display panel, an electrowetting display panel, a quantum dot display panel, or other types of display panels. (See reference...) Figure 4 As described, the display panel DP may include a scan drive circuit SDC, scan lines SL1 to SLn, data lines DL1 to DLm, and pixels PX.

[0113] The panel driver circuit PDC receives the input image signal RGB and provides the data voltage corresponding to the data signal DATA to the pixel PX through the data lines DL1 to DLm of the display panel DP, so as to control the display of the image based on the light from the pixel PX.

[0114] The panel driving circuit PDC may include a drive controller 110 and a data driving circuit 120. The drive controller 110 receives an input image signal RGB and a control signal CTRL from an external source. The control signal CTRL may include, for example, a vertical sync signal, a horizontal sync signal, a master clock signal, and a data enable signal. Based on the control signal CTRL, the drive controller 110 provides a first control signal CONT1 and a data signal DATA obtained by processing the input image signal RGB according to the operating conditions of the display panel DP to the data driving circuit 120, and provides a second control signal CONT2 to the scan driving circuit SDC. The first control signal CONT1 may include a horizontal sync start signal, a clock signal, and a line latch signal. The second control signal CONT2 may include a vertical sync start signal, an output enable signal, and a gate pulse signal. The drive controller 110 may, for example, change and output the data signal DATA in various ways based on the display frequency and / or the pixel PX arrangement of the display panel DP.

[0115] The scan drive circuit SDC drives scan lines SL1 to SLn in response to the second control signal CONT2 from the drive controller 110. The data drive circuit 120 drives data lines DL1 to DLm in response to the data signal DATA from the drive controller 110 and the first control signal CONT1.

[0116] Figure 11 This is a block diagram illustrating an embodiment of a drive controller 110, which can perform operations, such as those involving a timing controller.

[0117] refer to Figure 11 The drive controller 110 includes an image signal processing circuit 210 and a control signal generation circuit 220. The image signal processing circuit 210 receives an input image signal RGB from an external source and outputs a data signal DATA. The control signal generation circuit 220 outputs a first control signal CONT1 and a second control signal CONT2 based on the control signal CTRL received from the external source. The first control signal CONT1 may include a horizontal synchronization start signal, a clock signal, and a line latch signal, and the second control signal CONT2 may include a vertical synchronization start signal, an output enable signal, and a gate pulse signal.

[0118] In this embodiment, the input image signal RGB may include the first display area DA1 of the display panel DP (for example, see...). Figure 4 The first image signal corresponding to the first pixel unit AR1 in the display panel DP and the second display area DA2 (see, for example, see...) Figure 4The second image signal corresponds to the second pixel unit AR1' and the non-pixel unit AR2 adjacent to the second pixel unit AR1'. The image signal processing circuit 210 in the drive controller 110 performs calculations on the first image signal, the second image signal and the preset kernel data to output the data signal DATA corresponding to the second pixel unit AR1'.

[0119] The image signal processing circuit 210 considers not only the first image signal corresponding to the second pixel unit AR1', but also the second image signal corresponding to the non-pixel unit AR2, to output the data signal DATA corresponding to the second pixel unit AR1'. Therefore, it can prevent the display quality of the second display area DA2 from deteriorating.

[0120] Figure 12 This is a block diagram illustrating an embodiment of an image signal processing circuit 210. The image signal processing circuit 210 may include a gamma conversion section (or gamma converter) 310, a memory 320, a compensator (or compensation section) 330, a general image signal processing unit (or general image signal processor) 340, a mapping section (or mapping logic) 350, and an inverse gamma conversion section (or inverse gamma converter) 360. The input image signal RGB may include a first color signal, a second color signal, and a third color signal.

[0121] The gamma conversion section (or gamma converter) 310 linearizes the input image signal RGB, which has non-linear characteristics, and outputs a gamma image signal GI. For example, the gamma conversion section 310 can linearize the input image signal RGB based on a gamma lookup table to output the gamma image signal GI. The gamma lookup table can store luminance data based on a reference gamma value. For example, the reference gamma value can be one of various values ​​such as 1.8, 2.2, 2.4, 4.0, or other values.

[0122] Memory 320 stores the gamma image signal GI output from gamma conversion section 310. Memory 320 may be a row memory capable of storing gamma image signals GI corresponding to a predetermined number of rows in an image frame. In an embodiment, memory 320 may store four rows of gamma image signals GI. Memory 320 may output a first image signal RGB1 corresponding to a first pixel unit AR1 in the first display area DA1 and a first image signal RGB1 corresponding to a second display area DA2 (e.g., see...). Figure 4 The second image signal RGB2 corresponds to the second pixel unit AR1' and the non-pixel unit AR2 adjacent to the second pixel unit AR1'.

[0123] The compensator 330 compensates for the second image signal RGB2 corresponding to the second display area DA2, and outputs a compensated image signal C_D. The compensated image signal C_D may include... Figure 8 The color signals corresponding to the three emitting regions EA-B, EA-G, and EA-R shown in the figure.

[0124] The general image signal processing unit 340 converts the first image signal RGB1 corresponding to the first display area DA1 into a general image signal N_D. The first image signal RGB1 may include a first color signal, a second color signal, and a third color signal. The general image signal N_D may include, for example, a first color signal, a second color signal, and a third color signal. Figure 6 The four emitting regions EA-B, EA-G, and EA-R in the diagram correspond to the first to fourth color signals.

[0125] The mapping section (or mapping logic) 350 receives the compensated image signal C_D from the compensator 330 and the ordinary image signal N_D from the ordinary image signal processing unit 340. The mapping section 350 maps the compensated image signal C_D and the ordinary image signal N_D to a display panel DP (e.g., reference DP). Figure 10 The mapping section 350 maps the ordinary image signal N_D to the pixel unit in the first display area DA1, and maps the compensated image signal C_D to the pixel unit in the second display area DA2.

[0126] In one embodiment, Figure 6 The four luminescent regions shown are EA-B, EA-G, and EA-R. Figure 8 The three light-emitting regions EA-B, EA-G, and EA-R shown can each correspond to pixel PX.

[0127] The inverse gamma transform section 360 can nonlinearly transform the mapped signal M_D to output the data signal DATA by calculating an output gamma lookup table based on the inverse gamma function of the gamma lookup table in the gamma transform section 310. For example, when the gamma lookup table of the gamma transform section 310 is formed by a gamma function with a gamma value of 2.2, the output gamma lookup table of the inverse gamma transform section 360 can be formed by an inverse gamma function with a gamma value of 2.2. The output gamma lookup table can store the grayscale data calculated by the inverse gamma function of the gamma lookup table. An embodiment of the operation of the compensator 330 is described below.

[0128] Figure 13A An example of the second image signal RGB2 and kernel matrix KN provided from memory 320 is illustrated. Figure 13AIn this context, the second image signal RGB2 may include image signals A1 to A6, B1 to B6, C1 to C6, D1 to D6, and E1 to E6. Image signals A1 to A6 may be referred to as the first row L1, image signals B1 to B6 may be referred to as the second row L2, image signals C1 to C6 may be referred to as the third row L3, image signals D1 to D6 may be referred to as the fourth row L4, and image signals E1 to E6 may be referred to as the fifth row L5.

[0129] refer to Figure 12 and Figure 13A The memory 320 can provide all (or a portion) of the first to fifth rows L1 to L5 of the second image signal RGB2. In one embodiment, the memory 320 can provide the first to fourth rows L1 to L4 of the second image signal RGB2, and the fifth row L5 can be the gamma image signal GI output from the gamma conversion section 310. Therefore, the gamma image signal GI of the current input row can be directly provided to the compensator 330 without going through the memory 320.

[0130] Image signals A1 to A6, B1 to B6, C1 to C6, D1 to D6, and E1 to E6 can be respectively compared with... Figure 7 The second pixel unit AR1' in region BB' of the diagram corresponds to the non-pixel unit AR2. Figure 13A In the example shown, image signal C4 can correspond to the second pixel unit AR1'. The remaining image signals A1 to A6, B1 to B6, C1, C2, C3, C5, C6, D1 to D6, and E1 to E6 can each correspond to the non-pixel unit AR2.

[0131] The kernel matrix KN may include kernel data K11 to K16, K21 to K26, K31 to K36, K41 to K46, and K51 to K56. For example, the kernel matrix KN may include a×b kernel data (where a and b are natural numbers). In the following description, an example size of the kernel matrix KN is illustrated as 5×6, but in another embodiment, the size of the kernel matrix KN may be different.

[0132] The compensator 330 performs convolution operations on image signals A1 to A6, B1 to B6, C1 to C6, D1 to D6 and E1 to E6 and kernel data K11 to K16, K21 to K26, K31 to K36, K41 to K46 and K51 to K56, and outputs the compensated image signal C_D.

[0133] The compensator 330 can multiply each of the corresponding image signals A1 to A6, B1 to B6, C1 to C6, D1 to D6, and E1 to E6 in the second image signal RGB2 with each of the corresponding kernel data K11 to K16, K21 to K26, K31 to K36, K41 to K46, and K51 to K56 in the kernel matrix KN, and output the value divided by the sum of the kernel data as the compensated image signal C_D corresponding to the second pixel unit AR1'. For example, the compensated image signal C_D corresponding to the second pixel unit AR1' can be calculated by {(A1×K11)+(A2×K12)+…+(E6×K56)} / (K11+K12+…+K56).

[0134] Figure 13B An example is shown illustrating the values ​​of the second image signal RGB2 and the kernel matrix KN provided from memory 320. (Reference) Figure 13A and Figure 13B In the second image signal RGB2, the gray levels of image signals C1, D2, and E3 are 255, while the gray levels of other image signals are 0. For example... Figures 5 to 8 As described, since the second display area DA2 includes non-pixel units AR2 that cannot provide images, its resolution can be lower than that of the first display area DA1.

[0135] When the image signal C4 is provided to the mapping section 350 without performing the compensation operation of the compensator 330, the display quality of the second display area DA2 may be degraded because the image signals A1 to A6, B1 to B6, C1, C2, C3, C5, C6, D1 to D6 and E1 to E6 corresponding to the non-pixel unit AR2 are not used.

[0136] In one embodiment, the compensator 330 outputs a compensated image signal C_D corresponding to the second pixel unit AR1' based on the image signal C4 corresponding to the second pixel unit AR1' and the image signals A1 to A6, B1 to B6, C1, C2, C3, C5, C6, D1 to D6, and E1 to E6 corresponding to the non-pixel unit AR2. Therefore, it can prevent the display quality of the second display area DA2 from deteriorating.

[0137] The kernel data K11 to K16, K21 to K26, K31 to K36, K41 to K46 and K51 to K56 in the kernel matrix KN can be determined based on the image signals A1 to A6, B1 to B6, C1 to C6, D1 to D6 and E1 to E6 in the second image signal RGB2. Figure 13BThe values ​​of kernel data K11 to K16, K21 to K26, K31 to K36, K41 to K46, and K51 to K56 shown are merely examples and may be different in other embodiments.

[0138] Figures 14A to 14C This is a diagram showing examples of kernel matrices that can correspond to various embodiments. Figure 14A The diagram illustrates the kernel matrix KN1 corresponding to the pattern used to enhance and compensate the image around the second pixel unit AR1'. Figure 14B The illustration shows the kernel matrix KN2 corresponding to the pattern of the image around the second pixel unit AR1' in a diagonal direction sloping from the upper left to the lower right. Figure 14C The illustration shows the kernel matrix KN3 corresponding to the pattern of the image around the second pixel unit AR1' in a diagonal direction sloping from the lower left to the upper right. (See illustration for details.) Figures 14A to 14C As shown, the compensator 330 can use any one of the individual kernel matrices KN1, KN2 and KN3 to compensate for the second image signal RGB2.

[0139] Figures 15A to 15I This is a diagram illustrating an example of the correspondence between a second image signal RGB2 and a kernel matrix KN according to one or more embodiments. Figures 15A to 15I In this context, it is assumed that image signal D5 of the second image signal RGB2 corresponds to the second pixel unit AR1', and other image signals A1 to A8, B1 to B8, C1 to C8, D1 to D4, D6 to D8, E1 to E8, F1 to F8, and G1 to F8 correspond to non-pixel units AR2 (for example, see...). Figure 7 Correspondingly, it is also assumed that the kernel matrix KN comprises 5×6 kernel data. In other embodiments, the image signal in the second image signal RGB2 used to generate the compensated image signal C_D corresponding to the second pixel unit AR1' is not fixed and can be changed.

[0140] exist Figures 15A to 15I In the middle, compensator 330 (for example, see...) Figure 12 The compensated image signal C_D corresponding to the second pixel unit AR1' can be generated based on the image signal in the second image signal RGB2 that overlaps with the kernel matrix KN. For example, Figure 15A As shown in the figure, the compensator 330 can generate a compensated image signal C_D corresponding to the second pixel unit AR1' based on the image signals B2 to B7, C2 to C7, D2 to D7, E2 to E7 and F2 to F7.

[0141] like Figure 15BAs shown, the compensator 330 can generate a compensated image signal C_D corresponding to the second pixel unit AR1' based on the image signals B1 to B6, C1 to C6, D1 to D6, E1 to E6 and F1 to F6.

[0142] like Figure 15C As shown in the figure, the compensator 330 can generate a compensated image signal C_D corresponding to the second pixel unit AR1' based on image signals A1 to A6, B1 to B6, C1 to C6, D1 to D6, and E1 to E6.

[0143] like Figure 15D As shown in the figure, the compensator 330 can generate a compensated image signal C_D corresponding to the second pixel unit AR1' based on image signals A2 to A7, B2 to B7, C2 to C7, D2 to D7 and E2 to E7.

[0144] like Figure 15E As shown in the figure, the compensator 330 can generate a compensated image signal C_D corresponding to the second pixel unit AR1' based on the image signals A3 to A8, B3 to B8, C3 to C8, D3 to D8, and E3 to E8.

[0145] like Figure 15F As shown, the compensator 330 can generate a compensated image signal C_D corresponding to the second pixel unit AR1' based on the image signals B3 to B8, C3 to C8, D3 to D8, E3 to E8, and F3 to F8.

[0146] like Figure 15G As shown, the compensator 330 can generate a compensated image signal C_D corresponding to the second pixel unit AR1' based on the image signals C3 to C8, D3 to D8, E3 to E8, F3 to F8, and G3 to G8.

[0147] like Figure 15H As shown in the figure, the compensator 330 can generate a compensated image signal C_D corresponding to the second pixel unit AR1' based on the image signals C2 to C7, D2 to D7, E2 to E7, F2 to F7 and G2 to G7.

[0148] like Figure 15I As shown in the figure, the compensator 330 can generate a compensated image signal C_D corresponding to the second pixel unit AR1' based on the image signals C1 to C6, D1 to D6, E1 to E6, F1 to F6 and G1 to G6.

[0149] like Figures 15A to 15I As shown, the kernel matrix KN can be shifted clockwise one by one based on the overlap (or one-to-one correspondence) between the image signal D5 and the second image signal RGB2.

[0150] The compensator 330 can sequentially change the image signal in the second image signal RGB2 that has been operated on with the kernel matrix KN for each frame in multiple frames (e.g., per frame), such as Figures 15A to 15I As shown in the diagram, the compensator 330 can change the time period of the image signal in the second image signal RGB2 that is operated on with the kernel matrix KN in various ways according to the embodiment. For example, the position of the image signal in the second image signal RGB2 that is operated on with the kernel matrix KN can be changed at each interval, for example, each interval can correspond to a predetermined number of frames (e.g., 30 frames). The order in which the image signal in the second image signal RGB2 is changed in the operation on the kernel matrix KN is not limited to... Figures 15A to 15I The order shown may differ in other embodiments.

[0151] When a specific pattern (i.e., a fixed image (or still image) without movement) is displayed for a long time (e.g., longer than a predetermined time) in an organic light-emitting diode display device, the fixed image can act as a means to easily activate the light-emitting element ED or transistor TR (e.g., see...). Figure 9 Degraded stress patterns. Degradation of light-emitting elements and / or transistors has become a major cause of display quality decline, which can shorten the lifespan of display devices, for example, by causing dots such as DC ghosting.

[0152] By periodically changing the image signal in the second image signal RGB2 that is processed with the kernel matrix KN, the degradation of the display quality of the second display area DA2 can be prevented or reduced.

[0153] Figure 16A and Figure 16B It is used to explain according to one or more embodiments Figure 12 A diagram showing the operation of the compensator 330.

[0154] refer to Figure 12 , Figure 16A and Figure 16B The compensator 330 can define the second image signal RGB2 output from the memory 320 into a first sub-image signal RGBa and a second sub-image signal RGBb. The first sub-image signal RGBa includes, for example: Figure 15A The second image signal RGB2 shown includes image signals A1 to A6, B1 to B6, C1 to C6, D1 to D6, and E1 to E6. The second sub-image signal RGBb includes, as shown... Figure 15A The second image signal RGB2 shown includes image signals A2 to A7, B2 to B7, C2 to C7, D2 to D7, and E2 to E7.

[0155] The compensator 330 is generated based on the first sub-image signal RGBa and the second sub-image signal RGBb (e.g. Figure 16B The third sub-image signal RGBc is shown in the figure. For example, the compensator 330 generates the third sub-image signal RGBc image signal A12 based on the image signal A1 of the first sub-image signal RGBa and the image signal A2 of the second sub-image signal RGBb. The compensator 330 can adjust the response ratio of the image signals A1 and A2. As an example, the image signal A12 can be calculated based on equation (1).

[0156]

[0157] The compensator 330 generates the image signals A12 to A67, B1 to B67, C1 to C6, D1 to D6 and E1 to E6 of the first sub-image signal RGBa and the image signals A2 to A7, B2 to B7, C2 to C7, D2 to D7 and E2 to E7 of the second sub-image signal RGBb using equation (1).

[0158] Compensator 330 can adjust the third sub-image signal RGBc and Figure 13A The kernel matrix KN shown in the diagram performs a convolution operation and outputs a compensated image signal C_D. Figure 16A The second sub-image signal RGBb shown in the figure is an image signal shifted by one pixel from the first sub-image signal RGBa, which is a part of the second image signal RGB2 shown in the figure 15A.

[0159] If the second sub-image signal RGBb is an image shifted by 1 / 32 pixels from the first sub-image signal RGBa, then the image signal A12 can be calculated based on equation (2).

[0160]

[0161] If the second sub-image signal RGBb is an image shifted by 2 / 32 pixels from the first sub-image signal RGBa, then the image signal A12 can be calculated based on equation (3).

[0162]

[0163] If the second sub-image signal RGBb is an image shifted by 3 / 32 pixels from the first sub-image signal RGBa, then the image signal A12 can be calculated based on equation (4).

[0164]

[0165] If the second sub-image signal RGBb is an image shifted by 31 / 32 pixels from the first sub-image signal RGBa, then the image signal A12 can be calculated based on equation (5).

[0166]

[0167] Thus, in other embodiments, the shift distance between the first sub-image signal RGBa and the second sub-image signal RGBb can be different. Additionally, in other embodiments, the shift period of the second sub-image signal RGBb (e.g., the number of frames to be shifted) can be different. Figure 12 The image signal processing circuit 210 shown in the figure can generate, for example, a second sub-image signal RGBb shifted by 1 / 16 pixel during multiple frame intervals (e.g., every 60 frames), and can output a compensated image signal C_D.

[0168] According to one or more embodiments, a display device can compensate for image signals to be provided to pixels in a display panel. These pixels can be positioned in an area overlapping with an electronic module, and the compensation can be performed based on image signals corresponding to surrounding pixels in the display panel. Therefore, even if the number of pixels positioned in the area overlapping with the electronic module is reduced, display quality degradation can be prevented.

[0169] The methods, processes, and / or operations described herein can be performed by code or instructions that will be executed by a computer, processor, controller, or other signal processing device. The computer, processor, controller, or other signal processing device can be those described herein or other than the elements described herein. Because the algorithms underlying the methods (or the operations of the computer, processor, controller, or other signal processing device) are described in detail, the code or instructions used to implement the operations of the method embodiments can transform the computer, processor, controller, or other signal processing device into a dedicated processor for performing the methods described herein.

[0170] Furthermore, another embodiment may include a computer-readable medium for storing the code or instructions described above, such as a non-transitory computer-readable medium. The computer-readable medium may be volatile or non-volatile memory or other storage device, which may be removably or permanently coupled to a computer, processor, controller, or other signal processing device that will execute the code or instructions for performing the operations of the method or device embodiments described herein.

[0171] The controllers, processors, devices, modules, sections, drivers, converters, transformers, compensators, units, multiplexers, generators, logic, interfaces, decoders, and other signal generation and signal processing features disclosed in this document may, for example, be implemented as non-transitory logic that may include hardware, software, or both hardware and software. When implemented at least partially in hardware, the controllers, processors, devices, modules, sections, drivers, converters, transformers, compensators, units, multiplexers, generators, logic, interfaces, decoders, and other signal generation and signal processing features may be, for example, any of various integrated circuits including, but not limited to, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), combinations of logic gates, systems-on-a-chip (SoCs), microprocessors, or other types of processing or control circuitry.

[0172] When implemented at least partially in software, controllers, processors, devices, modules, components, drivers, converters, transformers, compensators, units, multiplexers, generators, logic, interfaces, decoders, and other signal generation and signal processing features may include, for example, memory or other storage devices for storing code or instructions to be executed by, for example, a computer, processor, microprocessor, controller, or other signal processing device. The computer, processor, microprocessor, controller, or other signal processing device may be those described herein or other elements besides those described herein. Because the algorithms underlying the formation of the method (or the operation of the computer, processor, microprocessor, controller, or other signal processing device) are described in detail, the code or instructions for implementing the operations of the method embodiments can transform the computer, processor, controller, or other signal processing device into a dedicated processor for performing the methods described herein.

[0173] Although embodiments of the invention have been described, it should be understood that the invention is not limited to these embodiments, but rather that various changes and modifications can be made by those skilled in the art within the spirit and scope of the invention as claimed above. Embodiments may be combined to form additional embodiments.

Claims

1. A display device, comprising: The display panel includes a first display area having a first light transmittance and a second display area having a second light transmittance higher than the first light transmittance; as well as A drive controller, configured to receive image signals and output data signals for the display panel, is configured to: The image signal is divided into a first image signal corresponding to a first pixel unit in the first display area of ​​the display panel, and a second image signal corresponding to a second pixel unit and a non-pixel unit adjacent to the second pixel unit in the second display area of ​​the display panel. The second image signal is processed with a preset kernel matrix to output a compensated image signal, and The data signal corresponding to the second pixel unit in the second display area is output based on the compensated image signal.

2. The display device according to claim 1, further comprising: The electronic module is configured to overlap with the second display area.

3. The display device according to claim 2, wherein The electronic module is a camera.

4. The display device according to any one of claims 1 to 3, wherein: The first display area includes a first number of first pixel units per unit area, and The second display area includes a second number of second pixel units per unit area, the second number being less than the first number.

5. The display device according to any one of claims 1 to 3, wherein The drive controller includes: A compensator is configured to perform operations on the second image signal and the kernel matrix and output the compensated image signal; and The mapping logic is configured to map the compensated image signal onto the second pixel unit in the second display area.

6. The display device of claim 5, wherein, The compensator is configured as follows: Perform a convolution operation on the second image signal and the kernel matrix, and The compensated image signal is output.

7. The display device according to claim 5, wherein The drive controller further includes: A gamma converter is configured to convert the image signal into a gamma image signal; and The memory is configured to store the gamma image signal and output it. The first image signal corresponding to the first pixel unit in the first display area, and The second image signal corresponding to the second pixel unit and the non-pixel unit in the second display area.

8. The display device of claim 7, wherein, The drive controller further includes: The gamma inverse converter is configured to convert the signal output from the mapping logic into the data signal.

9. The display device according to claim 5, wherein The kernel matrix includes a×b kernel data, where a and b are natural numbers.

10. A display device, comprising: The display panel includes a first display area having a first light transmittance and a second display area having a second light transmittance higher than the first light transmittance; as well as A drive controller is configured to receive image signals and output data signals to be provided to the display panel, wherein the drive controller includes: A gamma converter is configured to convert the image signal into a gamma image signal; The memory is configured to store the gamma image signal and output a first image signal corresponding to a first pixel unit in the first display area and a second image signal corresponding to a second pixel unit and a non-pixel unit adjacent to the second pixel unit in the second display area. The compensator is configured to perform operations on the second image signal and the kernel matrix and output a compensated image signal; and The mapping logic is configured to map the compensated image signal onto the second pixel unit in the second display area.

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