Multilayer capacitor and board having the same

Abstract

The disclosure provides a multilayer capacitor and a board having the same, the multilayer capacitor including: a capacitor body including first and second dielectric layers, internal electrodes, and including first through sixth surfaces; first and second external electrodes disposed on the third and fourth surfaces, respectively; and third and fourth external electrodes disposed on the fifth and sixth surfaces, respectively. The plurality of internal electrodes includes: a first internal electrode disposed on the first dielectric layer, having both ends connected to the first and second external electrodes, respectively, and having a hole; a second internal electrode disposed on the second dielectric layer to be laminated with a portion of the first internal electrode and connected to the third external electrode; and a third internal electrode disposed on the second dielectric layer to be laminated with a portion of the first internal electrode, spaced apart from the second internal electrode, and connected to the fourth external electrode.

Description

[0001] This application claims the benefit of priority to Korean Patent Application No. 10-2020-0159975, filed on November 25, 2020, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. Technical Field

[0002] This disclosure relates to a multilayer capacitor and a plate having the multilayer capacitor. Background Technology

[0003] Multilayer capacitors are electronic components used in electronic devices across various fields.

[0004] Such multilayer capacitors can be classified according to their electrical characteristics into high-voltage multilayer capacitors, low equivalent series inductance (ESL) multilayer capacitors, embedded multilayer capacitors, and warp strength improved multilayer capacitors.

[0005] In addition, recent multilayer capacitors have been required to have low ESL in order to significantly reduce ripple in the power supply current. Summary of the Invention

[0006] One aspect of this disclosure provides a multilayer capacitor capable of achieving low equivalent series inductance (ESL) characteristics, and a plate having the multilayer capacitor.

[0007] According to one aspect of this disclosure, a multilayer capacitor may include: a capacitor body including a first dielectric layer and a second dielectric layer, the first dielectric layer and the second dielectric layer being alternately stacked, and a plurality of internal electrodes being inserted between the first dielectric layer and the second dielectric layer; the capacitor body including a first surface and a second surface opposite to each other, a third surface and a fourth surface connected to the first surface and the second surface and opposite to each other, and a fifth surface and a sixth surface connected to the first surface and the second surface, connected to the third surface and the fourth surface and opposite to each other; a first external electrode and a second external electrode respectively disposed on the third surface and the fourth surface of the capacitor body; and a third external electrode and a fourth external electrode respectively disposed on the fifth surface and the sixth surface of the capacitor body. The plurality of internal electrodes may include: a first internal electrode disposed on the first dielectric layer, having two ends respectively connected to the first external electrode and the second external electrode, and having a hole; a second internal electrode disposed on the second dielectric layer to overlap with a portion of the first internal electrode and connected to the third external electrode; and a third internal electrode disposed on the second dielectric layer to overlap with a portion of the first internal electrode, spaced apart from the second internal electrode, and connected to the fourth external electrode.

[0008] In the first internal electrode, the hole may extend toward the third and fourth surfaces of the capacitor body.

[0009] The location of the hole in the first dielectric layer and the location of the second inner electrode and the third inner electrode spaced apart from each other on the second dielectric layer can at least partially overlap each other in the direction in which the first dielectric layer and the second dielectric layer are stacked.

[0010] The first inner electrode may include a first lead portion and a second lead portion, which are respectively disposed at both ends of the first inner electrode and extend to be connected to the first outer electrode and the second outer electrode, respectively.

[0011] The first inner electrode may have a first groove and a second groove, the first groove and the second groove being respectively disposed at both ends of the first inner electrode in the direction toward the fifth surface and the sixth surface of the capacitor body.

[0012] The first inner electrode may have at least one cutout, the at least one cutout being respectively disposed in a portion of the third surface of the first inner electrode exposed to the capacitor body and a portion of the fourth surface of the first inner electrode exposed to the capacitor body.

[0013] The first inner electrode may have a cutout located at at least one corner of the first inner electrode.

[0014] The second internal electrode may include: a first body portion, which overlaps with a portion of the first internal electrode; and a third lead portion, which extends from the first body portion toward the fifth surface of the capacitor body.

[0015] The third internal electrode may include: a second body portion, which overlaps with a portion of the first internal electrode; and a fourth lead portion, which extends from the second body portion toward the sixth surface of the capacitor body.

[0016] The first external electrode and the second external electrode may extend from the third surface and the fourth surface of the capacitor body to a portion of the first surface and a portion of the second surface of the capacitor body, respectively, and the third external electrode and the fourth external electrode may extend from the fifth surface and the sixth surface of the capacitor body to a portion of the first surface and a portion of the second surface of the capacitor body, respectively.

[0017] The first external electrode, the second external electrode, the third external electrode, and the fourth external electrode may each include a plating layer disposed on their surface.

[0018] The hole may be spaced apart from the outer edge of the first inner electrode.

[0019] According to another aspect of this disclosure, a multilayer capacitor may include: a capacitor body including a first dielectric layer and a second dielectric layer, the first dielectric layer and the second dielectric layer being alternately stacked, and a plurality of internal electrodes being inserted between the first dielectric layer and the second dielectric layer; the capacitor body including a first surface and a second surface opposite to each other, a third surface and a fourth surface connected to the first surface and the second surface and opposite to each other, and a fifth surface and a sixth surface connected to the first surface and the second surface, connected to the third surface and the fourth surface and opposite to each other; a first external electrode and a second external electrode respectively disposed on the third surface and the fourth surface of the capacitor body; and a third external electrode and a fourth external electrode respectively disposed on the fifth surface and the sixth surface of the capacitor body. The plurality of internal electrodes may include: a first internal electrode disposed on the first dielectric layer, including a first lead portion and a second lead portion respectively disposed at both ends of the first internal electrode and extending to connect to the first external electrode and the second external electrode respectively, and the first internal electrode having a first groove portion and a second groove portion, the first groove portion and the second groove portion being respectively disposed at both ends of the first internal electrode in the direction toward the fifth surface and the sixth surface of the capacitor body, and the first internal electrode having at least one cutout portion respectively disposed on a portion of the first internal electrode exposed to the third surface of the capacitor body and a portion of the first internal electrode exposed to the fourth surface of the capacitor body; a second internal electrode disposed on the second dielectric layer to overlap with a portion of the first internal electrode and connected to the third external electrode; and a third internal electrode disposed on the second dielectric layer to overlap with a portion of the first internal electrode, spaced apart from the second internal electrode, and connected to the fourth external electrode.

[0020] According to another aspect of this disclosure, a board having a multilayer capacitor may include: a substrate having a plurality of electrode pads disposed on an upper surface of the substrate; and a multilayer capacitor as described above, mounted on the substrate such that each corresponding external electrode is connected to the electrode pads. Attached Figure Description

[0021] The above and other aspects, features and advantages of this disclosure will be more clearly understood by taking into account the accompanying drawings and the following detailed description, in which: Figure 1 This is a schematic perspective view illustrating a multilayer capacitor according to exemplary embodiments of the present disclosure; Figure 2A and Figure 2B It is shown in Figure 1 A plan view of the structure of the internal electrodes used in a multilayer capacitor; Figure 3 It is shown Figure 1 An exploded perspective view of the stacked structure of the first and second dielectric layers in a multilayer capacitor. Figure 4 This is a plan view showing the first internal electrode according to another exemplary embodiment; Figure 5 This is the equivalent circuit diagram of a double-cap type multilayer capacitor based on existing technology; Figure 6 It is an equivalent circuit diagram of a multilayer capacitor with a three-terminal structure based on existing technology; Figure 7 This is an equivalent circuit diagram of a multilayer capacitor according to exemplary embodiments of the present disclosure; Figure 8 It shows that it is installed with Figure 1 A three-dimensional view of the plates of a multilayer capacitor; and Figure 9 This is a plan view showing the first internal electrode according to another exemplary embodiment. Detailed Implementation

[0022] In the following, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0023] The orientation of the hexahedron will be defined to clearly describe the exemplary embodiments in this disclosure. In the figures, X, Y, and Z refer to the length, width, and thickness directions of the capacitor body, respectively. Here, the thickness direction can be used as the same concept as the stacking direction along which the first and second dielectric layers are stacked.

[0024] Figure 1 This is a schematic perspective view illustrating a multilayer capacitor according to exemplary embodiments of the present disclosure. Figure 2A and Figure 2B It is shown in Figure 1 A plan view of the structure of the internal electrodes used in a multilayer capacitor, and Figure 3 It is shown Figure 1 An exploded perspective view of the stacked structure of the first and second dielectric layers in a multilayer capacitor.

[0025] Reference Figures 1 to 3 The multilayer capacitor 100 according to an exemplary embodiment of the present disclosure may include a capacitor body 110, a plurality of internal electrodes, a first external electrode 131, a second external electrode 132, a third external electrode 133, and a fourth external electrode 134.

[0026] The capacitor body 110 may include a plurality of alternatingly stacked first dielectric layers 111 and second dielectric layers 112, and the shape of the capacitor body 110 is not particularly limited, but may be as follows: Figure 1 The shape shown is essentially a hexahedron.

[0027] The capacitor body 110 may include a first surface 1 and a second surface 2 opposite to each other in the Z direction, a third surface 3 and a fourth surface 4 connected to the first surface 1 and the second surface 2 and opposite to each other in the X direction, and a fifth surface 5 and a sixth surface 6 connected to the first surface 1 and the second surface 2, connected to the third surface 3 and the fourth surface 4 and opposite to each other in the Y direction.

[0028] However, the shape and size of the capacitor body 110 and the number of stacked first dielectric layers 111 and second dielectric layers 112 are not limited to the examples shown in the accompanying drawings of this exemplary embodiment.

[0029] In this case, the first dielectric layer 111 and the second dielectric layer 112 can be in a sintered state, and adjacent first dielectric layers 111 and second dielectric layers 112 can be integrated with each other, so that the boundary between them is not obvious without the use of a scanning electron microscope (SEM).

[0030] The first dielectric layer 111 and the second dielectric layer 112 may comprise ceramic materials with high dielectric constants, such as barium titanate (BaTiO3)-based ceramic powder, strontium titanate (SrTiO3)-based ceramic powder, etc. However, the material of each of the first dielectric layer 111 and the second dielectric layer 112 is not limited to this, as long as sufficient capacitance can be obtained.

[0031] In addition, if necessary, besides the ceramic powder mentioned above, the first dielectric layer 111 and the second dielectric layer 112 may also include ceramic additives, organic solvents, plasticizers, binders, dispersants, etc.

[0032] As ceramic additives, transition metal oxides, transition metal carbides, rare earth elements, magnesium (Mg), aluminum (Al), etc., can be used.

[0033] Multiple internal electrodes may be disposed in the capacitor body 110, spaced apart from each other, and each of the first dielectric layer 111 and the second dielectric layer 112 is inserted between the multiple internal electrodes.

[0034] In this exemplary embodiment, the internal electrode may include a first internal electrode 121, a second internal electrode 122, and a third internal electrode 123.

[0035] In this case, the first inner electrode 121 may be disposed on the first dielectric layer 111, the second inner electrode 122 and the third inner electrode 123 may be disposed on the second dielectric layer 112 and spaced apart from each other, and the first dielectric layer 111 and the second dielectric layer 112 may be disposed alternately in the Z direction.

[0036] In this case, the first internal electrode 121 may be an electrode connected to a signal terminal, and the second internal electrode 122 and the third internal electrode 123 may be electrodes connected to a ground (GND) terminal.

[0037] Additionally, the capacitor body 110 may include: an effective region that contributes to the capacitance of the multilayer capacitor; and an upper cover region and a lower cover region, which are respectively formed as an upper edge portion on the upper surface of the effective region and a lower edge portion on the lower surface of the effective region in the Z direction.

[0038] The upper and lower cover regions can be formed using the same material as the first dielectric layer 111 and the second dielectric layer 112, and except that no internal electrode is disposed thereon, the upper and lower cover regions have the same structure as the first dielectric layer 111 and the second dielectric layer 112.

[0039] The upper and lower cover regions can be formed by stacking a single dielectric layer or two or more first dielectric layers 111 or second dielectric layers 112 along the Z direction on the upper and lower surfaces of the effective region, respectively, and can be used to substantially prevent damage to the internal electrode due to physical or chemical stress.

[0040] The multilayer capacitor 100 according to this exemplary embodiment may include a first external electrode 131, a second external electrode 132, a third external electrode 133, and a fourth external electrode 134 formed on the outer surface of the capacitor body 110 and selectively electrically connected to the inner electrode.

[0041] The first external electrode 131 and the second external electrode 132 can be respectively disposed on the third surface 3 and the fourth surface 4 of the capacitor body 110.

[0042] The two ends of the first inner electrode 121, which will be described later, can be electrically connected to the first outer electrode 131 and the second outer electrode 132, respectively.

[0043] In this configuration, the first external electrode 131 and the second external electrode 132 may extend to a portion of the first surface 1 and a portion of the second surface 2 of the capacitor body 110.

[0044] Additionally, if necessary, the first external electrode 131 and the second external electrode 132 may be further extended to a portion of the fifth surface 5 and a portion of the sixth surface 6 of the capacitor body 110.

[0045] The third external electrode 133 and the fourth external electrode 134 can be respectively disposed on the fifth surface 5 and the sixth surface 6 of the capacitor body 110.

[0046] The second inner electrode 122 can be electrically connected to the third outer electrode 133, and the third inner electrode 123 can be electrically connected to the fourth outer electrode 134.

[0047] In this case, the third external electrode 133 and the fourth external electrode 134 may extend to a portion of the first surface 1 and a portion of the second surface 2 of the capacitor body 110.

[0048] In addition, the third external electrode 133 and the fourth external electrode 134 may be configured to be spaced apart from the third surface 3 and the fourth surface 4 of the capacitor body 110 by a predetermined distance so as not to contact the first external electrode 131 and the second external electrode 132.

[0049] The first external electrode 131, the second external electrode 132, the third external electrode 133, and the fourth external electrode 134 can be formed using a conductive paste comprising a conductive metal.

[0050] The conductive metal can be nickel (Ni), copper (Cu), tin (Sn), or alloys thereof, but is not limited to these.

[0051] Furthermore, there are no particular limitations on the method for forming the first external electrode 131, the second external electrode 132, the third external electrode 133, and the fourth external electrode 134. For example, the first external electrode 131, the second external electrode 132, the third external electrode 133, and the fourth external electrode 134 can be formed by immersing the capacitor body 110 in conductive paste, or by other methods such as sputtering or plating.

[0052] In addition, plating layers can be formed on the surfaces of the first external electrode 131, the second external electrode 132, the third external electrode 133, and the fourth external electrode 134, respectively.

[0053] The plating may include a nickel plating formed on each of the first external electrode 131, the second external electrode 132, the third external electrode 133, and the fourth external electrode 134, and a tin plating formed on the nickel plating.

[0054] The first inner electrode 121 may be disposed on the first dielectric layer 111 and may have two ends exposed to the third surface 3 and the fourth surface 4 of the capacitor body 110, respectively, to be connected to the first outer electrode 131 and the second outer electrode 132.

[0055] Alternatively, a hole 121a may be formed inside the first inner electrode 121.

[0056] The hole 121a can be formed to extend along the X direction from approximately the middle position of the first inner electrode in the Y direction.

[0057] Such a hole 121a divides the first inner electrode 121 into two regions to provide the same effect as connecting two capacitors in parallel. In one example, the hole 121a may not extend completely through the first inner electrode 121 in the X direction. That is, one or both ends of the opposite ends of the first inner electrode 121 in the X direction may not be separated by the hole 121a. In this case, the two regions of the first inner electrode 121 separated by the hole 121a can still be connected at one or both ends of the opposite ends of the first inner electrode 121 in the X direction. In one example, the hole 121a may be an inner hole spaced apart from the outer edge of the first inner electrode 121.

[0058] In this case, the hole 121a may have a width sufficient to separate the first inner electrode 121 into two electrodes.

[0059] Furthermore, the shape of the hole 121a of the first internal electrode 121 is not limited to... Figure 2A The shape shown is available, and can be modified to various shapes.

[0060] The second inner electrode 122 may be disposed on the second dielectric layer 112 and may be exposed through the fifth surface 5 of the capacitor body 110 to be connected to the third outer electrode 133.

[0061] The second inner electrode 122 may be superimposed on a portion of the first inner electrode 121 in the Z direction.

[0062] In this case, the second internal electrode 122 may include a first body portion 122a and a third lead portion 122b.

[0063] The first main body 122a may be stacked with a portion of the first inner electrode 121 in the Z direction.

[0064] The third lead portion 122b may extend from the first body portion 122a toward the fifth surface 5 of the capacitor body 110, so as to be exposed through the fifth surface 5 of the capacitor body 110 and connected to the third external electrode 133.

[0065] The third inner electrode 123 may be disposed on the second dielectric layer 112 to be spaced apart from the second inner electrode 122 in the Y direction, and may be exposed through the sixth surface 6 of the capacitor body 110 to be connected to the fourth outer electrode 134.

[0066] The third inner electrode 123 may be stacked with a portion of the first inner electrode 121 in the Z direction.

[0067] In this case, the third internal electrode 123 may include a second body portion 123a and a fourth lead portion 123b.

[0068] The second main body 123a may be stacked with a portion of the first inner electrode 121 in the Z direction.

[0069] The fourth lead portion 123b may extend from the second body portion 123a toward the sixth surface 6 of the capacitor body 110, so as to be exposed through the sixth surface 6 of the capacitor body 110 and connected to the fourth external electrode 134.

[0070] In this case, the third inner electrode 123 can form a symmetrical structure with the second inner electrode 122 in the Y direction.

[0071] In addition, the position where the hole 121a is formed in the first dielectric layer 111 and the positions where the second inner electrode 122 and the third inner electrode 123 are spaced apart from each other in the Y direction on the second dielectric layer 112 can be superimposed on each other in the Z direction.

[0072] According to this structure, in this exemplary embodiment, the first inner electrode 121 can be divided into two regions along the Y direction by the hole 121a. The right side region of the first inner electrode 121 in the Y direction can be superimposed with the first main body portion 122a of the second inner electrode 122, and the left side region of the first inner electrode 121 in the Y direction can be superimposed with the second main body portion 123a of the third inner electrode 123.

[0073] When the third external electrode 133 is connected to the third lead portion 122b of the second internal electrode 122 in such a state and the fourth external electrode 134 is connected to the fourth lead portion 123b of the third internal electrode 123 in such a state, the multilayer capacitor according to this exemplary embodiment may have a structure in which a total of four capacitors are connected in parallel with each other. This is different from the multilayer capacitor according to the prior art, in which no hole is formed in the first internal electrode and the second internal electrode and the third internal electrode are formed as one electrode.

[0074] According to this structure, the parasitic equivalent series inductance (ESL) generated in multilayer capacitors can be significantly reduced by 50% compared to multilayer capacitors according to the prior art.

[0075] The first internal electrode 121, the second internal electrode 122, and the third internal electrode 123 can be formed using a conductive paste comprising a conductive metal.

[0076] The first internal electrode 121, the second internal electrode 122, and the third internal electrode 123 may be formed using conductive paste made of one or more of noble metal materials (such as platinum (Pt), palladium (Pd), palladium-silver (Pd-Ag) alloy, nickel (Ni), and copper (Cu) as conductive metals, but are not limited thereto.

[0077] In this case, the method for printing conductive paste can be screen printing, gravure printing, etc., but is not limited to these.

[0078] Figure 4 This is a plan view showing the first internal electrode according to another exemplary embodiment.

[0079] Reference Figure 4 The first inner electrode 121' may have at least one first cutout 121d formed in a portion of the third surface 3 of the capacitor body 110.

[0080] In this case, the first cutout 121d may be formed at the corner of the portion of the first inner electrode 121' exposed to the third surface 3 of the capacitor body 110.

[0081] In some cases, the first cutout 121d may be formed at each of the two corners of the first inner electrode 121' in the Y direction, or it may be formed at only one corner of the first inner electrode 121' in the Y direction.

[0082] Additionally, the first inner electrode 121' may have at least one second cutout 121e formed in a portion of the fourth surface 4 of the first inner electrode 121' exposed to the capacitor body 110.

[0083] In this case, the second cutout 121e may be formed at the corner of the portion of the first inner electrode 121' exposed to the fourth surface 4 of the capacitor body 110.

[0084] In some cases, the second cutout 121e may be formed at each of the two corners of the first inner electrode 121' in the Y direction, or it may be formed at only one corner of the first inner electrode 121' in the Y direction.

[0085] In a different manner, one end of the first inner electrode 121' in the X direction may be formed as a first lead portion 121f, the first lead portion 121f having one end extending toward the third surface 3 of the capacitor body 110 in the X direction and connected to the first outer electrode 131, and the other end of the first inner electrode 121' in the X direction may be formed as a second lead portion 121g, the second lead portion 121g extending toward the fourth surface 4 of the capacitor body 110 and connected to the second outer electrode 132.

[0086] Furthermore, the shapes of the first cutout 121d and the second cutout 121e of the first inner electrode 121' are not limited to... Figure 4 The example shown can be modified to various shapes.

[0087] In addition, the first inner electrode 121' may have a first groove 121b and a second groove 121c formed at both ends of the first inner electrode 121' in the Y direction.

[0088] In this case, the first groove 121b may be formed at a position where it overlaps with the third lead portion 122b of the second inner electrode 122 in the Z direction, and the second groove 121c may be formed at a position where it overlaps with the fourth lead portion 123b of the third inner electrode 123 in the Z direction.

[0089] In manufacturing a multilayer capacitor, the first groove portion 121b and the second groove portion 121c can be used to prevent the third lead portion 122b and the fourth lead portion 123b from contacting one side surface and the other side surface of the first inner electrode 121' through the third outer electrode 133 and the fourth outer electrode 134, respectively, so as to reduce the short circuit occurrence rate.

[0090] Furthermore, the shapes of the first groove portion 121b and the second groove portion 121c of the first inner electrode 121' are not limited to... Figure 4 The example shown can be modified to various shapes.

[0091] Additionally, refer to Figure 9 According to another exemplary embodiment of this disclosure, the first internal electrode 121'' and Figure 4 The difference in the first inner electrode 121' shown is that the first inner electrode 121'' does not include the hole 121a.

[0092] Therefore, the first inner electrode 121'' disposed on the first dielectric layer 111 may have a first lead portion 121f and a second lead portion 121g respectively formed at both ends of the first inner electrode 121'' and extending to connect to the first outer electrode 131 and the second outer electrode 132 respectively. It may have groove portions 121b and 121c respectively formed at both ends of the first inner electrode 121'' in a direction perpendicular to the fifth surface 5 and the sixth surface 6 of the capacitor body 110. It may also have at least one cut portion 121d and 121e, the at least one cut portion 121d and 121e being formed in a portion of the first inner electrode 121'' exposed to the third surface 3 of the capacitor body 110 and a portion of the first inner electrode 121'' exposed to the fourth surface 4 of the capacitor body 110 respectively.

[0093] Furthermore, the shapes of the first cutout 121d and the second cutout 121e of the first inner electrode 121'', as well as the shapes of the first groove 121b and the second groove 121c, are not limited to... Figure 9 The example shown can be modified to various shapes.

[0094] Figure 5 This is an equivalent circuit diagram of a double-cap type multilayer capacitor based on existing technology. Figure 6 It is based on the equivalent circuit diagram of a multilayer capacitor with a three-terminal structure according to existing technology, and Figure 7 This is an equivalent circuit diagram of a multilayer capacitor according to exemplary embodiments of the present disclosure.

[0095] Among multilayer capacitors, a multilayer capacitor with the following structure to reduce ESL has been disclosed: in this multilayer capacitor, signal terminals are disposed on two end surfaces of the capacitor body, and ground terminals are disposed on two side surfaces of the capacitor body.

[0096] In this configuration, the two ends of the first inner electrode are exposed to the third and fourth surfaces of the capacitor body to connect to the first and second outer electrodes, which serve as signal terminals, and the second inner electrode is exposed to the fifth and sixth surfaces of the capacitor body to connect to the third and fourth outer electrodes, which serve as ground terminals.

[0097] In such a multilayer capacitor with a three-terminal structure according to the prior art, the two capacitors are arranged in parallel. Therefore, in terms of the equivalent circuit, the ESL can be reduced by half compared to a double-cap type multilayer capacitor. Figure 5 and Figure 6 As shown. Here, Figure 5 , Figure 6 and Figure 7 In this context, Cap. can represent capacitance.

[0098] In this exemplary embodiment, the second inner electrode and the third inner electrode formed on the second dielectric layer can be formed separately from each other, and a hole can be formed inside the first inner electrode formed on the first dielectric layer, so that, in terms of the equivalent circuit, compared with the multilayer capacitor with a three-terminal structure according to the prior art, the capacitor can again be formed in a parallel structure, that is, in this exemplary embodiment, two pairs of dual capacitors can be formed, and each pair of dual capacitors is arranged in parallel, such as... Figure 7 As shown in the diagram. Therefore, compared to multilayer capacitors with a three-terminal structure according to the prior art, an effect of reducing ESL by half is expected.

[0099] Figure 8 It shows that it is installed with Figure 1 A three-dimensional view of the plates of a multilayer capacitor.

[0100] Reference Figure 8According to exemplary embodiments of the present disclosure, a board having a multilayer capacitor may include a substrate 210 and a multilayer capacitor 100. The substrate 210 has a first electrode pad 221, a second electrode pad 222, a third electrode pad 223, and a fourth electrode pad 224 disposed on one surface of the substrate 210 and spaced apart from each other. The multilayer capacitor 100 is mounted on one surface of the substrate 210 such that the first external electrode 131, the second external electrode 132, the third external electrode 133, and the fourth external electrode 134 of the multilayer capacitor 100 are respectively connected to the first electrode pad 221, the second electrode pad 222, the third electrode pad 223, and the fourth electrode pad 224 corresponding to the first external electrode 131, the second external electrode 132, the third external electrode 133, and the fourth external electrode 134.

[0101] exist Figure 8 In the figure, reference numeral 230 indicates solder used to bond the electrode pads and the outer electrode together.

[0102] As described above, low ESL characteristics can be achieved in multilayer capacitors according to exemplary embodiments of the present disclosure.

[0103] While exemplary embodiments have been shown and described above, it will be apparent to those skilled in the art that modifications and variations may be made without departing from the scope of the invention as defined by the appended claims.

Claims

1. A multilayer capacitor, comprising: A capacitor body includes a first dielectric layer and a second dielectric layer, which are stacked alternately, and a plurality of internal electrodes are inserted between the first dielectric layer and the second dielectric layer. The capacitor body includes a first surface and a second surface opposite to each other in the thickness direction, a third surface and a fourth surface connected to the first surface and the second surface and opposite to each other in the length direction, and a fifth surface and a sixth surface connected to the first surface and the second surface, connected to the third surface and the fourth surface and opposite to each other in the width direction. The dimension of the capacitor body in the length direction is larger than the dimension of the capacitor body in the width direction. The first external electrode and the second external electrode are respectively disposed on the third surface and the fourth surface of the capacitor body; as well as The third and fourth external electrodes are respectively disposed on the fifth and sixth surfaces of the capacitor body. The plurality of internal electrodes include: The first inner electrode is integrally disposed on the first dielectric layer, has two ends respectively connected to the first outer electrode and the second outer electrode, and has a hole; A second inner electrode is disposed on the second dielectric layer to overlap with a portion of the first inner electrode and connected to the third outer electrode; and A third inner electrode is disposed on the second dielectric layer to overlap with a portion of the first inner electrode, spaced apart from the second inner electrode in the width direction, and connected to the fourth outer electrode.

2. The multilayer capacitor according to claim 1, wherein, In the first inner electrode, the hole extends in the length direction.

3. The multilayer capacitor according to claim 1, wherein, The location of the hole in the first dielectric layer is at least partially superimposed on the locations of the second inner electrode and the third inner electrode on the second dielectric layer, which are spaced apart from each other, in the thickness direction.

4. The multilayer capacitor according to claim 1, wherein, The first inner electrode includes a first lead portion and a second lead portion, which are respectively disposed at both ends of the first inner electrode and extend to connect to the first outer electrode and the second outer electrode, respectively.

5. The multilayer capacitor according to claim 1, wherein, The first inner electrode has a first groove and a second groove, which are respectively disposed at both ends of the first inner electrode in the width direction.

6. The multilayer capacitor according to claim 1, wherein, The first inner electrode has at least one cutout, which is respectively disposed in a portion of the third surface of the first inner electrode exposed to the capacitor body and a portion of the fourth surface of the first inner electrode exposed to the capacitor body.

7. The multilayer capacitor according to claim 1, wherein, The first inner electrode has a cutout located at at least one corner of the first inner electrode.

8. The multilayer capacitor according to claim 1, wherein, The second internal electrode includes: A first main body portion, superimposed on a portion of the first inner electrode; and The third lead portion extends from the first main body portion toward the fifth surface of the capacitor body.

9. The multilayer capacitor according to claim 1, wherein, The third internal electrode includes: The second main body portion overlaps with a portion of the first inner electrode; and The fourth lead portion extends from the second main body portion toward the sixth surface of the capacitor body.

10. The multilayer capacitor according to any one of claims 1-9, wherein, The first external electrode and the second external electrode extend from the third surface and the fourth surface of the capacitor body to a portion of the first surface and a portion of the second surface of the capacitor body, respectively. The third and fourth external electrodes extend from the fifth and sixth surfaces of the capacitor body to a portion of the first and second surfaces of the capacitor body, respectively.

11. The multilayer capacitor according to any one of claims 1-9, wherein, The first external electrode, the second external electrode, the third external electrode, and the fourth external electrode each include a plating layer disposed on their surface.

12. The multilayer capacitor according to claim 1, wherein, The hole extends toward the third and fourth surfaces of the capacitor body, and the first inner electrode includes a first lead portion and a second lead portion respectively disposed at both ends of the first inner electrode, and the first lead portion and the second lead portion extend to be connected to the first outer electrode and the second outer electrode respectively.

13. The multilayer capacitor according to claim 12, wherein, The second internal electrode includes: A first main body portion, superimposed on a portion of the first inner electrode; and The third lead portion extends from the first main body portion toward the fifth surface of the capacitor body.

14. The multilayer capacitor according to claim 13, wherein, The third internal electrode includes: The second main body portion overlaps with a portion of the first inner electrode; and The fourth lead portion extends from the second main body portion toward the sixth surface of the capacitor body.

15. The multilayer capacitor according to claim 12, wherein, The first external electrode and the second external electrode extend from the third and fourth surfaces of the capacitor body to a portion of the first surface and a portion of the second surface of the capacitor body, and The third and fourth external electrodes extend from the fifth and sixth surfaces of the capacitor body to a portion of the first and second surfaces of the capacitor body.

16. The multilayer capacitor according to claim 1, wherein, The hole is spaced apart from the outer edge of the first inner electrode.

17. A multilayer capacitor, comprising: A capacitor body includes a first dielectric layer and a second dielectric layer, which are stacked alternately, and a plurality of internal electrodes are inserted between the first dielectric layer and the second dielectric layer. The capacitor body includes a first surface and a second surface opposite to each other in the thickness direction, a third surface and a fourth surface connected to the first surface and the second surface and opposite to each other in the length direction, and a fifth surface and a sixth surface connected to the first surface and the second surface, connected to the third surface and the fourth surface and opposite to each other in the width direction. The dimension of the capacitor body in the length direction is larger than the dimension of the capacitor body in the width direction. The first external electrode and the second external electrode are respectively disposed on the third surface and the fourth surface of the capacitor body; as well as The third and fourth external electrodes are respectively disposed on the fifth and sixth surfaces of the capacitor body. The plurality of internal electrodes include: A first inner electrode is integrally disposed on the first dielectric layer, including a first lead portion and a second lead portion respectively disposed at both ends of the first inner electrode and extending to connect to the first outer electrode and the second outer electrode respectively, and the first inner electrode has a first groove portion and a second groove portion, the first groove portion and the second groove portion being respectively disposed at both ends of the first inner electrode in the width direction, and the first inner electrode has at least one cutout portion respectively disposed in a portion of the third surface of the first inner electrode exposed to the capacitor body and a portion of the fourth surface of the first inner electrode exposed to the capacitor body; A second inner electrode is disposed on the second dielectric layer to overlap with a portion of the first inner electrode and connected to the third outer electrode; and A third inner electrode is disposed on the second dielectric layer to overlap with a portion of the first inner electrode, spaced apart from the second inner electrode in the width direction, and connected to the fourth outer electrode.

18. The multilayer capacitor according to claim 17, wherein, The first inner electrode has a cutout located at at least one corner of the first inner electrode.

19. The multilayer capacitor according to claim 17, wherein, The second internal electrode includes: A first main body portion, superimposed on a portion of the first inner electrode; and The third lead portion extends from the first main body portion toward the fifth surface of the capacitor body.

20. The multilayer capacitor according to claim 17, wherein, The third internal electrode includes: The second main body portion overlaps with a portion of the first inner electrode; and The fourth lead portion extends from the second main body portion toward the sixth surface of the capacitor body.

21. The multilayer capacitor according to claim 17, wherein, The first external electrode and the second external electrode extend from the third surface and the fourth surface of the capacitor body to a portion of the first surface and a portion of the second surface of the capacitor body, respectively. The third and fourth external electrodes extend from the fifth and sixth surfaces of the capacitor body to a portion of the first and second surfaces of the capacitor body, respectively.

22. The multilayer capacitor according to claim 17, wherein, The second internal electrode includes: A first main body portion, superimposed on a portion of the first inner electrode; and The third lead portion extends from the first main body portion toward the fifth surface of the capacitor body, and The third internal electrode includes: The second main body portion overlaps with a portion of the first inner electrode; and The fourth lead portion extends from the second main body portion toward the sixth surface of the capacitor body.

23. The multilayer capacitor according to any one of claims 17-22, wherein, The first inner electrode has a hole, and the hole is spaced apart from the outer edge of the first inner electrode.

24. A plate having a multilayer capacitor, comprising: The substrate has a first electrode pad, a second electrode pad, a third electrode pad and a fourth electrode pad disposed on the upper surface of the substrate. as well as The multilayer capacitor according to any one of claims 1-9 and 12-22 is mounted on the substrate such that the first external electrode, the second external electrode, the third external electrode and the fourth external electrode are respectively connected to the first electrode pad, the second electrode pad, the third electrode pad and the fourth electrode pad.

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