Method of manufacturing a packaged component

Abstract

A method for fabricating a packaged component includes providing a carrier having a component area and a perimeter area, a first conductive layer, and a release layer disposed on the carrier; forming a second conductive layer on the release layer in the component area, wherein at least one of the first conductive layer and the second conductive layer includes a first contact pad disposed in the perimeter area of the carrier, the second conductive layer has a second contact pad electrically connected to the first contact pad through the first conductive layer; and performing a test procedure to provide an input signal from one of the first contact pad and the second contact pad and to receive an output signal from the other of the first contact pad and the second contact pad.

Description

Technical Field

[0001] This invention relates to a method for manufacturing a packaged component, and more particularly to a method for performing testing during the manufacturing process of the packaged component. Background Technology

[0002] In packaging technology, redistribution layers can be fabricated on large-size substrates for packaging and dicing to simultaneously produce a large number of packaged components. However, current packaging technologies lack real-time monitoring methods to assess the process or component quality of the redistribution layer. Typically, inspection of the redistribution layer's circuitry for short circuits or open circuits can only be performed after the chip has been bonded to it. Consequently, if defects are found in the redistribution layer's circuitry, the chip already bonded to it cannot be reused, resulting in wasted manufacturing costs. Summary of the Invention

[0003] According to an embodiment of this disclosure, a method for fabricating a packaged element is provided. First, a carrier board, at least one first conductive layer, and a release layer are provided, wherein the carrier board has at least one component region and a peripheral region, and the first conductive layer and the release layer are disposed on the carrier board. Next, a second conductive layer is formed on the release layer, wherein at least one of the first conductive layer and the second conductive layer includes at least one first pad disposed in the peripheral region of the carrier board, and the second conductive layer has at least one second pad disposed in the component region of the carrier board, and is electrically connected to the first pad through the first conductive layer. Then, a detection step is performed, providing an input signal from one of the first pad and the second pad, and receiving an output signal from the other of the first pad and the second pad. Attached Figure Description

[0004] Figure 1 The diagram shown is a schematic representation of a method for fabricating a packaged element in some embodiments of this disclosure.

[0005] Figure 2 The diagram shown is a schematic representation of a method for fabricating a packaged element in some embodiments of this disclosure.

[0006] Figure 3 The diagram shown is a top view of a packaged element before the cutting process in some embodiments of this disclosure.

[0007] Figure 4 As shown Figure 3 An enlarged schematic diagram of the detection line and pad corresponding to a single component area.

[0008] Figure 5 The diagram shown is a schematic representation of a method for fabricating a packaged element in some embodiments of this disclosure.

[0009] Figure 6 The diagram shown is a schematic representation of a method for fabricating a packaged element in some embodiments of this disclosure.

[0010] Figure 7 The diagram shown is a schematic representation of a method for fabricating a packaged element in some embodiments of this disclosure.

[0011] Figure 8 The diagram shown is a schematic representation of a method for fabricating a packaged element in some embodiments of this disclosure.

[0012] Figure 9 The diagram shown is a schematic representation of a method for fabricating a packaged element in some embodiments of this disclosure.

[0013] Figure reference numerals: 12-Carrier board; 12a-Component area; 12b-Peripheral area; 14-First conductive layer; 14a, 34a-Detection lines; 14a1-First detection line; 14a2-Second detection line; 14a3-Third detection line; 14a4-Fourth detection line; 14c, 34c-Connecting pads; 16-Release layer; 16V, 32V-Through holes; 18a, 18b-Contact structures; 20-Rework layer; 221, 222, 223, 224-Second conductive layer Layers; 221a, 221b - Conductive pillars; 14b, 222a, 222b, 223a, 223b, 224a, 224b, 223b1, 223b2, 223b3, 223b4, 223a1, 223a2, 223a3, 223a4 - Pads; 241, 242, 243 - Dielectric layers; 24h - Openings; 26 - Input / output terminals; 28 - Package components; 30 - Circuitry; 32 - Insulating layer; 34 - Third conductive layer. Detailed Implementation

[0014] The present disclosure will be described in detail below with reference to specific embodiments and accompanying drawings. To make the disclosure clearer and easier to understand, the accompanying drawings are simplified schematic diagrams, and the components may not be drawn to scale. Furthermore, the number and size of the components in the drawings are for illustrative purposes only and are not intended to limit the scope of the disclosure.

[0015] Throughout this specification and the appended claims, certain terms are used to refer to specific elements. Those skilled in the art will understand that electronic device manufacturers may use different names to refer to the same elements, and this document is not intended to distinguish between elements that have the same function but different names. In the following specification and claims, words such as "containing" and "comprising" are open-ended terms and should therefore be interpreted as "containing but not limited to...".

[0016] Furthermore, the terms "coupled" and "electrically connected" herein include any direct and indirect means of connection. Therefore, if the text describes a first element coupled or electrically connected to a second element, it means that the first element can be directly connected to the second element, or can be indirectly connected to the second element through other elements or other means of connection.

[0017] In some embodiments disclosed herein, terms such as "connection" and "interconnection," unless specifically defined, may refer to two structures in direct contact, or to two structures not in direct contact, wherein another structure is disposed between the two structures. Furthermore, these terms regarding engagement and connection may also include cases where both structures are movable or both structures are fixed.

[0018] It should be understood that the elements or devices in the accompanying drawings may exist in various forms well known to those skilled in the art. Furthermore, relative terms such as "lower," "lower," "bottom," "upper," "higher," or "top" may be used in the embodiments to describe the relative relationship of one element to another in the drawings. It is understood that if the devices in the drawings are flipped upside down, the element described as being on the "lower" side will become the element on the "higher" side. The embodiments disclosed herein should be understood in conjunction with the accompanying drawings, which are also considered part of the disclosure. It should be understood that the accompanying drawings are not drawn to scale; in fact, the dimensions of the elements may be arbitrarily enlarged or reduced to clearly show the features of the disclosure. Furthermore, when a first material layer is mentioned as being located on or above a second material layer, this includes situations where the first material layer and the second material layer are in direct contact, or situations where one or more other material layers may be spaced between them, in which case the first material layer and the second material layer may not be in direct contact.

[0019] Furthermore, it should be understood that although the terms "first," "second," "third," etc., may be used herein to describe various elements, components, or parts, these elements, components, or parts should not be limited by these terms. These terms are only used to distinguish different elements, components, regions, layers, or parts. Therefore, a first element, component, region, layer, or part discussed below may be referred to as a second element, component, region, layer, or part without departing from this disclosure.

[0020] It should be noted that the technical solutions provided in the different embodiments below can be substituted for, combined or mixed with each other to constitute another embodiment without violating the spirit of this disclosure.

[0021] Figure 1The diagram illustrates a method for fabricating a packaged element according to some embodiments of this disclosure, with the structure of the packaged element 28 shown in cross-section. A method for fabricating the packaged element 28 according to one embodiment of this disclosure includes the following steps. The fabrication method disclosed herein may use, for example, fan-out panel level package (FOPLP) or fan-out wafer level package (FOWLP) technology. The following description uses fan-out panel level package technology as an example, but is not limited thereto. Furthermore, the fabrication method disclosed herein is not limited to the following steps; other steps may be performed before, after, or between any of the shown steps. Figure 1 As shown, the method for fabricating the packaged element 28 disclosed herein may include providing a carrier plate 12, at least one first conductive layer 14, and a release layer 16. In this embodiment, the carrier plate 12 may be provided first, and then at least one first conductive layer 14 and a release layer 16 may be formed on the carrier plate 12. The carrier plate 12 may be used to support the element formed thereon during the fabrication of the packaged element 28. The carrier plate 12 may be, for example, a rigid substrate or a flexible substrate disposed on a rigid carrier, and the carrier plate 12 may include, for example, glass, polyimide (PI), polyethylene terephthalate (PET), or other suitable materials. Figure 1 In some embodiments, the carrier board 12 may have at least one component region 12a and a peripheral region 12b, wherein the component region 12a may serve as a region for forming a packaged component 28, and the peripheral region 12b may serve as a region for setting up pads for detecting the packaged component or other components in the non-packaged component 28. The peripheral region 12b may be disposed on at least one side of the component region 12a, for example, such as... Figure 3 As shown, the peripheral area 12b may surround the component area 12a, but is not limited thereto.

[0022] exist Figure 1 In this embodiment, the first conductive layer 14 may be formed on the carrier plate 12 before the release layer 16 is formed, thus the first conductive layer 14 may be located between the release layer 16 and the carrier plate 12. The first conductive layer 14 may include at least one detection line 14a, wherein the detection line 14a may extend from the component region 12a to the peripheral region 12b, so as to detect the components formed in the component region 12a in subsequent processes. Figure 1In some embodiments, the number of detection lines may be multiple, but is not limited thereto. In some embodiments, the material of the first conductive layer 14 may include silver, copper, aluminum, molybdenum, tungsten, gold, chromium, nickel, platinum, titanium, iridium, rhodium, indium, bismuth, alloys of the above, combinations of the above, or other metallic materials with good conductivity, but is not limited thereto. In some embodiments, the first conductive layer 14 may be, for example, an integrated passive device layer or a seed layer. For example, the first conductive layer 14 may also include passive components, such as capacitors, inductors, resistors, other suitable components, or combinations of at least two of the above, but is not limited thereto. The detection lines 14a may be, for example, a grid, a line, or other suitable shape, but are not limited thereto.

[0023] like Figure 1 As shown, a release layer 16 is then provided on the first conductive layer 14 and the carrier plate 12, wherein the release layer 16 may extend, for example, from the element region 12a to the peripheral region 12b. For example, the release layer 16 may include a photo-release material or a thermal release material, but is not limited thereto. The material of the release layer 16 may include, but is not limited to, parylene, organic silicone resin, or silicone oil, etc. After providing the release layer 16, a plurality of through-holes 16v may be formed in the release layer 16, and contact structures may be formed in the through-holes 16v to form a plurality of contact structures penetrating the release layer 16. The contact structures may be electrically connected to corresponding detection lines 14a. For example, the contact structure may include contact structure 18a located in component area 12a and contact structure 18b located in peripheral area 12b. Contact structure 18a and its corresponding counterpart 18b can be connected to both ends of the same detection line 14a, allowing the circuitry in component area 12a to be electrically connected to contact structure 18b in peripheral area 12b via detection line 14a. Contact structure 18a and contact structure 18b may include conductive materials, such as silver, copper, aluminum, molybdenum, tungsten, gold, chromium, nickel, platinum, titanium, iridium, rhodium, indium, bismuth, alloys of the above, combinations thereof, or other metallic materials with good conductivity, but are not limited thereto, so that contact structure 18a and contact structure 18b can be used to establish electrical connections with subsequently formed components.

[0024] like Figure 1As shown, after forming the contact structure, a redistribution layer 20 can be formed on the release layer 16 and the contact structure. The redistribution layer 20 can be electrically connected to the first conductive layer 14 through contact structures 18a and 18b. The redistribution layer 20 may include multiple layers of second conductive layers (e.g., second conductive layers 221, 222, and 223) and multiple layers of dielectric layers (e.g., dielectric layers 241 and 242). The dielectric layer between two adjacent second conductive layers may have multiple openings 24h, allowing traces or pads formed by two adjacent second conductive layers to be electrically connected to each other through the openings 24h. In one embodiment, the second conductive layer may include silver, copper, aluminum, molybdenum, tungsten, gold, chromium, nickel, platinum, titanium, iridium, rhodium, indium, bismuth, alloys of the above, combinations of the above, or other metal materials with good conductivity, but is not limited thereto. It should be noted that an inspection step may be performed during the formation of the redistribution layer 20 to inspect the lines formed by at least one of the second conductive layers.

[0025] The fabrication method of the redistribution layer 20 with testing steps will be described in further detail below, but is not limited thereto. Please refer to [link to previous text]. Figure 1 After the contact structure is formed, a second conductive layer 221 can be formed on the release layer 16. Figure 1 In the illustrated embodiment, a second conductive layer 221 may be formed on the contact structure, and the second conductive layer 221 may include a plurality of conductive pillars (e.g., conductive pillars 221a and 221b), wherein the conductive pillars may be electrically connected to their respective contact structures. For example, conductive pillar 221a located in component region 12a may be electrically connected to contact structure 18a located in component region 12a, and conductive pillar 221b located in peripheral region 12b may be electrically connected to contact structure 18b located in peripheral region 12b. Subsequently, a dielectric layer 241 is formed on the release layer 16 surrounding the conductive pillars 221a and 221b. In one embodiment, the dielectric layer 241 may, for example, have its upper surface portion removed by grinding until the conductive pillars 221a and 221b are exposed, but this is not a limitation. In some embodiments, when the upper surface of the dielectric layer 241 is higher than the upper surface of the conductive pillar 221a, the conductive pillar 221a and the conductive pillar 221b can also be exposed by forming an opening in the dielectric layer 241.

[0026] like Figure 1As shown, a second conductive layer 222 is then formed on the dielectric layer 241. The second conductive layer 222 may, for example, include at least one pad 222a and at least one pad 222b, wherein the pad 222a may be disposed in the component region 12a and electrically connected to the corresponding conductive post 221a, and the pad 222b may be disposed in the peripheral region 12b and electrically connected to the corresponding conductive post 221b. Then, a dielectric layer 242 is formed on the second conductive layer 222 and the dielectric layer 241, and a plurality of openings 24h are formed in the dielectric layer 242 to expose the corresponding pads 222a and 222b, respectively. Figure 1 In some embodiments, the number of pads 222a and the number of pads 222b may be multiple, but are not limited thereto. In some embodiments, the second conductive layer 222 may also include at least one trace (not shown) as needed, disposed in the component area 12a, and used to laterally electrically connect the corresponding pad 222a or pad 222b to the pads formed in subsequent steps. In one embodiment, the second conductive layer 221 and the second conductive layer 222 may be formed separately or together (formed from the same conductive layer), but are not limited thereto. In one embodiment, the contact structure and the second conductive layer 221 may be formed separately or together (formed from the same conductive layer), but are not limited thereto. In one embodiment, the contact structure, the second conductive layer 221, and the second conductive layer 222 may be formed separately or together (formed from the same conductive layer), but are not limited thereto. It should be noted that during the formation of the redistribution layer 20, a detection step can be performed in real time. For example, the input / output terminals 26 can be used to detect the circuitry formed by at least one layer of the second conductive layer from the pads 222a and 222b.

[0027] Subsequently, a second conductive layer 223 is formed on the dielectric layer 242, thereby forming a redistribution layer 20 of the packaged element 28, wherein the second conductive layer 223 may include at least one pad 223a and at least one pad 223b. Figure 1 In some embodiments, the number of pads 223a and the number of pads 223b may be multiple, but are not limited thereto. Figure 1 As shown, after the second conductive layer 223 is formed, a detection step can be performed to check whether there are short circuits or open circuits in the circuit formed by the second conductive layers 221, 222, and 223. Figure 1In the detection steps shown, pad 223b can be used as the detection pad. An input signal is provided from one of pad 223b and the exposed pad 223a using input / output terminal 26, and an output signal is received from the other of pad 223b and pad 223a using the other input / output terminal 26. The continuity of the line connected between pad 223b and pad 223a can be determined by the received output signal. Input / output terminal 26 can input or receive signals via contact or non-contact methods. In the contact method, input / output terminal 26 may include a contact detector, such as a probe, and input / output terminal 26 may directly contact pad 223b and pad 223a respectively, but is not limited thereto. In the non-contact method, input / output terminal 26 can receive signals non-contactly, for example, by receiving the electric field signal generated from pad 223a at a certain distance from pad 223a. In this case, the input / output terminal 26 for receiving the output signal may include, for example, an electric field sensor, but is not limited thereto. In some embodiments, after the detection step of the second conductive layer 223, a cutting process may be selectively performed to separate the redistribution layer 20 located in the component region 12a and the peripheral region 12b, and a release process may be performed to separate the redistribution layer 20 from the release layer 16, so as to remove the redistribution layer 20 located in the peripheral region 12b and remove the release layer 16 and the carrier plate 12 and the first conductive layer 14 located thereunder, so that the redistribution layer 20 in the component region 12a can form a packaged element 28, but is not limited thereto.

[0028] In some embodiments, an additional detection step may be performed between the steps of forming the second conductive layer 221 and forming the dielectric layer 241, or between the steps of forming the dielectric layer 241 and forming the second conductive layer 222, to detect the formation quality of the second conductive layer 221. In some embodiments, an additional detection step may be performed between the steps of forming the second conductive layer 222 and forming the dielectric layer 242, or between the steps of forming the dielectric layer 242 and forming the second conductive layer 223, to detect the formation quality of the second conductive layer 222. When the detection step is performed between the steps of forming the dielectric layer 242 and forming the second conductive layer 223, the input / output terminal 26 can provide an input signal or receive an output signal from the corresponding pad 222a and / or pad 222b through the opening 24h of the dielectric layer 242.

[0029] Figure 2 The diagram illustrates a method for fabricating a packaged element in some embodiments of this disclosure. Figure 2 As shown, in Figure 1Following the detection step of the second conductive layer 223, at least one dielectric layer 243 may be selectively formed on the second conductive layer 223 and the dielectric layer 242, and an opening 24h may be formed in the dielectric layer 243 to expose corresponding pads 223a and 223b. Next, at least one second conductive layer 224 is formed on the dielectric layer 243 to form the redistribution layer 20, wherein the second conductive layer 224 may include at least one pad 224a located in the component region 12a and at least one pad 224b located in the peripheral region 12b. Figure 2 In some embodiments, the number of pads 224a and the number of pads 224b may be multiple, but are not limited thereto. In some embodiments, after the second conductive layer 224 is formed, at least one further detection step may be performed, providing an input signal from one of the pads 224b and the exposed pads 224a, and receiving an output signal from the other of the pads 224b and the pads 224a, to check whether the formation quality of the second conductive layer 224 and its alignment with the underlying second conductive layer 223 meet the standards, and to confirm whether there are any short circuits or open circuits in the lines between the formed pads 224a and pads 224b.

[0030] In some embodiments, such as Figure 2 As shown, after the inspection step of the second conductive layer 224, a cutting process can be performed to separate the redistribution layer 20 located in the component area 12a and the peripheral area 12b, and a release process can be performed to separate the redistribution layer 20 from the release layer 16, so as to remove the redistribution layer 20 located in the peripheral area 12b and remove the release layer 16, the carrier plate 12 located below it, and the first conductive layer 14, so that the redistribution layer 20 in the component area 12a can form a packaged element 28. In some embodiments, the order of the cutting process and the release process can be interchanged. In some embodiments, since a portion of the contact structure 18a remains on the lower surface of the conductive post 221a during the release process, the final packaged element 28 may have a downward protruding structure on the lower surface of the conductive post 221a, but is not limited thereto. In some embodiments, the method for fabricating a packaged element may further include placing electronic components, such as chips, on the redistribution layer 20 before the dicing and release processes, and forming an encapsulating colloid around the electronic components, so that the formed packaged element includes the electronic components, but is not limited thereto.

[0031] The detection steps disclosed herein will be further described below. Figure 3 The diagram shown is a top view of a packaged component before the cutting process, according to an embodiment of this disclosure. Figure 4 As shown Figure 3 An enlarged schematic diagram of the detection lines and pads corresponding to a single component area. For clarity, Figure 3 The components in component area 12a are omitted, and this is not a limitation. For example... Figure 3 As shown, the carrier board 12 may have multiple component areas 12a, and the detection line 14a may extend from different component areas 12a into the peripheral area 12b to electrically connect different pads in different component areas 12a to corresponding pads in the peripheral area 12b. The lines in different component areas 12a can be detected through the exposed pads. Figure 3 The pad 223b shown is based on Figure 1 The example shown uses pad 223b in the peripheral region 12b as an example of the uppermost second conductive layer, but is not limited thereto. In some embodiments, Figure 3 The pad 223b shown in the peripheral area 12b can also be a pad of any second conductive layer or a pad of the first conductive layer, but is not limited thereto.

[0032] exist Figure 3 In this embodiment, the pads 223b in the peripheral area 12b used for detecting lines in the same component area 12a can be divided into multiple detection groups, allowing different lines in the same component area 12a to be detected simultaneously or in batches through different pads 223b. Figure 3 In the embodiments described, pads 223b are exemplified by pads 223b1 (first detection group), pads 223b2 (second detection group), pads 223b3 (third detection group), and pads 223b4 (fourth detection group), but this is not a limitation. The number of pads 223b corresponding to at least one of the detection groups in the same component area 12a is not limited to [number missing]. Figure 3 The one shown can be adjusted to multiple as needed. In some embodiments, the number of detection groups distinguished by the pads 223b in at least two different element regions 12a may also be different from each other, but this is not a limitation.

[0033] like Figure 3 As shown, for the same component area 12a, based on the number of detection groups distinguished by the pads 223b, the detection lines 14a can be divided into detection lines corresponding to different detection groups. For example, they can be divided into a first detection line 14a1 electrically connected to the pads 223b1 of the first detection group, a second detection line 14a2 electrically connected to the pads 223b2 of the second detection group, a third detection line 14a3 electrically connected to the pads 223b3 of the third detection group, and a fourth detection line 14a4 electrically connected to the pads 223b4 of the fourth detection group. The number of the first detection line 14a1, the second detection line 14a2, the third detection line 14a3, and the fourth detection line 14a4 is also not fixed. Figure 3 The figures shown are for reference only, and adjustments can be made according to actual needs.

[0034] Figure 4 The connection relationship between the pads and the detection line 14a in the single component area 12a is further shown, but the position and structure of the pads and the detection line 14a in the component area 12a disclosed herein are not based on... Figure 4 The above is a limited representation and can be adjusted according to actual design requirements. Figure 4 The pads in the displayed component area 12a and the pads in the peripheral area 12b are respectively made of Figure 1 Taking the pads 223a and 223b formed by the uppermost second conductive layer 223 as an example, and the detection steps below will be combined with... Figure 4 Describing is permitted, but not limited to this. For example... Figure 1 and Figure 4 As shown, the second conductive layer 223, located in the component region 12a, has pads 223a that can be divided into multiple electrically insulated pad groups, and the pads 223b located in the peripheral region 12b for detection can be electrically connected to their respective pad groups through the first conductive layer 14. Figure 4 In the embodiment, the pads 223a located in the component area 12a can be divided into a first pad group, a second pad group, a third pad group, and a fourth pad group that are electrically insulated from each other. The pads 223a1 of the first pad group can be electrically connected to the pads 223b1 of the first detection group through the corresponding first detection line 14a1. The pads 223a2 of the second pad group can be electrically connected to the pads 223b2 of the second detection group through the corresponding second detection line 14a2. The pads 223a3 of the third pad group can be electrically connected to the pads 223b3 of the third detection group through the corresponding third detection line 14a3. The pads 223a4 of the fourth pad group can be electrically connected to the pads 223b4 of the fourth detection group through the corresponding fourth detection line 14a4.

[0035] Within the same pad group, the number of pads 223a electrically connected to the same pad 223b in the peripheral area 12b can be at least one; in other words, at least one detection line 14a can be electrically connected to at least one pad 223a in the component area 12a. For example, in Figure 4 In some embodiments, the number of pads 223a1 electrically connected to the same pad 223b1 may be, for example, two, but is not limited thereto. In some embodiments, adjacent pads 223a in the component region 12a (e.g., pads 223a1 and 223a2, or pads 223a3 and 223a4) may be electrically connected to different detection lines 14a (e.g., first detection line 14a1 and second detection line 14a2) respectively, so as to detect the insulation between adjacent pads 223b in the component region 12a through different pads 223b (e.g., pads 223b1 and 223b2). Additionally, in Figure 4 In the embodiments, the number of pads 223b1 in the first detection group, pads 223b2 in the second detection group, pads 223b3 in the third detection group, and pads 223b4 in the fourth detection group can be multiple, but are not limited thereto. In this case, the pads 223b in the same detection group can be electrically connected or electrically insulated from each other.

[0036] like Figure 4 As shown, the pads 223a in component area 12a can be electrically connected to the corresponding detection lines 14a via corresponding lines 30. Line 30 can be defined as a line electrically connecting a pad in component area 12a to the corresponding detection line 14a, and may include, for example, traces and other pads in a second conductive layer formed before the detection step and electrically connected between the corresponding pad 223a and the detection line 14a. Line 30 may include, for example, traces in a second conductive layer and other pads. Figure 1 The diagram shows one pad 222a of the second conductive layer 222 and its corresponding trace, one conductive post 221a of the second conductive layer 221, and the corresponding contact structure 18a, but is not limited thereto. Figure 4 In some embodiments, two different lines 30 corresponding to different pad groups may be electrically insulated from each other, but this is not a limitation. In some embodiments, depending on testing requirements or circuit design requirements, at least two lines 30 may also be electrically connected to each other.

[0037] like Figure 4 As shown, in one embodiment of the detection step, two input / output terminals 26 can be used to provide an input signal from one of the pads 223b1 in the first detection group and a corresponding pad 223a1 in the component area 12a, and to receive an output signal from the other, to determine whether the line connecting the pads 223b1 and 223a1 in the first detection group is conductive. In some embodiments, when an input signal is provided from one of the pads 223a and 223b, the detection step may also include receiving an output signal and another output signal from at least two pads 223a or their corresponding pads 223b. Specifically, while receiving the output signal, the detection step may also selectively include using another input / output terminal 26 to receive the other output signal from a pad 223a (e.g., pad 223a2) adjacent to the pad 223a1 and / or its line 30 or from a pad 223b (e.g., pad 223b2) electrically connected to it. For example, when pad 223a2 or its corresponding line 30 is adjacent to pad 223a1 or its corresponding line 30, the other output signal can be received through pad 223a2 or pad 223b2. Since pad 223a2 or pad 223b2 does not provide an input signal at this time, this other output signal can be used to determine whether a short circuit has occurred between pad 223a1 and pad 223a2. In some embodiments, while receiving the output signal, the detection step may also include, for example, receiving other output signals from pad 223a3 or pad 223b3 and / or pad 223a4 or pad 223b4 using other input / output terminals 26. In some embodiments, since the first conductive layer used to form the detection line 14a (e.g., Figure 1The first conductive layer 14 shown may include passive elements, so in the detection step, the received output signal can be used to determine whether it is normal based on the circuit formed by the line 30 and the passive elements.

[0038] After testing the line 30 between pad 223b1 of the first test group and pad 223a1 of the first test group, the line 30 between pad 223b2 of the second test group and pad 223a2 of the second test group, the line 30 between pad 223b3 of the third test group and pad 223a3 of the third test group, and the line 30 between pad 223b4 of the fourth test group and pad 223a4 of the fourth test group can be tested in a similar manner using the input / output terminals 26. The testing sequence for the lines 30 between pads 223b1 and 223a1 of the first detection group, the lines 30 between pads 223b2 and 223a2 of the second detection group, the lines 30 between pads 223b3 and 223a3 of the third detection group, and the lines 30 between pads 223b4 and 223a4 of the fourth detection group is not limited to a specific order and can be adjusted according to the actual configuration or requirements. In some embodiments, the testing steps may also include simultaneously testing the lines 30 of different detection groups. In some embodiments, the configurations of the lines 30 of different detection groups may be the same or different, but are not limited thereto.

[0039] In some embodiments, when there are multiple pads 223b in the same detection group, the line 30 between at least two pads 223b in the same detection group and the corresponding pads 223a in the component area 12a can be detected simultaneously. For example, multiple input / output terminals 26 can be used to provide input signals from at least two pads 223b1 in the first detection group and receive output signals from two of the corresponding pads 223a1 in the component area 12a, but this is not a limitation. In some embodiments, the input signal may include, for example, a low-frequency signal, a high-frequency signal, or a combination thereof, but this is not a limitation. When detecting at least two mutually insulated lines 30, the input signals transmitted to the at least two lines 30 may be, for example, a low-frequency signal and a high-frequency signal, respectively. In some embodiments, Figure 4 The pads 223a in the component area 12a and 223b in the peripheral area 12b can also be used. Figure 2 The pad formed by any of the conductive layers shown.

[0040] It is worth mentioning that the above-described method for manufacturing packaged components allows for real-time detection of the second conductive layer formed at different stages. This enables defects in the packaged components to be detected during the manufacturing process, rather than waiting until after chip bonding. Alternatively, repairs can be performed before the packaged components are completed, thereby reducing manufacturing costs.

[0041] The method of fabricating the packaged components is not limited to the above embodiments and different embodiments are possible. For the sake of simplicity, the same reference numerals will be used to label the same components in the different embodiments below as in some embodiments. To clearly illustrate the different embodiments, the differences between the different embodiments will be described below, and repeated parts will not be repeated.

[0042] Figure 5 The diagram shows a method for fabricating a packaged element in some embodiments of this disclosure. In the fabrication method of this embodiment, the first conductive layer 14 may include at least one pad 14b in addition to the detection line 14a, disposed in the peripheral region 12b, and the pad 14b can be electrically connected to the detection line 14a. Furthermore, the release layer 16 and the redistribution layer 20 are not formed on the pad 14b, allowing the pad 14b to be exposed. Therefore, during the detection step, the input / output terminal 26 can be used to provide an input signal or receive an output signal from the pad 14b. Other parts of the fabrication method of this embodiment may be the same as or similar to the above embodiments, and therefore can be referred to the description of the above embodiments without repetition. In some embodiments, the redistribution layer 20 may not be formed in the peripheral region 12b, so that the second conductive layers 221, 222, 223, and 224 do not have pads in the peripheral region 12b. In some embodiments, Figure 3 and Figure 4 The pads for the first, second, third, and fourth detection groups shown may also include... Figure 5 The first conductive layer 14 forms the pad 14b.

[0043] Figure 6The diagram illustrates a method for fabricating a packaged element in some embodiments of this disclosure. In this embodiment, when the second conductive layer (e.g., second conductive layer 224) includes a pad (e.g., pad 224b) in the peripheral region 12b, the first conductive layer 14 may also include at least one pad 14b disposed in the peripheral region 12b, and the pad 14b can be electrically connected to the detection line 14a. In this embodiment, the release layer 16 and the redistribution layer 20 are not formed on the pad 14b, allowing the pad 14b to be exposed. Therefore, during the detection step, the input / output terminal 26 can be used to provide an input signal or receive an output signal from the pad 14b. Other parts of the fabrication method in this embodiment may be the same as or similar to the above embodiments; therefore, reference can be made to the description of the above embodiments, and will not be repeated. In some embodiments, Figure 3 and Figure 4 The pads for the first, second, third, and fourth detection groups shown may also include... Figure 6 The first conductive layer 14 forms the pad 14b.

[0044] Figure 7 The diagram shown illustrates a method for fabricating packaged components in some embodiments of this disclosure. Figure 7 As shown, in the manufacturing method of this embodiment, at least two first conductive layers 14 and at least one insulating layer 32 can be provided before forming the release layer 16, and the insulating layer 32 is disposed between the at least two first conductive layers 14. Taking the formation of two first conductive layers 14 as an example, after providing the carrier plate 12, one first conductive layer 14 is first formed on the carrier plate 12, and then an insulating layer 32 is formed on the first conductive layer 14 and the carrier plate 12, and a through hole 32v is formed in the insulating layer 32. Next, another first conductive layer 14 is formed on the insulating layer 32. In this embodiment, the first conductive layer 14 may include a detection line 14a for electrically connecting the pads of the second conductive layer in the component region 12a to the pads of the second conductive layer in the peripheral region 12b. Taking the second conductive layer 224 as an example, the detection line 14a can electrically connect the pads 224a and 224b of the second conductive layer 224. Figure 7In this embodiment, the first conductive layer 14 formed on the insulating layer 32 may further include a connecting pad 14c extending into the through-hole 32v of the insulating layer 32, thereby electrically connecting the detection line 14a of the first conductive layer 14 located between the insulating layer 32 and the carrier plate 12 to the redistribution layer 20. It should be noted that the detection lines 14a of different first conductive layers 14 can be electrically insulated from each other, so that different pads (e.g., pad 224a) of the second conductive layer located in the component region 12a can be electrically connected to different pads (e.g., pad 224b) located in the peripheral region 12b through the detection lines 14a of different first conductive layers 14. By designing multiple layers of first conductive layers 14, the number of ways in which pads in the component region 12a are electrically connected to pads in the peripheral region 12b can be increased, thereby increasing the number of pad groups and the number of pads used for detection in the peripheral region 12b. In other words, compared to... Figure 2 In some embodiments, the design of this embodiment can divide the pads in component area 12a into more groups, thereby increasing the number of detection circuits, or it can simultaneously detect more groups of pads to improve detection efficiency. In some embodiments, Figure 7 At least one of the first conductive layers 14 shown can also be applied. Figure 5 or Figure 6 The first conductive layer 14 shown is configured such that it may have exposed pads 14b. In this case, Figure 3 and Figure 4 The pads for the first, second, third, and fourth detection groups shown may include... Figure 7 The pad is formed by one of the first conductive layers 14 or by two first conductive layers 14. In some embodiments, Figure 3 and Figure 4 The detection lines shown may include Figure 7 The detection line 14a is one of the first conductive layers 14 or the detection line 14a is two of the first conductive layers 14. Other parts of the manufacturing method of this embodiment may be the same as or similar to the above embodiment, so the description of the above embodiment can be referred to, and will not be repeated.

[0045] Figure 8 The diagram shown illustrates a method for fabricating packaged components in some embodiments of this disclosure. Figure 8 As shown, in the fabrication method of this embodiment, the first conductive layer 14 can be formed on the release layer 16 after the release layer 16 is formed, such that the release layer 16 is located between the first conductive layer 14 and the carrier plate 12. For example, the first conductive layer 14 can be a seed layer used to assist in the formation of the second conductive layer 221. Figure 8In some embodiments, the second conductive layer (e.g., the second conductive layer 224) may also include pads (e.g., pads 224a) in the peripheral region 12b, and the first conductive layer 14 may also include at least one pad 14b disposed in the peripheral region 12b, and the pad 14b may be electrically connected to the detection line 14a. In this embodiment, the release layer 16 and the redistribution layer 20 are not formed on the pads 14b, so that the pads 14b can be exposed, and therefore, during the detection step, the input / output terminal 26 can be used to provide an input signal or receive an output signal from the pads 14b. In some embodiments, the redistribution layer 20 may also not be formed in the peripheral region 12b, so that the second conductive layer does not have pads in the peripheral region 12b. In some embodiments, Figure 8 The first conductive layer 14 may also not have exposed pads 14b. In some embodiments, Figure 3 and Figure 4 The pads for the first, second, third, and fourth detection groups shown may also include... Figure 8 The pad 14b formed by the first conductive layer 14. In some embodiments, Figure 3 and Figure 4 The detection lines shown may include Figure 8 The detection line 14a of the first conductive layer 14. In some embodiments, the input / output terminal 26 for receiving the output signal may include a contact detector, such as a probe. In some embodiments, the input / output terminal 26 for receiving the output signal may include a non-contact detector, such as an electric field sensor. Other parts of the fabrication method of this embodiment may be the same as or similar to the above embodiments, and therefore can be referred to the description of the above embodiments without repeating them.

[0046] Figure 9 The diagram illustrates a method for fabricating a packaged element in some embodiments of this disclosure. Figure 9 As shown, the fabrication method of this embodiment further includes forming a third conductive layer 34 on the release layer 16 and forming the third conductive layer 34 between the release layer 16 and the second conductive layer 221. The third conductive layer 34 may include silver, copper, aluminum, molybdenum, tungsten, gold, chromium, nickel, platinum, titanium, iridium, rhodium, indium, bismuth, alloys of the above, combinations of the above, or other metallic materials with good conductivity, but is not limited thereto. For example, the third conductive layer 34 may be a seed layer used to form the second conductive layer 221. Figure 9 In some embodiments, the third conductive layer 34 may also include a detection line 34a for electrically connecting the pads of the second conductive layer in the element region 12a to the pads of the second conductive layer in the peripheral region 12b. Taking the second conductive layer 224 as an example, the detection line 34a can electrically connect the pads 224a and 224b of the second conductive layer 224.

[0047] like Figure 9 As shown, in some embodiments, the third conductive layer 34 may further include a connecting pad 34c for electrically connecting the detection line 14a of the first conductive layer 14 to the redistribution layer 20 via contact structures 18a and 18b. It should be noted that the detection lines 14a of the first conductive layer 14 and 34a of the third conductive layer 34 are electrically insulated from each other, allowing different pads (e.g., pad 224a) in the component region 12a of the second conductive layer to be electrically connected to different pads (e.g., pad 224b) in the peripheral region 12b via the detection lines 14a of the first conductive layer 14 and 34a of the third conductive layer 34, respectively. Through the first conductive layer 14 and the third conductive layer 34, the number of ways in which pads in the component region 12a are electrically connected to pads in the peripheral region 12b can be increased, thereby increasing the number of pad groups and the number of pads used for detection in the peripheral region 12b. In other words, compared to... Figure 2 In some embodiments, the design of this embodiment can divide the pads in the component area 12a into more groups, thereby increasing the number of detection circuits, or can detect more groups of pads simultaneously to improve detection efficiency. In some embodiments, multiple layers of first conductive layer 14 and at least one insulating layer 32 may be formed before forming the release layer 16.

[0048] In some embodiments, Figure 9 The first conductive layer 14 and / or the third conductive layer 34 shown can also be applied. Figure 5 or Figure 6 The first conductive layer 14 shown is configured such that the first conductive layer 14 and / or the third conductive layer 34 can have exposed pads. In this case, Figure 3 and Figure 4 The pads for the first, second, third, and fourth detection groups shown may include... Figure 9 The pads of the first conductive layer 14, the pads of the third conductive layer 34, or a combination thereof. In some embodiments, Figure 3 and Figure 4 The detection lines shown may include Figure 9 The detection line 14a of the first conductive layer 14, the detection line 34a of the third conductive layer 34, or a combination thereof. Other parts of the manufacturing method of this embodiment may be the same as or similar to the above embodiments, and therefore can be referred to the description of the above embodiments without repeating them.

[0049] In summary, the above-described method for fabricating packaged components allows for real-time inspection of the second conductive layer formed at different stages. This enables the detection of defects during the fabrication process, rather than waiting until after chip bonding, or even before the packaged component is fully assembled, thereby reducing manufacturing costs. Furthermore, forming additional first and / or third conductive layers between the redistribution layer and the substrate helps to divide the pads in the component area into more groups, increasing the number of inspection paths or allowing for simultaneous inspection of multiple pad groups, thus improving inspection efficiency.

[0050] The above description is merely an embodiment of this disclosure and is not intended to limit the scope of this disclosure. Various modifications and variations can be made to this disclosure by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.

Claims

1. A method for manufacturing a packaged component, characterized in that, Includes the following steps: A carrier plate, at least one first conductive layer and a release layer are provided, wherein the carrier plate has at least one component area and a peripheral area, the at least one first conductive layer and the release layer are disposed on the carrier plate, and the at least one first conductive layer is located between the release layer and the carrier plate; A second conductive layer is formed on the release layer, wherein at least one of the at least one first conductive layer and the second conductive layer includes at least one first pad, the at least one first pad is disposed in the peripheral area of ​​the carrier plate, the second conductive layer has at least one second pad, the at least one second pad is disposed in the at least one element area of ​​the carrier plate, and the at least one second pad is electrically connected to the at least one first pad through the at least one first conductive layer; A detection step is performed, providing an input signal from one of the at least one first pad and the at least one second pad, and receiving an output signal from the other of the at least one first pad and the at least one second pad; and After the detection step, the release layer, the carrier plate, and the first conductive layer are removed, wherein the release layer and the at least one first conductive layer are removed in the same release process.

2. The method for manufacturing a packaged element as described in claim 1, characterized in that, Providing the at least one first conductive layer further includes providing at least two first conductive layers and an insulating layer, wherein the insulating layer is disposed between the at least two first conductive layers.

3. The method for manufacturing a packaged element as described in claim 1, characterized in that, It also includes forming a third conductive layer between the release layer and the second conductive layer.

4. The method for manufacturing a packaged element as described in claim 1, characterized in that, It also includes forming at least one contact structure through the release layer after providing the release layer, and the at least one second pad is electrically connected to the at least one first conductive layer through the at least one contact structure.

5. The method for manufacturing a packaged element as described in claim 1, characterized in that, The at least one second pad includes a plurality of second pads, which are divided into a plurality of pad groups that are electrically insulated from each other. The at least one first pad includes a plurality of first pads, which are electrically connected to the plurality of pad groups through the at least one first conductive layer.

6. The method for manufacturing a packaged element as described in claim 5, characterized in that, The at least one first conductive layer includes a plurality of detection lines, and one of the plurality of first pads is electrically connected to one of the plurality of pad groups through one of the plurality of detection lines.

7. The method for manufacturing a packaged element as described in claim 5, characterized in that, The detection step includes providing the input signal from one of the plurality of first pads and receiving the output signal and another output signal from at least two of the plurality of second pads, respectively.

8. The method for manufacturing a packaged element as described in claim 1, characterized in that, The output signal is received in a contact or non-contact manner.

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