Apparatus and method of manufacturing a display device

Abstract

The present application relates to an apparatus and a method for manufacturing a display device. The apparatus for manufacturing a display device includes a stage, a first electric field application module including first probe pins and disposed on a first side of the stage, a light irradiation module including a light emitting element and disposed above the stage, and a first voltage output module outputting an emission driving signal for driving the light emitting element, outputting a first alignment signal to one of the first probe pins, and outputting a second alignment signal to another one of the first probe pins.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority and benefit to Korean Patent Application No. 10-2020-0158953, filed on November 24, 2020, with the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to display devices and methods of manufacturing them. Background Technology

[0004] With the development of multimedia technology, display devices have become increasingly important. Therefore, various display devices are now in use, such as organic light-emitting diode (OLED) displays and liquid crystal display (LCD) devices.

[0005] Display devices may include display panels for displaying one or more images, such as light-emitting display panels or LCD panels. Light-emitting display panels can display one or more images by emitting light using light-emitting elements. As an example, light-emitting diodes (LEDs) (such as OLEDs) that use organic materials as fluorescent materials and inorganic LEDs that use inorganic materials as fluorescent materials can be used as light-emitting elements.

[0006] It should be understood that this background section is intended to provide part of the useful background for understanding the art. However, this background section may also include ideas, concepts, or knowledge that were not known or understood by a person skilled in the art prior to the relevant valid application date of the subject matter disclosed herein. Summary of the Invention

[0007] The implementation may provide an apparatus for manufacturing a display device that can improve the alignment accuracy of the light-emitting elements.

[0008] The implementation also provides a method for manufacturing a display device that can improve the alignment accuracy of the light-emitting elements.

[0009] Additional features of the implementation will be set forth in the following description and will be apparent in part from the description or may be learned by practicing one or more of the implementations herein.

[0010] According to an embodiment, an apparatus for manufacturing a display device may include: a stage; a first electric field application module including first probe pins and disposed on a first side of the stage; a light illumination module including a light-emitting element and disposed above the stage; and a first voltage output module that outputs an emission drive signal to drive the light-emitting element, outputs a first alignment signal to one of the first probe pins, and outputs a second alignment signal to the other of the first probe pins.

[0011] The first alignment signal of the first voltage output module can be a ground voltage or a DC voltage, and the second alignment signal of the first voltage output module can be an AC voltage.

[0012] The second alignment signal of the first voltage output module can be increased from the first low-level voltage to the first high-level voltage, and can be decreased from the first high-level voltage to the first low-level voltage.

[0013] The transmit drive signal of the first voltage output module may have a second high-level voltage during the period when the second alignment signal of the first voltage output module switches from the first level voltage to the second level voltage, and may have a second low-level voltage lower than the second high-level voltage during other periods.

[0014] The first voltage level and the second voltage level can be lower than the first high voltage level of the second alignment signal and higher than the first low voltage level of the second alignment signal.

[0015] The second alignment signal of the first voltage output module can have a sawtooth waveform, such that the period of the second alignment signal increasing from the first low level voltage to the first high level voltage is shorter than the period of the second alignment signal of the first voltage output module decreasing from the first high level voltage to the first low level voltage.

[0016] The second alignment signal of the first voltage output module can have a ramp waveform, such that the period of the second alignment signal of the first voltage output module increasing from the first low level voltage to the first high level voltage is longer than the period of the second alignment signal decreasing from the first high level voltage to the first low level voltage.

[0017] The device may further include: a second electric field application module, including second probe pins and disposed on a second side of the stage; and a second voltage output module, which outputs a first alignment signal to one of the second probe pins and outputs a second alignment signal to the other of the second probe pins.

[0018] The first voltage output module can be mounted on the first side of the platform. The second voltage output module can be mounted on the second side of the platform. The first side of the platform can be opposite to the second side of the platform.

[0019] The device may also include: an optical device disposed above the light irradiation module and overlapping the through-hole of the light irradiation module.

[0020] The device may also include sensor devices, including: a light detection sensor for detecting light from the light irradiation module; and a temperature sensor for detecting the temperature of the stage.

[0021] The platform may include a sensor slot into which sensor devices can be inserted.

[0022] The platform may include wire holes that penetrate the platform.

[0023] The device may also include: a sensor connection cable, electrically connected to the sensor device and disposed in a wire hole.

[0024] The device may also include: a first module mover for raising or lowering a first electric field applying module; and a stage mover for raising or lowering a stage.

[0025] According to an embodiment, a method for manufacturing a display device may include: placing a substrate on a support pin protruding from the top surface of a stage; lowering a first electric field application module such that alignment pads of the substrate contact first probe pins of the first electric field application module, the first electric field application module being disposed on a first side of the stage; placing the substrate on the stage by raising the stage; applying a first alignment signal to a first alignment pad in the alignment pads via the first probe pins of the first electric field application module; applying a second alignment signal to a second alignment pad in the alignment pads via the first probe pins of the first electric field application module; and applying light to the substrate by applying a emission drive signal to a light illumination module disposed above the stage.

[0026] The first alignment signal applied to the first alignment pad can be a ground voltage or a DC voltage, and the second alignment signal applied to the second alignment pad can be an AC voltage.

[0027] The second alignment signal applied to the second alignment pad can be increased from the first low level voltage to the first high level voltage and can be decreased from the first high level voltage to the first low level voltage.

[0028] The emission drive signal applied to the light irradiation module may have a second high-level voltage during the period when the second alignment signal applied to the second alignment pad switches from the first level voltage to the second level voltage, and may have a second low-level voltage lower than the second high-level voltage during other periods.

[0029] The first voltage level and the second voltage level can be lower than the first high voltage level and higher than the first low voltage level.

[0030] The second alignment signal applied to the second alignment pad may have a sawtooth waveform, such that the period of the second alignment signal applied to the second alignment pad increasing from the first low level voltage to the first high level voltage is shorter than the period of the second alignment signal applied to the second alignment pad decreasing from the first high level voltage to the first low level voltage.

[0031] The second alignment signal applied to the second alignment pad may have a ramp waveform, such that the period of the second alignment signal applied to the second alignment pad increasing from the first low level voltage to the first high level voltage is longer than the period of the second alignment signal applied to the second alignment pad decreasing from the first high level voltage to the first low level voltage.

[0032] The method may also include: applying light to the stage to preheat the stage before setting the substrate onto the support pin.

[0033] The platform can be preheated to a temperature ranging from about 50°C to about 70°C.

[0034] The method may also include: raising the first electric field application module; lowering the stage; and removing the substrate.

[0035] According to the embodiment, ultraviolet (UV) light or blue light is applied to the display panel unit of the mother substrate through a light irradiation module, and a first alignment signal and a second alignment signal are applied to the first alignment line and the second alignment line of each of the display panel units through a first electric field application module and a second electric field application module. When the active layer of the light-emitting element of each of the display panel units is excited by UV light or blue light from the light irradiation module, a permanent dipole moment can be generated in the direction from the second semiconductor layer of the light-emitting element doped with p-type dopant to the first semiconductor layer of the light-emitting element doped with n-type dopant. Therefore, when a dielectric force is applied to the light-emitting element by an electric field, the second semiconductor layer of the light-emitting element can be placed near the first alignment line. For example, the light-emitting element can be deflected, and the alignment accuracy of the light-emitting element can be improved.

[0036] Other features and embodiments may be apparent from the following detailed description, drawings and claims. Attached Figure Description

[0037] The accompanying drawings illustrate embodiments and are included to provide a further understanding of this disclosure. In the drawings:

[0038] Figure 1 This is a schematic perspective view of a display device according to an embodiment;

[0039] Figure 2 yes Figure 1 A schematic layout diagram of the display panel;

[0040] Figure 3 yes Figure 2 A schematic layout diagram of the pixels;

[0041] Figure 4 yes Figure 3 A schematic three-dimensional diagram of the light-emitting element;

[0042] Figure 5It is along Figure 3 A schematic cross-sectional view taken by line I-I';

[0043] Figure 6 This is a side view of an apparatus for manufacturing a display device according to an embodiment;

[0044] Figure 7 yes Figure 6 A schematic floor plan of the platform;

[0045] Figure 8 yes Figure 6 A bottom view of the first electric field applying module;

[0046] Figure 9 yes Figure 6 A bottom view of the light illumination module;

[0047] Figure 10 yes Figure 6 A schematic layout diagram of the mother substrate;

[0048] Figure 11 It is shown Figure 10 A schematic layout diagram of the first display panel unit, the first alignment pad, and the second alignment pad;

[0049] Figure 12 It is along Figure 7 A schematic cross-sectional view taken from line II-II';

[0050] Figure 13 yes Figure 12 An exploded perspective view of the sensor device;

[0051] Figure 14 yes Figure 6 A block diagram of the device;

[0052] Figure 15 It is shown Figure 14 Waveform diagrams of the second alignment signal and the first transmit drive signal;

[0053] Figure 16 This is a flowchart illustrating a method for manufacturing a display device according to an embodiment;

[0054] Figures 17 to 24 It is used for explanation Figure 16 A schematic cross-sectional view of the display panel of the method;

[0055] Figure 25 This is a flowchart illustrating a method for aligning a light-emitting element according to an embodiment; and

[0056] Figures 26 to 29 It is used for explanation Figure 25 method Figure 6 A side view of the device. Detailed Implementation

[0057] Embodiments will now be described more fully below with reference to the accompanying drawings. However, embodiments may be provided in different forms and should not be construed as limiting. Throughout this disclosure, the same reference numerals denote the same components. In the drawings, the thickness of layers and regions may be exaggerated for clarity.

[0058] In order to describe embodiments of this disclosure, some parts that are not related to the description may be omitted.

[0059] It should also be understood that when a layer is referred to as being "on" another layer or substrate, it can be directly on the other layer or substrate, or an intermediary layer may be present. Conversely, when an element is referred to as being "on" another element directly, an intermediary element may not be present.

[0060] Furthermore, the phrase "in a plan view" means viewing a portion of the object from above, and the phrase "in a schematic sectional view" means viewing a schematic section taken by vertically cutting the portion of the object from the side. The terms "overlap" or "overlapped" mean that the first object may be above or below the second object, or to one side of the second object, and vice versa. Additionally, the term "overlap" can include layering, stacking, facing, extending over, covering, or partially covering, or any other suitable term as will be understood and appreciated by those skilled in the art. The expression "not overlap" can include "spaced apart," "separated," or "offset," and any other suitable equivalent as will be understood and appreciated by those skilled in the art. The terms "face" and "facing" mean that the first object may be directly opposite or indirectly opposite the second object. In the case of a third object inserted between the first and second objects, the first and second objects can be understood as indirectly opposite each other, but still facing each other.

[0061] For ease of description, the spatial relative terms “below,” “under,” “down,” “above,” “up,” etc., may be used herein to describe the relationship between one element or component and another, as shown in the accompanying drawings. It should be understood that, in addition to the orientation depicted in the drawings, the spatial relative terms are intended to include different orientations of the device in use or operation. For example, in the case where the device shown in the drawings is flipped, the device located “below” or “under” another device may be placed “above” the other device. Therefore, the illustrative term “below” can include both a lower position and an upper position. The device may also be oriented in other directions, and therefore the spatial relative terms may be interpreted differently depending on the orientation.

[0062] When an element is referred to as being “connected” or “coupled” to another element, the element may be “directly connected” or “directly coupled” to the other element, or “electrically connected” or “electrically coupled” to the other element in the case of one or more intermediary elements inserted between them. It will also be understood that when the terms “comprises,” “comprising,” “has,” “have,” “having,” “includes,” and / or “including” are used, they may specify the presence of the stated feature, integral, step, operation, element, and / or component, but do not exclude the presence or addition of other features, integrals, steps, operations, elements, components, and / or any combination thereof.

[0063] It should be understood that although the terms “first,” “second,” “third,” etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another, or for the convenience of describing and illustrating the element. For example, when “first element” is discussed in the specification, it may be referred to as “second element” or “third element,” and “second element” and “third element” may be named in a similar manner without departing from the teachings herein.

[0064] As used herein, “about” or “approximately” includes the value as well as the average of the values ​​within an acceptable range of deviations from the particular value, as determined by a person skilled in the art taking into account the measurement in question and the errors associated with the measurement of the particular quantity (i.e., limitations of the measurement system). For example, “about” may mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the value.

[0065] In the specification and claims, for the purposes of their meaning and interpretation, the term "and / or" is intended to include any combination of the terms "and" and "or". For example, "A and / or B" can be understood to mean "A, B, or A and B". The terms "and" and "or" can be used in a combined or separate sense and can be understood to be equivalent to "and / or". In the specification and claims, for the purposes of their meaning and interpretation, the phrase "at least one of..." is intended to include the meaning of "at least one selected from the group of...". For example, "at least one of A and B" can be understood to mean "A, B, or A and B".

[0066] Unless otherwise defined or implied, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It should also be understood that terms, such as those defined in common dictionaries, shall be interpreted as having the meaning consistent with their meaning in the context of the relevant field, and shall not be interpreted in an idealized or overly formalized sense unless clearly defined in this specification.

[0067] Figure 1 This is a schematic perspective view of a display device according to an embodiment.

[0068] refer to Figure 1 The display device 10, which is used to display moving or still images, can be used not only in portable electronic devices (e.g., mobile phones, smartphones, tablet PCs, smartwatches, watch phones, mobile communication terminals, electronic notebooks, e-books, portable multimedia players (PMPs), navigation devices, or ultra-mobile PCs (UMPCs)), but also in a variety of other products (such as televisions (TVs), laptops, monitors, billboards, or Internet of Things (IoT) devices).

[0069] The display device 10 is shown as, for example, an inorganic light-emitting display device that includes inorganic semiconductor elements as its light-emitting elements, but this disclosure is not limited thereto.

[0070] The display device 10 may include a display panel 100, a display driving circuit 200, and a circuit board 300.

[0071] In a planar view, the display panel 100 can be formed as a generally rectangular shape having a long side in a first direction (or the X-axis direction) and a short side in a second direction (or the Y-axis direction). A third direction (or the Z-axis direction) is the thickness direction of the display panel 100. The corners where the long and short sides of the display panel 100 intersect can be rounded to have curvature, or they can be right angles. The generally planar shape of the display panel 100 is not particularly limited, and the display panel 100 can be formed in various other shapes, such as another generally polygonal shape, a generally circular shape, or a generally elliptical shape. The display panel 100 can be formed as flat, but this disclosure is not limited thereto. In one example, the display panel 100 may include curved portions with uniform or varying curvature. The display panel 100 can be formed as flexible, such as foldable, bendable, or rollable.

[0072] The display panel 100 may include a display area DA for displaying an image and a non-display area NDA disposed around the display area DA. As an example, the display panel 100's ( Figure 5The substrate SUB1 may include the display area DA and the non-display area NDA.

[0073] The display area DA can occupy most of the display panel 100. The display area DA can be positioned in the center of the display panel 100. Figure 2 The pixel PX can be set in the display area DA to display the image.

[0074] The non-display area NDA can be set to be adjacent to the display area DA. The non-display area NDA can be an area outside the display area DA. The non-display area NDA can be set to surround the display area DA or can be adjacent to the display area DA. The non-display area NDA can be an edge area of ​​the display panel 100.

[0075] When powered on, connect to circuit board 300 ( Figure 2 The display pad DP can be located in the non-display area NDA. The display pad DP can be located on one side of the display panel 100. In one example, the display pad DP can be located on the lower side of the display panel 100.

[0076] The circuit board 300 can be mounted on the display pad DP, which is located along the edge of the display panel 100. Figure 1 Three circuit boards 300 are shown, but the number of circuit boards 300 is not particularly limited.

[0077] The circuit board 300 can be attached to the display pad DP or ( ) using a low-resistance, high-reliability material such as anisotropic conductive film (ACF) or self-assembling anisotropic conductive paste (SAP). Figure 2 The circuit board 300 can be electrically connected to the (SP) of the display panel 100. Figure 2 ) data cable DL and ( Figure 2 The scan control line (SCL) is used. The display panel 100 can receive data voltage and scan control signals via the circuit board 300. The circuit board 300 can be a flexible printed circuit board (FPCB), a printed circuit board (PCB), or a flexible film such as chip on film (COF).

[0078] The display driver circuit 200 can generate data voltage and scan control signals. The display driver circuit 200 can provide data voltage and scan control signals to the display panel 100 via the circuit board 300. As an example, the scan control signals can be generated by a timing driver circuit instead of the display driver circuit 200, and can be provided to the display panel 100 via the circuit board 300.

[0079] The display driving circuit 200 can be formed as an integrated circuit (IC) and can be attached to the circuit board 300. As an example, the display driving circuit 200 can be attached to the display panel 100 by means of chip on glass (COG) or chip on plastic (COP) or by ultrasonic bonding.

[0080] Figure 2 yes Figure 1 A schematic layout diagram of the display panel.

[0081] refer to Figure 2 The display panel 100 may include pixels PX, scan driver SDC, scan line SL, data line DL, floating lines FL1 and FL2, connection lines FCL1, FCL2, FCL3 and FCL4, display pad DP and scan pad SP.

[0082] Pixels PX, scan lines SL, and data lines DL can be set in the display area DA of the display panel 100.

[0083] The scan line SL can extend in a first direction (or the X-axis direction) and can be arranged or set along a second direction (or the Y-axis direction). The scan line SL can be electrically connected to the scan driver SDC. Scan signals from the scan driver SDC can be applied to the scan line SL.

[0084] The data line DL can extend in a second direction (or the Y-axis direction) and can be arranged or positioned along a first direction (or the X-axis direction). The data line DL can be electrically connected to the display pad DP. Therefore, the data line DL can be electrically connected to the display driver circuit 200 and the circuit board 300 via the display pad DP. Data voltage from the display driver circuit 200 can be applied to the data line DL.

[0085] Each pixel in a pixel PX can include sub-pixels. Figure 2 It is shown that each of the pixels PX may include three sub-pixels, for example, a first sub-pixel PX1, a second sub-pixel PX2, and a third sub-pixel PX3, but the number of sub-pixels included in each of the pixels PX is not particularly limited.

[0086] Subpixels PX1, PX2, and PX3 can be arranged or positioned along a first direction (or the X-axis direction) and a second direction (or the Y-axis direction). For example, subpixels PX1, PX2, and PX3 can be arranged or positioned in a matrix. First subpixel PX1, second subpixel PX2, and third subpixel PX3 can be arranged or positioned alternately along the first direction (or the X-axis direction). First subpixel PX1 can be arranged or positioned along the second direction (or the Y-axis direction), second subpixel PX2 can be arranged or positioned along the second direction (or the Y-axis direction), and third subpixel PX3 can be arranged or positioned along the second direction (or the Y-axis direction).

[0087] Each sub-pixel PX1, PX2, and PX3 may include a first electrode 171 and a second electrode 173. The first electrode 171 and the second electrode 173 may extend in a second direction (or the Y-axis direction) and may be adjacent to each other in a first direction (or the X-axis direction).

[0088] The first electrodes 171 of sub-pixels PX1, PX2, and PX3 can be spaced apart from each other, and the second electrodes 173 of sub-pixels PX1, PX2, and PX3 can be spaced apart from each other. In one example, the first electrodes 171 of a pair of adjacent sub-pixels PX1, PX2, and PX3 in the first direction (or X-axis direction) and the second direction (or Y-axis direction) can be spaced apart from each other, and the second electrodes 173 of a pair of adjacent sub-pixels PX1, PX2, and PX3 in the first direction (or X-axis direction) and the second direction (or Y-axis direction) can be spaced apart from each other.

[0089] ( Figure 3 The light-emitting element 172 can be disposed between the first electrode 171 and the second electrode 173 of each of the sub-pixels PX1, PX2, and PX3. A first end of the light-emitting element 172 can be electrically connected to the first electrode 171, and a second end of the light-emitting element 172 can be electrically connected to the second electrode 173. Therefore, the light-emitting element 172 can emit light according to the driving current flowing from the first electrode 171 to the second electrode 173.

[0090] The scan driver SDC, scan control line SCL, floating lines FL1 and FL2, connection lines FCL1, FCL2, FCL3 and FCL4, display pad DP and scan pad SP can be set in the non-display area NDA of the display panel 100.

[0091] The scan driver SDC can be electrically connected to the scan pad SP via the scan control line SCL. Therefore, the scan driver SDC can be electrically connected to the circuit board 300 via the scan pad SP. Thus, a scan control signal from the circuit board 300 can be applied to the scan driver SDC. The scan driver SDC can generate a scan signal based on the scan control signal and can provide the scan signal to the scan line SL.

[0092] Figure 2 The diagram shows the scan driver SDC located in the portions of the non-display area NDA on the left and right outer sides of the display area DA, but this disclosure is not limited thereto. As an example, the scan driver SDC may be located only in the portion of the non-display area NDA on the left side of the display area DA or only in the portion of the non-display area NDA on the right side of the display area DA.

[0093] Floating lines FL1 and FL2, and connecting lines FCL1, FCL2, FCL3, and FCL4, may be elements retained in the display panel 100 during the manufacture of the display device 10 after the application of a first alignment signal and a second alignment signal for aligning the light-emitting elements 172 in each of the sub-pixels PX1, PX2, and PX3. Therefore, floating lines FL1 and FL2, and connecting lines FCL1, FCL2, FCL3, and FCL4, may not be connected to other elements of the display panel 100 (e.g., the first electrode 171 and second electrode 173 of each of the sub-pixels PX1, PX2, and PX3, the scan line SL, and the data line DL), and are electrically insulated from other elements of the display panel 100. A ground voltage or a direct current (DC) voltage may be applied to the floating lines FL1 and FL2, and connecting lines FCL1, FCL2, FCL3, and FCL4 to prevent static electricity.

[0094] Floating lines FL1 and FL2 can extend in a first direction (or the X-axis direction) and can be arranged or set along a second direction (or the Y-axis direction). Floating lines FL1 and FL2 can be set in the portion of the non-display area NDA that is on the upper outer side of the display area DA.

[0095] The first floating line FL1 can be connected to the first connecting line FCL1 and the third connecting line FCL3. The first connecting line FCL1 and the third connecting line FCL3 can extend in a second direction (or the Y-axis direction). The first connecting line FCL1 can extend from the first floating line FL1 in an upward direction toward the upper side of the display panel 100. The third connecting line FCL3 can extend from the first floating line FL1 in a direction toward the display area DA. For example... Figure 6 As shown, the first connection line FCL1 can be electrically connected to the first alignment pad AP1 of the mother substrate MSUB.

[0096] The second floating line FL2 can be connected to the second connecting line FCL2 and the fourth connecting line FCL4. The second connecting line FCL2 and the fourth connecting line FCL4 can extend in a second direction (or the Y-axis direction). The second connecting line FCL2 can extend upwards from the second floating line FL2 towards the upper side of the display panel 100. The fourth connecting line FCL4 can extend from the second floating line FL2 in a direction towards the display area DA. For example... Figure 6 As shown, the second connection line FCL2 can be electrically connected to the second alignment pad AP2 of the mother substrate MSUB.

[0097] Display pads DP and scan pads SP can be located in the portion of the non-display area NDA on the lower outer side of the display area DA. Circuit boards 300 located on the left or right side of the array of circuit boards 300 can be electrically connected to display pads DP and scan pads SP, while a circuit board 300 in the middle of the array of circuit boards 300 can be electrically connected to display pads DP. Scan pads SP of circuit boards 300 electrically connected to the left side of the array of circuit boards 300 can be located on the left side of the array of display pads DP. Scan pads SP of circuit boards 300 electrically connected to the right side of the array of circuit boards 300 can be located on the right side of the array of display pads DP.

[0098] Figure 3 yes Figure 2 A schematic layout diagram of pixels.

[0099] refer to Figure 3 Pixel PX may include sub-pixels PX1, PX2, and PX3. Pixel PX is shown as including three sub-pixels PX1, PX2, and PX3, for example, a first sub-pixel PX1, a second sub-pixel PX2, and a third sub-pixel PX3, but this disclosure is not limited thereto.

[0100] The first sub-pixel PX1 is the smallest unit for emitting light of a first color, the second sub-pixel PX2 is the smallest unit for emitting light of a second color, and the third sub-pixel PX3 is the smallest unit for emitting light of a third color. The first, second, and third colors can be red, green, and blue, respectively, but this disclosure is not limited thereto. In one example, the first color light can be red light with a center wavelength in the range of about 600 nm to about 750 nm, the second color light can be green light with a center wavelength in the range of about 480 nm to about 560 nm, and the third color light can be blue light with a center wavelength in the range of about 370 nm to about 490 nm.

[0101] Each of the first sub-pixel PX1, the second sub-pixel PX2, and the third sub-pixel PX3 may include a first electrode 171, a light-emitting element 172, a second electrode 173, a first contact electrode 174, and a second contact electrode 175.

[0102] The first electrode 171 may be a pixel electrode separated between different sub-pixels PX1, PX2, and PX3, and the second electrode 173 may be a common electrode separated between different sub-pixels PX1, PX2, and PX3. In one example, the first electrode 171 may be an anode electrode electrically connected to a first end of the light-emitting element 172, and the second electrode 173 may be a cathode electrode electrically connected to a second end of the light-emitting element 172.

[0103] The first electrode 171 and the second electrode 173 may extend in a second direction (or the Y-axis direction). The first electrode 171 and the second electrode 173 may be spaced apart from each other and may be electrically insulated from each other.

[0104] The first electrode 171 can be electrically connected to (the pixel contact hole PCT) via (the pixel contact hole PCT). Figure 5 The source or drain electrode of the thin-film transistor (TFT) ST. The second electrode 173 can be electrically connected to (the source or drain electrode of the TFT ST) through a common contact hole CCT. Figure 5 The first power line VL1.

[0105] Figure 3 The illustration shows that each of the first sub-pixel PX1, the second sub-pixel PX2, and the third sub-pixel PX3 may include a first electrode 171 and a second electrode 173, but this disclosure is not limited thereto. As an example, each of the first sub-pixel PX1, the second sub-pixel PX2, and the third sub-pixel PX3 may include two or more first electrodes 171 and two or more second electrodes 173. As an example, each of the first sub-pixel PX1, the second sub-pixel PX2, and the third sub-pixel PX3 may include two first electrodes 171 and one second electrode 173.

[0106] The first contact electrode 174 and the second contact electrode 175 may extend in a second direction (or the Y-axis direction). The length of the first contact electrode 174 in the second direction (or the Y-axis direction) may be less than the length of the first electrode 171 in the second direction (or the Y-axis direction). The length of the second contact electrode 175 in the second direction (or the Y-axis direction) may be less than the length of the second electrode 173 in the second direction (or the Y-axis direction). The width of the first contact electrode 174 in the first direction (or the X-axis direction) may be less than the width of the first electrode 171 in the first direction (or the X-axis direction). The width of the second contact electrode 175 in the first direction (or the X-axis direction) may be less than the width of the second electrode 173 in the first direction (or the X-axis direction).

[0107] The first contact electrode 174 may overlap with the first electrode 171 in the third direction (or the Z-axis direction). The first contact electrode 174 may be electrically connected to the first electrode 171 through the first contact hole CTT1.

[0108] The second contact electrode 175 may overlap with the second electrode 173 in the third direction (or the Z-axis direction). The second contact electrode 175 may be electrically connected to the second electrode 173 through the second contact hole CTT2.

[0109] The first contact electrode 174 can contact the first end of the light-emitting element 172. The second contact electrode 175 can contact the second end of the light-emitting element 172. Therefore, the light-emitting element 172 can be electrically connected to the first electrode 171 via the first contact electrode 174, and electrically connected to the second electrode 173 via the second contact electrode 175.

[0110] The light-emitting elements 172 can be arranged to be spaced apart from each other. The light-emitting elements 172 can extend in a first direction (or the X-axis direction) and can be arranged or positioned along a second direction (or the Y-axis direction).

[0111] The light-emitting element 172 can be set in a configuration consisting of ( Figure 5 The light-emitting element 172 is located in the first opening OA1 defined by the outer embankment 192. For example, the light-emitting element 172 may not overlap with the outer embankment 192 in the third direction (or the Z-axis direction).

[0112] The first end of the light-emitting element 172 can contact the first contact electrode 174, and the second end of the light-emitting element 172 can contact the second contact electrode 175. The first end of the light-emitting element 172 can overlap with the first electrode 171 in the third direction (or the Z-axis direction), and the second end of the light-emitting element 172 can overlap with the second electrode 173 in the third direction (or the Z-axis direction).

[0113] The light-emitting element 172 can have the shape of a rod, wire, or tube. In one example, the light-emitting element 172 can be formed as a cylinder or rod. In another example, the light-emitting element 172 can be formed as a polyhedron such as a regular cube or rectangular parallelepiped, or as a polygonal prism such as a hexagonal prism. In another example, the light-emitting element 172 can be formed as a truncated cone extending in one direction and partially having an inclined outer surface. The length of the light-emitting element 172 can be in the range of about 1 μm to about 10 μm, or in the range of about 2 μm to about 6 μm, or, as an example, in the range of about 3 μm to about 5 μm. The light-emitting element 172 can have a diameter in the range of about 300 nm to about 700 nm and an aspect ratio in the range of about 1.2 to about 100.

[0114] The outer embankment 192 may define a first opening OA1 and a second opening OA2 in each of the first sub-pixel PX1, the second sub-pixel PX2, and the third sub-pixel PX3. The first opening OA1 may be an emitting region where a light-emitting element 172 is disposed. The second opening OA2 may be a separation region where the first electrode 171 and the second electrode 173 are separated. In the second opening OA2, the two first electrodes 171 of two adjacent sub-pixels in the second direction (or the Y-axis direction) may be spaced apart from each other, and the two second electrodes 173 of two adjacent sub-pixels in the second direction (or the Y-axis direction) may be spaced apart from each other. The minimum distance between the two first electrodes 171 in the second direction (or the Y-axis direction) may be less than the maximum length of the second opening OA2 in the second direction (or the Y-axis direction). The minimum distance between the two second electrodes 173 in the second direction (or the Y-axis direction) may be less than the maximum length of the second opening OA2 in the second direction (or the Y-axis direction).

[0115] Figure 3 The first opening OA1 and the second opening OA2 are shown to be spaced apart from each other, but this disclosure is not limited thereto. As an example, the first opening OA1 and the second opening OA2 may be integral to each other as a single opening.

[0116] Figure 4 yes Figure 3 A schematic three-dimensional diagram of the light-emitting element.

[0117] refer to Figure 4 The light-emitting element 172 may include a first semiconductor layer 172a, a second semiconductor layer 172b, an active layer 172c, an electrode layer 172d, and an insulating film 172e.

[0118] The light-emitting element 172 may extend in one direction. The light-emitting element 172 may have the shape of a rod, wire, or tube. In one example, the light-emitting element 172 may be formed as a cylinder or rod. However, the shape of the light-emitting element 172 is not particularly limited. As an example, the light-emitting element 172 may be formed in various other shapes, such as a generally polygonal prism (e.g., a generally regular cube, a generally rectangular parallelepiped, or a generally hexagonal prism) or a generally truncated cone extending in one direction and partially having a sloping outer surface.

[0119] The light-emitting element 172 may include a semiconductor layer doped with impurities of any conductivity type (e.g., p-type or n-type). The semiconductor layer can receive electrical signals applied to it from an external power source and can therefore emit light within a specific wavelength range. Multiple semiconductors included in the light-emitting element 172 may be arranged, positioned, or stacked sequentially in one direction.

[0120] The light-emitting element 172 may include a first semiconductor layer 172a, a second semiconductor layer 172b, an active layer 172c, an electrode layer 172d, and an insulating film 172e. For convenience, Figure 4 The first semiconductor layer 172a, the second semiconductor layer 172b, the active layer 172c, and the electrode layer 172d are shown exposed due to the removal of a portion of the insulating film 172e, and the insulating film 172e may be configured to surround the outer surface of the first semiconductor layer 172a, the second semiconductor layer 172b, the active layer 172c, and the electrode layer 172d.

[0121] The first semiconductor layer 172a may be an n-type semiconductor. In one example, where the light-emitting element 172 emits blue wavelength light, the first semiconductor layer 172a may include a semiconductor having, for example, the chemical formula Al. x Ga y In 1-x-y The semiconductor material is N (where 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, and 0 ≤ x + y ≤ 1). The semiconductor material can be, for example, at least one of AlGaInN, GaN, AlGaN, InGaN, AlN, and InN doped with an n-type dopant. The first semiconductor layer 172a can be doped with an n-type dopant, and the n-type dopant can be, for example, Si, Ge, Se, or Sn. In one example, the first semiconductor layer 172a can be n-GaN doped with n-type Si. The first semiconductor layer 172a can have a length ranging from about 1.5 μm to about 5 μm, but this disclosure is not limited thereto.

[0122] The second semiconductor layer 172b is disposed on the active layer 172c. The second semiconductor layer 172b may be a p-type semiconductor. In one example, when the light-emitting element 172 emits blue or green wavelength light, the second semiconductor layer 172b may include a semiconductor having, for example, the chemical formula Al. x Ga y In 1-x-y The semiconductor material is N (where 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, and 0 ≤ x + y ≤ 1). The semiconductor material can be, for example, at least one of AlGaInN, GaN, AlGaN, InGaN, AlN, and InN doped with a p-type dopant. The second semiconductor layer 172b can be doped with a p-type dopant, and the p-type dopant can be, for example, Mg, Zn, Ca, or Ba. In one example, the second semiconductor layer 172b can be p-GaN doped with p-type Mg. The second semiconductor layer 172b can have a length in the range of about 0.05 μm to about 0.10 μm, but this disclosure is not limited thereto.

[0123] Figure 4The first semiconductor layer 172a and the second semiconductor layer 172b are shown to be single layers, but this disclosure is not limited thereto. As an example, depending on the material of the active layer 172c, each of the first semiconductor layer 172a and the second semiconductor layer 172b may include more than one layer. In one example, each of the first semiconductor layer 172a and the second semiconductor layer 172b may also include a cladding layer or a tensile strain barrier reduction (TSBR) layer.

[0124] An active layer 172c may be disposed between a first semiconductor layer 172a and a second semiconductor layer 172b. The active layer 172c may comprise a single quantum well structure material or a multi-quantum well structure material. When the active layer 172c comprises a material with a multi-quantum well structure, the active layer 172c may have a structure in which multiple quantum layers and multiple well layers can be stacked alternately on top of each other. The active layer 172c can emit light by recombination of electron-hole pairs according to an electrical signal applied to it via the first semiconductor layer 172a and the second semiconductor layer 172b. In one example, when the light-emitting element 172 emits blue wavelength light, the active layer 172c may comprise a material such as AlGaN or AlGaInN. When the active layer 172c has a multi-quantum well structure in which multiple quantum layers and multiple well layers can be stacked alternately on top of each other, the quantum layers may comprise a material such as AlGaN or AlGaInN, and the well layers may comprise a material such as GaN or AlInN. In one example, the active layer 172c may include AlGaInN as its quantum layer and AlInN as its well layer, and is therefore able to emit blue light with a center wavelength in the range of about 370 nm to about 490 nm.

[0125] As an example, the active layer 172c may have a structure in which semiconductor materials with large bandgap energies and semiconductor materials with small bandgap energies can be stacked alternately, or may include group III or group V semiconductor materials depending on the wavelength of the light to be emitted. The type of light emitted by the active layer 172c is not particularly limited. The active layer 172c may emit red and green wavelength light as needed, but not blue wavelength light. The active layer 172c may have a length in the range of about 0.05 μm to about 0.10 μm, but this disclosure is not limited thereto.

[0126] Light emitted from the active layer 172c can pass not only through the outer surface of the light-emitting element 172 along its length but also through both sides of the light-emitting element 172. The directionality of light emitted from the active layer 172c is not particularly restricted.

[0127] Electrode layer 172d may be an ohmic contact electrode, but this disclosure is not limited thereto. As an example, electrode layer 172d may be a Schottky contact electrode. Light-emitting element 172 may include at least one electrode layer 172d. Light-emitting element 172 may include more than one electrode layer 172d, but this disclosure is not limited thereto. As an example, electrode layer 172d may not be provided.

[0128] When the first end of the light-emitting element 172 is positioned in contact with the first contact electrode 174, the electrode layer 172d can reduce the resistance between the light-emitting element 172 and the first contact electrode 174. The electrode layer 172d may comprise a conductive metal. In one example, the electrode layer 172d may comprise at least one of aluminum (Al), titanium (Ti), indium (In), gold (Au), silver (Ag), indium tin oxide (ITO), indium zinc oxide (IZO), and indium tin zinc oxide (ITZO). In another example, the electrode layer 172d may comprise a semiconductor material doped with an n-type dopant or a p-type dopant. The electrode layer 172d may have a length in the range of about 0.05 μm to about 0.10 μm, but this disclosure is not limited thereto.

[0129] The insulating film 172e may be disposed around the outer surfaces of the first semiconductor layer 172a, the second semiconductor layer 172b, the active layer 172c, and the electrode layer 172d. The insulating film 172e may protect the first semiconductor layer 172a, the second semiconductor layer 172b, the active layer 172c, and the electrode layer 172d. In one example, the insulating film 172e may be formed to expose the two ends of the light-emitting element 172 in the longitudinal direction.

[0130] Figure 4 An insulating film 172e is shown extending along the length of the light-emitting element 172 (from the first semiconductor layer 172a to the electrode layer 172d) to cover or overlap the light-emitting element 172, but this disclosure is not limited thereto. As an example, the insulating film 172e may only cover or overlap a portion of the outer surface of the active layer 172c and a portion of the outer surfaces of the first semiconductor layer 172a and the second semiconductor layer 172b. As an example, the insulating film 172e may only cover or overlap a portion of the outer surface of the electrode layer 172d, and therefore, another portion of the outer surface of the electrode layer 172d may not be covered or overlapped by the insulating film 172e, but may be exposed.

[0131] The insulating film 172e may have a thickness in the range of about 10 nm to about 1.0 μm, but this disclosure is not limited thereto. The insulating film 172e may have a thickness of about 40 nm.

[0132] The insulating film 172e may include materials with insulating properties, such as, for example, silicon oxide (SiO2). x ), silicon nitride (SiN)x ), silicon oxynitride (SiO) x N y The insulating film 172e can be aluminum nitride (AlN) or aluminum oxide (Al2O3). Therefore, the insulating film 172e can prevent short circuits that may occur when the active layer 172c is placed in direct contact with the first contact electrode 174 or the second contact electrode 175. Since the insulating film 172e can protect the outer surface of the light-emitting element 172, including the active layer 172c, any reduction in emission efficiency can be prevented.

[0133] During the manufacture of the display device 10, the light-emitting element 172 may be included in the coating solution. The surface of the insulating film 172e may be hydrophobically or hydrophilically treated to completely separate the light-emitting element 172 from other light-emitting elements 172 in the coating solution and prevent them from agglomerating.

[0134] The length h of the light-emitting element 172 can range from about 1 μm to about 10 μm, or from about 2 μm to about 6 μm, or, as an example, from about 3 μm to about 5 μm. The light-emitting element 172 can have a diameter ranging from about 300 nm to about 700 nm and an aspect ratio ranging from about 1.2 to about 100. The diameter of the light-emitting element 172 can vary depending on the composition of the active layer 172c. The light-emitting element 172 can have a diameter of about 500 nm.

[0135] Figure 5 It is along Figure 3 A schematic cross-sectional view taken from line I-I'.

[0136] refer to Figure 5 The first sub-pixel PX1 may include at least one TFT ST, at least one capacitor CST, a first electrode 171, a light-emitting element 172, a second electrode 173, a first contact electrode 174, a second contact electrode 175, and a first wavelength conversion layer QDL.

[0137] The substrate SUB1 can be formed of an insulating material such as glass, quartz, or polymer resin. The substrate SUB1 can be a rigid substrate or a flexible substrate that is bendable, foldable, or rollable.

[0138] A barrier film BR can be disposed on a substrate SUB1. The barrier film BR can be a film used to protect the TFT ST from moisture that may penetrate into the substrate SUB1, where the substrate SUB1 is susceptible to moisture. The barrier film BR can comprise inorganic films that can be stacked alternately on top of each other. In one example, the barrier film BR can be formed to include SiO2. x SiN x and SiO x N yAt least one of the inorganic membranes can be stacked alternately on top of each other in a multilayer membrane.

[0139] The semiconductor layer of the TFT ST, including the active layer ACT, source electrode SE, and drain electrode DE, can be disposed on the barrier film BR. The semiconductor layer can include polycrystalline silicon, monocrystalline silicon, low-temperature polycrystalline silicon, amorphous silicon, or oxide semiconductor. The source electrode SE and drain electrode DE can be formed from silicon or oxide semiconductor doped with ions or impurities, and therefore can be conductive. The active layer ACT may overlap with the gate electrode GE of the TFT ST in the thickness direction of the substrate SUB1 (e.g., in the third direction (or Z-axis direction), but the source electrode SE and drain electrode DE may not overlap with the gate electrode GE in the third direction (or Z-axis direction).

[0140] The gate insulating film 130 can be disposed on the active layer ACT, the source electrode SE, and the drain electrode DE. The gate insulating film 130 may include an inorganic film, such as, for example, SiO₂. x SiN x or SiO x N y membrane.

[0141] The first gate conductive layer of the first capacitor electrode CAE1, including the gate electrode GE of the TFT ST and the capacitor CST, can be disposed on the gate insulating film 130. The gate electrode GE can overlap with the active layer ACT in the third direction (or the Z-axis direction). The first gate conductive layer can be formed as a single layer or multiple layers including at least one of molybdenum (Mo), Al, chromium (Cr), Au, Ti, nickel (Ni), neodymium (Nd), copper (Cu), and alloys thereof.

[0142] The first interlayer insulating film 141 can be disposed on the gate electrode GE and the first capacitor electrode CAE1. The first interlayer insulating film 141 may include an inorganic film, such as, for example, SiO2. x SiN x or SiO x N y membrane.

[0143] The second gate conductive layer, including the second capacitor electrode CAE2 of the capacitor CST, can be disposed on the first interlayer insulating film 141. Since the first interlayer insulating film 141 has a dielectric constant, the capacitor CST can be formed from the first capacitor electrode CAE1, the second capacitor electrode CAE2, and the first interlayer insulating film 141. The second capacitor electrode CAE2 can be formed as a single layer or multiple layers comprising at least one of Mo, Al, Cr, Au, Ti, Ni, Nd, Cu, and their alloys.

[0144] The second interlayer insulating film 142 can be disposed on the second capacitor electrode CAE2. The second interlayer insulating film 142 may include an inorganic film, such as, for example, SiO2. x SiN x or SiO x N y membrane.

[0145] The data conductive layer, including the connection electrode ANDE and the first power line VL1, can be disposed on the second interlayer insulating film 142. The connection electrode ANDE can be electrically connected to the drain electrode DE by penetrating the gate insulating film 130, the first interlayer insulating film 141 and the second interlayer insulating film 142, thereby exposing the drain electrode DE of the TFT ST through the drain contact hole DCT. Figure 4 The diagram shows a connection electrode ANDE electrically connected to the drain electrode DE of the TFT ST, but this disclosure is not limited thereto. As an example, the connection electrode ANDE can be electrically connected to the source electrode SE via a source contact hole that penetrates the gate insulating film 130, the first interlayer insulating film 141, and the second interlayer insulating film 142, thereby exposing the source electrode SE of the TFT ST. A first power supply voltage can be applied to a first electric field line VL1. The first electric field line VL1 can extend in a first direction (or the X-axis direction), but this disclosure is not limited thereto. The data conductive layer can be formed as a single layer or multiple layers comprising at least one of Mo, Al, Cr, Au, Ti, Ni, Nd, Cu, and alloys thereof.

[0146] A planarization film 160 for planarizing the height difference formed by the thin-film transistor ST can be disposed on the connection electrode ANDE. The planarization film 160 can be formed as an organic film including a photosensitive resin, such as an acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin.

[0147] The first electrode 171, the second electrode 173, and the inner embankment 191 can be disposed on the planarization film 160.

[0148] An inner dam 191 may be disposed within a first opening OA1 defined by an outer dam 192. A light-emitting element 172 may be disposed between a pair of adjacent inner dams 191. Each of the inner dams 191 may have a bottom surface that contacts the planarization film 160, a top surface opposite the bottom surface, and a side surface between the top and bottom surfaces. In a cross-sectional view, the inner dam 191 may have a generally trapezoidal shape, but this disclosure is not limited thereto.

[0149] The inner dam 191 can be formed as an organic film comprising a photosensitive resin, such as an acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin. In one example, the inner dam 191 can be formed from a photoresist resin (such as a positive photoresist resin or a negative photoresist resin).

[0150] A first electrode 171 may be disposed on the planarization film 160 and the inner dam 191. The first electrode 171 may be disposed on at least one side surface and top surface of each of the inner dams 191. The first electrode 171 may be electrically connected to the connection electrode ANDE through a pixel contact hole PCT penetrating the planarization film 160. Therefore, the first electrode 171 may be electrically connected to the drain electrode DE of the TFT ST. The pixel contact hole PCT may overlap with the outer dam 192 in the third direction (or Z-axis direction). The pixel contact hole PCT may be disposed between the first opening OA1 and the second opening OA2.

[0151] The second electrode 173 can be disposed on the planarization film 160 and the inner embankment 191. The second electrode 173 can be disposed on at least one side surface and top surface of each of the inner embankments 191. The second electrode 173 can be electrically connected to the first electric field line VL1 through a common contact hole CCT penetrating the planarization film 160. The common contact hole CCT can overlap with the outer embankment 192 in the third direction (or Z-axis direction). The common contact hole CCT can be disposed between the first opening OA1 and the second opening OA2.

[0152] The first electrode 171 and the second electrode 173 may comprise a conductive material with high reflectivity. In one example, the first electrode 171 and the second electrode 173 may comprise a metal, such as Ag, Cu, or Al. Therefore, light emitted from the light-emitting element 172 toward the first electrode 171 and the second electrode 173 can be reflected by the first electrode 171 and the second electrode 173, and thus can travel beyond the top of the light-emitting element 172.

[0153] The first insulating film 181 may be disposed on the first electrode 171 and the second electrode 173. The first insulating film 181 may be disposed on the portion of the planarization film 160 that is not covered or overlapped by the first electrode 171 and the second electrode 173 but is exposed by the first electrode 171 and the second electrode 173. The first insulating film 181 may include an inorganic film, such as, for example, SiO2. x SiN x or SiO x N y membrane.

[0154] An outer dam 192 may be disposed on the first insulating film 181. The outer dam 192 may define a first opening OA1 and a second opening OA2. The outer dam 192 may not overlap with the inner dam 191. The outer dam 192 may have a bottom surface in contact with the first insulating film 181, a top surface opposite the bottom surface, and a side surface between the top and bottom surfaces. In a cross-sectional view, the outer dam 192 may have a generally trapezoidal shape, but this disclosure is not limited thereto.

[0155] The outer dam 192 can be formed as an organic film comprising a photosensitive resin, such as an acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin. In one example, the outer dam 192 can be formed from a photoresist resin (such as a positive photoresist resin or a negative photoresist resin).

[0156] The light-emitting element 172 can be disposed on the first insulating film 181. The second insulating film 182 can be disposed on the light-emitting element 172. The second insulating film 182 can be disposed on the outer embankment 192. The second insulating film 182 can be disposed in the second opening OA2 on the portion of the first electrode 171 and the second electrode 173 that is not covered or overlapped by the first insulating film 181 but is exposed by the first insulating film 181. The second insulating film 182 may include an inorganic film, such as, for example, SiO2. x SiN x or SiO x N y membrane.

[0157] The first contact electrode 174 can be electrically connected to the first electrode 171 through a first contact hole CTT1 penetrating the first insulating film 181. The first contact hole CTT1 can overlap with one of the inner embankments 191 in the third direction (or the Z-axis direction). The first contact electrode 174 can contact the first end of the light-emitting element 172. Therefore, the first end of the light-emitting element 172 can be electrically connected to the first electrode 171 via the first contact electrode 174. The first contact electrode 174 can be disposed on the second insulating film 182.

[0158] A third insulating film 183 may be disposed on the first contact electrode 174. The third insulating film 183 may be configured to cover or overlap the first contact electrode 174 to electrically insulate the first contact electrode 174 and the second contact electrode 175. The third insulating film 183 may also cover or overlap the portion of the second insulating film 182 on the outer embankment 192. The third insulating film 183 may be disposed in the second opening OA2 within the separation regions SA1 and SA2 of the first electrode 171 and the second electrode 173. For example, the third insulating film 183 may be disposed in the second opening OA2 on the portion of the planarization film 160 that is not covered or overlapped by the first electrode 171 and the second electrode 173 but is exposed by them. The third insulating film 183 may include an inorganic film, such as, for example, SiO2. x SiN x or SiO x N y membrane.

[0159] The second contact electrode 175 can be electrically connected to the second electrode 173 through the second contact hole CTT2 penetrating the first insulating film 181. The second contact hole CTT2 can overlap with one of the inner embankments 191 in the third direction (or Z-axis direction). The second contact electrode 175 can contact the second end of the light-emitting element 172. Therefore, the second end of the light-emitting element 172 can be electrically connected to the second electrode 173 via the second contact electrode 175. The second contact electrode 175 can be disposed on the third insulating film 183.

[0160] The first contact electrode 174 and the second contact electrode 175 can be formed of a transparent conductive oxide (TCO) that allows light to pass through, such as ITO or IZO. Therefore, light emitted from the light-emitting element 172 can be prevented from being blocked by the first contact electrode 174 and the second contact electrode 175.

[0161] The first end of the light-emitting element 172 can be electrically connected to the drain electrode DE of the TFT ST via the first contact electrode 174 and the first electrode 171, and the second end of the light-emitting element 172 can be electrically connected to the first power line VL1 via the second contact electrode 175 and the second electrode 173. Therefore, the light-emitting element 172 can emit light according to the current flowing from its first end to its second end.

[0162] A first wavelength conversion layer (QDL) can be disposed in a first sub-pixel PX1, a second wavelength conversion layer can be disposed in a second sub-pixel PX2, and a transparent insulating film can be disposed in a third sub-pixel PX3. The light-emitting element 172 of each of the first sub-pixel PX1, the second sub-pixel PX2, and the third sub-pixel PX3 can emit a third color light. The third color light can be short-wavelength light, such as blue light or ultraviolet (UV) light with a center wavelength in the range of approximately 370 nm to approximately 490 nm.

[0163] The first wavelength conversion layer (QDL) can convert the third color light emitted from the light-emitting element 172 of the first sub-pixel PX1 into first color light. The first color light can be red light with a center wavelength in the range of about 600 nm to about 750 nm.

[0164] The second wavelength conversion layer can convert the third color light emitted from the light-emitting element 172 of the second sub-pixel PX2 into second color light. The second color light can be green light with a center wavelength in the range of about 480 nm to about 560 nm.

[0165] Each of the first wavelength conversion layer (QDL) and the second wavelength conversion layer may include a base resin, a wavelength converter, and a scatterer.

[0166] The base resin may include materials with high light transmittance and excellent dispersion properties for wavelength converters and scatterers. In one example, the base resin may include organic materials such as epoxy resins, acrylic resins, cardo resins, or imide resins.

[0167] A wavelength converter can convert or change the wavelength of incident light. The wavelength converter can be a quantum dot, quantum rod, or phosphor. The size of the quantum dots in the first wavelength conversion layer (QDL) can differ from the size of the quantum dots in the second wavelength conversion layer.

[0168] The scatterer can scatter incident light in random directions without substantially altering the wavelength of the incident light passing through the first wavelength conversion layer (QDL) or the second wavelength conversion layer. In this way, the path of light passing through the QDL or the second wavelength conversion layer can be lengthened, and therefore, the color conversion efficiency of the wavelength converter can be improved. The scatterer can include light-scattering particles. The scatterer can include particles of metal oxides, such as, for example, titanium oxide (TiO2), silicon oxide (SiO2), zirconium oxide (ZrO2), aluminum oxide (Al2O3), indium oxide (In2O3), zinc oxide (ZnO), or tin oxide (SnO2). For example, the scatterer can include organic particles, such as particles of acrylic resin or polyurethane resin, for example.

[0169] Transparent insulating films can transmit short-wavelength light, such as blue light or UV light, through them as is. Transparent insulating films can be formed into organic films with high transmittance.

[0170] The first wavelength conversion layer QDL can be disposed on the second contact electrode 175 and the third insulating film 183 in the first sub-pixel PX1. The arrangement of the second wavelength conversion layer in the second sub-pixel PX2 and the arrangement of the transparent insulating film in the third sub-pixel PX3 can be substantially the same as the arrangement of the first wavelength conversion layer QDL in the first sub-pixel PX1, and therefore, its detailed description will be omitted.

[0171] A first color filter can be disposed on a first wavelength conversion layer (QDL). The first color filter can transmit first-color light, such as red wavelength light, through it. Therefore, short-wavelength light that fails to be converted into first-color light after being emitted from the light-emitting element 172 of the first sub-pixel PX1 cannot pass through the first color filter. Conversely, short-wavelength light converted into first-color light by the first wavelength conversion layer (QDL) can pass through the first color filter.

[0172] A second color filter can be disposed on the second wavelength conversion layer. The second color filter can transmit second-color light, such as green wavelength light, through it. Therefore, short-wavelength light that fails to be converted into second-color light after being emitted from the light-emitting element 172 of the second sub-pixel PX2 cannot pass through the second color filter. Conversely, short-wavelength light converted into second-color light by the second wavelength conversion layer can pass through the second color filter.

[0173] The third color filter can be disposed on a transparent insulating film. The third color filter can transmit third-color light, such as blue wavelength light, through it. Therefore, short-wavelength light emitted from the light-emitting element 172 of the third sub-pixel PX3 can pass through the third color filter.

[0174] The black matrix can be positioned on the first, second, and third color filters. Alternatively, it can be positioned between the first, second, and third color filters. The black matrix can include a light-blocking material capable of blocking light transmission. The black matrix can include inorganic or organic black pigments such as carbon black.

[0175] Apart from the first wavelength conversion layer QDL and the first color filter, the second sub-pixel PX2 and the third sub-pixel PX3 can be substantially the same as the first sub-pixel PX1, and therefore, their detailed description will be omitted.

[0176] Figure 6 This is a side view of an apparatus for manufacturing a display device according to an embodiment. Figure 7 yes Figure 6 Floor plan of the platform. Figure 8 yes Figure 6 A bottom view of the module that applies the first electric field. Figure 9 yes Figure 6 A bottom view of the light illumination module.

[0177] Figures 6 to 9 An apparatus 1000 for manufacturing a display device is shown, and the apparatus 1000 applies an alignment signal for alignment on a mother substrate MSUB. Figure 10 The light-emitting element is aligned in each sub-pixel of each of the display panel units CEL1 and CEL2.

[0178] refer to Figures 6 to 9 The device 1000 may include a platform 1100, a platform support 1110, a platform mover 1200, a support pin 1300, a pin support 1310, a first voltage output module 1410, a second voltage output module 1420, a first electric field application module 1500, a first module mover 1510, a second electric field application module 1600, a second module mover 1520, a light irradiation module 1700, and an optical device 1800.

[0179] The stage 1100 may have a flat top surface, allowing the mother substrate MSUB to be stably mounted on it. The stage 1100 may be raised or lowered by the stage mover 1200.

[0180] The stage 1100 may include a stage hole 1100H and a sensor device 1120.

[0181] The stage hole 1100H can be a hole that penetrates the stage 1100. The support pin 1300 and the pin support member 1310 can be disposed in the stage hole 1100H. For example, the stage hole 1100H can overlap with the support pin 1300 and the pin support member 1310. The stage hole 1100H can be arranged or disposed in a first direction (or the X-axis direction) and a second direction (or the Y-axis direction).

[0182] The sensor device 1120 can sense light from the light irradiation module 1700 and can sense the temperature of the stage 1100. Figure 7 Four sensor devices 1120 are shown arranged or mounted on a stage 1100, but this disclosure is not limited thereto. The stage 1100 may be divided into four parts, for example, two parts in a first direction (or the X-axis direction) and two parts in a second direction (or the Y-axis direction), and a sensor device 1120 may be mounted in one of the four parts. Reference will be made later. Figure 12 and Figure 13 Description of sensor device 1120.

[0183] The platform mover 1200 can be coupled to or attached to the bottom of the platform 1100. The platform mover 1200 can be ( Figure 14 The platform 1100 is raised or lowered, or increased or decreased, under the control of the controller 1900. For this purpose, the platform mover 1200 may include a motor as a power source for moving the platform 1100.

[0184] The support pin 1300 can be a pin that supports the mother substrate MSUB when the mother substrate MSUB is added to or removed from the device 1000. The support pin 1300 can be connected to the pin support member 1310 disposed below the stage 1100 through the stage hole 1100H of the stage 1100.

[0185] When the stage 1100 is lowered by the stage mover 1200, the support pin 1300 can protrude from the top surface of the stage 1100. When the stage 1100 is raised by the stage mover 1200, since the support pin 1300 is disposed in the stage hole 1100H of the stage 1100, the support pin 1300 does not need to protrude from the top surface of the stage 1100. Therefore, when the stage 1100 is raised by the stage mover 1200, the mother substrate MSUB can be placed on the top surface of the stage 1100.

[0186] A platform support 1110 may be disposed below the platform 1100 to support the platform 1100. A platform mover 1200 and a pin support 1310 may be disposed on the platform support 1110. The platform support 1110 may have... Figure 6 The various shapes shown are different.

[0187] The first voltage output module 1410 may be disposed on the first side of the stage 1100. The first voltage output module 1410 may be electrically connected to the first light illumination unit 1710 of the first electric field application module 1500 and the light illumination module 1700. The first voltage output module 1410 may receive a first alignment signal and a second alignment signal from the controller 1900, and may generate a first emission drive signal based on the second alignment signal. The first voltage output module 1410 may output the first alignment signal and the second alignment signal to the first electric field application module 1500 to align the light-emitting element 172 in the first display panel unit CEL1. The first voltage output module 1410 may output the first emission drive signal to the first light illumination unit 1710 to excite the active layer 172c of the light-emitting element 172 in the first display panel unit CEL1.

[0188] The second voltage output module 1420 can be disposed on the second side of the stage 1100. The second voltage output module 1420 can be electrically connected to the second electric field application module 1600 and the second light illumination unit 1720 of the light illumination module 1700. The second voltage output module 1420 can receive a first alignment signal and a second alignment signal from the controller 1900, and can generate a second emission drive signal based on the second alignment signal. The second voltage output module 1420 can output the first alignment signal and the second alignment signal to the second electric field application module 1600 to align the light-emitting element 172 in the second display panel unit CEL2. The second voltage output module 1420 can output the second emission drive signal to the second light illumination unit 1720 to excite the active layer 172c of the light-emitting element 172 in the second display panel unit CEL2.

[0189] The first electric field application module 1500 may be disposed on the first side of the stage 1100. Here, the first side of the stage 1100 may be the right side of the stage 1100. The first electric field application module 1500 may include a first probe head HBD1, a first probe pin PP1, a first body BD1, and a first connector CM1.

[0190] The first probe pin PP1 can be disposed on the bottom surface of each of the first probe heads HBD1. The first probe pin PP1 can be formed of a highly conductive material such as, for example, a metallic material. Figure 8 Each of the first probe heads HBD1 shown may include four first probe pins PP1, but this disclosure is not limited thereto.

[0191] The first body BD1 may extend in a second direction (or the Y-axis direction). The first probe head HBD1 may protrude from the second end of the first body BD1 in a first direction (or the X-axis direction). Here, the second end of the first body BD1 may be the left side of the first body BD1. One of the first probe heads HBD1 may protrude from the second end of the first body BD1 in the positive direction of the first direction (or the X-axis direction), and the other of the first probe heads HBD1 may protrude from the second end of the first body BD1 in the opposite direction of the first direction (or the X-axis direction). Figure 8 The first body BD1 and the first probe head HBD1 are shown as an integral part of each other, but as an example, the first body BD1 can be formed as a separate element from the first probe head HBD1.

[0192] The first connector CM1 may extend in a third direction (or the Z-axis direction). The first connector CM1 may protrude from the first end of the first body BD1 in the third direction (or the Z-axis direction). The first connector CM1 may be disposed on the bottom surface of the first body BD1. The first connector CM1 may be coupled to or connected to the first body BD1. The first connector CM1 may be coupled to or connected to the first module mover 1510 disposed on the second side of the first connector CM1. The first connector CM1 may be raised or lowered by the first module mover 1510.

[0193] The first module mover 1510 may be coupled to or connected to the first side of the platform 1100. The first module mover 1510 can be raised or lowered, or raised or lowered, under the control of the controller 1900, for example, the first module mover 1510 may include a motor as a power source for moving the first electric field application module 1500.

[0194] With the first module mover 1510 lowered, the first probe pin PP1 can contact the first display panel unit CEL1 connected to the mother substrate MSUB. Figure 10 The first aligned pad AP1 and ( Figure 10 The first alignment signal and the second alignment signal can be applied to the first display panel unit CEL1 of the mother substrate MSUB via the first probe pin PP1. Therefore, the light-emitting element 172 in the first display panel unit CEL1 can be aligned in each of the sub-pixels PX1, PX2, and PX3 in the first display panel unit CEL1. When the first module mover 1510 is raised, the first probe pin PP1 can be spaced apart from the first alignment pad AP1 and the second alignment pad AP2 of the mother substrate MSUB. (See later...) Figure 10 and Figure 11Describe the first alignment pad AP1 and the second alignment pad AP2 of the mother substrate MSUB.

[0195] The second electric field application module 1600 can be disposed on the second side of the stage 1100, for example, on the left side of the stage 1100. The second side of the stage 1100 can be opposite to the first side of the stage 1100. The first electric field application module 1500 and the second electric field application module 1600 can be disposed facing each other.

[0196] The second electric field application module 1600 may include a second probe head HBD2, a second probe pin PP2, a second body BD2, and a second connector CM2.

[0197] The second probe pin PP2 can be disposed on the bottom surface of each of the second probe heads HBD2. The second probe pin PP2 can be formed of a highly conductive material, such as, for example, a metallic material. Figure 8 Similar to the first probe pin PP1 shown, each of the second probe pins PP2 may include four second probe pins PP2, but this disclosure is not limited thereto.

[0198] The second body BD2 may extend in a second direction (or the Y-axis direction). The second probe head HBD2 may protrude from the first end of the second body BD2 in a first direction (or the X-axis direction). One of the second probe heads HBD2 may protrude from the first end of the second body BD2 in the positive direction of the first direction (or the X-axis direction), and the other of the second probe heads HBD2 may protrude from the first end of the second body BD2 in the opposite direction of the first direction (or the X-axis direction). The second body BD2 and the second probe head HBD2 may be integral with each other, but by way of example, the second body BD2 may be formed as a separate element from the second probe head HBD2.

[0199] The second connector CM2 may extend in a third direction (or the Z-axis direction). The second connector CM2 may protrude from the second end of the second body BD2 along the third direction (or the Z-axis direction). The second connector CM2 may be disposed on the bottom surface of the second body BD2. The second connector CM2 may be coupled to or connected to the second body BD2. The second connector CM2 may be coupled to or connected to the second module mover 1520 disposed on the first side of the second connector CM2. The second connector CM2 may be raised or lowered by the second module mover 1520.

[0200] The second module mover 1520 can be coupled to or connected to the second side of the platform 1100. The second module mover 1520 can be raised or lowered, or heightened or lowered, under the control of the controller 1900, for example, the second module mover 1520 may include a motor as a power source for moving the second electric field application module 1600.

[0201] With the second module mover 1520 lowered, the second probe pin PP2 can contact the second display panel unit CEL2 connected to the mother substrate MSUB. Figure 10 The third alignment pad AP3 and ( Figure 10 The fourth alignment pad AP4. The first and second alignment signals can be applied to the second display panel unit CEL2 of the mother substrate MSUB via the second probe pin PP2. Therefore, the light-emitting elements 172 in the second display panel unit CEL2 can be aligned in each of the sub-pixels PX1, PX2, and PX3 in the second display panel unit CEL2. With the second module mover 1520 raised, the second probe pin PP2 can be spaced apart from the third alignment pad AP3 and the fourth alignment pad AP4 of the mother substrate MSUB. (See later...) Figure 10 and Figure 11 Describe the third alignment pad AP3 and the fourth alignment pad AP4 of the mother substrate MSUB.

[0202] The light illumination module 1700 can be disposed above the top surface of the stage 1100. The light illumination module 1700 applies light to the top surface of the stage 1100. The light illumination module 1700 can be configured to cover or overlap the entire top surface of the stage 1100 or the entire top surface of the mother substrate MSUB. In one example, the size of the light illumination module 1700 can be larger than the size of the stage 1100 or the mother substrate MSUB. Furthermore, the length of the light illumination module 1700 in the first direction (or X-axis direction) and the second direction (or Y-axis direction) can be greater than the length of the stage 1100 in the first direction (or X-axis direction) and the second direction (or Y-axis direction). Additionally, the length of the light illumination module 1700 in the first direction (or X-axis direction) and the second direction (or Y-axis direction) can be greater than the length of the mother substrate MSUB in the first direction (or X-axis direction) and the second direction (or Y-axis direction).

[0203] The light illumination module 1700 may include thousands or tens of thousands of light-emitting diodes (LEDs). In one example, with the mother substrate MSUB having dimensions of approximately 2200 mm × approximately 2500 mm, the light illumination module 1700 may include approximately 50,000 LEDs.

[0204] refer to Figure 9The light irradiation module 1700 may include a first light irradiation unit 1710, a second light irradiation unit 1720, and a through hole 1700H.

[0205] The first light irradiation unit 1710 may overlap with the first display panel unit CEL1. The first light irradiation unit 1710 may apply light to the first display panel unit CEL1.

[0206] The second light irradiation unit 1720 can overlap with the second display panel unit CEL2. The second light irradiation unit 1720 can apply light to the second display panel unit CEL2.

[0207] The LED is not installed in the through hole 1700H. Figure 9 The light illumination module 1700 is shown to include a through-hole 1700H, but this disclosure is not limited thereto. As an example, the light illumination module 1700 may include multiple through-holes 1700H. Furthermore, Figure 9 The through hole 1700H is shown to be located at the center of the light irradiation module 1700, but the position of the through hole 1700H is not particularly restricted.

[0208] The light irradiation module 1700 can emit UV light or blue light. In one example, the light irradiation module 1700 can emit light with a wavelength of approximately 405 nm.

[0209] The active layer 172c of the light-emitting element 172 can be excited by UV light or blue light from the light irradiation module 1700. Since the first semiconductor layer 172a of the light-emitting element 172 is an n-type semiconductor and the second semiconductor layer 172b of the light-emitting element 172 is a p-type semiconductor, holes from the second semiconductor layer 172b, which is doped with a hole-rich p-type dopant, migrate to the first semiconductor layer 172a, which is doped with an electron-rich n-type dopant, and electrons from the first semiconductor layer 172a migrate to the second semiconductor layer 172b. Therefore, a permanent dipole moment can be generated in the direction from the second semiconductor layer 172b to the first semiconductor layer 172a. For example, the light-emitting element 172 can be defined as a particle that has polarity in its length direction when excited by UV light or blue light from the light irradiation module 1700.

[0210] Optical device 1800 can be disposed above the top surface of light illumination module 1700. Optical device 1800 can be a polarization camera device including a polarizing film. Optical device 1800 can be configured to overlap with through-hole 1700H of light illumination module 1700. Optical device 1800 can capture images of the mother substrate MSUB through through-hole 1700H.

[0211] Optical device 1800 can capture an image of light-emitting element 172 by emitting UV light. The wavelength of the UV light emitted by optical device 1800 can be shorter than the wavelength of UV light or blue light emitted by light irradiation module 1700. In one example, optical device 1800 can emit light with a wavelength of approximately 365 nm. In this example, when the active layer 172c of light-emitting element 172 is excited by UV light, the active layer 172c of light-emitting element 172 can be easily identified from the image captured by optical device 1800. Therefore, the alignment accuracy of light-emitting element 172 can be determined by determining the alignment pattern of the active layer 172c of light-emitting element 172.

[0212] Figure 10 yes Figure 6 A schematic layout diagram of the mother substrate. Figure 11 It is shown Figure 10 A schematic layout diagram of the first display panel unit, the first alignment pad, and the second alignment pad.

[0213] refer to Figure 10 and Figure 11 The mother substrate MSUB may include a first display panel unit CEL1, a second display panel unit CEL2, a first alignment pad AP1, a second alignment pad AP2, a third alignment pad AP3, and a fourth alignment pad AP4. Figure 10 The mother substrate MSUB is shown to include two display panel units, but this disclosure is not limited thereto.

[0214] The first display panel unit CEL1 and the second display panel unit CEL2 can be arranged adjacent to each other. The first display panel unit CEL1, the first alignment pad AP1, and the second alignment pad AP2 can be symmetrical with the second display panel unit CEL2, the third alignment pad AP3, and the fourth alignment pad AP4 in a second direction (or the Y-axis direction), respectively. In one example, the first alignment pad AP1 and the second alignment pad AP2 can be arranged on the first side of the first display panel unit CEL1, and the third alignment pad AP3 and the fourth alignment pad AP4 can be arranged on the second side of the second display panel unit CEL2.

[0215] refer to Figure 11 The first display panel unit CEL1 may include pixels PX, a scan driver SDC, scan lines SL, data lines DL, a first alignment line AL1, a second alignment line AL2, a first connection line FCL1, a second connection line FCL2, display pads DP, and scan pads SP. The scan driver SDC, scan lines SL, data lines DL, display pads DP, and scan pads SP are connected to... Figure 2 Their respective corresponding parts are basically the same, and therefore, their detailed descriptions will be omitted.

[0216] The first alignment line AL1 may include a first horizontal alignment line HAL1 and a first vertical alignment line VAL1. The first horizontal alignment line HAL1 may be... Figure 2 The first floating line FL1 is essentially the same. The first horizontal alignment line HAL1 can be connected to the first alignment pad AP1 via the first connecting line FCL1. The first vertical alignment line VAL1 can extend from the first horizontal alignment line HAL1 in the second direction (or the Y-axis direction). The first vertical alignment line VAL1 can be set in an array of sub-pixels PX1, PX2, and PX3 arranged or set in the second direction (or the Y-axis direction).

[0217] The second alignment line AL2 may include a second horizontal alignment line HAL2 and a second vertical alignment line VAL2. The second horizontal alignment line HAL2 may be... Figure 2 The second floating line FL2 is essentially the same. The second horizontal alignment line HAL2 can be connected to the second alignment pad AP2 via the second connecting line FCL2. The second vertical alignment line VAL2 can extend from the second horizontal alignment line HAL2 in the second direction (or the Y-axis direction). The second vertical alignment line VAL2 can be set in an array of sub-pixels PX1, PX2, and PX3 arranged or set in the second direction (or the Y-axis direction).

[0218] refer to Figure 11 The first alignment line AL1 can be connected to the first alignment pad AP1 via the first connection line FCL1, and the second alignment line AL2 can be connected to the second alignment pad AP2 via the second connection line FCL2. The first alignment line AL1 and the second alignment line AL2 can be electrically connected together to all sub-pixels PX1, PX2, and PX3 of the display panel 100. When a first alignment signal is applied to the first alignment line AL1 via the first probe pin PP1 and the first alignment pad AP1, and a second alignment signal is applied to the second alignment line AL2 via the first probe pin PP1 and the second alignment pad AP2, the light-emitting element 172 in each of the sub-pixels PX1, PX2, and PX3 of the display panel 100 can be aligned by the electric field formed by the first alignment signal from the first alignment line AL1 and the second alignment signal from the second alignment line AL2. When a dielectric force is applied to the light-emitting element 172, the second semiconductor layer 172b of the light-emitting element 172 can be placed close to the first alignment line AL1. For example, the light-emitting element 172 can be deflected, and the alignment accuracy of the light-emitting element 172 can be improved.

[0219] After applying the first alignment signal and the second alignment signal for aligning the light-emitting element 172, the first alignment line AL1 and the second alignment line AL2 can be disconnected. Therefore, the first alignment line AL1 and the second alignment line AL2 can be divided into... Figure 2The floating lines FL1 and FL2, connecting lines FCL1, FCL2, FCL3 and FCL4, first electrode 171 and second electrode 173. The first display panel unit CEL1 and the second display panel unit CEL2 can be cut and divided by a scribing process, and therefore, it is possible to obtain Figure 2 The display panel 100.

[0220] The second display panel unit CEL2 and Figure 11 The first display panel unit CEL1 is essentially the same, and therefore its detailed description will be omitted.

[0221] Figure 12 It is along Figure 7 A schematic cross-sectional view taken from line II-II'. Figure 13 yes Figure 12 An exploded perspective view of the sensor device.

[0222] refer to Figure 12 and Figure 13 The unit 1100 may include a sensor device 1120, a sensor connection cable LSC, a sensor slot 1100G, and a wire hole LH.

[0223] The sensor device 1120 may include a lower housing 1121, an upper housing 1122, a sensor circuit board 1123, a light detection sensor 1124, and a temperature sensor 1125.

[0224] The lower housing 1121 may include a storage slot 1121G for storing a sensor circuit board 1123 and a lower hole 1121H for which a sensor connection line LSC is provided.

[0225] The upper housing 1122 may include an upper hole 1122H on the top surface of the exposed light detection sensor 1124.

[0226] The lower housing 1121 and the upper housing 1122 can be secured by a fixing member. The fixing member can be an adhesive member, such as an adhesive or adhesive tape or a screw.

[0227] The sensor circuit board 1123 can be electrically connected to the sensor connection cable LSC. The sensor circuit board 1123 can be a printed circuit board (PCB).

[0228] The light detection sensor 1124 and the temperature sensor 1125 can be formed as integrated circuits (ICs) and can be mounted on the top surface of the sensor circuit board 1123. The light detection sensor 1124 can overlap with the upper aperture 1122H of the upper housing 1122. Therefore, the light detection sensor 1124 can generate a first sensor signal based on light incident on the light irradiation module 1700 through the upper aperture 1122H of the upper housing 1122. The temperature sensor 1125 can generate a second sensor signal based on the temperature of the stage 1100.

[0229] The sensor connection cable LSC can extend to the bottom surface of the stage 1100 through the lower hole 1121H. Therefore, the sensor connection cable LSC can electrically connect the sensor circuit board 1123 and ( Figure 14 The controller 1900. Therefore, the first sensor signal from the light detection sensor 1124 and the second sensor signal from the temperature sensor 1125 can be input to the controller 1900 via the sensor connection line LSC.

[0230] The sensor slot 1100G can be disposed on the top surface of the stage 1100 and can be a recess. The sensor slot 1100G can be a slot in which the sensor device 1120 can be stored.

[0231] The wire hole LH can be a hole that penetrates the stage 1100. The wire hole LH can be integrated with the sensor slot 1100G.

[0232] Figure 14 yes Figure 6 A block diagram of the device.

[0233] refer to Figure 14 The device 1000 may include a sensor device 1120, a platform mover 1200, a first voltage output module 1410, a second voltage output module 1420, a first electric field application module 1500, a first module mover 1510, a second electric field application module 1600, a second module mover 1520, a light irradiation module 1700, an optical device 1800, and a controller 1900.

[0234] The controller 1900 controls the operation of all components of the control device 1000. The controller 1900 can be electrically connected to the sensor device 1120, the stage mover 1200, the first voltage output module 1410, the second voltage output module 1420, the first electric field application module 1500, the first module mover 1510, the second electric field application module 1600, the second module mover 1520, the light illumination module 1700, and the optical device 1800.

[0235] The controller 1900 can receive a first sensor signal SS1 from the light detection sensor 1124 of the sensor device 1120 and a second sensor signal SS2 from the temperature sensor 1125 of the sensor device 1120. The first sensor signal SS1 can be light detection data generated based on light incident from the light illumination module 1700 onto the light detection sensor 1124. The second sensor signal SS2 can be temperature data generated based on the temperature of the stage 1100. The controller 1900 can determine the timing of light application to the light illumination module 1700 based on the first sensor signal SS1. The controller 1900 can detect the temperature of the stage 1100 based on the second sensor signal SS2.

[0236] The controller 1900 can output a station control signal SCS to the station mover 1200. The station mover 1200 can raise or lower the station 1100 according to the station control signal SCS. In one example, when the controller 1900 outputs a first-level station control signal SCS, the station mover 1200 can raise or lower the station 1100 by a certain height. Furthermore, in one example, when the controller 1900 outputs a second-level station control signal SCS, the station mover 1200 can lower or lower the station 1100 by a certain height.

[0237] The controller 1900 can output a first alignment signal AS1 and a second alignment signal AS2 to the first voltage output module 1410 and the second voltage output module 1420, respectively. The first alignment signal AS1 can be a ground voltage or a direct current (DC) voltage. The second alignment signal AS2 can be an alternating current (AC) voltage.

[0238] The first voltage output module 1410 can generate a first transmit drive signal LDS1 based on the second alignment signal AS2. In one example, the second alignment signal AS2 can repeatedly increase from a first low-level voltage to a first high-level voltage, and then decrease from the first high-level voltage to a first low-level voltage. In this example, the first voltage output module 1410 can generate a first transmit drive signal LDS1 having a second high-level voltage during the period when the second alignment signal AS2 switches from the first voltage to the second voltage and a second low-level voltage during other periods. (See later...) Figure 15 Describe the second alignment signal AS2 and the first transmit drive signal LDS1.

[0239] The second voltage output module 1420 can generate a second transmit drive signal LDS2 according to the second alignment signal AS2. In one example, the second voltage output module 1420 can generate a second transmit drive signal LDS2 that has a second high-level voltage during the period when the second alignment signal AS2 switches from a first voltage to a second voltage and has a second low-level voltage during other periods.

[0240] The first voltage output module 1410 can output the first alignment signal AS1 and the second alignment signal AS2 to the first electric field application module 1500. The first alignment signal AS1 can be applied to the first alignment pad AP1 of the mother substrate MSUB via the first probe pin PP1 of the first electric field application module 1500, and the second alignment signal AS2 can be applied to the second alignment pad AP2 of the mother substrate MSUB via the first probe pin PP1 of the first electric field application module 1500.

[0241] The second voltage output module 1420 can output the first alignment signal AS1 and the second alignment signal AS2 to the second electric field application module 1600. The first alignment signal AS1 can be applied to the third alignment pad AP3 of the mother substrate MSUB via the second probe pin PP2 of the second electric field application module 1600, and the second alignment signal AS2 can be applied to the fourth alignment pad AP4 of the mother substrate MSUB via the second probe pin PP2 of the second electric field application module 1600.

[0242] A first alignment signal AS1 can be applied to a first alignment line AL1 of the first display panel unit CEL1 and the second display panel unit CEL2, and a second alignment signal AS2 can be applied to a second alignment line AL2 of the first display panel unit CEL1 and the second display panel unit CEL2. Therefore, the light-emitting element 172 in each of the sub-pixels PX1, PX2 and PX3 of the display panel 100 can be aligned by the electric field formed by the first alignment signal AS1 from the first alignment line AL1 and the second alignment signal AS2 from the second alignment line AL2.

[0243] The first voltage output module 1410 can output the first transmission drive signal LDS1 to the first light illumination unit 1710. The LED of the first light illumination unit 1710 can emit light according to the first transmission drive signal LDS1.

[0244] The second voltage output module 1420 can output the second emission drive signal LDS2 to the second light illumination unit 1720. The LEDs of the second light illumination unit 1720 can emit light according to the second emission drive signal LDS2.

[0245] The controller 1900 can generate a third emission drive signal LDS3 and output the third emission drive signal LDS3 to the first light illumination unit 1710 and the second light illumination unit 1720. The LEDs in each of the first light illumination unit 1710 and the second light illumination unit 1720 can emit light according to the third emission drive signal LDS3.

[0246] The duty cycle of the third transmit drive signal LDS3 can be greater than the duty cycle of the first transmit drive signal LDS1 or the duty cycle of the second transmit drive signal LDS2.

[0247] The controller 1900 can output a first module movement signal MVS1 to the first module mover 1510 and a second module movement signal MVS2 to the second module mover 1520. The first module mover 1510 can raise or lower the first electric field applying module 1500 according to the first module movement signal MVS1. In one example, when the controller 1900 outputs a first-level first module movement signal MVS1, the first module mover 1510 can raise or lower the first electric field applying module 1500 by a certain height. Furthermore, in one example, when the controller 1900 outputs a second-level first module movement signal MVS1, the first module mover 1510 can lower or lower the first electric field applying module 1500 by a certain height.

[0248] The second module mover 1520 can raise or lower the second electric field applying module 1600 according to the second module movement signal MVS2. In one example, when the controller 1900 outputs the second module movement signal MVS2 at a first level, the second module mover 1520 can raise or lower the second electric field applying module 1600 by a certain height. Furthermore, in one example, when the controller 1900 outputs the second module movement signal MVS2 at a second level, the second module mover 1520 can lower or lower the second electric field applying module 1600 by a certain height.

[0249] The controller 1900 can receive optical image data IM from the optical device 1800. The optical image data IM can be an image of the light-emitting element 172 of each of the first display panel unit CEL1 and the second display panel unit CEL2 of the mother substrate MSUB, captured by the optical device 1800. The controller 1900 can determine the alignment accuracy of the light-emitting element 172 by determining the alignment pattern of the active layer 172c of the light-emitting element 172 based on the optical image data IM.

[0250] As described above, the device 1000 can apply a first alignment signal AS1 and a second alignment signal AS2 to the first alignment line AL1 and the second alignment line AL2 of each of the first display panel unit CEL1 and the second display panel unit CEL2 of the mother substrate MSUB via the first electric field application module 1500 and the second electric field application module 1600, respectively, and apply UV light or blue light to the first display panel unit CEL1 and the second display panel unit CEL2 via the light irradiation module 1700. When the active layer 172c of the light-emitting element 172 in each of the first display panel unit CEL1 and the second display panel unit CEL2 is excited by UV light or blue light from the light irradiation module 1700, a permanent dipole moment can be generated in the direction from the second semiconductor layer 172b of the light-emitting element 172 doped with p-type dopant to the first semiconductor layer 172a of the light-emitting element 172 doped with n-type dopant. Therefore, when a dielectric force is applied to the light-emitting element 172 through an electric field, the second semiconductor layer 172b of the light-emitting element 172 can be placed near the first alignment line AL1. For example, the light-emitting element 172 can be deflected, and the alignment accuracy of the light-emitting element 172 can be improved.

[0251] Figure 15 It is shown Figure 14 The waveforms of the second alignment signal and the first transmit drive signal.

[0252] refer to Figure 15 The second alignment signal AS2 can be repeatedly increased from the first low level voltage LV1 to the first high level voltage HV1, and then decreased from the first high level voltage HV1 back to the first low level voltage LV1.

[0253] In one example, the second alignment signal AS2 may have a sawtooth waveform. In this example, the period of the second alignment signal AS2 increasing from the first low-level voltage LV1 to the first high-level voltage HV1 may be shorter than the period of the second alignment signal AS2 decreasing from the first high-level voltage HV1 to the first low-level voltage LV1. In other words, the second alignment signal AS2 may suddenly increase from the first low-level voltage LV1 to the first high-level voltage HV1, and then gradually decrease from the first high-level voltage HV1 to the first low-level voltage LV1.

[0254] In another example, the second alignment signal AS2 may have a ramp waveform, such that the period of the second alignment signal AS2 increasing from the first low-level voltage LV1 to the first high-level voltage HV1 can be longer than the period of the second alignment signal AS2 decreasing from the first high-level voltage HV1 to the first low-level voltage LV1. In other words, the second alignment signal AS2 can gradually increase from the first low-level voltage LV1 to the first high-level voltage HV1, and then suddenly decrease from the first high-level voltage HV1 to the first low-level voltage LV1.

[0255] The waveform of the second alignment signal AS2 is not particularly restricted, and the second alignment signal AS2 can have various waveforms other than sawtooth waveforms and ramp waveforms.

[0256] The first transmit drive signal LDS1 may have a second high-level voltage HV2 during the period when the second alignment signal AS2 switches from the first level voltage V1 to the second level voltage V2, and may have a second low-level voltage LV2 during other periods. During the first period t1 when the first transmit drive signal LDS1 has the second high-level voltage HV2, the LED of the first light irradiation unit 1710 may be turned on, and during the second period t2 when the first transmit drive signal LDS1 has the second low-level voltage LV2, the LED of the first light irradiation unit 1710 may be turned off. Therefore, the first light irradiation unit 1710 may apply light to the first display panel unit CEL1 during the first period t1, but may not apply light to the first display panel unit CEL1 during the second period t2. For example, the first period t1 may be defined as the period during which the first light irradiation unit 1710 applies light.

[0257] The duty cycle of the first emission drive signal LDS1 can be in the range of about 1% to about 50%. If the duty cycle of the first emission drive signal LDS1 is less than about 1%, the light-emitting element 172 of the first display panel unit CEL1 may not be properly deflected. If the duty cycle of the first emission drive signal LDS1 is greater than about 50%, the solution including the light-emitting element 172 of the first display panel unit CEL1 may reach its boiling point due to the increase in temperature.

[0258] The first voltage level V1 and the second voltage level V2 may be lower than the first high voltage level HV1 and higher than the first low voltage level LV1. The second low voltage level LV2 may be lower than the first low voltage level LV1, and the second high voltage level HV2 may be higher than the first high voltage level HV1. However, this disclosure is not limited thereto.

[0259] If the first voltage level V1 is higher than the second voltage level V2, the first transmit drive signal LDS1 may have a second high voltage level HV2 during the period when the second alignment signal AS2 decreases from the first voltage level V1 to the second voltage level V2, and may have a second low voltage level LV2 during other periods. If the first voltage level V1 is lower than the second voltage level V2, the first transmit drive signal LDS1 may have a second high voltage level HV2 during the period when the second alignment signal AS2 increases from the first voltage level V1 to the second voltage level V2, and may have a second low voltage level LV2 during other periods.

[0260] The second alignment signal AS2, the first transmit drive signal LDS1, and the second transmit drive signal LDS2 may have a frequency of about 50 kHz, but this disclosure is not limited thereto.

[0261] like Figure 15 As shown, the first transmit drive signal LDS1 and the second transmit drive signal LDS2 can be generated based on the second alignment signal AS2, and therefore can be synchronized with the second alignment signal AS2.

[0262] Figure 16 This is a flowchart illustrating a method for manufacturing a display device according to an embodiment. Figures 17 to 24 It is used for explanation Figure 16 A schematic cross-sectional view of the display panel of the method. Figures 17 to 24 It is along Figure 3 A schematic cross-sectional view taken from line I-I'.

[0263] First, refer to Figure 16 and Figure 17 An inner dam 191, a first alignment line AL1, and a second alignment line AL2 are formed on the substrate SUB1 (S110).

[0264] For example, a barrier film BR is formed by depositing an inorganic material on a substrate SUB1.

[0265] Subsequently, a semiconductor layer comprising the active layer ACT (TFT ST), source electrode SE, and drain electrode DE is formed on the barrier film BR by photolithography. The semiconductor layer may include polycrystalline silicon, monocrystalline silicon, low-temperature polycrystalline silicon, amorphous silicon, or oxide semiconductor.

[0266] Subsequently, an inorganic material is deposited on the active layer ACT, source electrode SE, and drain electrode DE of the TFT ST to form a gate insulating film 130.

[0267] Subsequently, a first gate conductive layer, including the gate electrode GE of the TFT ST and the first capacitor electrode CAE1 of the capacitor CST, is formed on the gate insulating film 130 by photolithography.

[0268] Subsequently, using the gate electrode GE as a mask, the source electrode SE and drain electrode DE are doped with ions or impurities. Therefore, the source electrode SE and drain electrode DE can be conductive.

[0269] Subsequently, an inorganic material is deposited on the gate electrode GE and the first capacitor electrode CAE1 to form a first interlayer insulating film 141.

[0270] Subsequently, a second gate conductive layer, including the second capacitor electrode CAE2 of the capacitor CST, is formed on the first interlayer insulating film 141 by photolithography.

[0271] Subsequently, an inorganic material is deposited on the second capacitor electrode CAE2 to form a second interlayer insulating film 142.

[0272] Subsequently, a drain contact hole DCT exposing the drain electrode DE is formed by photolithography through the gate insulating film 130, the first interlayer insulating film 141, and the second interlayer insulating film 142.

[0273] Subsequently, a data conductive layer including the connection electrode ANDE and the first power line VL1 is formed on the second interlayer insulating film 142 by photolithography. The connection electrode ANDE can be electrically connected to the drain electrode DE through the drain contact hole DCT.

[0274] Subsequently, a planarization film 160 is formed by depositing organic material on the connecting electrode ANDE.

[0275] Subsequently, an internal embankment 191 was formed by depositing organic materials.

[0276] Subsequently, the pixel contact hole PCT exposing the ANDE electrode and the common contact hole CCT exposing the first electric field line VL1 are simultaneously formed by photolithography through the planarization film 160.

[0277] Subsequently, a first alignment line AL1 and a second alignment line AL2 are formed on the planarization film 160 by photolithography. The first alignment line AL1 can be electrically connected to the connection electrode ANDE through the pixel contact hole PCT. The second alignment line AL2 can be electrically connected to the first power line VL1 through the common contact hole CCT.

[0278] Subsequently, an inorganic material is deposited on the first electrode 171 and the second electrode 173 to form a first insulating film 181.

[0279] Subsequently, an outer embankment 192 is formed by depositing organic material on the first insulating film 181.

[0280] Subsequently, a portion of the first insulating film 181 is removed by photolithography to expose the first alignment line AL1 and the second alignment line AL2 in the second opening OA2. Furthermore, a first contact hole CTT1 exposing the first electrode 171 and a second contact hole CTT2 exposing the second electrode 173 are simultaneously formed by photolithography through the first insulating film 181.

[0281] Secondly, refer to Figure 16 and Figure 18 A solution SOL (S120) including the light-emitting element 172 is applied to the first alignment line AL1 and the second alignment line AL2.

[0282] The light-emitting elements 172 can be randomly distributed in the solution SOL. The solution SOL can be applied to the first alignment line AL1 and the second alignment line AL2 by inkjet printing, inkjet injection, slit mold coating or slit mold printing.

[0283] Third, refer to Figure 16 and Figure 19 The light-emitting element 172 is aligned by forming an electric field E between the first alignment line AL1 and the second alignment line AL2 (S130).

[0284] For example, the first alignment line AL1 can receive a first alignment voltage via the first alignment pad AP1, and the second alignment line AL2 can receive a second alignment voltage via the second alignment pad AP2. The first alignment voltage can be a ground voltage, and the second alignment voltage can be an AC voltage. Therefore, an electric field E can be formed between the first alignment line AL1 and the second alignment line AL2. When the light-emitting element 172 receives the dielectric force from the electric field E, the light-emitting element 172 can be aligned between the first alignment line AL1 and the second alignment line AL2.

[0285] Fourth, refer to Figure 16 and Figure 20 After aligning the light-emitting element 172 between the first alignment line AL1 and the second alignment line AL2, the solution SOL (S140) can be evaporated and removed.

[0286] The light-emitting element 172 can be aligned by forming an electric field E between adjacent first alignment lines AL1 and second alignment lines AL2, and the solution SOL can be dried. If the solution SOL is dried and evaporates unevenly, hydrodynamic forces can be generated in the solution SOL. The light-emitting element 172 can be moved by hydrodynamic forces. Therefore, the drying of the solution SOL can be performed while maintaining the alignment of the light-emitting element 172.

[0287] Subsequently, a second insulating film 182 is formed by depositing inorganic material on the first insulating film 181 and the light-emitting element 172. The light-emitting element 172 can be fixed by the second insulating film 182.

[0288] Subsequently, a portion of the second insulating film 182 is removed by photolithography to expose the first and second ends of the light-emitting element 172 in the first opening OA1, and to expose the first alignment line AL1 and the second alignment line AL2 in the second opening OA2.

[0289] Fifth, refer to Figure 16 and Figure 21 The first electrode 171 and the second electrode 173 are formed by disconnecting the first alignment line AL1 and the second alignment line AL2 respectively (S150).

[0290] For example, the first alignment line AL1 and the second alignment line AL2 can be disconnected by using the second insulating film 182 as a mask to etch away the portions of the first alignment line AL1 and the second alignment line AL2 exposed in the second opening OA2.

[0291] Sixth, Reference Figure 16 and Figure 22 A first contact electrode 174 (S160) is formed at the first end of the contact light-emitting element 172.

[0292] Subsequently, a first contact electrode 174 is formed on the first insulating film 181 by photolithography. The first contact electrode 174 can be electrically connected to the first electrode 171 through the first contact hole CTT1.

[0293] Subsequently, an inorganic material is deposited on the first contact electrode 174 to form a third insulating film 183.

[0294] Seventh, Reference Figure 16 and Figure 23 A second contact electrode 175 (S170) is formed at the second end of the contact light-emitting element 172.

[0295] For example, a second contact electrode 175 is formed on the first insulating film 181 by photolithography. The second contact electrode 175 can be electrically connected to the second electrode 173 through the second contact hole CTT2.

[0296] Eighth, Reference Figure 16 and Figure 24 A first wavelength conversion layer QDL, a second wavelength conversion layer, or a transparent insulating film are formed on the light-emitting element 172 (S180).

[0297] The first wavelength conversion layer (QDL) can be set in the first sub-pixel PX1, the second wavelength conversion layer can be set in the second sub-pixel PX2, and the transparent insulating film can be set in the third sub-pixel PX3.

[0298] Figure 25 This is a flowchart illustrating a method for aligning a light-emitting element according to an embodiment. Figures 26 to 29 It is used for explanation Figure 25 method Figure 6 A side view of the device. Reference will be made below. Figures 25 to 29 describe Figure 16 The S130.

[0299] refer to Figure 25 and Figure 26 The stage 1100 is preheated by applying light L via the light irradiation module 1700. The light irradiation module 1700 can apply light L until the stage 1100 is heated to a temperature in the range of about 50°C to about 70°C (S210).

[0300] If the temperature of stage 1100 is below approximately 50°C, the viscosity of the SOL solution can increase, and therefore, the flowability of the light-emitting element 172 can decrease. If the temperature of stage 1100 is above approximately 70°C, the SOL solution can reach its boiling point. Therefore, stage 1100 can be preheated to a temperature in the range of approximately 50°C to approximately 70°C.

[0301] Since the emission drive signal does not need to be synchronized with the first alignment signal AS1 and the second alignment signal AS2 during the preheating period of stage 1100, controller 1900 can generate a third emission drive signal LDS3 and output the third emission drive signal LDS3 to the first light illumination unit 1710 and the second light illumination unit 1720 of the light illumination module 1700. The LEDs in each of the first light illumination unit 1710 and the second light illumination unit 1720 can emit light L according to the third emission drive signal LDS3. To rapidly increase the temperature of stage 1100, the duty cycle of the third emission drive signal LDS3 can be greater than the duty cycle of the first emission drive signal LDS1 or the second emission drive signal LDS2. Controller 1900 can analyze the temperature data provided by temperature sensor 1125 of sensor device 1120, and if the temperature of stage 1100 is approximately 60°C, the third emission drive signal LDS3 may not be output.

[0302] Subsequently, refer to Figure 25 and Figure 27 The mother substrate (or other substrate) MSUB is added to the support pin 1300 or the mother substrate (or other substrate) MSUB is set on the support pin 1300, and the first electric field application module 1500 and the second electric field application module 1600 are lowered (S220).

[0303] The controller 1900 can use, for example, a robot to add the mother substrate MSUB to the support pin 1300. The controller 1900 can output a first module movement signal MVS1 of the second level to the first module mover 1510, and can output a second module movement signal MVS2 of the second level to the second module mover 1520. The first module mover 1510 can lower or lower the first electric field application module 1500 by a height according to the first module movement signal MVS1 of the second level, and the second module mover 1520 can lower or lower the second electric field application module 1600 by a height according to the second module movement signal MVS2 of the second level.

[0304] When the first electric field application module 1500 is lowered, the first probe pin PP1 can contact the first alignment pad AP1 and the second alignment pad AP2 of the mother substrate MSUB. Furthermore, when the second electric field application module 1600 is lowered, the second probe pin PP2 can contact the third alignment pad AP3 and the fourth alignment pad AP4 of the mother substrate MSUB.

[0305] Subsequently, refer to Figure 25 and Figure 28 The stage 1100 is raised so that the mother substrate MSUB can be placed on the top surface of the stage 1100 (S230).

[0306] The controller 1900 outputs a first-level stage control signal SCS to the stage mover 1200. The stage mover 1200 raises or elevates the stage 1100 by a certain height according to the first-level stage control signal SCS. The mother substrate MSUB can be placed on the top surface of the stage 1100.

[0307] Subsequently, refer to Figure 25 The first alignment signal AS1 and the second alignment signal AS2 are applied to the first alignment pad AP1, the second alignment pad AP2, the third alignment pad AP3 and the fourth alignment pad AP4 of the mother substrate MSUB by the first electric field application module 1500 and the second electric field application module 1600, and light is applied to the mother substrate MSUB by applying the first emission drive signal LDS1 and the second emission drive signal LDS2 to the light irradiation module 1700 (S240).

[0308] The controller 1900 can output a first alignment signal AS1 and a second alignment signal AS2 to a first voltage output module 1410 and a second voltage output module 1420, respectively. The first alignment signal AS1 can be a ground voltage or a DC voltage. The second alignment signal AS2 can be an AC voltage.

[0309] The first voltage output module 1410 can generate a first transmit drive signal LDS1 based on the second alignment signal AS2, and can output the first alignment signal AS1 and the second alignment signal AS2 to the first electric field application module 1500. The first alignment signal AS1 can be applied to the first alignment pad AP1 of the mother substrate MSUB via the first probe pin PP1 of the first electric field application module 1500, and the second alignment signal AS2 can be applied to the second alignment pad AP2 of the mother substrate MSUB via the first probe pin PP1 of the first electric field application module 1500.

[0310] The second voltage output module 1420 can generate a second transmit drive signal LDS2 based on the second alignment signal AS2, and can output the first alignment signal AS1 and the second alignment signal AS2 to the second electric field application module 1600. The first alignment signal AS1 can be applied to the third alignment pad AP3 of the mother substrate MSUB via the second probe pin PP2 of the second electric field application module 1600, and the second alignment signal AS2 can be applied to the fourth alignment pad AP4 of the mother substrate MSUB via the second probe pin PP2 of the second electric field application module 1600.

[0311] A first alignment signal AS1 can be applied to a first alignment line AL1 of each of the first display panel unit CEL1 and the second display panel unit CEL2, and a second alignment signal AS2 can be applied to a second alignment line AL2 of each of the first display panel unit CEL1 and the second display panel unit CEL2. Therefore, the light-emitting element 172 of each of the sub-pixels PX1, PX2 and PX3 of the display panel 100 can be aligned by the electric field formed by the first alignment signal AS1 from the first alignment line AL1 and the second alignment signal AS2 from the second alignment line AL2.

[0312] The first voltage output module 1410 can generate a first transmit drive signal LDS1 based on the second alignment signal AS2. In one example, the second alignment signal AS2 can repeatedly increase from a first low level voltage to a first high level voltage and decrease from a first high level voltage to a first low level voltage. In this example, the first voltage output module 1410 can generate a first transmit drive signal LDS1 that has a second high level voltage during the period when the second alignment signal AS2 switches from the first voltage to the second voltage and has a second low level voltage during other periods.

[0313] The second voltage output module 1420 can generate a second transmit drive signal LDS2 according to the second alignment signal AS2. In one example, the second voltage output module 1420 can generate a second transmit drive signal LDS2 that has a second high-level voltage during the period when the second alignment signal AS2 switches from a first voltage to a second voltage and has a second low-level voltage during other periods.

[0314] The LED of the first light illumination unit 1710 can emit light according to the first emission drive signal LDS1. The LED of the second light illumination unit 1720 can emit light according to the second emission drive signal LDS2. The first emission drive signal LDS1 and the second emission drive signal LDS2 are generated based on the second alignment signal AS2, and therefore can be synchronized with the second alignment signal AS2.

[0315] If the distance DIS between the light irradiation module 1700 and the mother substrate MSUB is less than about 10 mm or greater than about 50 mm, the uniformity of the light applied to the mother substrate MSUB can be reduced. Therefore, the distance DIS between the light irradiation module 1700 and the mother substrate MSUB can be in the range of about 10 mm to about 50 mm, or, as an example, the distance DIS is about 30 mm.

[0316] Subsequently, refer to Figure 25 and Figure 29 After applying the first alignment signal AS1 and the second alignment signal AS2, and applying the first transmission drive signal LDS1 and the second transmission drive signal LDS2, the first electric field application module 1500 and the second electric field application module 1600 are raised, the stage 1100 is lowered, and the mother substrate MSUB (S250) is removed from the device 1000.

[0317] The controller 1900 can output a first module movement signal MVS1 of a first level to the first module mover 1510 and a second module movement signal MVS2 of a first level to the second module mover 1520. The first module mover 1510 raises or elevates the first electric field application module 1500 by a height according to the first module movement signal MVS1 of the first level, and the second module mover 1520 raises or elevates the second electric field application module 1600 by a height according to the second module movement signal MVS2 of the first level.

[0318] Subsequently, the controller 1900 outputs a second-level stage control signal SCS to the stage mover 1200. The stage mover 1200 lowers or reduces the stage 1100 by a height according to the second-level stage control signal SCS. Therefore, the support pin 1300 of the mother substrate MSUB can protrude from the top surface of the stage 1100, and the mother substrate MSUB can be supported by the support pin 1300. The mother substrate MSUB can then be removed from the device 1000, for example, by a robot.

[0319] While embodiments have been described above, it is not to imply that these embodiments describe all possible forms or combinations thereof. Rather, the language used in this specification is descriptive rather than restrictive, and it should be understood that various changes may be made without departing from the spirit and scope of this disclosure. Features of various embodiments may be combined to form other embodiments.

Claims

1. An apparatus for manufacturing a display device, comprising: A platform for mounting a substrate, including a first light-emitting element; A first electric field application module includes a first probe pin and is disposed on a first side of the stage; A light illumination module, including a second light-emitting element, is disposed above the stage; as well as The first voltage output module outputs an emission drive signal to drive the second light-emitting element, outputs a first alignment signal to one of the first probe pins, and outputs a second alignment signal to the other of the first probe pins. The second light-emitting element emits ultraviolet or blue light to illuminate the first light-emitting element.

2. The apparatus according to claim 1, wherein, The first alignment signal of the first voltage output module is either ground voltage or DC voltage, and The second alignment signal of the first voltage output module is an AC voltage.

3. The apparatus according to claim 1, wherein, The second alignment signal of the first voltage output module increases from a first low level voltage to a first high level voltage, and decreases from the first high level voltage to the first low level voltage.

4. The apparatus according to claim 3, wherein, The transmit drive signal of the first voltage output module has a second high-level voltage during the period when the second alignment signal of the first voltage output module switches from a first level voltage to a second level voltage, and has a second low-level voltage that is lower than the second high-level voltage during other periods.

5. The apparatus according to claim 4, wherein, The first voltage level and the second voltage level are lower than the first high voltage level of the second alignment signal and higher than the first low voltage level of the second alignment signal.

6. The apparatus according to claim 3, wherein, The second alignment signal of the first voltage output module has a sawtooth waveform, such that the period of the second alignment signal increasing from the first low level voltage to the first high level voltage is shorter than the period of the second alignment signal of the first voltage output module decreasing from the first high level voltage to the first low level voltage.

7. The apparatus according to claim 3, wherein, The second alignment signal of the first voltage output module has a ramp waveform, such that the period of the second alignment signal of the first voltage output module increasing from the first low level voltage to the first high level voltage is longer than the period of the second alignment signal decreasing from the first high level voltage to the first low level voltage.

8. The apparatus according to claim 1, further comprising: The second electric field application module includes a second probe pin and is disposed on the second side of the stage; as well as The second voltage output module outputs the first alignment signal to one of the second probe pins and the second alignment signal to the other of the second probe pins.

9. The apparatus according to claim 8, wherein, The first voltage output module is disposed on the first side of the platform. The second voltage output module is disposed on the second side of the platform, and The first side of the platform is opposite to the second side of the platform.

10. The apparatus according to claim 1, further comprising: An optical device is disposed above the light irradiation module and overlaps with the through-hole of the light irradiation module.

11. The apparatus of claim 1, further comprising a sensor device, the sensor device comprising: A light detection sensor detects light from the light illumination module; as well as A temperature sensor detects the temperature of the platform.

12. The apparatus according to claim 11, wherein, The platform includes a sensor slot, into which the sensor device is inserted.

13. The apparatus according to claim 12, wherein, The platform includes a wire hole that penetrates the platform.

14. The apparatus of claim 13, further comprising: A sensor connection cable is electrically connected to the sensor device and is disposed in the cable hole.

15. The apparatus according to claim 1, further comprising: The first module mover raises or lowers the first electric field applying module; as well as A platform mover that raises or lowers the platform.

16. A method for manufacturing a display device, comprising: The substrate containing the light-emitting element is placed on a support pin that protrudes from the top surface of the stage; The first electric field application module is lowered so that the alignment pad of the substrate contacts the first probe pin of the first electric field application module, the first electric field application module being disposed on the first side of the stage; The substrate is placed on the stage by raising the stage; A first alignment signal is applied to the first alignment pad in the alignment pad through the first probe pin of the first electric field application module; A second alignment signal is applied to the second alignment pad in the alignment pad through the first probe pin of the first electric field application module; as well as The light-emitting element is illuminated by applying an emission drive signal to a light irradiation module positioned above the stage to apply ultraviolet or blue light to the substrate.

17. The method according to claim 16, wherein, The first alignment signal applied to the first alignment pad is a ground voltage or a DC voltage, and The second alignment signal applied to the second alignment pad is an AC voltage.

18. The method according to claim 17, wherein, The second alignment signal applied to the second alignment pad increases from a first low level voltage to a first high level voltage and decreases from the first high level voltage to the first low level voltage.

19. The method according to claim 18, wherein, The emission drive signal applied to the light irradiation module has a second high-level voltage during the period when the second alignment signal applied to the second alignment pad switches from a first level voltage to a second level voltage, and has a second low-level voltage lower than the second high-level voltage during other periods.

20. The method according to claim 19, wherein, The first voltage level and the second voltage level are lower than the first high voltage level and higher than the first low voltage level.

21. The method according to claim 20, wherein, The second alignment signal applied to the second alignment pad has a sawtooth waveform, such that the period of the second alignment signal applied to the second alignment pad increasing from the first low level voltage to the first high level voltage is shorter than the period of the second alignment signal applied to the second alignment pad decreasing from the first high level voltage to the first low level voltage.

22. The method according to claim 20, wherein, The second alignment signal applied to the second alignment pad has a ramp waveform such that the period of the second alignment signal applied to the second alignment pad increasing from the first low level voltage to the first high level voltage is longer than the period of the second alignment signal applied to the second alignment pad decreasing from the first high level voltage to the first low level voltage.

23. The method of claim 16, further comprising: Before the substrate is placed onto the support pin, light is applied to the stage to preheat the stage.

24. The method according to claim 23, wherein, The stage is preheated to a temperature in the range of 50°C to 70°C.

25. The method of claim 18, further comprising: Raise the first electric field application module; Lower the platform; as well as Remove the substrate.

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