Display substrate and preparation method thereof, and display device

Abstract

A display substrate and a preparation method thereof, and a display device, wherein the display substrate includes a first area and a second area, wherein the first area includes a light-emitting unit and a first conductive line structure connected thereto, and the second area includes a pixel driving circuit and a second conductive line structure connected thereto, the first conductive line structure is connected to the second conductive line structure, and the pixel driving circuit is connected to the light-emitting unit of the first area through the first and second conductive line structures, and the second area includes: a substrate, a first metal layer, a first flat layer, a second metal layer, a second flat layer and a second conductive line structure arranged on the substrate in sequence, the first flat layer is provided with a via hole, the second metal layer is electrically connected to the first metal layer through the via hole, the orthographic projection of the second conductive line structure on the substrate overlaps with the orthographic projection of the via hole on the substrate, and the second area also includes: an anti-breaking structure layer for protecting the second conductive line structure above the via hole.

Description

Technical Field

[0001] The embodiments of the present disclosure relate to but are not limited to display technology, and in particular to a display substrate and a method for preparing the same, and a display device. Background Art

[0002] After a long period of development, smartphone displays have gone through designs such as notch screens, water drop screens, holes, and grooves. These design types all require punching holes in the screen to place cameras, and therefore fail to meet users' strong desire for screen integrity. In order to better produce products that meet screen integrity, under-screen camera technology (Full Display with Camera, FDC) came into being. Studies have found that there is a dark spot problem in the area where the under-screen camera is located. Summary of the invention

[0003] The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.

[0004] The embodiments of the present disclosure provide a display substrate and a method for preparing the same, and a display device to avoid generation of dark spots.

[0005] The embodiment of the present disclosure provides a display substrate, including: the display substrate includes a first area and a second area, wherein the first area includes a light-emitting unit and a first conductive line structure connected to the light-emitting unit, the second area includes a pixel driving circuit and a second conductive line structure connected to the pixel driving circuit, the first conductive line structure is connected to the second conductive line structure, the pixel driving circuit is connected to the light-emitting unit of the first area through the first conductive line structure and the second conductive line structure, the second area includes: a substrate, a first metal layer, a first flat layer, a second metal layer, a second flat layer and a second conductive line structure arranged on the substrate in sequence, the first flat layer is provided with a via hole, the second metal layer is electrically connected to the first metal layer through the via hole, the orthographic projection of the second conductive line structure on the substrate overlaps with the orthographic projection of the via hole on the substrate, and the second area also includes: an anti-breaking structure layer for protecting the second conductive line structure above the via hole.

[0006] An embodiment of the present disclosure provides a display device, comprising the display substrate described in any embodiment.

[0007] An embodiment of the present disclosure provides a method for preparing a display substrate, wherein a base of the display substrate includes a first region and a second region, and the method includes:

[0008] Prepare a light-emitting unit and a first conductive line structure connected to the light-emitting unit in the first region, prepare a pixel driving circuit and a second conductive line structure connected to the pixel driving circuit in the second region, the first conductive line structure is connected to the second conductive line structure, and the pixel driving circuit is connected to the light-emitting unit in the first region through the first conductive line structure and the second conductive line structure;

[0009] When preparing the second area pixel driving circuit and the second conductive line structure connected to the pixel driving circuit, the preparation method includes:

[0010] A first metal layer and a first flat layer with a via hole are sequentially formed on a substrate, wherein the via hole exposes the first metal layer;

[0011] forming a second metal layer on a side of the first flat layer away from the substrate, wherein the second metal layer is connected to the first metal layer through a via hole;

[0012] A second flat layer and a second conductive line structure are sequentially formed on a side of the second metal layer away from the substrate, wherein an orthographic projection of the second conductive line structure on the substrate overlaps with an orthographic projection of the via hole on the substrate;

[0013] The preparation method further includes preparing an anti-breaking structure layer in the second area for protecting the second conductive line structure above the via hole.

[0014] The solution provided in this embodiment can protect the second conductive line structure above the via hole by providing an anti-breaking structure layer, and prevent the second conductive line structure from breaking due to overexposure of the photoresist during the preparation of the second conductive line structure.

[0015] Other features and advantages of the present invention will be described in the following description, and partly become apparent from the description, or understood by practicing the present invention. The purpose and other advantages of the present invention can be realized and obtained by the structures particularly pointed out in the description and the drawings.

[0016] Other aspects will be apparent upon reading and understanding the drawings and detailed description. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The accompanying drawings are used to provide a further understanding of the technical solution of the present disclosure and constitute a part of the specification. Together with the embodiments of the present disclosure, they are used to explain the technical solution of the present disclosure and do not constitute a limitation on the technical solution.

[0018] Figure 1 A schematic cross-sectional view of a display substrate provided by an embodiment;

[0019] Figure 2 A schematic diagram of a conductive wire structure provided by an embodiment;

[0020] Figure 3 A schematic diagram of the wiring of the under-screen camera area provided by an embodiment;

[0021] Figure 4 This is a schematic diagram of the disconnection of the under-screen camera area;

[0022] Figure 5 An overexposure schematic diagram provided for a technical solution;

[0023] Figure 6 An overexposed physical image provided for a technical solution;

[0024] Figure 7 A schematic diagram of a display substrate provided for an exemplary embodiment;

[0025] Figure 8 A schematic diagram of a display substrate provided for an exemplary embodiment;

[0026] Fig. 9 A schematic diagram of a display substrate provided for an exemplary embodiment;

[0027] Fig.10 A schematic diagram of a display substrate provided for an exemplary embodiment;

[0028] Fig.11 A schematic diagram of a display substrate provided for an exemplary embodiment;

[0029] Fig.12 A schematic diagram of a display substrate provided for an exemplary embodiment;

[0030] Fig.13 for Fig.12 A top view of the anti-breaking structure layer 44 shown in FIG.

[0031] Fig.14 A schematic diagram of a display substrate provided for an exemplary embodiment;

[0032] Fig.15 for Fig.14 FIG. 4 is a top view of the anti-breaking structure layer 45 shown in FIG. DETAILED DESCRIPTION

[0033] The embodiments of the present disclosure will be described in detail below in conjunction with the accompanying drawings. In the absence of conflict, the embodiments of the present disclosure and the features in the embodiments can be combined with each other arbitrarily.

[0034] The steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions. Also, although a logical sequence is shown in the flowchart, in some cases, the steps shown or described can be performed in a sequence different from that shown here.

[0035] Unless otherwise defined, technical or scientific terms used in the present disclosure should have the common meanings understood by one of ordinary skill in the art to which the present invention belongs.

[0036] In the drawings, the size of each component, the thickness of a layer, or the area is sometimes exaggerated for the sake of clarity. Therefore, the embodiments of the present disclosure are not necessarily limited to such dimensions, and the shapes and sizes of the components in the drawings do not reflect the true proportions. In addition, the drawings schematically show ideal examples, and the embodiments of the present disclosure are not limited to the shapes or values ​​shown in the drawings.

[0037] The ordinal numbers such as “first”, “second” and “third” in the present disclosure are provided to avoid confusion among constituent elements and do not indicate any order, quantity or importance.

[0038] In the present disclosure, for the sake of convenience, the words and phrases indicating the orientation or positional relationship, such as "middle", "upper", "lower", "front", "back", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., are used to illustrate the positional relationship of the constituent elements with reference to the drawings. This is only for the convenience of describing the present specification and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as a limitation of the present disclosure. The positional relationship of the constituent elements is appropriately changed according to the direction in which each constituent element is described. Therefore, it is not limited to the words and phrases described in the disclosure and can be appropriately replaced according to the circumstances.

[0039] In the present disclosure, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate, or the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present disclosure can be understood according to specific circumstances.

[0040] In the present disclosure, "electrical connection" includes the case where components are connected together through an element having some kind of electrical function. There is no particular limitation on the "element having some kind of electrical function" as long as it can transmit and receive electrical signals between the connected components. Examples of "element having some kind of electrical function" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements having various functions.

[0041] In the present disclosure, "parallel" means a state where the angle formed by two straight lines is greater than -10° and less than 10°, and therefore, also includes a state where the angle is greater than -5° and less than 5°. In addition, "perpendicular" means a state where the angle formed by two straight lines is greater than 80° and less than 100°, and therefore, also includes a state where the angle is greater than 85° and less than 95°.

[0042] In the present disclosure, "film" and "layer" may be interchanged. For example, "conductive layer" may be replaced with "conductive film" in some cases. Similarly, "insulating film" may be replaced with "insulating layer" in some cases.

[0043] Figure 1 FIG. 1 is a schematic diagram of a display substrate equipped with FDC provided by an embodiment. Figure 1 As shown, the display substrate provided in this embodiment includes a backplane (BP) and an evaporation packaging part (EVEN), the backplane may include a substrate 10, an active layer 11, a gate insulating layer 12, a gate electrode 13, a source-drain electrode layer 14 (including a source electrode and a drain electrode), a flat layer 15 and an anode 16 arranged in sequence, the evaporation packaging part may include a light-emitting layer 17, a cathode 18, a first packaging layer 19, a second packaging layer 20 and a third packaging layer 21 arranged in sequence, the anode 16, the light-emitting layer 17 and the cathode 18 constitute a light-emitting unit, and the active layer 11, the gate electrode 13, the source electrode and the drain electrode of the source-drain electrode layer 14 constitute a pixel driving circuit. The film layers that affect light transmittance in BP (such as the active layer 11, the gate insulating layer 12, the gate electrode 13 and the source-drain electrode layer 14) are moved out of the camera area, that is, the pixel driving circuit of the pixel is moved out of the camera area under the screen, for example, it can be moved to the frame area (but not limited to this, it can be moved to the display area), and then the pixel driving circuit is connected to the corresponding anode (Anode) and other film layers through the conductive wire structure 22, which greatly improves the light transmittance of the FDC area on the panel (Panel).

[0044] Since a large number of wirings are introduced, additional multi-layer flat layer films (for example, the third flat layer PLN3 / the fourth flat layer PLN4 / the fifth flat layer PLN5) can be added to shunt the wirings (for example, shunt to the first conductive wire layer ITO1 / the second conductive wire layer ITO2 / the third conductive wire layer ITO3), thereby reducing the risk of short circuits caused by dense wirings. Figure 2 and Figure 3 In this embodiment, an indium tin oxide (ITO) wiring is used as an example for description, but the disclosed embodiment is not limited thereto, and may be other transparent conductive wirings, such as indium zinc oxide (IZO) and the like.

[0045] like Figure 2As shown, the source-drain electrode layer 14 may include a first source-drain electrode layer 23 (which may include a source electrode and a drain electrode) and a second source-drain electrode layer 26, and a first insulating layer 24 and a first flat layer 25 (i.e., PLN1) may be sequentially arranged between the first source-drain electrode layer 23 and the second source-drain electrode layer 26, and a second flat layer 27 (i.e., PLN2) is arranged on the side of the second source-drain electrode layer 26 away from the substrate 10. The conductive wire structure 22 may include a first conductive wire layer 28 (i.e., ITO1), a second conductive wire layer 30 (i.e., ITO2), and a third conductive wire layer 32 (i.e., ITO3) arranged in sequence, a third flat layer 29 (i.e., PLN3) is arranged between the first conductive wire layer 28 and the second conductive wire layer 30, a fourth flat layer 31 (i.e., PLN4) is arranged between the second conductive wire layer 30 and the third conductive wire layer 32, a fifth flat layer 33 (i.e., PLN5) is arranged on the side of the third conductive wire layer 32 away from the substrate 10, and an anode 16 ( Figure 2 2. The conductive wire structure 22 includes three conductive wire layers. The embodiments of the present disclosure are not limited thereto. The conductive wire structure 22 may include more or fewer conductive wire layers. The first insulating layer 24 and the first planar layer 25 are provided with vias, and the first source-drain electrode layer 23 and the second source-drain electrode layer 26 are connected through the vias. The third planar layer 29, the fourth planar layer 31, and the fifth planar layer 33 are provided with vias ( Figure 2 (not shown in the figure), the wiring of the first conductive wire layer 28, the second conductive wire layer 30, and the third conductive wire layer 32 can be directly connected to the anode 16, or connected to the anode 16 through the wiring of one or more other conductive wire layers. For example, the wiring of the first conductive wire layer 28 is connected to the wiring of the second conductive wire layer 30, the wiring of the second conductive wire layer 30 is connected to the wiring of the third conductive wire layer 32, and the wiring of the third conductive wire layer 32 is then connected to the anode 16.

[0046] Figure 3 A schematic diagram of the wiring of the first area (the FDC area in this example) and the second area (the AA area in this example, and the border area in other examples) provided for an exemplary embodiment. Figure 3As shown, the first area 100 is divided into two sub-areas symmetrical with respect to the symmetry axis P, and the routing of one of the sub-areas is used as an example for explanation, and the other sub-area is similar and will not be described in detail. In this embodiment, the first area 100 includes 42 rows * 88 columns of pixels, and the sub-area located on the right side of the symmetry axis P is divided into areas 101, 102, 103, and 104 close to the symmetry axis P, and areas 105, 106, and 107 away from the symmetry axis P, wherein area 101 includes 9 rows * 5 columns of pixels, area 102 includes 12 rows * 5 columns of pixels, area 103 includes 12 rows * 5 columns of pixels, area 104 includes 9 rows * 5 columns of pixels, area 105 includes 42 rows * 13 columns of pixels, area 106 includes 42 rows * 13 columns of pixels, and area 107 includes 42 rows * 13 columns of pixels, and the pixels of the first area 100 include light-emitting units. The pixel driving circuit 50 of the pixels of the first area 100 is arranged in the display area (AA area) outside the first area. The pixel driving circuit 50 is connected to the light-emitting units of the pixels in the first area 100 through the wiring of the conductive line structure 22, wherein the pixels in area 101 are connected to the pixel driving circuit 50 through the wiring located in the first conductive line layer 28 (ITO1), the second conductive line layer 30 (ITO2) and the third conductive line layer 32 (ITO3), the pixels in area 102 and area 103 are connected to the pixel driving circuit 50 through the wiring located in the first conductive line layer 28 (ITO1), the pixels in area 104 are connected to the pixel driving circuit 50 through the wiring of the third conductive line layer 32 (ITO3), the pixels in area 105 are connected to the pixel driving circuit 50 through the wiring of the second conductive line layer 30 (ITO2), the pixels in area 106 are connected to the pixel driving circuit 50 through the wiring of the third conductive line layer 32 (ITO3), and the pixels in area 107 are connected to the pixel driving circuit 50 through the wiring of the first conductive line layer 28 (ITO1). The connection between the pixel driving circuit 50 and the pixel is only an example, and other connection methods may be used, which is not limited in the embodiments of the present disclosure. In addition, the pixel driving circuit 50 may not be arranged in the display area outside the first area 100, but may be arranged in the frame area, or partially arranged in the frame area and partially arranged in the display area outside the first area 100, and so on. Figure 3 The number of pixels of the first region 100 and the shape and size of the first region 100 shown are only examples, and other shapes may be possible, and the first region 100 may include more or fewer pixels.

[0047] The applicant found that a large number of conductive wires at positions corresponding to the via holes in the first planar layer 25 (positions corresponding to the overlap of the orthographic projection of the conductive wires and the orthographic projection of the via holes in the first planar layer 25) were broken to varying degrees, resulting in a high incidence of dark spots in the FDC area, such as Figure 4As shown. The reason for the dark spots is that the photoresist (PhotoResist, PR) above the PLN1 via is "overexposed" after the exposure, resulting in the conductive line having no PR protection in the subsequent process, resulting in a broken line. The second source-drain electrode layer 26, such as a titanium-aluminum-titanium (Ti / Al / Ti) structure, is used as an example to explain the cause of overexposure. The cross-sectional shape of the via shows a "bowl shape" with a "concave mirror" feature. During the exposure process, when the light reaches the second source-drain electrode layer 26 (i.e., SD2) film layer from the second flat layer 27, the Ti on the surface of the second source-drain electrode layer 26 is a metal with a high refractive index of about 2.4; the second flat layer 27 (PLN2) is usually a resin glue, etc., with high transmittance and a refractive index of about 1.5. The refractive index of Ti (2.4) and the refractive index of the second flat layer 27 (1.5) are very different, and light will be strongly reflected at the interface between the two. The second source-drain electrode layer 26 transfers the "groove" pattern (i.e., the pattern covering the via holes penetrating the first insulating layer 24 and the first flat layer 25) to converge the reflected light, which eventually leads to overexposure of the PR glue 34, so that the first conductive line layer 28 cannot be protected by the PR glue in the subsequent process, resulting in erroneous engraving and disconnection. Figure 5 and Figure 6 shown.

[0048] To this end, the present disclosure provides a display substrate, including a first area and a second area, wherein the first area includes a light-emitting unit and a first conductive line structure connected to the light-emitting unit, the second area includes a pixel driving circuit and a second conductive line structure connected to the pixel driving circuit, the first conductive line structure is connected to the second conductive line structure, and the pixel driving circuit is connected to the light-emitting unit of the first area through the first conductive line structure and the second conductive line structure, the second area includes: a substrate, a first metal layer, a first flat layer, a second metal layer, a second flat layer, a third metal layer and a second conductive line structure arranged in sequence above the substrate, the first flat layer is provided with a via, the second metal layer is electrically connected to the first metal layer through the via, the orthographic projection of the second conductive line structure on the substrate overlaps with the orthographic projection of the via on the substrate, and the second area also includes: an anti-breaking structure layer for protecting the second conductive line structure above the via.

[0049] By providing the anti-breaking structure layer, the second conductive line structure above the via hole can be protected to prevent the second conductive line structure from breaking due to overexposure of the photoresist during the preparation of the second conductive line structure.

[0050] In an exemplary embodiment, the anti-breaking structure layer may be located on a side of the first metal layer close to the substrate, and the orthographic projection of the first metal layer on the substrate overlaps with the orthographic projection of the via on the substrate. In the direction perpendicular to the substrate, the distance from the surface of the anti-breaking structure layer away from the first metal layer to the surface close to the first metal layer is within a preset thickness value range. In this embodiment, by setting an anti-breaking structure layer at a position corresponding to the via under the first metal layer (close to the substrate), the contact surface between the first metal layer and the second metal layer is away from the surface of the first metal layer (that is, the surface of the first metal layer away from the substrate), and the slope angle of the original groove of the second metal layer is changed. When performing the photolithography process, light is prevented from converging on the PR on the side of the first conductive wire layer above the via away from the substrate, thereby avoiding overexposure of the PR, so that the PR can protect the first conductive wire structure in the subsequent preparation process. The specific structure can be seen Figure 7 The embodiment described.

[0051] Optionally, the anti-breaking structure layer may include a protruding layer ( Figure 7 41) and an insulating layer ( Figure 7 42), the orthographic projection of the raised layer on the substrate is within the range of the orthographic projection of the via on the substrate, and the orthographic projection of the raised layer on the substrate is within the range of the orthographic projection of the insulating layer on the substrate. In an exemplary embodiment, the raised block may be a metal material, and the insulating layer is used to isolate the raised block from the first metal layer. In other embodiments, an insulating raised block may be provided as an anti-disconnection structure, or when preparing the first metal layer, a raised block is first prepared using the first metal layer material as an anti-disconnection structure, and then the first metal layer is prepared as a source-drain electrode layer. The thickness of the anti-disconnection structure layer ranges from 0.3 to 0.42 microns.

[0052] In an exemplary embodiment, the anti-breaking structure layer may be located on the side of the second metal layer away from the substrate, and the material of the anti-breaking structure layer is a metal material, and the roughness of the metal material is higher than a preset roughness (at least higher than the roughness of the titanium material). By adopting a metal material with a higher roughness, the metallic gloss on the surface of the anti-breaking structure layer can be reduced. The total reflection irradiated to the surface of the first metal layer in the original technology becomes diffuse reflection irradiated to the surface of the anti-breaking structure layer after the anti-breaking structure layer is added. When performing the photolithography process, it prevents the light from converging to the PR above the first conductive wire after total reflection, protects the PR from being overexposed, and further protects the first conductive wire, avoiding the first conductive wire from being broken due to overexposure of the PR when preparing the second conductive wire structure. In addition, since the anti-breaking structure layer is prepared by metal material, there is no need to increase the process. After preparing the first metal layer, the anti-breaking structure layer can be prepared by simply changing the material. The process is simple and the production cost is low. The specific structure can be seen Figure 8 The embodiment described.

[0053] In an exemplary embodiment, the second metal layer is a composite layer structure, including at least two layers, wherein the layer away from the substrate is the anti-breaking structure layer, the anti-breaking structure layer is a metal material, and the roughness of the metal material is higher than the preset roughness (at least higher than the roughness of the titanium material). Similarly, in this embodiment, by using a material with a higher roughness, the metallic gloss on the surface of the anti-breaking structure layer is reduced, and when performing the photolithography process, the light is prevented from converging to the PR above the first conductive wire after total reflection, thereby protecting the PR from being overexposed, thereby protecting the first conductive wire and preventing the first conductive wire from being broken due to overexposure of the PR when preparing the second conductive wire structure. In addition, since the anti-breaking structure layer is prepared by metal material, there is no need to increase the process. After preparing the first metal layer, the anti-breaking structure layer can be prepared by simply changing the material. The process is simple and the production cost is low. The specific structure can be seen Fig. 9 The embodiment described.

[0054] In an exemplary embodiment, the anti-breaking structure layer may include a first sub-anti-breaking structure layer and a second sub-anti-breaking structure layer, wherein the first sub-anti-breaking structure layer is located on a side of the first metal layer close to the substrate, and the orthographic projection of the first metal layer on the substrate overlaps with the orthographic projection of the via on the substrate, and in a direction perpendicular to the substrate, the distance from the surface of the anti-breaking structure layer away from the first metal layer to the surface close to the first metal layer is within a preset thickness value range; the second sub-anti-breaking structure layer is located on a side of the second metal layer away from the substrate, and the second sub-anti-breaking structure layer is a metal material, and the roughness of the metal material is higher than the preset roughness. This embodiment changes the slope angle of the second metal layer and adds a protective layer on the second metal layer to avoid PR overexposure above the first conductive line above the via, thereby protecting the first conductive line. The specific structure can be seen Fig.10 The embodiment described.

[0055] In an exemplary embodiment, the anti-breaking structure layer may include a first sub-anti-breaking structure layer and a second sub-anti-breaking structure layer, wherein the first sub-anti-breaking structure layer is on the side of the first metal layer close to the substrate, and the orthographic projection of the first metal layer on the substrate overlaps with the orthographic projection of the via on the substrate, and in the direction perpendicular to the substrate, the distance from the surface of the anti-breaking structure layer away from the first metal layer to the surface close to the first metal layer is within a preset thickness value range; the second metal layer is a composite layer structure, including at least two layers, wherein the layer away from the substrate is the second sub-anti-breaking structure layer, and the second sub-anti-breaking structure layer is a metal material, and the roughness of the metal material is higher than the preset roughness. This embodiment avoids PR overexposure above the first conductive line above the via by changing the slope angle of the second metal layer and changing the material of the sub-structure layer on the side of the second metal layer away from the substrate, thereby protecting the first conductive line. The specific structure can be seen Fig.11 The embodiment described.

[0056] In an exemplary embodiment, the second conductive line structure includes a first conductive line, the anti-breaking structure layer is located on a side of the first conductive line away from the substrate, and the orthographic projection of the via on the substrate is within the orthographic projection range of the anti-breaking structure layer on the substrate. In this embodiment, the anti-breaking structure layer provided in the second conductive line structure prevents the first conductive line from being mistakenly engraved by shielding.

[0057] Optionally, the transmittance of the anti-breaking structural layer material is lower than the preset transmittance. In the direction parallel to the substrate, the anti-breaking structural layer can be circular, and the radius of the anti-breaking structural layer is n times the radius of the positive projection of the via on the substrate, where n is a positive integer, for example, n=3. The thickness range of the anti-breaking structural layer can be 100 to 300 angstroms. In this example, a low-transmittance anti-breaking structural layer is set above the first conductive line (i.e., on the side away from the substrate) as a shield, so that during the photolithography process, when exposure occurs, the reflected light reflected by the second metal layer will be hindered by the anti-breaking structural layer during the reflection process, so that it can no longer be focused, that is, it cannot penetrate the anti-breaking structural layer to irradiate the PR above the first conductive line, thereby protecting the PR from being overexposed and preventing the line from breaking. In other embodiments, on a plane parallel to the substrate, the anti-breaking structural layer can also be other shapes, such as polygons such as squares and rectangles.

[0058] Optionally, in a direction parallel to the substrate, the anti-breaking structural layer is in the shape of a strip, the extension direction of the strip anti-breaking structural layer is the same as the extension direction of the first conductive line, the orthographic projection of the anti-breaking structural layer on the substrate is within the range of the orthographic projection of the first conductive line on the substrate, the length of the anti-breaking structural layer is greater than or equal to the diameter of the via, and the width of the anti-breaking structural layer is the same as the width of the first conductive line, or greater than the width of the first conductive line. In this example, a strip anti-breaking structural layer is provided above the first conductive line (i.e., on the side away from the substrate) as a shield, so that during the photolithography process, after the PR glue is exposed, the anti-breaking structural layer serves as a shielding protection layer for the first conductive line, and even if PR overexposure occurs, only the anti-breaking structural layer is affected during overexposure, directly protecting the first conductive line from being mistakenly broken. The thickness of the anti-breaking structural layer can be, for example, 300 to 500 angstroms.

[0059] In an exemplary embodiment, the first metal layer is, for example, a first source-drain electrode layer, and the second metal layer is, for example, a second source-drain electrode layer.

[0060] In an exemplary embodiment, the first area is, for example, an area where the under-screen camera is located, and the second area may be an area outside the first area.

[0061] The embodiments of the present disclosure are introduced below in conjunction with the accompanying drawings.

[0062] like Figure 7As shown, in an exemplary embodiment, the display substrate includes: a protruding layer 41 arranged on a substrate 10 (not shown in the figure), an insulating layer 42 arranged on a side of the protruding layer 41 away from the substrate 10, a first source-drain electrode layer 23 arranged on a side of the insulating layer 42 away from the substrate 10, a first insulating layer 24 arranged on a side of the first source-drain electrode layer 23 away from the substrate 10, a first flat layer 25 arranged on a side of the first insulating layer 24 away from the substrate 10, a second source-drain electrode layer 26 arranged on a side of the first flat layer 25 away from the substrate, a second flat layer 27 arranged on a side of the second source-drain electrode layer 26 away from the substrate 10, and a first conductive line layer 28, a third flat layer 29, a second conductive line layer 30, a fourth flat layer 31, a third conductive line layer 32 and a fifth flat layer 33 arranged in sequence on a side of the second flat layer 27 away from the substrate 10. The first insulating layer 24 and the first flat layer 25 are provided with vias, the second source-drain electrode layer 26 is electrically connected to the first source-drain electrode layer 23 through the vias, and the orthographic projection of the raised layer 41 on the substrate 10 overlaps with the orthographic projection of the via on the substrate 10, for example, the orthographic projection of the raised layer 41 on the substrate 10 is within the orthographic projection range of the via on the substrate 10, and the orthographic projection of the raised layer 41 on the substrate 10 is within the orthographic projection range of the insulating layer 42 on the substrate 10. In this embodiment, although total reflection is still performed when light is irradiated on the surface of the second source-drain electrode layer, the slope angle of the second source-drain electrode layer 26 can be reduced by providing the raised layer, and the convergence of reflected light at the second source-drain electrode layer 26 can be reduced, so that the first conductive line can be prevented from being broken due to overexposure of the PR above the via.

[0063] In an exemplary embodiment, the total thickness of the protrusion layer and the insulating layer, i.e., the overall thickness of the anti-disconnection structure layer, can be about 0.3-0.42 microns. The protrusion layer material can be any material for preparing a metal layer, and the insulating layer 42 can be an inorganic layer. In other embodiments, a single-layer protrusion block can be provided to raise the first source-drain electrode layer 23 at the via hole, thereby changing the slope angle of the second source-drain electrode layer 26 to prevent light from converging.

[0064] like Figure 8As shown, in an exemplary embodiment, the display substrate includes: a first source-drain electrode layer 23 disposed on a substrate 10 (not shown in the figure), a first insulating layer 24 disposed on a side of the first source-drain electrode layer 23 away from the substrate 10, a first flat layer 25 disposed on a side of the first insulating layer 24 away from the substrate 10, a second source-drain electrode layer 26 disposed on a side of the first flat layer 25 away from the substrate, a disconnection prevention structure layer 43 disposed on a side of the second source-drain electrode layer 26 away from the substrate 10, a second flat layer 27 disposed on a side of the disconnection prevention structure layer 43 away from the substrate 10, and a first conductive line layer 28, a third flat layer 29, a second conductive line layer 30, a fourth flat layer 31, a third conductive line layer 32 and a fifth flat layer 33 disposed sequentially on a side of the second flat layer 27 away from the substrate 10. The first insulating layer 24 and the first flat layer 25 are provided with vias, and the second source-drain electrode layer 26 is electrically connected to the first source-drain electrode layer 23 through the vias.

[0065] In this embodiment, the anti-disconnection structure layer can be made of a metal material with a relatively high roughness, for example, molybdenum (Mo) is used to make the anti-disconnection structure layer.

[0066] In an exemplary embodiment, the thickness of the anti-breaking structure layer may be in the range of 50-100 angstroms.

[0067] In this embodiment, since a material with a relatively high roughness is used to prepare an anti-disconnection structure layer on the second source-drain electrode layer 26, diffuse reflection occurs when light is irradiated on the anti-disconnection structure layer, thereby preventing the reflected light from converging at the second source-drain electrode layer 26, thereby preventing the first conductive line from being disconnected due to overexposure of the PR above the via.

[0068] Fig. 9The display substrate provided by another exemplary embodiment of the present disclosure is shown, comprising: a first source-drain electrode layer 23 disposed on a substrate 10 (not shown in the figure), a first insulating layer 24 disposed on a side of the first source-drain electrode layer 23 away from the substrate 10, a first planar layer 25 disposed on a side of the first insulating layer 24 away from the substrate 10, a second source-drain electrode layer 26 disposed on a side of the first planar layer 25 away from the substrate, a second planar layer 27 disposed on a side of the second source-drain electrode layer 26 away from the substrate 10, and a first conductive line layer 28, a third planar layer 29, a second conductive line layer 30, a fourth planar layer 31, a third conductive line layer 32 and a fifth planar layer 33 disposed sequentially on a side of the second planar layer 27 away from the substrate 10. The first insulating layer 24 and the first planar layer 25 are provided with vias, and the second source-drain electrode layer 26 is electrically connected to the first source-drain electrode layer 23 through the vias. In this embodiment, the second source-drain electrode layer 26 is a three-layer composite structure, which includes a first structure layer, a second structure layer and a third structure layer (anti-disconnection structure layer) from the direction close to the substrate to the direction away from the substrate. The first structure layer is titanium (Ti) material, the second structure layer is aluminum (Al) material, and the third structure layer, i.e., the anti-disconnection structure layer, is molybdenum (Mo) material. Since the surface roughness of the molybdenum material layer is relatively high, when light is irradiated on the material layer, diffuse reflection is generated, thereby preventing the reflected light from converging at the second source-drain electrode layer 26, thereby preventing the first conductive line from being disconnected due to overexposure of the PR above the via.

[0069] In an exemplary embodiment, the thickness of the third structure layer may be in the range of 50-100 angstroms.

[0070] In other embodiments, the second source-drain electrode layer 26 may be a double-layer composite structure or a four-layer composite structure, as long as the material of the structural layer away from the substrate is made of a material with a roughness higher than a preset roughness.

[0071] Fig.10 FIG. 1 is a display substrate provided by another exemplary embodiment of the present disclosure. Figure 7 and Figure 8The illustrated embodiment is similar, and includes a raised layer 41 arranged on a substrate 10 (not shown in the figure), an insulating layer 42 arranged on a side of the raised layer 41 away from the substrate 10 (the raised layer 41 and the insulating layer 42 together constitute a first sub-anti-breaking structure layer), a first source-drain electrode layer 23 arranged on a side of the insulating layer 42 away from the substrate 10, a first insulating layer 24 arranged on a side of the first source-drain electrode layer 23 away from the substrate 10, a first flat layer 25 arranged on a side of the first insulating layer 24 away from the substrate 10, a second source-drain electrode layer 26 arranged on a side of the first flat layer 25 away from the substrate, a second sub-anti-breaking structure layer 43 arranged on a side of the second source-drain electrode layer 26 away from the substrate 10, a second flat layer 27 arranged on a side of the second sub-anti-breaking structure layer 43 away from the substrate 10, and a first conductive wire layer 28, a third flat layer 29, a second conductive wire layer 30, a fourth flat layer 31, a third conductive wire layer 32 and a fifth flat layer 33 arranged in sequence on the side of the second flat layer 27 away from the substrate 10. The first insulating layer 24 and the first flat layer 25 are provided with vias, the second source-drain electrode layer 26 is electrically connected to the first source-drain electrode layer 23 through the vias, and the orthographic projection of the protruding layer 41 on the substrate 10 overlaps with the orthographic projection of the via on the substrate 10, for example, the orthographic projection of the protruding layer 41 on the substrate 10 is within the orthographic projection range of the via on the substrate 10, and the orthographic projection of the protruding layer 41 on the substrate 10 is within the orthographic projection range of the insulating layer 42 on the substrate 10. The second sub-anti-disconnection structure layer is made of a material with a roughness higher than a preset roughness, for example, a molybdenum material.

[0072] In this embodiment, by reducing the slope angle of the second source-drain electrode layer and adding a second sub-anti-disconnection structure layer, the reflected light convergence at the second source-drain electrode layer 26 is reduced, thereby preventing the first conductive line from being disconnected due to overexposure of the PR above the via hole.

[0073] Fig.11 FIG. 1 is a display substrate provided by another exemplary embodiment of the present disclosure. Figure 7 and Fig. 9The illustrated embodiment is similar, and includes a raised layer 41 arranged on a substrate 10 (not shown in the figure), an insulating layer 42 arranged on the side of the raised layer 41 away from the substrate 10 (the raised layer and the insulating layer together constitute a first sub-anti-breaking structure layer), a first source-drain electrode layer 23 arranged on the side of the insulating layer 42 away from the substrate 10, a first insulating layer 24 arranged on the side of the first source-drain electrode layer 23 away from the substrate 10, a first flat layer 25 arranged on the side of the first insulating layer 24 away from the substrate 10, a second source-drain electrode layer 26 arranged on the side of the first flat layer 25 away from the substrate, a second flat layer 27 arranged on the side of the second source-drain electrode layer 26 away from the substrate 10, and a first conductive wire layer 28, a third flat layer 29, a second conductive wire layer 30, a fourth flat layer 31, a third conductive wire layer 32 and a fifth flat layer 33 arranged in sequence on the side of the second flat layer 27 away from the substrate 10. The first insulating layer 24 and the first flat layer 25 are provided with vias, and the second source-drain electrode layer 26 is electrically connected to the first source-drain electrode layer 23 through the vias. The orthographic projection of the raised layer 41 on the substrate 10 overlaps with the orthographic projection of the via on the substrate 10. For example, the orthographic projection of the raised layer 41 on the substrate 10 is within the orthographic projection range of the via on the substrate 10, and the orthographic projection of the raised layer 41 on the substrate 10 is within the orthographic projection range of the insulating layer 42 on the substrate 10. The second source-drain electrode layer 26 is a three-layer composite structure, which, from the direction close to the substrate to the direction away from the substrate, are the first structural layer, the second structural layer, and the second sub-anti-disconnection structural layer, wherein the first structural layer is titanium (Ti) material, the second structural layer is aluminum (Al) material, and the second sub-anti-disconnection structural layer is molybdenum (Mo) material.

[0074] In this embodiment, by reducing the slope angle of the second source-drain electrode layer and replacing the original Ti structure layer on the second source-drain electrode layer 26 with a Mo structure layer, the reflected light convergence at the second source-drain electrode layer 26 is reduced, thereby avoiding the first conductive line being broken due to overexposure of the PR above the via.

[0075] Fig.12The display substrate provided by another exemplary embodiment of the present disclosure includes: a first source-drain electrode layer 23 disposed on a substrate 10 (not shown in the figure), a first insulating layer 24 disposed on a side of the first source-drain electrode layer 23 away from the substrate 10, a first flat layer 25 disposed on a side of the first insulating layer 24 away from the substrate 10, a second source-drain electrode layer 26 disposed on a side of the first flat layer 25 away from the substrate, a second flat layer 27 disposed on a side of the second source-drain electrode layer 26 away from the substrate 10, a first conductive line layer 28 disposed on a side of the second flat layer 27 away from the substrate 10, and an anti-disconnection structure layer 44 disposed on a side of the first conductive line layer 28 away from the substrate 10, and further includes a third flat layer 29 disposed on a side of the anti-disconnection structure layer 44 away from the substrate 10, a second conductive line layer 30, a fourth flat layer 31, a third conductive line layer 32 and a fifth flat layer 33 (not shown in the figure). The first insulating layer 24 and the first flat layer 25 are provided with vias, and the second source-drain electrode layer 26 is electrically connected to the first source-drain electrode layer 23 through the vias. The orthographic projection of the anti-breaking structure layer 44 on the substrate overlaps with the orthographic projection of the via on the substrate. For example, the orthographic projection of the via on the substrate is within the orthographic projection range of the anti-breaking structure layer 44 on the substrate. Optionally, the midpoint of the orthographic projection of the anti-breaking structure layer on the substrate coincides with the midpoint of the orthographic projection of the via on the substrate, or the centerline of the anti-breaking structure layer coincides with the centerline of the via.

[0076] Fig.13 : is a top view of the anti-breaking structure layer. In this embodiment, the anti-breaking structure layer is circular, and its diameter is larger than the diameter d of the via hole, for example, it can be three times the diameter of the via hole. The thickness of the anti-breaking structure layer ranges from 300 to 500 angstroms. In other embodiments, the anti-breaking structure layer can also be other shapes, which is not limited in this article.

[0077] By setting the anti-breaking structure layer as a shielding layer, the reflected light of the first conductive layer at the via hole can be directly blocked, thereby preventing the reflected light from gathering in the PR area above the via hole and causing overexposure of the PR, thereby avoiding the problem of the first conductive line 28 breaking due to exposure in subsequent processes.

[0078] Fig.14The display substrate provided by another exemplary embodiment of the present disclosure is shown, comprising: a first source-drain electrode layer 23 disposed on a substrate 10 (not shown in the figure), a first insulating layer 24 disposed on the side of the first source-drain electrode layer 23 away from the substrate 10, a first flat layer 25 disposed on the side of the first insulating layer 24 away from the substrate 10, a second source-drain electrode layer 26 disposed on the side of the first flat layer 25 away from the substrate, a second flat layer 27 disposed on the side of the second source-drain electrode layer 26 away from the substrate 10, a first conductive line layer 28 disposed on the side of the second flat layer 27 away from the substrate 10, and an anti-breaking structure layer 45 disposed on the side of the first conductive line layer 28 away from the substrate 10, and further comprising a third flat layer 29 disposed on the side of the anti-breaking structure layer 45 away from the substrate 10, a second conductive line layer 30, a fourth flat layer 31, a third conductive line layer 32 and a fifth flat layer 33 (not shown in the figure). The first insulating layer 24 and the first flat layer 25 are provided with vias, and the second source-drain electrode layer 26 is electrically connected to the first source-drain electrode layer 23 through the vias. The orthographic projection of the anti-breaking structure layer 45 on the substrate coincides with the orthographic projection of the via hole on the substrate, that is, the midpoint of the orthographic projection of the anti-breaking structure layer on the substrate coincides with the midpoint of the orthographic projection of the via hole on the substrate.

[0079] Fig.15 This is a top view of the anti-breaking structure layer. In this embodiment, the anti-breaking structure layer is in a strip shape. Even if the PR above the first conductive line is overexposed during photolithography, the anti-breaking structure layer can protect the first conductive line 28 during subsequent etching to prevent it from breaking during etching.

[0080] The embodiment of the present disclosure further provides a method for preparing a display substrate, wherein the base of the display substrate includes a first region and a second region, and the preparation method includes:

[0081] Prepare a light-emitting unit and a first conductive line structure connected to the light-emitting unit in the first region, prepare a pixel driving circuit and a second conductive line structure connected to the pixel driving circuit in the second region, the first conductive line structure is connected to the second conductive line structure, and the pixel driving circuit is connected to the light-emitting unit in the first region through the first conductive line structure and the second conductive line structure;

[0082] When preparing the second area pixel driving circuit and the second conductive line structure connected to the pixel driving circuit, the preparation method includes:

[0083] A first metal layer and a first flat layer with a via hole are sequentially formed on a substrate, wherein the via hole exposes the first metal layer;

[0084] forming a second metal layer on a side of the first flat layer away from the substrate, wherein the second metal layer is connected to the first metal layer through a via hole;

[0085] A second flat layer and a second conductive line structure are sequentially formed on a side of the second metal layer away from the substrate, wherein an orthographic projection of the second conductive line structure on the substrate overlaps with an orthographic projection of the via hole on the substrate;

[0086] The preparation method further includes preparing an anti-breaking structure layer in the second area for protecting the second conductive line structure above the via hole.

[0087] The method for preparing the display substrate provided in this embodiment can protect the second conductive line structure (the first conductive line in) above the via hole by setting an anti-disconnection structure layer, and prevent the first conductive line from being disconnected due to overexposure of the photoresist during the preparation of the second conductive line structure. The preparation method of this embodiment can be implemented using existing mature preparation equipment, with little improvement on the existing process, and can be well compatible with the existing preparation process, with low manufacturing cost and easy process implementation. In addition, the method provided in this embodiment solves the problem of disconnection of the first conductive line in the related art, has practical application value, and has good application prospects.

[0088] The solution provided in this embodiment can be applied to a solution where an under-screen camera is not provided.

[0089] In an exemplary embodiment, the first source-drain electrode layer 23 and the second source-drain electrode layer 26 may be made of metal materials, such as any one or more of silver (Ag), copper (Cu), aluminum (Al) and molybdenum (Mo), or alloy materials of the above metals, such as aluminum-neodymium alloy (AlNd) or molybdenum-niobium alloy (MoNb), and may be a single-layer structure or a multi-layer composite structure, such as Mo / Cu / Mo. The material of the first insulating layer 24 may be any one or more of silicon oxide (SiOx), silicon nitride (SiNx) and silicon oxynitride (SiOxNx), and may be a single layer, a multi-layer or a composite layer. The materials of the first planar layer 25, the second planar layer 27, the third planar layer 29, the fourth planar layer 31, and the fifth planar layer 33 may be polyimide, acrylic or polyethylene terephthalate, etc.

[0090] The technical solution of this embodiment is further explained by the preparation process of the substrate shown in this embodiment. The "patterning process" mentioned in this embodiment includes deposition of film layer, coating of photoresist, mask exposure, development, etching, stripping of photoresist and other processes, which is a mature preparation process in the relevant technology. The "photolithography process" mentioned in this embodiment includes coating of film layer, mask exposure and development, which is a mature preparation process in the relevant technology. Deposition can adopt known processes such as sputtering, evaporation, chemical vapor deposition, coating can adopt known coating processes, and etching can adopt known methods, which are not specifically limited here. In the description of this embodiment, it should be understood that "thin film" refers to a thin film made of a certain material on a substrate using a deposition or coating process. If the "thin film" does not require a patterning process or a photolithography process during the entire production process, the "thin film" can also be called a "layer". If the "thin film" also requires a patterning process or a photolithography process during the entire production process, it is called a "thin film" before the patterning process and a "layer" after the patterning process. The "layer" after the patterning process or the photolithography process contains at least one "pattern".

[0091] by Figure 8 The embodiment shown is an example of a method for preparing a display substrate provided by the embodiment of the present disclosure, and other embodiments may be implemented with reference thereto. The display substrate includes a first region and a second region, including:

[0092] An active layer 11, a gate insulating layer 12 and a gate electrode 13 are sequentially formed on a substrate 10; wherein the active layer 11, the gate insulating layer 12 and the gate electrode 13 are formed in the second region;

[0093] Depositing a first source-drain metal layer film, and patterning the first source-drain metal film through a patterning process to form a first source-drain metal layer 23 pattern; the first source-drain metal layer 23 pattern is formed in the second region;

[0094] Depositing a first insulating film, and forming a pattern of a first insulating layer 24 by a patterning process;

[0095] A first planar layer film is coated, and a pattern of the first planar layer 25 is formed by a photolithography process of mask exposure and development. The first planar layer 25 is provided with vias to expose the first source and drain metal layer 23;

[0096] A second source-drain metal layer film is deposited, and the second source-drain metal layer film is patterned by a patterning process to form a second source-drain metal layer 26 pattern; the second source-drain metal layer 26 pattern is formed in the second region.

[0097] The anti-breaking structure layer film is deposited, and patterned by a patterning process to form the anti-breaking structure layer 43 pattern; the anti-breaking structure layer 43 can be formed by one etching.

[0098] Coating a second planar layer film, and forming a second planar layer 27 pattern through a photolithography process of mask exposure and development;

[0099] Depositing a transparent conductive film, and patterning the transparent conductive film through a patterning process to form a first conductive line layer 28 pattern;

[0100] Coating a third planar layer film, and forming a third planar layer 29 pattern through a mask exposure and development photolithography process;

[0101] Depositing a transparent conductive film, and patterning the transparent conductive film through a patterning process to form a second conductive line layer 30 pattern;

[0102] Coating a fourth planar layer film, and forming a pattern of the fourth planar layer 31 by a photolithography process of mask exposure and development;

[0103] Depositing a transparent conductive film, and patterning the transparent conductive film through a patterning process to form a third conductive line layer 32 pattern;

[0104] Coating a fifth planar layer film, and forming a fifth planar layer 33 pattern through a photolithography process of mask exposure and development;

[0105] Depositing a transparent conductive film, patterning the transparent conductive film through a patterning process to form an anode 16 pattern, wherein the anode 16 is connected to one or more wirings of the first conductive layer 28, the second conductive layer 30, or the third conductive layer 32 through a via hole;

[0106] Coating a pixel definition film on the substrate formed with the aforementioned pattern, and forming a pixel definition layer pattern by photolithography;

[0107] On the substrate formed with the aforementioned pattern, an organic light-emitting material and a cathode metal are sequentially deposited to form a light-emitting layer 17 and a cathode 18 pattern;

[0108] On the substrate formed with the aforementioned pattern, a first inorganic thin film is deposited to form a first encapsulation 19 pattern; a second encapsulation layer 20 pattern is formed by inkjet printing; and a second inorganic thin film is deposited to form a third encapsulation layer 21 pattern.

[0109] The structure and preparation process shown in this embodiment are merely exemplary. In actual implementation, the corresponding structure can be changed and the patterning process can be increased or decreased according to actual needs.

[0110] The present disclosure also provides a display device, including the display substrate of the above embodiment. The display device can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, etc.

[0111] Although the embodiments disclosed in the present invention are as above, the contents described are only embodiments adopted to facilitate understanding of the present invention and are not intended to limit the present invention. Any technician in the field to which the present invention belongs can make any modifications and changes in the form and details of implementation without departing from the spirit and scope disclosed in the present invention, but the patent protection scope of the present invention shall still be subject to the scope defined in the attached claims.

Claims

1. A display substrate, characterized in that: The display substrate includes a first area and a second area, wherein the first area includes a light-emitting unit and a first conductive line structure connected to the light-emitting unit, the second area includes a pixel driving circuit and a second conductive line structure connected to the pixel driving circuit, the first conductive line structure is connected to the second conductive line structure, and the pixel driving circuit is connected to the light-emitting unit of the first area through the first conductive line structure and the second conductive line structure, the second area includes: a substrate, a first metal layer, a first flat layer, a second metal layer, a second flat layer and a second conductive line structure arranged on the substrate in sequence, the first flat layer is provided with a via hole, the second metal layer is electrically connected to the first metal layer through the via hole, the orthographic projection of the second conductive line structure on the substrate overlaps with the orthographic projection of the via hole on the substrate, and the second area also includes: an anti-breaking structure layer for protecting the second conductive line structure above the via hole, the anti-breaking structure layer is located on a side of the first metal layer close to the substrate, the orthographic projection of the first metal layer on the substrate overlaps with the orthographic projection of the via hole on the substrate, and in a direction perpendicular to the substrate, the distance from the surface of the anti-breaking structure layer away from the first metal layer to the surface close to the first metal layer is within a preset thickness value range.

2. The display substrate according to claim 1, characterized in that: The anti-disconnection structure layer includes a protruding layer and an insulating layer located on the protruding layer close to the first metal layer, the orthographic projection of the protruding layer on the substrate is within the orthographic projection range of the via hole on the substrate, and the orthographic projection of the protruding layer on the substrate is within the orthographic projection range of the insulating layer on the substrate.

3. The display substrate according to claim 1, characterized in that: The anti-breaking structure layer is located on a side of the second metal layer away from the substrate. The anti-breaking structure layer is made of a metal material, and the roughness of the metal material is higher than a preset roughness.

4. The display substrate according to claim 1, characterized in that: The second metal layer is a composite layer structure, including at least two layers, wherein the layer away from the substrate is the anti-breaking structure layer, the anti-breaking structure layer is a metal material, and the roughness of the metal material is higher than a preset roughness.

5. The display substrate according to claim 1, characterized in that: The anti-breaking structure layer includes a first sub-anti-breaking structure layer and a second sub-anti-breaking structure layer, wherein the first sub-anti-breaking structure layer is located on a side of the first metal layer close to the substrate, and the orthographic projection of the anti-breaking structure layer on the substrate overlaps with the orthographic projection of the via on the substrate, and in a direction perpendicular to the substrate, a distance from a surface of the anti-breaking structure layer away from the first metal layer to a surface close to the first metal layer is within a preset thickness value range; the second sub-anti-breaking structure layer is located on a side of the second metal layer away from the substrate, the second sub-anti-breaking structure layer is a metal material, and the roughness of the metal material is higher than a preset roughness.

6. The display substrate according to claim 1, characterized in that: The anti-breaking structure layer includes a first sub-anti-breaking structure layer and a second sub-anti-breaking structure layer, wherein the first sub-anti-breaking structure layer is on a side of the first metal layer close to the substrate, and the orthographic projection of the first metal layer on the substrate overlaps with the orthographic projection of the via on the substrate, and in a direction perpendicular to the substrate, the distance from the surface of the anti-breaking structure layer away from the first metal layer to the surface close to the first metal layer is within a preset thickness value range; the second metal layer is a composite layer structure, including at least two layers, wherein the layer away from the substrate is the second sub-anti-breaking structure layer, and the second sub-anti-breaking structure layer is a metal material, and the roughness of the metal material is higher than the preset roughness.

7. The display substrate according to claim 5 or 6, characterized in that: The first sub-anti-breaking structure layer includes a raised layer and an insulating layer located on the raised layer close to the first metal layer, the orthographic projection of the raised layer on the substrate is within the orthographic projection range of the via on the substrate, and the orthographic projection of the raised layer on the substrate is within the orthographic projection range of the insulating layer on the substrate.

8. The display substrate according to claim 1, 5 or 6, characterized in that: The distance between the surface of the anti-disconnection structure layer far from the first metal layer and the surface close to the first metal layer ranges from 0.3 to 0.42 microns.

9. The display substrate according to claim 1, characterized in that: The second conductive line structure includes a first conductive line, the anti-breaking structure layer is located on a side of the first conductive line away from the substrate, and the orthographic projection of the via on the substrate is within the orthographic projection range of the anti-breaking structure layer on the substrate.

10. The display substrate according to claim 9, characterized in that: The transmittance of the anti-breaking structure layer material is lower than the preset transmittance. In the direction parallel to the substrate, the anti-breaking structure layer is circular. The radius of the anti-breaking structure layer is n times the radius of the positive projection of the via hole on the substrate, where n is a positive integer.

11. The display substrate according to claim 9, characterized in that: In a direction parallel to the substrate, the anti-breaking structure layer is in the shape of a strip, the extension direction of the strip-shaped anti-breaking structure layer is the same as the extension direction of the first conductive line, the orthographic projection of the anti-breaking structure layer on the substrate is within the range of the orthographic projection of the first conductive line on the substrate, and the length of the anti-breaking structure layer is greater than or equal to the diameter of the via.

12. The display substrate according to any one of claims 1 to 6 and 9 to 11, characterized in that: The anti-breaking structural material is molybdenum.

13. A display device, characterized in that: The display substrate comprises the display substrate as claimed in any one of claims 1 to 12.

14. A method for preparing a display substrate, characterized in that: The base of the display substrate includes a first area and a second area, and the preparation method includes: Prepare a light-emitting unit and a first conductive line structure connected to the light-emitting unit in the first region, prepare a pixel driving circuit and a second conductive line structure connected to the pixel driving circuit in the second region, the first conductive line structure is connected to the second conductive line structure, and the pixel driving circuit is connected to the light-emitting unit in the first region through the first conductive line structure and the second conductive line structure; When preparing the second area pixel driving circuit and the second conductive line structure connected to the pixel driving circuit, the preparation method includes: A first metal layer and a first flat layer with a via hole are sequentially formed on a substrate, wherein the via hole exposes the first metal layer; forming a second metal layer on a side of the first flat layer away from the substrate, wherein the second metal layer is connected to the first metal layer through a via hole; A second flat layer and a second conductive line structure are sequentially formed on a side of the second metal layer away from the substrate, wherein an orthographic projection of the second conductive line structure on the substrate overlaps with an orthographic projection of the via hole on the substrate; The preparation method also includes preparing an anti-breaking structure layer in the second area for protecting the second conductive line structure above the via hole, the anti-breaking structure layer is located on the side of the first metal layer close to the substrate, the orthographic projection of the first metal layer on the substrate overlaps with the orthographic projection of the via hole on the substrate, and in a direction perpendicular to the substrate, the distance from the surface of the anti-breaking structure layer away from the first metal layer to the surface close to the first metal layer is within a preset thickness value range.

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