Error checker, receiver and method of checking data errors
Patent Information
- Application Number
- CN202111425894.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-11-27
- Filing Date
- 2021-11-26
- Publication Date
- 2026-09-08
- Estimated Expiration
- 2041-11-26
AI Technical Summary
[0008]然而,包括错误检查器作为接收器的一部分可能会增加接收器的大小、成本、复杂性和功耗
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Figure CN114567394B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to apparatus and methods for determining the transmission quality of a communication channel, and in particular for determining a measure of errors in data received via the communication channel, wherein the data is transmitted as multi-bit symbols. Background Technology
[0002] Digital communication is widely used in a range of applications, and in at least some digital communication systems, a transmitter can be arranged to transmit data to a receiver via a communication channel. The communication channel may include physical media such as suitable waveguides, for example, transmission lines for electrical data transmission or optical fibers for optical data transmission, or the communication channel may be a free-space channel for radio frequency transmission, etc. The transmitter may include a modulator for generating a modulated signal based on the data, wherein the modulated signal comprises a stream of symbols representing the data according to a desired transmission format, and the receiver can receive and demodulate the modulated signal.
[0003] In some cases, each symbol can represent a single bit. For example, a modulator can modulate some physical properties to represent the value of a single bit of data using one of two different states. For instance, within each symbol period, the signal level of the modulated signal can be modulated to one or two defined levels to represent the correlation value of a single bit of data. However, in at least some applications, especially where a relatively high data transmission rate is preferred, the modulated signal can be generated such that each symbol represents multiple bits. For example, two bits can be encoded by modulating the signal level to use one of four appropriate states.
[0004] In such digital communication systems, it may be necessary to measure the quality of transmissions made over the communication channel. One quality metric involves determining the extent of any errors in the received and demodulated data. For example, the error rate, such as the bit error rate (BER), can be determined as the ratio of the number of errors to the amount of error-free data.
[0005] To determine the number of errors, a known sequence of data can be transmitted through the communication channel, and the received and demodulated data can be compared with the known sequence.
[0006] Typically, pseudo-random bit sequences (PRBS) can be used for known data to be transmitted. PRBS are advantageous for known data because they can be deterministically generated as needed, thus avoiding the need for transmitters and receivers to store large test data strings, and providing a balanced number of 0s and 1s. PRBS can also exhibit the statistical behavior of truly random sequences, which is useful for testing channel quality.
[0007] Therefore, in some communication systems, it is advantageous for the receiver to include an error checker for receiving data transmitted through the communication channel that corresponds to a known PRBS; and for comparing the received and decoded data with the known PRBS to identify the number of errors.
[0008] However, including an error checker as part of the receiver may increase the receiver's size, cost, complexity, and power consumption. Summary of the Invention
[0009] Embodiments of this disclosure relate to methods and apparatus for determining the quality of communication channels, and more particularly to at least a problem-detector that mitigates some of these problems.
[0010] According to some embodiments, an error checker is provided, the error checker comprising:
[0011] The input terminal is used to receive an input signal comprising a series of modulation symbols, wherein each symbol encodes multiple bits of a pseudo-random bit sequence;
[0012] A demodulator is configured to receive the input signal and demodulate only some of the symbols to generate a partially demodulated bit sequence;
[0013] The PRBS module is configured to receive the partially demodulated bit sequence and determine the pseudo-random bit sequence; and
[0014] A comparator compares the output of the demodulator with the expected output based on the pseudo-random bit sequence determined by the PRBS module.
[0015] In some embodiments, the demodulator may include a detector for generating an output based on physical properties of the input signal, which are modulated to encode the plurality of bits. The detector may be reconfigured to alter the demodulation provided by the demodulator.
[0016] In some examples, the controller can be configured to control the error checker during a synchronization phase, wherein the detector has a first configuration such that the output of the demodulator corresponds to one of the bits encoded by the relevant symbol. During the synchronization phase, the PRBS module can be configured to receive the partially demodulated bit sequence and determine the pseudo-random bit sequence. The controller can be configured to control the error checker during a checking phase following the synchronization phase, wherein the comparator is controlled to compare the output of the demodulator with an expected output based on the pseudo-random bit sequence determined by the PRBS module. In some embodiments, the controller can be configured to reconfigure the detector to a second configuration during at least a portion of the checking phase to provide demodulation of different portions of the symbol.
[0017] In some embodiments, the physical property may be the signal level of the input signal. The detector may be a threshold detector for detecting whether the signal level is higher than a defined threshold. In some embodiments, the controller may be operable to selectively change the defined threshold. The PRBS module may be configured to determine the expected output of the demodulator based on the determined pseudo-random bit sequence and the defined threshold. The controller may be operable to selectively change the defined threshold on a predefined set of thresholds. In some embodiments, each symbol of the input signal may be modulated to one of four different modulation signal levels, and the predefined set of thresholds includes a set of three thresholds, each set between multiple pairs of different adjacent modulation signal levels.
[0018] In some implementations, the physical property may be the phase of the input signal, and the detector is a detector for detecting phase modulation of the input signal. The detector may, for example, be reconfigured to provide in-phase or quadrature demodulation.
[0019] In some implementations, the controller may be configured to control the demodulator to demodulate only some of the symbols of the input signal.
[0020] In some examples, the error checker can operate at a sampling rate lower than the symbol rate of the input signal.
[0021] The aspects also relate to receivers for data communication systems, including error checkers of any of the embodiments described herein. In some examples, the receiver may be configured to receive the input signal as optical data transmitted via an optical waveguide.
[0022] In another aspect, a method for checking data errors in a communication channel is provided, the method comprising:
[0023] Receive an input signal comprising a series of modulation symbols, wherein each symbol encodes multiple bits of a pseudo-random bit sequence;
[0024] Demodulate only some of the symbols to generate a partially demodulated bit sequence; determine the pseudo-random bit sequence based on the partially demodulated bit sequence; and
[0025] The output of the demodulator is compared with the expected output based on the pseudo-random bit sequence determined by the PRBS module.
[0026] In some examples, the method may include: operating in a synchronization phase, wherein partially demodulating at least some of the symbols includes identifying one of the bits encoded by the relevant symbols, and determining the pseudo-random bit sequence during the synchronization phase; and subsequently operating in an inspection phase, wherein the partial demodulation is variable for at least a portion of the inspection phase.
[0027] In some cases, the symbol may be modulated in terms of signal level, and the symbol may be partially demodulated by a threshold detector that compares the signal level with a first threshold during the synchronization phase and with different thresholds during at least a portion of the inspection phase.
[0028] Unless otherwise indicated to the contrary, any feature of any of the embodiments described herein may be implemented together with any or more of the other features of the embodiments, where compatible. Attached Figure Description
[0029] To better explain the various embodiments and examples of this disclosure, as well as their principles, exemplary implementations, and operations, reference will now be made to the following figures by way of example, wherein:
[0030] Figure 1 A standard error checker for checking errors in a multi-bit communication system is shown.
[0031] Figure 2 An exemplary waveform of a signal used for transmitting data using PAM4 multi-bit symbols is shown; and
[0032] Figure 3 An error checker for checking errors in a multi-bit communication system is shown according to an embodiment. Detailed Implementation
[0033] Embodiments of this disclosure relate to methods and apparatus for determining the quality of a communication channel, and more particularly to an error checker for determining an indication of the number of errors in data received via the communication channel, wherein the data is transmitted as multi-bit symbols.
[0034] In at least some communication systems, data can be transmitted over a communication channel as a series of symbols, where each symbol represents two or more bits of data. For example, data can be transmitted by modulating the properties of the transmitted signal based on multiple bit groups. As discussed above, it may be necessary to determine a metric for the quality of the digital communication channel, which may in particular include an indication of the number of errors in the received data, for example, an indication of the number of errors over a given time period (i.e., the error rate), and / or an indication of the number of errors compared to error-free data (i.e., the error ratio).
[0035] Figure 1 An example of how error checking can be routinely implemented in a communication system 100 that transmits data via multiple symbols is shown. Figure 1 A communication system is shown with a transmitter 101 for transmitting data to a receiver 102 via a communication channel 103. In this example, the communication channel is shown as a physical medium such as an electrical or optical waveguide, but in some embodiments it may include a free-space channel. Note that, for clarity, Figure 1 Only some of the transmitter and receiver components related to error checking are shown, and those skilled in the art will understand that, in reality, there will be additional components for transmitting and receiving other data.
[0036] To perform error checking, transmitter 101 is configured to generate a transmit signal based on some known data, in this case, a pseudo-random bit sequence (PRBS). Therefore, transmitter 101 includes a PRBS generator 104 operable to generate a PRBS of a desired length. The PRBS generator 104 can generate PRBS in various ways, as those skilled in the art will understand, and may include, for example, a signal processing module for generating the PRBS according to a defined polynomial, such as an LFSR (linear feedback shift register). Modulator 105 receives the PRBS and generates a transmit signal based on the PRBS according to a defined modulation scheme. Modulator 105 can modulate the transmit signal according to any suitable modulation scheme used to generate multi-bit symbols.
[0037] One known type of modulation involves modulating the signal level of a transmitted signal. Depending on the type of transmitted signal and the modulation applied, such as in pulse amplitude modulation schemes, the modulated signal level may be the instantaneous amplitude of a related signal (e.g., the voltage of an electrical signal), or the amplitude or intensity of a carrier signal, such as the intensity of an optical signal. The signal level of the transmitted signal can be modulated between sufficiently different values to represent the desired number of bits.
[0038] For example, two bits can be transmitted by modulating the signal level to one of four different signal levels. As an example, consider that the input to modulator 105 includes the following series of bits:
[0039] 0 1 0 0 1 0 0 1 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 1 0 1 0 1 1 0 0 0 0 1 (Sequence 1)
[0040] This sequence can be grouped into 2-bit pairs as follows:
[0041] 01 00 10 01 10 11 00 11 11 00 01 01 01 01 10 00 01 (Sequence 2)
[0042] Each bit pair is then used to modulate the signal level of the transmitted signal into one of four different possible signal levels (e.g., L0, L1, L2, or L3). The bit pairs can be mapped to different signal levels by the modulator 105 according to any desired encoding. For example, the normal values of the bit pairs (i.e., decimal values 0 to 3) can be mapped to the corresponding incremented signal levels L0 to L3, although in some embodiments employing a different encoding (such as Gray encoding) may be advantageous. Those skilled in the art will understand that Gray encoding can be applied such that for adjacent signal levels, corresponding bit pairs differ by only one bit. Using Gray encoding, the mapping can be L0:00, L1:01, L2:11, and L3:10.
[0043] Using Gray coding, a sequence of bit pairs can be encoded as a sequence:
[0044] L1 L0 L3 L1 L3 L2 L0 L2 L2 L0 L1 L1 L1 L1 L3 L0 L1 (sequence 3)
[0045] like Figure 2 The exemplary waveform shown in the example represents the waveform of the transmitted signal generated by modulator 105.
[0046] Return to reference Figure 1 The modulated transmission signal can then be transmitted through communication channel 103 and received by receiver 102.
[0047] exist Figure 1 In the example, receiver 102 includes an error checker 106. Error checker 106 includes a demodulator 107 configured to determine the relevant signal level of the received signal for each symbol period, and thus determine the data bits represented by the symbol.
[0048] In order to be able to completely determine the symbols received within a given symbol period, demodulator 107 includes multiple detectors 108. The number and type of detectors 108 will depend on the modulation scheme used for multi-bit symbols.
[0049] exist Figure 1 In this example, where the transmitted signal is modulated between four different signal levels, the demodulator 107 includes three detectors 108. Each detector 108 is configured to determine whether the signal received via the communication channel at a specific sampling point during a symbol period has a signal level higher or lower than a defined threshold. Taking into account any propagation losses in the communication channel and / or the gain of the detectors, the thresholds are set with respect to received signal levels L0' to L4', which correspond to the transmitted signal levels L0 to L4. Therefore, the first detector D1 can determine whether the signal level is higher than a first threshold located between signal levels L0' and L1', the second detector D2 can determine whether the signal level is higher than a second threshold located between signal levels L1' and L2', and the third detector D3 can determine whether the signal level is higher than a third threshold located between signal levels L2' and L3'. In this example, the outputs from the three detectors 108 are therefore effectively a thermometer code indicating the signal level of the received signal.
[0050] As described above, alternative modulation schemes can be used to modulate the transmitted signal to provide multi-bit symbols. For example, some modulation schemes modulate the transmitted signal by controlling the phase or phase shift of the carrier signal. For example, Quadrature Phase Shift Keying (QPSK) can set the phase shift to one of four values to encode two bits. In this case, demodulator 107 may include two detectors, an in-phase detector and a quadrature detector. However, in general, demodulator 107 typically requires multiple detectors 108 to fully demodulate each symbol.
[0051] exist Figure 1 In the example, the demodulator includes a binary converter 109 for receiving output from each of the detectors 108 and determining the corresponding binary bit pairs based on an appropriate encoding (e.g., Gray encoding). The binary converter 109 thus outputs a sequence of binary bits representing the demodulated data.
[0052] To determine whether any errors exist, the demodulated bit stream from demodulator 107 is provided to PRBS module 110, which operates to generate a known PRBS synchronized with the demodulated bit stream. As those skilled in the art will understand, PRBS module 110 can generate a known PRBS synchronized with the received data in various ways. Comparator 111 compares the demodulated bit stream from demodulator 107 with the known PRBS, thus indicating that a mismatch exists between the bits of the demodulated bit stream and the expected bit sequence each time, i.e., for each instance of an error. The number of errors can be determined to provide an indication of the bit error rate and / or bit errors.
[0053] The error checker 106 of receiver 102 is therefore able to determine the error rate / ratio of data transmitted as multi-bit symbols via communication channel 103 in order to provide a measure of the quality of transmission via communication channel.
[0054] However, the presence of an error checker 106 within receiver 102 may increase the size and cost of receiver circuitry as well as power consumption during use, especially since multiple detectors 108 are required to operate at symbol rate to fully demodulate the received signal.
[0055] Embodiments of this disclosure relate to error checking for channel quality determination, which may offer advantages in at least one of power consumption, size, cost, and / or complexity.
[0056] Embodiments of this disclosure relate to an error checker that receives a transmitted signal comprising a series of multi-bit symbols encoded in PRBS and partially demodulates the received signal. Partial demodulation is sufficient to identify at least some of the bits encoded by at least some of the symbols in the received signal, but not every incoming symbol is fully demodulated to identify every bit encoded by the symbol.
[0057] Therefore, the partially demodulated bit stream represents only a portion of the emitted PRBS. However, due to the deterministic nature of PRBS, all bits in the sequence or any desired bit in the sequence, such as every Nth bit, can be determined, and similarly, the complete PRBS can be inferred from a certain number of bits and their relative positions (i.e., the number of intermediate bits).
[0058] Since only partial demodulation is required, in at least some implementations, the number of detectors required can be reduced compared to the number of detectors required for complete demodulation of symbols.
[0059] Figure 3 A communication system 300 is shown, wherein, as referenced Figure 1 Similar components discussed are identified by the same reference numerals, but wherein receiver 102 includes error checker 306 according to an embodiment.
[0060] Figure 3 The diagram shows that receiver 101 is configured to transmit data to a receiver via communication channel 103. Figure 3 The transmitter 101 is shown to include a modulator 105 for use based on, as shown in the figure, Figure 1 The PRBS generator 104 discussed generates a PRBS modulated transmit signal with multiple symbols. Similarly, Figure 3 Only components relevant to the purpose of explaining error checking are shown.
[0061] The transmitted signal received by the receiver is input to demodulator 307, which in this example provides partial demodulation of the received symbols and includes a single detector 308. In an example where the symbols are modulated in terms of signal level, detector 308 may be a threshold detector to determine whether the received signal level is higher than a threshold.
[0062] For example, considering that the signal level of the symbol is modulated as referenced above. Figure 1 and Figure 2 The bit pairs are encoded as discussed, for example, the signal received by detector 308 has Figure 2 The waveform is shown in the diagram. In this case, the threshold of detector 308 can be initially set to a level between signal levels L1' and L2'. Therefore, the output of detector 308 will indicate whether the signal level of a given incoming symbol is above the threshold (i.e., it can correspond to modulation signal level L2 or L3) or below the threshold (i.e., it corresponds to modulation signal level L0 or L1). The output of detector 308 will therefore indicate the value of one of the bits in the bit pair. As discussed above, for Gray encoding, signal levels L2 and L3 correspond to bit pairs 11 and 10, respectively, while signal levels L0 and L1 correspond to bit pairs 00 and 01, respectively. By setting the threshold between L1' and L2', the output of the detector will therefore correspond to the value of the first bit in the bit pair encoded by the associated symbol; thus, in effect, a single detector 308 directly demodulates the first bit in the bit pair.
[0063] for Figure 2 If there are no errors, the output of detector 308 will be:
[0064] 0 0 1 0 1 1 0 1 1 0 0 000 1 0 0 (Sequence 4)
[0065] It corresponds to the bit sequence:
[0066] 0? 0? 1? 0? 1? 1? 0? 1? 1? 0? 0? 0? 0? 0? 1? 0? 0? (Sequence 5)
[0067] Where ? represents an unknown bit.
[0068] However, this partial information is sufficient to infer the complete underlying PRBS and allow synchronization with it. As mentioned above, given that the PRBS is deterministic, each bit in the sequence can be determined, or alternatively, any Nth bit in the sequence can be determined without iterating through all intermediate bit values. Determining each Nth bit of the PRBS generates a cyclotomic coset of the PRBS. Where N is a power of 2 or coprime to the length of the PRBS, the cyclotomic coset will have the same maximum length as the original PRBS. Given the properties of the PRBS and its cyclotomic cosets, partial decoding of the incoming symbols is sufficient to allow synchronization with a locally generated PRBS.
[0069] The partially demodulated output from partial demodulator 307 is thus provided to the receiver's PRBS module 310, which uses the partial sequence to infer the PRBS during the synchronization phase. It may only require a limited number of bits from the partially decoded sequence to infer the PRBS. In practice, PRBS module 310 can be synchronized with the sequence of the relevant circular coset from which the complete PRBS can be inferred.
[0070] Inference can be performed in various ways. For example, consider that each decoded bit of the PRBS corresponds to an observation of a single bit in the state register that generated it. The state register used to generate the PRBS corresponds to the value of the quotient ring, where each subsequent value, expressed in polynomial form, is derived by multiplying the state by x1 and then dividing the polynomial by the generating polynomial. This series of values can be expressed as a matrix product of the state register multiplied by a constant (according to modulo 2). Since all states depend on the previous state, all future states can be computed by concatenating the matrix product with the current state. Thus, a system of linear equations with unknown state values that depend entirely on the observed bits of the PRBS can be established. Solving this system of equations allows the value of the state register to be inferred relative to the observed bits at any time. The PRBS module 310 can therefore be configured to efficiently solve a suitable set of linear equations, as those skilled in the art will understand. The PRBS module can be implemented by any suitable means for performing inference and, for example, is at least partially embedded by a suitable programming processor and / or may include at least some dedicated circuitry.
[0071] Once the PRBS module 310 is synchronized with the partially demodulated data and the PRBS can be deduced, the expected signal level of any incoming symbol can also be deduced. The output of detector 308 can then be compared with the expected output from the detector by comparator 311 to determine the extent of any errors during the error checking phase.
[0072] For example, as discussed above, if detector 308 operates with a threshold set between signal levels L1' and L2', the detector's output essentially demodulates the first bit of each bit pair encoded by the incoming symbol. Once the PRBS has been correctly inferred, the relevant output from detector 308 can be compared with the relevant bits of the locally inferred PRBS (i.e., every other bit of the PRBS). If the transmitter repeatedly transmits the complete PRBS and the detector provides an output for each incoming symbol, the error checker will effectively check every bit of the PRBS during two iterations of the complete PRBS.
[0073] While maintaining the threshold of detector 308 at a constant level between L1' and L2' allows for checking all bits of the PRBS over time, this does not provide a check for correctly received all different symbol levels. That is, if a symbol transmitted at signal level L2 is received and demodulated to L1', an error will be detected, but if the symbol is received and demodulated to L3', no error will be detected. To provide a check for different symbol levels, once the PRBS is correctly inferred, the threshold of detector 308 can be changed to provide differentiation between other symbol levels.
[0074] Once the PRBS is inferred, the bit pairs of the PRBS used to encode the symbol, and therefore the expected modulation for the symbol, are known. The detector can be set to any desired threshold level, and the output from the detector is compared to the expected output for the expected symbol level. Over time, this allows checking all bit values of the PRBS for all symbol levels. Error checker 306 can therefore include controller 312, such as... Figure 3 As shown, the controller is operable to control the threshold of detector 308.
[0075] For example, controller 312 can initially set the threshold of detector 308 between L1' and L2' as discussed to allow partial demodulation of the imported data to identify one of the encoded bits, thus allowing synchronization and inference of the PRBS. Once the PRBS is correctly inferred, PRBS module 310 can generate expected values for the relevant bits of the PRBS, and comparator 311 compares the detector output with the expected values to determine any errors. In one implementation, the threshold can be maintained at the same level between L1' and L2' until all values of the PRBS have been checked.
[0076] The controller 312 can then change the detector's threshold, for example, to a level between L0' and L1' or between L2' and L3'. Given the encoding scheme used, the PRBS module 310 can then generate a sequence corresponding to the expected output of the detector 307 at the stated threshold level.
[0077] For example, for the bit sequence 1 above, the modulation scheme is expected to generate the signal level sequence 3 above, that is, Figure 2 The waveform shown. Using a single detector 308 and a threshold set between L0' and L1', the expected output of the detector will be:
[0078] 1 0 1 1 1 1 0 1 1 0 1 1 1 1 1 0 1 (Sequence 6)
[0079] If the threshold is set between L2' and L3', the expected output will be:
[0080] 0 0 1 0 1 0 0 0 0 0 0 0 0 0 1 0 0 (Sequence 7).
[0081] The controller 312 can therefore selectively change the threshold of the detector 308 and also control the PRBS module to provide an appropriate output based on the selected threshold. By changing the relevant threshold and the corresponding output from the PRBS generator, and then giving sufficient time, the receiver can check for correct reception of all signal levels for all bit values of the PRBS, thus allowing the error checker to communicate with the communication channel 103 regarding... Figure 1 The conventional methods discussed are the same quantitative measurements that allow for the evaluation of communication channels.
[0082] For example, controller 312 can operate with a set threshold (i.e., between L0' and L1') and verify that the detector's output matches the expected level for each symbol of the full PRBS, then change the threshold to a different level, for example, between L2' and L3', and repeat the verification of said threshold. This can be repeated for all relevant thresholds if needed. However, it should be understood that the threshold can be changed in any desired manner.
[0083] However, in some applications, it may be sufficient to generate a quality metric with partial characteristics. For example, it may be sufficient to determine the number of errors when operating with different thresholds, rather than checking every symbol when using each threshold.
[0084] It will be understood that when the threshold is set to a level between L0' and L1' or between L2' and L3', the detector output is a partial demodulation that does not directly correspond to the individual bit values of the PRBS. Therefore, such thresholds are not used in the initial synchronization phase of inferring and synchronizing the local PRBS in the receiver. However, once the PRBS has been inferred and the expected signal level is thus known, the output of a detector using such thresholds can be used to detect errors in the received symbol values.
[0085] Therefore, embodiments of this disclosure allow for the use of references. Figure 1 The conventional approach discussed uses fewer detectors to implement the receiver error checker 306. Figure 3 The implementation examples allow for the use of a single detector to implement an error checker. Figure 1 Compared to the three detectors 108 shown, the use of a single detector 308 thus allows the error checker of the embodiments of this disclosure to be smaller and cheaper than conventional error checkers. Moreover, using fewer detectors 308 can reduce power consumption during use.
[0086] Figure 3 An example with only a single detector 308 is shown. The required number of detectors depends on the type of modulation scheme used. The demodulator 307 of the error checker 306 should have enough detectors to correctly identify one of the bits encoded by the relevant symbol. Decoding one of the bits is sufficient to allow inference of the underlying PRBS.
[0087] For example, for phase-shift modulation such as QPSK, the error checker 306 may include a single detector with a configurable phase, instead of two separate detectors required to fully demodulate the received signal. The received signal can be processed by the detector to provide an indication of one of the bits, i.e., in phase. Quadrature bits can then be verified by reconfiguring the phase of the detector.
[0088] Therefore, generally, a demodulator includes at least one detector for generating an output based on physical properties of the input signal, which are modulated to encode a plurality of bits. The demodulator may operate with a first detector configuration that provides a first partial demodulation during a synchronization phase, wherein the first partial demodulation identifies one of the bits encoded by the associated symbol. The demodulator may also operate with one or more other detector configurations that provide different partial demodulations, which do not necessarily result in identifying the actual bits of the PRBS, but allow verification that the received symbols will be decoded.
[0089] While error checkers can advantageously be implemented using only the minimum number of detectors required to correctly identify one of the bits encoded by a symbol, in some applications where size and cost are not significant constraints, error checkers may include multiple detectors, and possibly even a sufficient number of detectors, to allow complete decoding of all bits encoded by a given symbol. The error checker can then operate in different modes; for example, it can operate with all detectors active to provide complete demodulation for each symbol, as referenced. Figure 1However, the error checker can also operate in a mode where only one or some of the detectors are active to provide partial demodulation according to this disclosure. In applications where the time required to provide channel quality measurements is not critical, the partial demodulation mode can be used to reduce power consumption, while the full demodulation mode can be used in applications where faster channel quality determination is required.
[0090] In some implementations, the detector can be operated to provide an output for each symbol, as described above, i.e., the detector's sampling rate can be equal to the symbol rate in the received signal. However, in some implementations, the detector 308 can be controlled by the controller 312 to operate at a sampling rate lower than the symbol rate of the received signal. That is, the detector 308 can provide an output only for every Mth symbol, instead of providing an output for every symbol. Similarly, due to the properties of the PRBS and its circular cosets, if the detector only provides an output for every Mth sample, it is still possible to infer and synchronize to the underlying PRBS, and once synchronized, the expected signal level of the relevant symbol can be determined. Over time, if the sequence of symbols encoded by the PBRS is repeatedly transmitted, which is typically the case, the entire symbol set can be checked for all signal levels, but operating at a reduced sampling rate for the detector reduces power compared to sampling at the symbol rate. In at least some applications, the time required to determine a quality metric of the communication channel (i.e., the degree of any errors) may be insignificant, and operating at a lower sampling rate can therefore reduce power consumption.
[0091] For example, in the example discussed above, if detector 308 operates at a sampling rate of every 4th symbol, then when initially operating with a threshold between L1' and L2' to provide partial demodulation of the received symbols, the detector will effectively demodulate every 8th bit of the PRBS. PRBS module 310 will therefore provide synchronization to the PRBS based on every 8th bit. Once synchronized, PRBS module 310 can generate the expected output of detector 308 for every 4th symbol.
[0092] Since the transmitter will typically retransmit the PBRS, the sequence of symbols encoding the PBRS will be repeated, and once synchronized, different thresholds can be used to check the same symbol in the sequence and / or different symbols can be checked in subsequent iterations. Therefore, for example, if every fourth symbol is used for initial synchronization and checking during the first iteration of the sequence, any of the intermediate symbols can be checked in subsequent iterations by changing the sampling time.
[0093] Generally, the controller 312 can control the detector 308 to sample at any given rate or to sample any desired symbol and control the PRBS module to generate the expected output for a given threshold.
[0094] The embodiments therefore provide an error checker for the receiver, which provides partial demodulation of multiple symbols. The embodiments can benefit from one or more of the following advantages: The error checker can be implemented with fewer detectors than conventionally required. Reducing the number of detectors to provide error checking allows for reduced complexity and simplifies the task of implementing the error checker. The error checker can operate with fewer detectors compared to conventional methods, thus saving power compared to full demodulation. In some applications, the error checker does not need to operate at the full symbol rate. The embodiments utilize the properties of PRBS to allow verification over time, thereby allowing for lower sampling rates and therefore lower power consumption. Due to the reduced number of detectors, the circuitry can be smaller and less expensive. Smaller and simpler circuitry is also generally easier to verify and faces fewer design challenges.
[0095] It should be understood that the examples and embodiments described above are given by way of example only, and those skilled in the art will understand that modifications, alterations, additions or changes can be made to the specific embodiments described, or alternative embodiments can be implemented, without departing from the scope of the appended claims.
[0096] It should be noted that, as used herein, unless otherwise expressly stated, the word "comprising" does not exclude the presence of other elements or steps besides those listed, and references to elements or features in the singular do not exclude the possibility of multiple such elements or features. Furthermore, the recitation of different features or elements in the appended claims does not necessarily mean individual components; a single component or unit may perform the function of several elements listed in the claims. Any reference numerals in the appended claims should not be construed as limiting their scope.
Claims
1. An error checker, comprising: The input terminal is used to receive an input signal comprising a series of modulation symbols, wherein each symbol encodes multiple bits of a pseudo-random bit sequence; A demodulator is configured to receive the input signal and demodulate only some of the symbols to generate a partially demodulated bit sequence; The PRBS module is configured to receive the partially demodulated bit sequence and determine the pseudo-random bit sequence; and A comparator compares the output of the demodulator with the expected output based on the pseudo-random bit sequence determined by the PRBS module.
2. The error checker according to claim 1, wherein, The demodulator includes a detector for generating an output based on physical properties of the input signal, which are modulated to encode the plurality of bits.
3. The error checker according to claim 2, wherein, The detector can be reconfigured to change the demodulation provided by the demodulator.
4. The error checker of claim 3, further comprising a controller configured to control the error checker during a synchronization phase, in which... The detector has a first configuration such that the output of the demodulator corresponds to one of the bits encoded by the relevant symbols, and the PRBS module is configured during the synchronization phase to receive the partially demodulated bit sequence and determine the pseudo-random bit sequence.
5. The error checker according to claim 4, wherein, The controller is configured to control the error checker during a check phase after the synchronization phase, in which the comparator is controlled to compare the output of the demodulator with an expected output based on the pseudo-random bit sequence determined by the PRBS module.
6. The error checker according to claim 5, wherein, The controller is configured to reconfigure the detector to a second configuration during at least a portion of the inspection phase to provide demodulation of different portions of the symbol.
7. The error checker according to claim 2, wherein, The physical property is the signal level of the input signal, and the detector is a threshold detector used to detect whether the signal level is higher than a defined threshold.
8. The error checker according to claim 7, wherein, The controller can operate to selectively change the defined threshold.
9. The error checker according to claim 8, wherein, The PRBS module is configured to determine the expected output of the demodulator based on the determined pseudo-random bit sequence and the defined threshold.
10. The error checker according to claim 8, wherein, The controller is operable to selectively change the defined thresholds on a predefined set of thresholds.
11. The error checker according to claim 10, wherein, Each symbol of the input signal is modulated to one of four different modulation signal levels, and the predefined threshold set includes a set of three thresholds, each set between different pairs of adjacent modulation signal levels.
12. The error checker according to claim 2, wherein, The physical property is the phase of the input signal, and the detector is a detector used to detect the phase modulation of the input signal.
13. The error checker according to claim 2, wherein, The detector can be reconfigured to provide in-phase or quadrature demodulation.
14. The error checker according to claim 1, wherein, The controller is configured to control the demodulator to demodulate only some of the symbols of the input signal.
15. The error checker according to claim 1 is capable of operating at a sampling rate lower than the symbol rate of the input signal.
16. A receiver for a data communication system, comprising the error checker according to claim 1.
17. The receiver according to claim 16, wherein, The receiver is configured to receive the input signal as optical data transmitted via an optical waveguide.
18. A method for checking data errors in a communication channel, comprising: Receive an input signal comprising a series of modulation symbols, wherein each symbol encodes multiple bits of a pseudo-random bit sequence; Only some of the symbols are partially demodulated to generate a partially demodulated bit sequence; Based on the partially demodulated bit sequence, the pseudo-random bit sequence is determined; and The output of the partial demodulation is compared with the expected output based on the pseudo-random bit sequence.
19. The method according to claim 18, wherein, The method includes: Operating during a synchronization phase, in which at least some of the symbols are partially demodulated, including identifying one of the bits encoded by the relevant symbols, and during the synchronization phase, determining the pseudo-random bit sequence; and The operation then proceeds during the inspection phase, wherein the partial demodulation is varied for at least a portion of the inspection phase.
20. The method according to claim 19, wherein, The signal level of the symbol is modulated, and the symbol is partially demodulated by a threshold detector that compares the signal level with a first threshold during the synchronization phase and with different thresholds during at least a portion of the inspection phase.
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