Light receiving element and distance measuring device

Abstract

In order to prevent incident light leakage of pixels around a pixel region (11) of a light receiving element. The light receiving element includes a pixel region and an adjacent pixel (400). In the pixel region, a plurality of pixels (100) are arranged, the plurality of pixels including a photodiode formed in a semiconductor substrate (110) in which electric charges generated by photoelectric conversion of incident light are multiplied with a high reverse bias voltage, an on-chip lens (160) that focuses the incident light onto the photodiode, and a wiring region (120) having a wiring layer (122) connected to the photodiode and an insulating layer (121) that insulates the wiring layer. The adjacent pixel is arranged adjacent to the pixel region, and includes the photodiode, an on-chip lens (161) having a curvature different from that of the on-chip lens, and the wiring region.

Description

[0001] Cross-reference to related applications

[0002] This application claims the benefit of Japanese priority patent application JP2019-201655, filed on November 6, 2019, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to a light receiving element and a distance measuring device. More specifically, this disclosure relates to a light receiving element including an avalanche photodiode and a distance measuring device using the light receiving element to measure the distance to a target object. Background Technology

[0004] Imaging elements and light-receiving elements have been constructed by arranging multiple pixels, each containing a photodiode formed on a semiconductor substrate for photoelectric conversion of incident light. By using such an imaging element, incident light can be detected for each pixel to generate an image signal, and an image of a target object can be formed. Furthermore, this imaging element can be applied to a distance measuring device for measuring the distance to a target object. In this distance measuring device, by illuminating the target object with light, detecting the reflected light from the target object using a light-receiving element, and determining the time from illuminating the light to detecting the reflected light, the distance can be measured. By measuring the distance to the target object for each pixel, the three-dimensional shape of the target object can be obtained.

[0005] As such an imaging element, for example, a solid-state imaging device is used to separate pixels by means of an element separation region formed by embedding an insulating film in a groove in the region between pixels of a semiconductor substrate (see, for example, Patent Document 1). This solid-state imaging device is configured as a back-illuminated imaging element, wherein incident light is irradiated onto the back side of the semiconductor substrate, and an on-chip lens is arranged close to the semiconductor substrate. By arranging separation regions between pixels, light entering obliquely through the on-chip lens of the adjacent pixels can be blocked, thereby preventing crosstalk and color mixing. Multiple pixels of the solid-state imaging device are arranged in a two-dimensional array to form a pixel region, and are arranged in the center of the semiconductor substrate.

[0006] Reference List

[0007] Patent documents

[0008] Patent Document 1: JP2017-191950A Summary of the Invention

[0009] Technical issues

[0010] In the aforementioned related technologies, there is a problem of incident light from the ends of the pixel region being mixed. In imaging elements, pixels that do not participate in generating image signals are arranged between the ends of the pixel region and the semiconductor substrate to ensure the uniformity of each pixel in the pixel region. Such pixels are called dummy pixels, have the same configuration as the pixels in the pixel region, and are arranged adjacent to the pixel region. When incident light that has passed through the dummy pixels is reflected by wiring areas arranged on the front side of the semiconductor substrate and mixed with the pixels in the pixel region, noise such as flare is generated. As a result, there is a problem of image quality degradation. Furthermore, in the light receiving element used in distance measuring devices, avalanche photodiodes (APDs) or single-photon avalanche diodes (SPADs) are provided in the pixels instead of photodiodes to improve sensitivity. These are photodiodes that improve sensitivity by multiplying the charge generated by photoelectric conversion, and they malfunction due to incident light leakage from the dummy pixels.

[0011] This disclosure was made in view of the above-mentioned problems and with the aim of preventing incident light from leaking from pixels around the pixel area.

[0012] Solutions to technical problems

[0013] According to a first embodiment of this disclosure, a light receiving element is provided, comprising: a pixel region having a plurality of pixels arranged therein, the plurality of pixels including a photodiode, an on-chip lens, and a wiring region, the photodiode being formed on a semiconductor substrate, wherein a high reverse bias voltage is used to multiply the charge generated by photoelectric conversion of incident light in the photodiode, the on-chip lens focusing the incident light onto the photodiode, the wiring region having a wiring layer connected to the photodiode and an insulating layer insulating the wiring layer; and adjacent pixels arranged adjacent to the pixel region and including the photodiode, an on-chip lens with a curvature different from that of the on-chip lens, and the wiring region.

[0014] Furthermore, in this first embodiment, an on-chip lens with a curvature smaller than that of the on-chip lens of the pixel can be arranged in the adjacent pixels.

[0015] By employing the first embodiment of this disclosure, incident light is focused onto a position on a semiconductor substrate different from that of a pixel in adjacent pixels. Assume the focusing position is adjusted.

[0016] Furthermore, according to a second embodiment of this disclosure, a light receiving element is provided, comprising: a pixel region having a plurality of pixels arranged therein, the plurality of pixels including a photodiode, an on-chip lens, and a wiring region, the photodiode being formed on a semiconductor substrate, wherein a high reverse bias voltage is used to multiply the charge generated by photoelectric conversion of incident light in the photodiode, the on-chip lens focusing the incident light onto the photodiode, the wiring region having a wiring layer connected to the photodiode and an insulating layer insulating the wiring layer; and adjacent pixels arranged adjacent to the pixel region and including the photodiode and a semiconductor region light-shielding wall formed on the semiconductor substrate at the boundary between the wiring region and the pixel adjacent to the wiring region, and blocking the incident light.

[0017] Furthermore, in the second embodiment, in the adjacent pixels, the semiconductor region light-shielding wall may not be formed on a boundary different from the boundary of the pixel.

[0018] Furthermore, in a second embodiment, the semiconductor region light-shielding wall may be formed by arranging a material that blocks the incident light in a groove formed in the semiconductor substrate.

[0019] By adopting the second embodiment of this disclosure, incident light from adjacent pixels to pixel on the semiconductor substrate is blocked by the light-shielding wall of the semiconductor region.

[0020] Furthermore, according to a third embodiment of this disclosure, a light receiving element is provided, comprising: a pixel region having a plurality of pixels arranged therein, the plurality of pixels including a photodiode, an on-chip lens, and a wiring region, the photodiode being formed on a semiconductor substrate, wherein a high reverse bias voltage is used to multiply the charge generated by photoelectric conversion of incident light in the photodiode, the on-chip lens focusing the incident light onto the photodiode, the wiring region having a wiring layer connected to the photodiode and an insulating layer insulating the wiring layer; and adjacent pixels arranged adjacent to the pixel region and including the photodiode and the wiring region without the wiring layer.

[0021] By adopting the third embodiment of this disclosure, the reflection of incident light by the wiring layer of adjacent pixels is eliminated.

[0022] Furthermore, according to a fourth embodiment of this disclosure, a light receiving element is provided, comprising: a pixel region having a plurality of pixels arranged therein, the plurality of pixels including a photodiode, an on-chip lens, and a wiring region, the photodiode being formed on a semiconductor substrate, wherein a high reverse bias voltage is used to multiply the charge generated by photoelectric conversion of incident light in the photodiode, the on-chip lens focusing the incident light onto the photodiode, the wiring region having a wiring layer connected to the photodiode and an insulating layer insulating the wiring layer; and adjacent pixels arranged adjacent to the pixel region and including a wiring region having the photodiode and a wiring layer disposed in the same layer as the wiring layer and formed with different sizes.

[0023] Furthermore, in the fourth embodiment, the width of the wiring layer of the wiring region included in the adjacent pixel may be smaller than the width of the wiring layer of the pixel.

[0024] Furthermore, in the fourth embodiment, the adjacent pixel may include the wiring region having light-shielding wiring, the light-shielding wiring being the wiring layer formed having a shape covering the semiconductor substrate.

[0025] Furthermore, in the fourth embodiment, the adjacent pixel may also include a wall-like portion disposed between the light-shielding wiring and the semiconductor substrate at the boundary with the adjacent pixel of the pixel.

[0026] Furthermore, in the fourth embodiment, the width of the wiring layer of the wiring region included in the adjacent pixel may be greater than the width of the wiring layer of the pixel.

[0027] By adopting the fourth embodiment of this disclosure, the reflection of incident light by the wiring layer of adjacent pixels is adjusted.

[0028] Furthermore, according to a fifth embodiment of this disclosure, a light receiving element is provided, comprising: a pixel region having a plurality of pixels arranged therein, the plurality of pixels including a photodiode, an on-chip lens, and a wiring region, the photodiode being formed on a semiconductor substrate, wherein a high reverse bias voltage is used to multiply the charge generated by photoelectric conversion of incident light in the photodiode, the on-chip lens focusing the incident light onto the photodiode, the wiring region having a wiring layer connected to the photodiode and an insulating layer insulating the wiring layer; and adjacent pixels arranged adjacent to the pixel region and including the photodiode and a wiring region light-shielding wall, the wiring region light-shielding wall being arranged in the wiring region at the boundary between the wiring region and the pixels adjacent to the wiring region, and blocking the incident light.

[0029] Furthermore, in the fifth embodiment, the light-shielding wall of the wiring area may include the wiring layer disposed at the boundary of the adjacent pixels of the pixel, and a wall-like portion disposed adjacent to the wiring layer and the semiconductor substrate.

[0030] Furthermore, in the fifth embodiment, the light-shielding wall of the wiring area may include a plurality of wiring layers arranged in multiple layers at the boundary of adjacent pixels of the pixel, and a wall-like interlayer wall portion arranged between the layers of the plurality of wiring layers.

[0031] By adopting the fifth embodiment of this disclosure, the reflection of incident light by the wiring layer of adjacent pixels is reduced.

[0032] Furthermore, according to a sixth embodiment of this disclosure, a distance measuring device is provided, comprising: a pixel region having a plurality of pixels arranged therein, the plurality of pixels including a photodiode, an on-chip lens, and a wiring region, the photodiode being formed on a semiconductor substrate, wherein a high reverse bias voltage is used to multiply the charge generated by photoelectric conversion of incident light, the incident light being light emitted from a light source device and reflected from a target object, the on-chip lens focusing the incident light onto the photodiode, the wiring region having a wiring layer connected to the photodiode and an insulating layer insulating the wiring layer; adjacent pixels arranged adjacent to the pixel region and including the photodiode, an on-chip lens with a curvature different from that of the on-chip lens, and the wiring region; and a processing circuit that measures the time from the emission of light from the light source device to the detection of a detection signal based on the current flowing through the photodiode transmitted by the wiring layer of the pixel to detect the distance to the target object.

[0033] By employing the sixth embodiment of this disclosure, it is possible to focus incident light onto a position on a semiconductor substrate different from that of a pixel in adjacent pixels. Assume the focusing position is adjusted. Attached Figure Description

[0034] Figure 1 A diagram illustrating an example configuration of an optical receiving element according to an embodiment of the present disclosure.

[0035] Figure 2 A diagram illustrating an example of the configuration of a pixel array unit according to an embodiment of the present disclosure.

[0036] Figure 3 A diagram illustrating an example of pixel configuration according to an embodiment of the present disclosure.

[0037] Figure 4A diagram illustrating an example of the configuration of adjacent pixels according to an embodiment of the present disclosure.

[0038] Figure 5 A figure illustrating an example of a method for manufacturing an on-chip lens according to a first embodiment of the present disclosure.

[0039] Figure 6 A diagram illustrating an example of the configuration of adjacent pixels according to a second embodiment of the present disclosure.

[0040] Figure 7 A diagram illustrating an example of the configuration of adjacent pixels according to a third embodiment of this disclosure.

[0041] Figure 8 A diagram illustrating an example of the configuration of adjacent pixels according to the fourth embodiment of this disclosure.

[0042] Figure 9 A diagram illustrating an example of the configuration of adjacent pixels according to the fifth embodiment of this disclosure.

[0043] Figure 10 A diagram illustrating an example of the configuration of adjacent pixels according to the sixth embodiment of this disclosure.

[0044] Figure 11 A diagram illustrating an example of the configuration of adjacent pixels according to the seventh embodiment of this disclosure.

[0045] Figure 12 A circuit diagram illustrating an example of pixel configuration according to an embodiment of the present disclosure.

[0046] Figure 13 A diagram illustrating an example configuration of a distance measuring device according to an embodiment of this disclosure. Detailed Implementation

[0047] Next, embodiments for carrying out this disclosure (hereinafter referred to as embodiments) will be described with reference to the accompanying drawings. In the drawings, identical or similar parts are indicated by identical or similar reference numerals. Furthermore, the embodiments will be described in the following order.

[0048] 1. First Implementation Plan

[0049] 2. Second Implementation Plan

[0050] 3. Third Implementation Plan

[0051] 4. Fourth Implementation Plan

[0052] 5. Fifth Implementation Plan

[0053] 6. Sixth Implementation Plan

[0054] 7. Seventh Implementation Plan

[0055] 8. Eighth Implementation Plan

[0056] 9. Ninth Implementation Plan

[0057] <1. First Implementation Plan>

[0058] Composition of optical receiving element

[0059] Figure 1 The figure illustrates an example configuration of a light receiving element according to an embodiment of the present disclosure. The light receiving element 2 in the figure includes a pixel array unit 10, a bias power supply unit 20, and a light receiving signal processing unit 30.

[0060] The pixel array unit 10 is constructed by arranging multiple pixels 100, each having a photoelectric conversion unit that performs photoelectric conversion on incident light, in a two-dimensional lattice. Pixels 100 detect incident light and output a light receiving signal as a detection result. For example, the photoelectric conversion unit can be an avalanche photodiode, SPAD, etc. In the following text, it is assumed that a SPAD is arranged in the pixels 100 as a photoelectric conversion unit. Signal lines 21 and 31 are connected to each pixel 100. Signal line 21 is a signal line that provides a bias voltage to the pixel 100. Signal line 31 is a signal line that transmits the light receiving signal from the pixel 100. Note that although an example of pixels 100 arranged in four rows and five columns is shown in the pixel array unit 10 in the figure, the number of pixels 100 arranged in the pixel array unit 10 is not limited.

[0061] The bias power supply unit 20 is a power supply that provides a bias voltage to the pixel 100. The bias power supply unit 20 provides the bias voltage through the signal line 21.

[0062] The light receiving signal processing unit 30 processes light receiving signals output from a plurality of pixels 100 arranged in the pixel array unit 10. This processing by the light receiving signal processing unit 30 corresponds to, for example, detecting the distance to a target object based on incident light detected by the pixels 100. Specifically, the light receiving signal processing unit 30 can perform distance detection processing using the time-of-flight (ToF) method, which is used in imaging devices such as vehicle-mounted cameras, to measure the distance to a distant target object. This distance detection processing involves illuminating the target object with light from a light source arranged in the imaging device, detecting the light reflected from the target object, and measuring the time it takes for the light from the light source to travel back and forth between the light source and the target object to detect the distance. A SPAD capable of high-speed light detection is used as the apparatus for performing this distance detection processing. Note that the light receiving signal processing unit 30 is an example of the processing circuit described in the claims.

[0063] Pixel array unit composition

[0064] Figure 2This is a diagram illustrating an example of the configuration of a pixel array unit according to an embodiment of the present disclosure. The diagram shows an example of the configuration of a pixel array unit 10. The pixel array unit 10 in this diagram includes a pixel region 11 and adjacent pixels 400. Note that in the diagram, white rectangles represent pixels 100, and shaded rectangles represent adjacent pixels 400.

[0065] Pixel region 11 is a region in which a plurality of pixels 100 are arranged. The plurality of pixels 100 are arranged in the central part of a semiconductor substrate on which a pixel array unit 10 is arranged.

[0066] Adjacent pixels 400 are pixels arranged adjacent to pixel region 11. These adjacent pixels 400 are positioned between the end of pixel region 11 and the semiconductor substrate. Pixel 100 in pixel region 11 detects incident light. However, even if adjacent pixels 400 have a similar configuration to pixel 100, they are not necessarily required to detect incident light. Adjacent pixels 400 are pixels arranged adjacent to pixel region 11 to ensure that the shape, etc., of the pixels 100 arranged in pixel region 11 is consistent.

[0067] Without arranging adjacent pixels 400, the shape of the pixels 100 arranged on the outermost periphery of the pixel region 11 is likely to be inconsistent with the shape of the pixels 100 arranged within the pixel region 11. This is because, compared to the inner pixels 100 which are adjacent to other pixels 100 on all four sides, when only three or two sides are adjacent to a pixel 100, the periodicity of the shape of the arranged pixels is disrupted, causing the shape to change during manufacturing. Therefore, arranging adjacent pixels 400 adjacent to the pixel region 11, and arranging the four sides of the pixels 100 arranged on the outermost periphery of the pixel region 11 adjacent to other pixels, achieves a configuration that ensures consistent shapes.

[0068] The pixel array unit 10 in the figure represents an example of two rows of adjacent pixels 400 arranged around the pixel region 11.

[0069] Pixel composition

[0070] Figure 3 This figure illustrates an example of the configuration of a pixel according to an embodiment of the present disclosure. The figure is a cross-sectional view showing an example of the configuration of pixel 100. Pixel 100 includes semiconductor substrates 110 and 130, wiring regions 120 and 140, a semiconductor region light-shielding wall 152, insulating films 151 and 153, and an on-chip lens 160.

[0071] Semiconductor substrate 110 is a semiconductor substrate on which diffusion regions of elements such as SPADs (photoreceiving elements 2) are disposed. Semiconductor substrate 110 may include, for example, silicon (Si). The diffusion regions of the elements can be formed by arranging semiconductor regions in well regions 111 formed on semiconductor substrate 110. In the figure, SPAD 101 is disposed in pixel 100. SPAD 101 includes well regions 111 of semiconductor substrate 110, n-type semiconductor regions 113, p-type semiconductor regions 112 and 114 disposed in well regions 111. The n-type semiconductor region 113 corresponds to the cathode and forms a pn junction together with the p-type semiconductor region 112. A reverse bias is applied to the pn junction through well regions 111 to form a depletion layer.

[0072] In SPAD 101, photoelectric conversion occurs in well region 111. When electrons in the charge generated by the photoelectric effect drift to the depletion layer of the pn junction, they are accelerated by an electric field based on a reverse bias voltage. In an avalanche photodiode, a reverse bias voltage close to the breakdown voltage is applied. Due to the reverse bias voltage, a strong electric field generates electron avalanches, increasing the charge number. In SPAD 101, a reverse bias voltage exceeding the breakdown voltage is applied. Electron avalanches occur continuously, and the charge number increases rapidly. Therefore, SPAD 101 can detect the incidence of a single photon. By setting SPAD 101, a high-sensitivity pixel 100 can be constructed. The p-type semiconductor region 114 is a semiconductor region arranged adjacent to the well region 111 and constituting the anode. The p-type semiconductor region 114 is formed with a shape having a well region 111 surrounding the n-type semiconductor region 113.

[0073] Wiring region 120 is a wiring region disposed on the front side of semiconductor substrate 110. Wiring layer 122 and insulating layer 121 are disposed in wiring region 120. Wiring layer 122 transmits signals from SPAD 101, etc. Wiring layer 122 may include a metal such as copper (Cu). Insulating layer 121 insulates wiring layer 122. Insulating layer 121 may include, for example, silicon oxide (SiO2). Furthermore, contact plugs 123 for connecting semiconductor regions of semiconductor substrate 110 and wiring layer 122 are disposed in wiring region 120. Semiconductor region 114 forming the anode of SPAD 101 and semiconductor region 113 forming the cathode of SPAD 101 are connected to wiring layer 122 via contact plugs 123. Contact plugs 123 may include, for example, tungsten (W).

[0074] In the wiring area 120, pads 125 and via plugs 124 are also arranged. Pads 125 are electrodes arranged on the surface of the wiring area 120. Pads 125 may include, for example, Cu. The via plug 124 connects the wiring layer 122 and the pads 125. The via plug 124 may include, for example, Cu.

[0075] Semiconductor substrate 130 is a semiconductor substrate bonded to semiconductor substrate 110. For example, a semiconductor substrate such as... can be formed on semiconductor substrate 130. Figure 1 The diffusion region of components such as the optical receiving signal processing unit 30 shown.

[0076] Wiring region 140 is a wiring region formed on the surface side of semiconductor substrate 130 and includes wiring layer 142 and insulating layer 141. Furthermore, pads 145 are disposed in wiring region 140 and connected to wiring layer 142 via via plugs 143. When semiconductor substrate 130 is bonded to semiconductor substrate 110, pads 145 and 125 are bonded. Signals can be exchanged between components disposed on semiconductor substrates 110 and 130 via pads 145 and 125.

[0077] A semiconductor region light-shielding wall 152 is disposed on the semiconductor substrate 110 at the boundary with the pixel 100 and blocks incident light. The semiconductor region light-shielding wall 152 is formed as a wall surrounding the pixel 100 and blocks incident light incident obliquely from adjacent pixels 100. Therefore, crosstalk can be reduced. Figure 2 In the pixel region 11 shown, the semiconductor region light-shielding walls 152 are arranged in a grid pattern. The semiconductor region light-shielding walls 152 can be constructed by embedding a light-shielding material such as metal in a groove 150 formed through the semiconductor substrate 110.

[0078] Furthermore, the light-shielding wall 152 of the semiconductor region is formed to protrude towards the back side of the semiconductor substrate 110, and an opening 159 is arranged therein. The opening 159 can be formed as a circle in the plan view. The on-chip lens 160 described later is arranged in the opening 159.

[0079] The insulating film 151 is a film that insulates the back side of the semiconductor substrate 110. The insulating film 151 in the figure is also arranged adjacent to the semiconductor substrate 110 on the side of the recess 150, and insulates the semiconductor substrate 110 and the light-shielding wall 152 of the semiconductor region. The insulating film 151 may include, for example, SiO2 or silicon nitride (SiN). Note that a fixed charge film for pinning may be disposed between the insulating film 151 and the semiconductor substrate 110. This fixed charge film may include aluminum oxide (Al2O3) or hafnium oxide (HfO2).

[0080] The insulating film 153 is a film disposed on the surface of the light-shielding wall 152 of the semiconductor region and insulating the light-shielding wall 152 of the semiconductor region. The insulating film 153 may include, for example, SiO2.

[0081] The on-chip lens 160 is a lens that focuses incident light. The on-chip lens 160 is formed in a hemispherical shape, disposed on the back side of the semiconductor substrate 110, and focuses the incident light onto the well region 111 forming the SPAD 101. The on-chip lens 160 may comprise inorganic materials such as SiN or organic materials such as acrylic resin.

[0082] An anti-reflective film 169 is disposed on the surface of the on-chip lens 160. This anti-reflective film 169 is a film that prevents incident light from being reflected from the surface of the on-chip lens 160. The anti-reflective film 169 may include, for example, SiO2 or silicon oxynitride (SiON). The anti-reflective film 169 in the figure is formed to have a shape covering the on-chip lens 160 and the insulating film 153.

[0083] Composition of adjacent pixels

[0084] Figure 4 This diagram illustrates an example of the configuration of adjacent pixels according to the first embodiment of this disclosure. It is a cross-sectional view showing an example of the configuration of adjacent pixels 400. The diagram also shows pixels 100 disposed at the ends of pixel region 11. Note that this diagram schematically illustrates the configuration of pixel 100 and adjacent pixels 400. Although illustrations of the semiconductor region of semiconductor substrate 110, etc., are omitted, SPADs, etc., are also disposed in adjacent pixels 400. Furthermore, illustrations of anti-reflective film 169, semiconductor substrate 130, and wiring region 140 are omitted.

[0085] The difference between adjacent pixel 400 and pixel 100 in the figure is that an on-chip lens 161 is provided instead of on-chip lens 160. On-chip lens 161 is formed with an on-chip lens having a different curvature than on-chip lens 160. On-chip lens 161 in the figure has a hemispherical shape with a curvature smaller than that of on-chip lens 160. Therefore, on-chip lens 161 focuses incident light deep into the semiconductor substrate. The dashed lines shown in adjacent pixel 400 in the figure are based on the assumption that on-chip lens 160 is arranged, and the dashed arrows indicate incident light focused by on-chip lens 160. The incident light focused by on-chip lens 160 with a large curvature is incident on semiconductor substrate 110 at a large angle of incidence. If the incident light is not absorbed by semiconductor substrate 110, the incident light is reflected twice by semiconductor region light-shielding wall 152 and incident on wiring region 120. Since the incident light also strikes the wiring region 120 at a large angle, when the incident light is reflected by the wiring layer 122, it strikes the semiconductor substrate 110 of the pixel 100. As a result, crosstalk, flare, etc. occur.

[0086] On the other hand, because the on-chip lens 161 has a small curvature, the incident light is incident on the semiconductor substrate 110 at a small angle of incidence. The solid arrows in the figure indicate the incident light in the case of the on-chip lens 161. This incident light is reflected once by the semiconductor region light-shielding wall 152, incident on the wiring region 120, and reflected by the wiring layer 122. Because the angle of incidence on the wiring layer 122 is small, the reflected light is incident on the side of the adjacent pixel 400. Therefore, crosstalk can be reduced.

[0087] The manufacturing method of this on-film lens 161 will be described. As a manufacturing method for on-film lenses 160 and 161, a so-called hot melt flow method can be used. This hot melt flow method is a manufacturing method in which the material resin of the on-film lens 160 is melted and formed into a hemispherical shape.

[0088] [Manufacturing method of on-plate lens]

[0089] Figure 5 This is a diagram illustrating an example of a method for manufacturing an on-chip lens according to a first embodiment of the present disclosure. The diagram illustrates an example of the manufacturing process of on-chip lenses 160 and 161. First, a recess 150 is formed in a semiconductor substrate 110. This can be formed, for example, by dry etching of the semiconductor substrate 110. Next, an insulating film 151 (not shown) is disposed on the back side of the semiconductor substrate 110 including the recess 150. This can be done, for example, by forming a film of insulating material through sputtering. Next, a metal film, serving as a material for a light-shielding wall 152 in the semiconductor region, is disposed on the back side of the semiconductor substrate 110 including the recess 150. This can be done by sputtering. Next, a circular opening 159 (A in the figure) is formed in the metal film by etching.

[0090] Next, a resin film 501, which serves as the material for on-chip lenses 160 and 161, is disposed on the back side of the semiconductor substrate 110. For this resin film 501, a photosensitive acrylic resin (B in the figure) can be used.

[0091] Next, the resin film 501 is subjected to photolithography to generate cylindrical resin layers 502 and 503. Resin layer 502 is disposed within the opening 159 of pixel 100. The volume of resin layer 503 is smaller than that of resin layer 502, and it is disposed in the opening 159 of adjacent pixel 400 (C in the figure).

[0092] Next, the semiconductor substrate 110 is heated by reflow and the resin layers 502 and 503 are heated to a temperature above their softening point. As a result, the resin layers 502 and 503 melt and diffuse into the opening 159. At this time, the molten resin layers 502 and 503 are blocked by the ends of the opening 159 and form a hemispherical shape due to surface tension. The large resin layer 502 transforms into an on-chip lens 160 with a large curvature, and the small resin layer 503 transforms into an on-chip lens 161 with a small curvature (D in the figure). Through the above steps, the on-chip lens 161 can be fabricated.

[0093] Note that a so-called dry etching method can be used as the manufacturing method for the on-chip lens 161. In this dry etching method, material films for on-chip lenses 160 and 161 are arranged on the back side of the semiconductor substrate 110, and a hemispherical resist is formed on the material film. Next, the shape of the resist is transferred to the on-chip lens material film by dry etching the resist and the on-chip lens material film under the resist, and an on-chip lens is formed. When the on-chip lens is formed using this dry etching method, the on-chip lens 160 is formed in the pixel 100, and on-chip lenses with the same shape as the on-chip lens 160 are also arranged in adjacent pixels 400. Afterwards, while protecting the on-chip lens 160 of the pixel 100 with a resist or the like, the on-chip lenses of the adjacent pixels 400 are ground and thinned. Therefore, an on-chip lens 161 with a small curvature can be formed.

[0094] As described above, the light receiving element 2 according to the first embodiment of this disclosure is configured such that an on-chip lens 161 with a small curvature is arranged in an adjacent pixel 400 arranged adjacent to the pixel region 11, thereby reducing incident light leakage to the pixel 100 of the pixel region 11. Failure of the light receiving element 2 can be prevented.

[0095] <2 Second Implementation Plan>

[0096] In the light-receiving element 2 of the first embodiment described above, an on-chip lens 161 with a small curvature is arranged in adjacent pixels 400. On the other hand, the light-receiving element 2 according to the second embodiment of this disclosure differs from the first embodiment in that the on-chip lens of the adjacent pixels 400 is omitted.

[0097] Composition of adjacent pixels

[0098] Figure 6 This diagram illustrates an example of the configuration of adjacent pixels according to a second embodiment of the present disclosure. The diagram represents... Figure 4 A diagram showing a similar example of adjacent pixels 400. Figure 6 Adjacent pixel 400 and Figure 4 The difference between adjacent pixels 400 is that no on-chip lens 161 is arranged in adjacent pixels 400.

[0099] In the figure, a protective film 163 is disposed on the back side of the semiconductor substrate 110 of adjacent pixels 400 to replace an on-chip lens. The protective film 163 is a film containing the same material as the on-chip lens and protects the back side of the semiconductor substrate 110. Since no on-chip lens is disposed, the incident light from adjacent pixels 400 does not converge and is incident on the semiconductor substrate 110 substantially perpendicularly. Therefore, the light passes through the semiconductor substrate 110 without being reflected by the semiconductor region light-shielding wall 152 and reaches the wiring region 120. In the case where the light is reflected by the wiring layer 122, the reflected light returns to the adjacent pixel 400, and the light incident on pixel 100 can be reduced. Note that the protective film 163 can be regarded as an on-chip lens with extremely small curvature or zero curvature. Note that, similar to the on-chip lens 160, an anti-reflective film 169 can also be disposed on the surface of the protective film 163.

[0100] The other configurations of the optical receiving element 2 are similar to those described in the first embodiment of this disclosure, and therefore will not be described again.

[0101] As described above, the light receiving element 2 according to the second embodiment of this disclosure can further reduce incident light leakage to pixel 100 by omitting the on-chip lens of adjacent pixel 400. This can prevent malfunctions of the light receiving element 2.

[0102] <3. Third Implementation Plan>

[0103] In the light-receiving element 2 of the first embodiment described above, the semiconductor region light-shielding wall 152 is arranged around the adjacent pixel 400. On the other hand, the light-receiving element 2 according to the third embodiment of this disclosure differs from the first embodiment in that the semiconductor region light-shielding wall is arranged at the boundary between the adjacent pixel 400 and pixel 100.

[0104] Composition of adjacent pixels

[0105] Figure 7 This diagram illustrates an example of the configuration of adjacent pixels according to a third embodiment of this disclosure. The diagram represents... Figure 4 A diagram showing a similar example of adjacent pixels 400. Figure 7 Adjacent pixel 400 and Figure 2 The difference between adjacent pixels 400 is that an on-chip lens 160 is arranged in adjacent pixels 400 instead of an on-chip lens 161 and the semiconductor region light-shielding wall 152 at the boundary between adjacent pixels 400 is omitted.

[0106] In the figure, on-chip lenses 160 with the same curvature are arranged in pixel 100 and adjacent pixels 400. Furthermore, semiconductor region light-shielding walls 152 are arranged at the boundary between pixel 100 and adjacent pixels 400, but no semiconductor region light-shielding walls are arranged at the boundary between adjacent pixels 400. That is, semiconductor region light-shielding walls at the boundary of adjacent pixels 400 other than the boundary with pixel 100 are omitted. Therefore, as shown by the solid arrow in the figure, the incident light reflected by the semiconductor region light-shielding walls 152 at the boundary with pixel 100 propagates directly away from pixel region 11.

[0107] The other configurations of the optical receiving element 2 are similar to those described in the first embodiment of this disclosure, and therefore will not be described again.

[0108] As described above, the light-receiving element 2 according to the third embodiment of this disclosure is configured to omit the semiconductor region light-shielding wall at the boundary other than the boundary with pixel 100 in adjacent pixels 400, thereby preventing reflected light toward pixel region 11. Failure of the light-receiving element 2 can be prevented.

[0109] <4. Fourth Implementation Plan>

[0110] In the light-receiving element 2 of the first embodiment described above, the wiring layer 122 is arranged in the wiring region 120. On the other hand, the light-receiving element 2 according to the fourth embodiment of this disclosure differs from the first embodiment in that a wiring layer with a reduced size is arranged in adjacent pixels 400.

[0111] Composition of adjacent pixels

[0112] Figure 8 This diagram illustrates an example of the configuration of adjacent pixels according to the fourth embodiment of this disclosure. The diagram represents... Figure 4 A diagram showing a similar example of adjacent pixels 400. Figure 8 Adjacent pixel 400 and Figure 2 The difference between adjacent pixels 400 is that wiring layer 126 is arranged instead of wiring layer 122.

[0113] In the figure, wiring layer 126 is arranged in adjacent pixels 400. This wiring layer 126 is a wiring layer with a different size than the wiring layer 122 arranged in pixel 100. Specifically, the width of wiring layer 126 is smaller than the width of wiring layer 122. Note that wiring layer 126 can be formed to have the same thickness as wiring layer 122 and can be arranged in the same layer as wiring layer 122. By reducing the width of wiring layer 126, the area of ​​the surface on which incident light is incident is reduced, and the reflected light from wiring layer 126 is reduced. Therefore, the incident light leaking into pixel 100 is also reduced. On the other hand, by arranging wiring layer 126 in the wiring region of adjacent pixels 400, the wiring region of pixel 100 at the end of pixel region 11 can be formed uniformly, and gaps and the like can be prevented.

[0114] This figure illustrates an example where wiring layer 126 is arranged only in the bottom layer of wiring region 120 of adjacent pixels 400. The arrangement of wiring layer 126 is not limited to this example. For example, wiring layer 126 with a width smaller than wiring layer 122 can be arranged in all layers of wiring region 120.

[0115] Note that the configuration of adjacent pixels 400 is not limited to this example. For example, the number of wiring layers arranged in adjacent pixels 400 can be reduced compared to wiring layer 122 of pixel 100. Furthermore, wiring layers of adjacent pixels 400 can be omitted.

[0116] The other configurations of the optical receiving element 2 are similar to those described in the first embodiment of this disclosure, and therefore will not be described again.

[0117] As described above, the light receiving element 2 according to the fourth embodiment of this disclosure is configured such that a wiring layer 126 having a width smaller than that of the wiring layer 122 of the pixel 100 is arranged in adjacent pixels 400, thereby reducing incident light leakage to the pixel 100. Failure of the light receiving element 2 can be prevented.

[0118] <5. Fifth Implementation Plan>

[0119] In the light-receiving element 2 of the first embodiment described above, the wiring layer 122 is arranged in the wiring region 120. On the other hand, the light-receiving element 2 according to the fifth embodiment of this disclosure differs from the first embodiment in that a wiring layer covering the semiconductor substrate 110 is arranged in adjacent pixels 400.

[0120] Composition of adjacent pixels

[0121] Figure 9 This diagram illustrates an example of the configuration of adjacent pixels according to a fifth embodiment of the present disclosure. The diagram represents... Figure 4 A diagram showing a similar example of adjacent pixels 400. Figure 9 Adjacent pixel 400 and Figure 2 The difference between adjacent pixels 400 is that a wiring layer 127 is provided.

[0122] In the figure, wiring layer 127 is disposed in adjacent pixel 400. Wiring layer 127 is a wiring layer having a different size than wiring layer 122 of pixel 100, and is formed to have a shape covering semiconductor substrate 110 in adjacent pixel 400. By arranging wiring layer 127, the surface side of semiconductor substrate 110 is shielded from light, which can reduce incident light leakage to pixel 100. By arranging wiring layer 127 close to semiconductor substrate 110, the light shielding effect can be improved. Although the figure shows an example of wiring layer 127 being disposed in the same layer as wiring layer 122 of pixel 100, wiring layer 127 can be disposed in a different location than wiring layer 122. For example, wiring layer 127 can be disposed adjacent to semiconductor substrate 110. Note that wiring layer 127 is an example of light-shielding wiring described in the claims.

[0123] Note that the configuration of adjacent pixels 400 is not limited to this example. For example, a wiring layer with a width greater than the width of wiring layer 122 can be arranged in adjacent pixels 400. By arranging this large-width wiring layer 122 on the front surface side of the semiconductor substrate 110, the incident light from adjacent pixels 400 can be reduced from entering the wiring region 120.

[0124] In addition, instead of wiring layer 127, contact plugs having a shape covering semiconductor substrate 110 can be arranged in adjacent pixels 400. Specifically, using the same material as contact plug 123, a light-shielding film in the form of a contact plug formed simultaneously with contact plug 123 can be arranged to block light.

[0125] The other configurations of the optical receiving element 2 are similar to those described in the first embodiment of this disclosure, and therefore will not be described again.

[0126] As described above, the light receiving element 2 according to the fifth embodiment of this disclosure is configured such that a wiring layer 127 is arranged in adjacent pixels 400 to block light from the front side of the semiconductor substrate 110, thereby reducing incident light leakage to the pixel 100. Failure of the light receiving element 2 can be prevented.

[0127] <6. Sixth Implementation Plan>

[0128] In the light-receiving element 2 of the fifth embodiment described above, a wiring layer 127 is arranged in the wiring region 120. On the other hand, the light-receiving element 2 according to the sixth embodiment of this disclosure differs from the fifth embodiment in that a wall-like portion is also provided between the wiring layer 127 and the semiconductor substrate 110.

[0129] Composition of adjacent pixels

[0130] Figure 10 This is a diagram illustrating an example of the configuration of adjacent pixels according to the sixth embodiment of this disclosure. The diagram illustrates... Figure 9 A diagram showing a similar example of adjacent pixels 400. Figure 10 Adjacent pixel 400 and Figure 9 The difference between adjacent pixels 400 is that wall portion 128 is further arranged.

[0131] The wall portion 128 is formed in a wall shape to block incident light. The wall portion 128 is disposed between the wiring layer 127 and the surface of the semiconductor substrate 110 at the boundary between pixel 100 and adjacent pixels 400. The wall portion 128 may include a metal such as W, and may be formed simultaneously with the contact plug 123. By arranging the wall portion 128, the space between the wiring layer 127 and the surface of the semiconductor substrate 110 is shielded from light, and incident light leakage to pixel 100 can be further reduced.

[0132] The other configurations of the optical receiving element 2 are similar to those described in the fifth embodiment of this disclosure, and therefore will not be described again.

[0133] As described above, the light receiving element 2 according to the sixth embodiment of this disclosure is configured to further include a wall portion 128 to shield the space between the wiring layer 127 and the semiconductor substrate 110 from light, thereby further reducing incident light leakage to the pixel 100. This can prevent malfunctions of the light receiving element 2.

[0134] <7. Seventh Implementation Plan>

[0135] In the light-receiving element 2 of the first embodiment described above, a semiconductor region light-shielding wall 152 is arranged on the semiconductor substrate 110 at the boundary between pixel 100 and adjacent pixel 400. On the other hand, the light-receiving element 2 according to the seventh embodiment of this disclosure differs from the first embodiment in that a light-shielding wall is also arranged in the wiring region 120 at the boundary between pixel 100 and adjacent pixel 400.

[0136] Composition of adjacent pixels

[0137] Figure 11 This diagram illustrates an example of the configuration of adjacent pixels according to the seventh embodiment of this disclosure. The diagram represents... Figure 4 A diagram showing a similar example of adjacent pixels 400. Figure 11 Adjacent pixels in Figure 4 The difference between adjacent pixels 400 is that wiring area 120 also has wiring area light-shielding wall 420.

[0138] The wiring area light-shielding wall 420 is formed as a wall to block incident light. The wiring area light-shielding wall 420 can be formed by multiple wiring layers 122 disposed at the boundary between pixel 100 and adjacent pixels 400, and interlayer wall portions 129 as wall-like portions disposed between multiple layers of wiring layers 122. The interlayer wall portions 129 can include a metal such as Cu and can be formed simultaneously with the through-hole plug 124. Furthermore, refer to… Figure 10 The wall portion 128 described herein can be disposed between the surface of the semiconductor substrate 110 and the wiring layer 122. By arranging the wiring area light-shielding wall 420, the wiring area 120 at the boundary between pixel 100 and adjacent pixel 400 is light-shielded, and incident light leakage to pixel 100 can be reduced.

[0139] Note that the configuration of the wiring area light-shielding wall 420 is not limited to this example. For example, the wiring area light-shielding wall 420 may be formed by the wiring layer 122 and a wall portion 128 disposed at the boundary between pixel 100 and adjacent pixel 400. Furthermore, this figure shows a schematic configuration of adjacent pixel 400; of course, the wiring area light-shielding wall 420 may extend to... Figure 3 The wiring area 140. In this case, pads 125 and 145 can be arranged at the boundary between pixel 100 and adjacent pixel 400.

[0140] The other configurations of the optical receiving element 2 are similar to those described in the first embodiment of this disclosure, and therefore will not be described again.

[0141] As described above, the light receiving element 2 according to the seventh embodiment of this disclosure is configured to further arrange a wiring region light-shielding wall 420 in the wiring region 120 to block light from the boundary of the pixel 100, thereby further reducing incident light leakage to the pixel 100. Failure of the light receiving element 2 can be prevented.

[0142] <8. Eighth Implementation Plan>

[0143] The circuit configuration of the pixels 100 arranged in the pixel array unit 10 according to the above embodiment will be explained.

[0144] Pixel composition

[0145] Figure 12 This is a circuit diagram illustrating an example of pixel configuration according to an embodiment of the present disclosure. The diagram is... Figure 1 The circuit diagram illustrates an example of the configuration of pixel 100. Pixel 100 in the figure includes SPAD 101, resistor 102, and inverting buffer 103. Furthermore, signal line 21 in the figure includes a signal line Vbd that applies the breakdown voltage to SPAD 101 and a signal line Vd that provides power for detecting the breakdown state of SPAD 101.

[0146] The anode of SPAD 101 is connected to signal line Vbd. The cathode of SPAD 101 is connected to one end of resistor 102 and the input of inverting buffer 103. The other end of resistor 102 is connected to signal line Vd. The output of inverting buffer 103 is connected to signal line 31.

[0147] A reverse bias voltage is applied to SPAD 101 in the figure through signal lines Vbd and Vd.

[0148] Resistor 102 is used to perform quenching. This quenching is the process of restoring SPAD 101 from a breakdown state to a steady state. When SPAD 101 enters a breakdown state due to the multiplication effect caused by incident light, a rapid reverse current flows through SPAD 101. This reverse current causes an increase in the voltage across resistor 102. Since resistor 102 is connected in series with SPAD 101, a voltage drop occurs due to resistor 102, and the voltage across SPAD 101 becomes lower than the voltage required to maintain the breakdown state. Therefore, SPAD 101 can recover from the breakdown state to a steady state. Note that instead of resistor 102, a constant current circuit utilizing a MOS transistor can also be used.

[0149] The inverting buffer 103 is a buffer that shapes the pulse signal based on the transition and recovery of SPAD 101 to the breakdown state. The inverting buffer 103 generates a light receiving signal based on the current flowing through SPAD 101 corresponding to the illumination light and outputs the light receiving signal to signal line 31.

[0150] <9. Ninth Implementation Plan>

[0151] The configuration of a distance measuring device 1, in which the light receiving element 2 of the above-described embodiment is arranged and the distance to the target is measured, will be explained.

[0152] Composition of distance measuring device

[0153] Figure 13 This figure illustrates an example of the configuration of a distance measuring device according to an embodiment of the present disclosure. The figure is intended to show the use of... Figure 1 The diagram shows a block diagram illustrating an example configuration of the distance measuring device 1 with the light receiving element 2. The distance measuring device 1 in the figure includes the light receiving element 2, the control unit 3, the light source device 4, and the lens 5. Note that the figure shows a target object 601 used for distance measurement.

[0154] The light source device 4 emits light toward the target object to measure distance. For example, a laser light source that emits infrared light can be used as the light source device 4.

[0155] Control unit 3 controls the entire distance measuring device 1. Specifically, control unit 3 controls light source device 4 to emit emitted light 602 towards target object 601 and notifies light receiving element 2 to start emission. Light receiving element 2, notified to emit emitted light 602, detects reflected light 603 from target object 601, measures the time from the emission of emitted light 602 to the detection of reflected light 603, and measures the distance to target object 601. The measured distance is output to the outside of distance measuring device 1 as distance data.

[0156] Note that the configuration of the first embodiment can be combined with the light receiving element 2 in other embodiments. Specifically, Figure 4 The on-chip lens 161 in the middle can be applied to Figures 7 to 11 The optical receiving element 2 in the middle.

[0157] Furthermore, the configuration of the second embodiment can be combined with the light receiving element 2 in other embodiments. Specifically, Figure 6 The protective film 163 in it can be applied to Figures 7 to 11 The optical receiving element 2 in the middle.

[0158] Furthermore, the configuration of the third embodiment can be combined with the light receiving element 2 in other embodiments. Specifically, in Figure 4 , Figure 6 , Figures 8 to 11 In the optical element receiver 2, the semiconductor region light-shielding wall at the boundary outside the boundary between the adjacent pixel 400 and pixel 100 can be omitted.

[0159] Furthermore, the fourth embodiment can be combined with the light receiving element 2 in other embodiments. Specifically, Figure 8 The wiring layer 126 in the middle can be applied to Figure 4 , Figure 6 , Figure 7 , Figure 11 The optical receiving element 2 in the middle.

[0160] Furthermore, the configuration of the fifth embodiment can be combined with the light receiving element 2 in other embodiments. Specifically, Figure 9 The wiring layer 127 in the middle can be applied to Figure 4 , Figure 6 , Figure 7 , Figure 11 The optical receiving element 2 in the middle.

[0161] Furthermore, the configuration of the seventh embodiment can be combined with the light receiving element 2 in other embodiments. Specifically, Figure 11 The light-shielding wall 420 in the wiring area can be applied to Figure 4 , Figures 6 to 10 The optical receiving element 2 in the middle.

[0162] Finally, the description of each of the above embodiments is an example of this disclosure, and this disclosure is not limited to the above embodiments. For this reason, various modifications can of course be made according to the design, etc., in addition to the above embodiments, as long as these modifications do not depart from the technical concept of this disclosure.

[0163] Furthermore, the effects described in this specification are merely illustrative and not intended to be limiting. Other effects may also be provided.

[0164] Furthermore, the accompanying drawings in the above embodiments are schematic, and the dimensions and proportions of each part do not necessarily need to conform to reality. Also, of course, the dimensional relationships and proportions between the different drawings will vary.

[0165] Note that this technology can also be configured as follows.

[0166] (1) An optical receiving element comprising:

[0167] A pixel region, comprising a plurality of pixels, including a photodiode, an on-chip lens, and a wiring region. The photodiode is formed on a semiconductor substrate, and a high reverse bias voltage is used to multiply the charge generated by the photoelectric conversion of incident light. The on-chip lens focuses the incident light onto the photodiode. The wiring region has a wiring layer connected to the photodiode and an insulating layer that insulates the wiring layer.

[0168] Adjacent pixels are arranged adjacent to the pixel region and include the photodiode, an on-chip lens with a curvature different from that of the on-chip lens, and the wiring region.

[0169] (2) The light receiving element according to (1), wherein an on-chip lens with a curvature smaller than that of the on-chip lens of the pixel is arranged in the adjacent pixel.

[0170] (3) An optical receiving element comprising:

[0171] A pixel region, comprising a plurality of pixels, including a photodiode, an on-chip lens, and a wiring region. The photodiode is formed on a semiconductor substrate, and a high reverse bias voltage is used to multiply the charge generated by the photoelectric conversion of incident light. The on-chip lens focuses the incident light onto the photodiode. The wiring region has a wiring layer connected to the photodiode and an insulating layer that insulates the wiring layer.

[0172] Adjacent pixels, which are arranged adjacent to the pixel region, and include the photodiode and a semiconductor region light-shielding wall, which is formed on the semiconductor substrate at the boundary between the wiring region and the pixel adjacent to the wiring region and blocks the incident light.

[0173] (4) The light receiving element according to (3), wherein, in the adjacent pixels, the semiconductor region light-shielding wall is not formed on a boundary different from the boundary of the pixel.

[0174] (5) The light receiving element according to (3) or (4), wherein the light-shielding wall of the semiconductor region is formed by arranging a material that blocks the incident light in a groove formed in the semiconductor substrate.

[0175] (6) An optical receiving element comprising:

[0176] A pixel region, comprising a plurality of pixels, including a photodiode, an on-chip lens, and a wiring region. The photodiode is formed on a semiconductor substrate, and a high reverse bias voltage is used to multiply the charge generated by the photoelectric conversion of incident light. The on-chip lens focuses the incident light onto the photodiode. The wiring region has a wiring layer connected to the photodiode and an insulating layer that insulates the wiring layer.

[0177] Adjacent pixels, which are arranged adjacent to the pixel region, and include the photodiode and the wiring region without the wiring layer.

[0178] (7) An optical receiving element comprising:

[0179] A pixel region, comprising a plurality of pixels, including a photodiode, an on-chip lens, and a wiring region. The photodiode is formed on a semiconductor substrate, and a high reverse bias voltage is used to multiply the charge generated by the photoelectric conversion of incident light. The on-chip lens focuses the incident light onto the photodiode. The wiring region has a wiring layer connected to the photodiode and an insulating layer that insulates the wiring layer.

[0180] Adjacent pixels, which are arranged adjacent to the pixel region, and include a wiring region having the photodiode and a wiring layer arranged in the same layer as the wiring layer and formed with different sizes.

[0181] (8) The light receiving element according to (7), wherein the width of the wiring layer of the wiring region included in the adjacent pixel is smaller than the width of the wiring layer of the pixel.

[0182] (9) The light receiving element according to (7), wherein the adjacent pixel includes the wiring region having light-shielding wiring, the light-shielding wiring being the wiring layer formed having a shape covering the semiconductor substrate.

[0183] (10) The light receiving element according to (9), wherein the adjacent pixel further includes a wall-like portion disposed between the light-shielding wiring and the semiconductor substrate at the boundary with the adjacent pixel of the pixel.

[0184] (11) The light receiving element according to (7), wherein the width of the wiring layer of the wiring region included in the adjacent pixel is greater than the width of the wiring layer of the pixel.

[0185] (12) An optical receiving element comprising:

[0186] A pixel region, comprising a plurality of pixels, including a photodiode, an on-chip lens, and a wiring region. The photodiode is formed on a semiconductor substrate, and a high reverse bias voltage is used to multiply the charge generated by the photoelectric conversion of incident light. The on-chip lens focuses the incident light onto the photodiode. The wiring region has a wiring layer connected to the photodiode and an insulating layer that insulates the wiring layer.

[0187] Adjacent pixels, which are arranged adjacent to the pixel region, and include the photodiode and a wiring area light-shielding wall, which is arranged in the wiring area at the boundary between the wiring area and the pixel adjacent to the wiring area, and blocks the incident light.

[0188] (13) The light receiving element according to (12), wherein the light-shielding wall of the wiring region includes the wiring layer disposed at the boundary of the adjacent pixel of the pixel, and a wall-like portion disposed adjacent to the wiring layer and the semiconductor substrate.

[0189] (14) The light receiving element according to (12) or (13), wherein the wiring area light-shielding wall includes a plurality of wiring layers arranged in multiple layers at the boundary of adjacent pixels of the pixel, and a wall-like interlayer wall portion arranged between each of the plurality of wiring layers.

[0190] (15) A distance measuring device, comprising:

[0191] A pixel region is provided, comprising a plurality of pixels, including a photodiode, an on-chip lens, and a wiring region. The photodiode is formed on a semiconductor substrate, and a high reverse bias voltage is used to multiply the charge generated by photoelectric conversion of incident light. The incident light is light emitted from a light source device and reflected from a target object. The on-chip lens focuses the incident light onto the photodiode. The wiring region has a wiring layer connected to the photodiode and an insulating layer that insulates the wiring layer.

[0192] Adjacent pixels, arranged adjacent to the pixel region, and including the photodiode, an on-chip lens with a curvature different from that of the on-chip lens, and the wiring region; and

[0193] A processing circuit that measures the time from the emission of light from the light source device to the detection of a signal based on the current flowing through the photodiode transmitted by the wiring layer of the pixel, in order to detect the distance of the target object.

[0194] Those skilled in the art will understand that various modifications, combinations, sub-combinations and alterations may occur depending on design requirements and other factors, as long as they are within the scope of the appended claims or their equivalents.

[0195] List of reference numerals

[0196] 1 Distance measuring device

[0197] 2. Light-emitting element

[0198] 10-pixel array unit

[0199] 11-pixel area

[0200] 30 Optical Receiver Signal Processing Unit

[0201] 100 pixels

[0202] 101 SPAD

[0203] 110, 130 Semiconductor substrate

[0204] 120, 140 wiring areas

[0205] 121,141 Insulation layer

[0206] 122, 126, 127, 142 Wiring layers

[0207] 123 Contact plug

[0208] 124,143 Through-hole plugs

[0209] 125, 145 pads

[0210] 128 Wall section

[0211] 129 Interlayer wall

[0212] 150 groove

[0213] 151 Insulating Film

[0214] 152 Semiconductor region light-shielding wall

[0215] 159 Opening

[0216] 160, 161 On-plate lens

[0217] 163 Protective Film

[0218] 169 Anti-reflective film

[0219] 400 adjacent pixels

[0220] 420 Wiring Area Light Shield

Claims

1. A light receiving element, comprising: A pixel region is provided, wherein a plurality of pixels are arranged in the pixel region, the plurality of pixels including a photodiode, an on-chip lens and a wiring region, the photodiode is formed on a semiconductor substrate, and a high reverse bias voltage is used in the photodiode to multiply the charge generated by photoelectric conversion of incident light, the on-chip lens focuses the incident light onto the photodiode, and the wiring region has a wiring layer connected to the photodiode and an insulating layer that insulates the wiring layer; as well as Adjacent pixels, arranged adjacent to the pixel region, and including the photodiode, an on-chip lens with a curvature different from that of the on-chip lens, and the wiring region, wherein the adjacent pixels are arranged between the pixel region and the end of the semiconductor substrate. Among the adjacent pixels, there are on-chip lenses with curvature smaller than that of the on-chip lens of the pixel, and the adjacent pixels are dummy pixels. The adjacent pixel includes a semiconductor region light-shielding wall, which is formed on the semiconductor substrate at the boundary between the adjacent pixel and the pixel, and blocks the incident light.

2. The light-receiving element according to claim 1, wherein In the adjacent pixels, the semiconductor region light-shielding wall is not formed on the boundary that is different from the boundary of the pixel.

3. The light-receiving element according to claim 1 or 2, wherein The light-shielding wall of the semiconductor region is formed by arranging a material that blocks the incident light in a groove formed in the semiconductor substrate.

4. The optical receiving element according to claim 1, wherein, The adjacent pixels include wiring regions that are arranged in the same layer as the wiring layer and are formed as wiring layers with different sizes.

5. The optical receiving element according to claim 4, wherein, The width of the wiring layer in the wiring region included by the adjacent pixel is smaller than the width of the wiring layer of the pixel.

6. The optical receiving element according to claim 4, wherein, The adjacent pixel includes the wiring region having light-shielding wiring, which is the wiring layer formed to have a shape covering the semiconductor substrate.

7. The optical receiving element according to claim 6, wherein, The adjacent pixel further includes a wall-like portion, which is arranged between the light-shielding wiring and the semiconductor substrate at the boundary between the pixel and the adjacent pixel.

8. The optical receiving element according to claim 4, wherein, The width of the wiring layer in the wiring region included by the adjacent pixel is greater than the width of the wiring layer of the pixel.

9. The optical receiving element according to claim 1, wherein, The adjacent pixel includes a wiring area light-shielding wall, which is arranged in the wiring area at the boundary between the adjacent pixel and the pixel, and blocks the incident light.

10. The optical receiving element according to claim 9, wherein, The light-shielding wall of the wiring area includes the wiring layer disposed at the boundary between the pixel and the adjacent pixel, and a wall-like portion disposed adjacent to the wiring layer and the semiconductor substrate.

11. The optical receiving element according to claim 9 or 10, wherein, The light-shielding wall of the wiring area includes a plurality of wiring layers arranged in multiple layers at the boundary between the pixel and the adjacent pixel, and a wall-like interlayer wall portion arranged between each of the plurality of wiring layers.

12. A distance measuring device, comprising: The light receiving element according to any one of claims 1-11, wherein the incident light is light emitted from the light source device and reflected from the target object; as well as A processing circuit that measures the time from the emission of light from the light source device to the detection of a signal based on the current flowing through the photodiode transmitted by the wiring layer of the pixel, in order to detect the distance of the target object.

Images