Multilayer ceramic electronic component and method of manufacturing the same

Abstract

The disclosure provides a multilayer ceramic electronic component and a manufacturing method thereof. The multilayer ceramic electronic component includes a ceramic main body including dielectric layers and first and second internal electrodes, a first external electrode connected to the first internal electrode, and a second external electrode connected to the second internal electrode. The ceramic main body includes a capacitor forming portion having first and second surfaces opposite to each other in a first direction, third and fourth surfaces opposite to each other in a second direction, and fifth and sixth surfaces opposite to each other in a third direction, and further includes a first edge portion disposed on the third and fifth surfaces, and a second edge portion disposed on the fourth and sixth surfaces.

Description

[0001] This application claims the benefit of priority to Korean Patent Application No. 10-2020-0169232, filed on December 7, 2020, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference for all purposes. Technical Field

[0002] This disclosure relates to a multilayer ceramic electronic component. Background Technology

[0003] Typically, electronic components using ceramic materials (such as capacitors, inductors, piezoelectric elements, varistors, or thermistors) include a ceramic body formed using ceramic materials, an internal electrode formed inside the body, and an external electrode mounted on the surface of the ceramic body to connect to the internal electrode.

[0004] In recent years, as electronic products have become smaller and more multifunctional, surface-mount components have also become smaller and more highly functional. Therefore, there is a need for multilayer ceramic electronic components to be formed into products with small size and high capacity.

[0005] In the prior art, the area of ​​the dielectric layer is formed to be larger than the area of ​​the inner electrode, such that the edge portion is formed around the inner electrode except for the portion connected to the outer electrode. However, in this case, when tens to hundreds of dielectric layers are stacked, the dielectric layers are stretched to fill the step portion, and the inner electrode also bends. When the inner electrode bends, a problem of reduced breakdown voltage (BDV) occurs in the corresponding portion.

[0006] To prevent this problem, a method for separately preparing and attaching sheet-shaped edges has recently been used. However, when separately manufactured sheets are attached to form the edges, a delamination problem occurs between the edges and the ceramic body. Summary of the Invention

[0007] An exemplary embodiment provides a multilayer ceramic electronic component with improved moisture resistance reliability.

[0008] An exemplary embodiment provides a multilayer ceramic electronic component with improved mechanical strength.

[0009] According to an exemplary embodiment, a multilayer ceramic electronic component includes: a ceramic body including a dielectric layer and a first inner electrode and a second inner electrode, the first inner electrode and the second inner electrode being configured to face each other, and the dielectric layer being disposed between the first inner electrode and the second inner electrode; a first outer electrode connected to the first inner electrode; and a second outer electrode connected to the second inner electrode. The ceramic body includes a capacitor forming portion having a first surface and a second surface facing each other in a first direction, a third surface and a fourth surface facing each other in a second direction, and a fifth surface and a sixth surface facing each other in a third direction. In the capacitor forming portion, the first inner electrode and the second inner electrode are stacked in the third direction to form a capacitor. The ceramic body further includes: a first edge portion disposed on the third surface and the fifth surface of the capacitor forming portion; and a second edge portion disposed on the fourth surface and the sixth surface of the capacitor forming portion and distinguished from the first edge portion.

[0010] According to an exemplary embodiment, a multilayer ceramic electronic component includes: a ceramic body including a dielectric layer and a first inner electrode and a second inner electrode, the first inner electrode and the second inner electrode being configured to face each other, and the dielectric layer being disposed between the first inner electrode and the second inner electrode; a first outer electrode connected to the first inner electrode; and a second outer electrode connected to the second inner electrode. The ceramic body includes a capacitor forming portion having a first surface and a second surface facing each other in a first direction, a third surface and a fourth surface facing each other in a second direction, and a fifth surface and a sixth surface facing each other in a third direction. In the capacitor forming portion, the first inner electrode and the second inner electrode are stacked in the third direction to form a capacitor. The ceramic body further includes: a first edge portion disposed on the third surface and the fifth surface; and a second edge portion disposed on the fourth surface and the sixth surface.

[0011] According to an exemplary embodiment, a multilayer ceramic electronic component includes: a ceramic body including a dielectric layer and a first inner electrode and a second inner electrode, the first inner electrode and the second inner electrode being configured to face each other, and the dielectric layer being intermediate between the first inner electrode and the second inner electrode; a first outer electrode connected to the first inner electrode; and a second outer electrode connected to the second inner electrode. The ceramic body includes a capacitor forming portion having a first surface and a second surface facing each other in a first direction, a third surface and a fourth surface facing each other in a second direction, and a fifth surface and a sixth surface facing each other in a third direction. In the capacitor forming portion, the first inner electrode and the second inner electrode are stacked in the third direction to form a capacitor. The ceramic body also includes edge portions disposed on the third surface, the fourth surface, the fifth surface, and the sixth surface. In a second-third-direction cross-section, the interfaces between the edge portions are only disposed at two diagonal corners of the ceramic body.

[0012] According to an exemplary embodiment, a method for manufacturing a multilayer ceramic electronic component includes: forming a capacitor forming portion having a first surface and a second surface opposite to each other in a first direction, a third surface and a fourth surface opposite to each other in a second direction, and a fifth surface and a sixth surface opposite to each other in a third direction; the capacitor forming portion including a first inner electrode and a second inner electrode stacked in the third direction to form a capacitor; simultaneously forming a first edge portion on the third surface and the fifth surface; simultaneously forming a second edge portion on the fourth surface and the sixth surface; forming a first outer electrode connected to the first inner electrode; and forming a second outer electrode connected to the second inner electrode. Attached Figure Description

[0013] The above and other aspects, features and advantages of the present invention will be more clearly understood by taking into account the accompanying drawings and the following detailed description, in which:

[0014] Figure 1 This is a schematic perspective view of a multilayer ceramic electronic assembly according to an exemplary embodiment;

[0015] Figure 2 It is shown schematically. Figure 1 A three-dimensional view of the ceramic body;

[0016] Figure 3 It is shown schematically. Figure 1 A three-dimensional view of the capacitor forming part;

[0017] Figure 4 It is along Figure 1 A cross-sectional view taken from line I-I';

[0018] Figure 5 It is along Figure 1 A cross-sectional view taken from line II-II';

[0019] Figure 6 yes Figure 5 Enlarged views of regions A and B;

[0020] Figure 7 This is a perspective view schematically illustrating the ceramic body of a multilayer ceramic electronic component according to another exemplary embodiment;

[0021] Figure 8 It is along Figure 7 A cross-sectional view taken from line III-III';

[0022] Figure 9 yes Figure 8 Enlarged views of regions C and D;

[0023] Figure 10 This is a perspective view schematically illustrating the ceramic body of a multilayer ceramic electronic component according to another exemplary embodiment;

[0024] Figure 11 It is along Figure 10 A cross-sectional view taken from line IV-IV';

[0025] Figure 12 yes Figure 11 Enlarged views of regions E and F;

[0026] Figure 13 It is a schematic representation of manufacturing. Figure 1 A three-dimensional view of a portion of the manufacturing process of a multilayer ceramic electronic component; and

[0027] Figure 14 It is an image of a layered overlay that occurs within the structure of existing technology. Detailed Implementation

[0028] The following detailed embodiments are provided to aid the reader in gaining a comprehensive understanding of the methods, apparatus, and / or systems described herein. However, various variations, modifications, and equivalents of the methods, apparatus, and / or systems described herein will be readily understood by those skilled in the art. The order of operations described herein is merely illustrative and is not limited to the order presented, but rather, changes that will be readily understood by those skilled in the art may be made, except for operations that must occur in a specific order. Furthermore, for clarity and brevity, descriptions of functions and constructions that are well-known to those skilled in the art may be omitted.

[0029] The features described herein may be presented in various forms and are not to be construed as being limited to the examples described herein. Rather, the examples provided herein make this disclosure thorough and complete, and will fully convey the scope of this disclosure to those skilled in the art.

[0030] Here, it should be noted that the use of the term "may" in relation to examples or embodiments (e.g., what an example or embodiment may include or implement) means that there exists at least one example or embodiment that includes or implements such a feature, and is not limited to all examples and embodiments that include or implement such a feature.

[0031] Throughout the specification, when an element (such as a layer, region, or substrate) is described as being "on" another element, "connected" to another element, or "bonded" to another element, the element may be directly "on" said other element, directly "connected" to said other element, or directly "bonded" to said other element, or there may be one or more other elements in between. In contrast, when an element is described as being "directly on" another element, "directly connected" to another element, or "directly bonded" to another element, there are no other elements in between.

[0032] As used herein, the term “and / or” includes any one or any combination of two or more of the relevant listed items.

[0033] Although terms such as “first,” “second,” and “third” may be used herein to describe various components, assemblies, regions, layers, or parts, these components, assemblies, regions, layers, or parts are not limited by these terms. Rather, these terms are used only to distinguish one component, assembly, region, layer, or part from another. Therefore, without departing from the teachings of the examples described herein, the first component, first assembly, first region, first layer, or first part referred to as the first component, first assembly, first region, first layer, or first part may also be referred to as the second component, second assembly, second region, second layer, or second part.

[0034] For ease of description, spatial relative terms such as “above,” “above,” “below,” and “under” are used herein to describe the relationship between one element and another, as shown in the accompanying drawings. Such spatial relative terms are intended to encompass not only the orientation depicted in the drawings but also different orientations of the device during use or operation. For example, if the device in the drawings is flipped, an element described as being “above” or “above” relative to another element will then be “below” or “under” relative to that other element. Thus, the term “above” encompasses both above and below orientations depending on the spatial orientation of the device. The device may also be positioned in other ways (e.g., rotated 90 degrees or in other orientations), and the spatial relative terms used herein will be interpreted accordingly.

[0035] The terminology used herein is for the purpose of describing various examples only and is not intended to limit this disclosure. Unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. The terms “comprising,” “including,” and “having” enumerate the presence of the stated features, quantities, operations, components, elements, and / or combinations thereof, but do not exclude the presence or addition of one or more other features, quantities, operations, components, elements, and / or combinations thereof.

[0036] Due to manufacturing techniques and / or tolerances, variations in the shapes shown in the accompanying drawings may occur. Therefore, the examples described herein are not limited to the specific shapes shown in the drawings, but include shape variations that occur during manufacturing.

[0037] The features of the examples described herein can be combined in various ways that will be readily understood after an understanding of the disclosure of this application. Furthermore, although the examples described herein have various configurations, other configurations that will be readily understood after an understanding of the disclosure of this application are possible.

[0038] The accompanying drawings may be drawn off-scale, and for clarity, illustration, and convenience, the relative sizes, proportions, and depictions of the elements in the drawings may be exaggerated.

[0039] In this specification, expressions such as “A or B”, “at least one of A and / or B”, or “one or more of A and / or B” may include all possible combinations of the items listed together. For example, “A or B”, “at least one of A and B”, or “at least one of A or B” may refer to all of the following: (1) at least one A, (2) at least one B, or (3) both at least one A and at least one B.

[0040] In the accompanying drawings, the X direction can be defined as a first direction, the L direction, or the length direction; the Y direction can be defined as a second direction, the W direction, or the width direction; and the Z direction can be defined as a third direction, the T direction, or the thickness direction.

[0041] This disclosure relates to a multilayer ceramic electronic component. Figures 1 to 6 This is a schematic diagram illustrating a multilayer ceramic electronic assembly according to an exemplary embodiment. (Refer to...) Figures 1 to 6 According to an embodiment, a multilayer ceramic electronic component 100 includes: a ceramic body 110, including a dielectric layer 111 and a first inner electrode 121 and a second inner electrode 122 disposed facing each other, with the dielectric layer 111 disposed between the first inner electrode 121 and the second inner electrode 122; a first outer electrode 131 connected to the first inner electrode 121; and a second outer electrode 132 connected to the second inner electrode 122. The ceramic body 110 includes a capacitor forming portion 120, in which the first inner electrode 121 and the second inner electrode 122 are stacked in a third direction (Z direction) to form a capacitor. The capacitor forming portion 120 has a first surface S1 and a second surface S2 facing each other in a first direction (X direction), a third surface S3 and a fourth surface S4 facing each other in a second direction (Y direction), and a fifth surface S5 and a sixth surface S6 facing each other in a third direction (Z direction). The ceramic body 110 also includes: a first edge portion 113 disposed on the third surface S3 and the fifth surface S5 of the capacitor forming portion 120; and a second edge portion 112 disposed on the fourth surface S4 and the sixth surface S6 of the capacitor forming portion 120.

[0042] In the ceramic body 110 of this embodiment, the provision of the first edge portion 113 on the third surface S3 and the fifth surface S5 of the capacitor forming portion 120 can refer to the provision of the first edge portion on two of the two surfaces of the capacitor forming portion 120 in the second direction (Y direction) and on two of the two surfaces of the capacitor forming portion 120 in the third direction (Z direction). Similarly, in the ceramic body 110, the provision of the second edge portion 112 on the fourth surface and the sixth surface of the capacitor forming portion 120 can refer to the provision of the second edge portion 112 on two of the two surfaces of the capacitor forming portion 120 in the second direction (Y direction) and on two other surfaces of the capacitor forming portion 120 in the third direction (Z direction). For example, the multilayer ceramic electronic assembly of this embodiment may have the following structure: each of the two edge portions (e.g., the first edge portion 113 and the second edge portion 112) is provided on one of the two surfaces of the capacitor forming portion in the second direction (Y direction) and on one of the two surfaces of the capacitor forming portion in the third direction (Z direction).

[0043] Figure 14This is an image of a YZ cross-section (i.e., the width-thickness cross-section) of a prior art multilayer ceramic electronic assembly. Prior art multilayer ceramic electronic assemblies have a structure in which a cover portion is attached to the top and bottom of a capacitor forming portion, and then edge portions are attached to the sides of the capacitor forming portion and the cover portion. In this case, there may be a problem where the edge portions are exposed during the manufacturing process. Figure 14 This illustrates a multilayer ceramic electronic assembly with open edges as described above. (Refer to...) Figure 14 In cases where stratification occurs at the edges, the inner electrode is directly exposed to external moisture.

[0044] Furthermore, embodiments of this disclosure have a structure in which the cover portion and the edge portion are not formed separately. The aforementioned delamination of the cover portion and the edge portion may occur due to different polishing degrees of the cover portion and the edge portion during the polishing process of the ceramic body (due to different polishing degrees resulting from density differences between the cover portion and the edge portion), and may also occur due to differences in shrinkage behavior during the sintering process of the cover portion and the edge portion. In the multilayer ceramic electronic assembly 100 according to an embodiment, a first edge portion 113 is provided on the third surface S3 and the fifth surface S5 of the capacitor forming portion 120, and a second edge portion 112 is provided on the fourth surface S4 and the sixth surface S6 of the capacitor forming portion 120, to reduce the number of bonding points between the cover portion and the edge portion, thereby reducing the possibility of delamination.

[0045] In an embodiment, the ceramic body 110 may include a capacitor forming portion 120, a first edge portion 113, and a second edge portion 112.

[0046] There are no particular limitations on the specific shape of the ceramic body 110, but as shown in the figure, the ceramic body 110 may have a hexahedral or similar shape. Due to the shrinkage of the ceramic powder contained in the ceramic body 110 during the sintering process, the ceramic body 110 may have a substantially hexahedral shape, but not a hexahedral shape with perfectly straight lines. If desired, the ceramic body 110 may be rounded so that the edges are not angled. Rounding may be performed using methods such as barrel polishing, but the method is not limited to this.

[0047] In the capacitor forming section 120 of the multilayer ceramic electronic assembly 100 according to the embodiment, dielectric layers 111, first internal electrodes 121, and second internal electrodes 122 may be stacked alternately. Dielectric layers 111, first internal electrodes 121, and second internal electrodes 122 may be stacked in a third direction (Z direction). The plurality of dielectric layers 111 forming the capacitor forming section 120 are in a sintered state, and the boundaries between adjacent dielectric layers 111 may be integrated to make them difficult to determine without using a scanning electron microscope (SEM).

[0048] According to the embodiments, the raw materials used to form the dielectric layer 111 are not particularly limited, as long as sufficient capacitance can be obtained. For example, barium titanate-based materials, lead-based perovskite composite materials, strontium titanate-based materials, etc., can be used, or materials composed of (Ba... 1- x Ca x (Ti) 1-y (Zr,Sn,Hf) y The composition includes components such as O3 (in this case, 0≤x≤1 and 0≤y≤0.5). Furthermore, for the purposes of this disclosure, various ceramic additives, organic solvents, plasticizers, binders, dispersants, etc., can be added to powders such as barium titanate (BaTiO3) as materials for forming the dielectric layer 111.

[0049] Depending on the requirements, dielectric layer 111 can be formed by adding additives to a slurry containing the above-mentioned materials, coating it onto a carrier film, and drying it to prepare multiple ceramic sheets. The ceramic sheets can be formed by using a doctor blade to shape the slurry into sheets several μm thick, but the formation method is not limited to this.

[0050] The first inner electrode 121 and the second inner electrode 122 can be stacked such that their end surfaces are respectively exposed at opposite ends of the ceramic body 110. Specifically, the first inner electrode 121 and the second inner electrode 122 can be respectively exposed on two surfaces of the ceramic body 110 in the first direction (X direction), and the first inner electrode 121 can be exposed on the first surface S1 of the capacitor forming portion 120, and the second inner electrode 122 can be exposed on the second surface S2 of the capacitor forming portion 120.

[0051] There are no particular limitations on the materials used to form the first internal electrode 121 and the second internal electrode 122. For example, conductive pastes containing at least one of silver (Ag), palladium (Pd), gold (Au), platinum (Pt), nickel (Ni), copper (Cu), tin (Sn), tungsten (W), titanium (Ti), and alloys thereof can be used.

[0052] The capacitor forming portion 120 can be formed by alternately stacking ceramic green sheets on which a first internal electrode 121 is printed and ceramic green sheets on which a second internal electrode 122 is printed in a third direction (Z direction). The printing method of the first internal electrode 121 and the second internal electrode 122 can be screen printing or gravure printing, but is not limited to these methods.

[0053] According to an embodiment, the ceramic body 110 may include a capacitor forming portion 120, a first edge portion 113 disposed on a third surface S3 and a fifth surface S5 of the capacitor forming portion 120, and a second edge portion 112 disposed on a fourth surface S4 and a sixth surface S6 of the capacitor forming portion 120.

[0054] In an embodiment, the first edge portion 113 of the multilayer ceramic electronic component 100 is configured to simultaneously contact the third surface S3 and the fifth surface S5 of the capacitor forming portion 120, and the second edge portion 112 may be configured to simultaneously contact the fourth surface S4 and the sixth surface S6 of the capacitor forming portion 120. (Refer to...) Figures 1 to 6 A first edge portion 113 is attached to the third surface S3 of the capacitor forming portion 120. Simultaneously, the first edge portion 113 may extend to the fifth surface S5 of the capacitor forming portion 120 and be attached while contacting the fifth surface S5. Optionally, the first edge portion 113 may extend to the first surface S1 and the second surface S2 of the capacitor forming portion 120. Furthermore, a second edge portion 112 is attached while contacting the fourth surface S4 of the capacitor forming portion 120. Simultaneously, the second edge portion 112 may extend to the sixth surface S6 of the capacitor forming portion 120 and be attached while contacting the sixth surface S6. Optionally, the second edge portion 112 may extend to the first surface S1 and the second surface S2 of the capacitor forming portion 120.

[0055] As in this embodiment, the first edge portion 113 is configured to simultaneously contact two surfaces of the capacitor forming portion 120, and the second edge portion 112 is configured to simultaneously contact the other two surfaces of the capacitor forming portion 120. As a result, the entire exterior of the capacitor forming portion 120 can be covered by only two edge portions. Therefore, compared to using four components (e.g., the two covering portions and two edge portions of the prior art), as in the above embodiments of this disclosure, by covering the exterior of the capacitor forming portion 120 with only two edge portions, the number of delamination occurrences can be reduced, thereby increasing the mechanical strength of the electronic component.

[0056] Each of the first edge portion 113 and the second edge portion 112 may have a single structure. The first edge portion 113 and the second edge portion 112 having a single structure may mean that the first edge portion 113 is formed using a single component rather than a combination of multiple components, and may mean that the second edge portion 112 is formed using a single component rather than a combination of multiple components. For example, in the multilayer ceramic electronic assembly 100 according to this embodiment, two components may be present surrounding the exterior of the capacitor forming portion 120. By reducing the number of components attached to the exterior of the capacitor forming portion 120 as in this embodiment, the pathways for penetration by external moisture, etc., can be significantly reduced.

[0057] In this example, the ceramic body 110 may include a first interface 113a and a second interface 112a, with the first edge 113 and the second edge 112 in contact with each other at the first interface 113a and the second interface 112a. In this specification, "interface" may mean two surfaces of two contacting layers that are distinguishable from each other. Therefore, the second edge 112 of the multilayer ceramic electronic assembly 100 according to this example may be distinguishable from the first edge 113. Distinguishing between the two layers may mean that they are distinguishable due to physical differences, chemical differences, and / or simple optical differences. Interfaces can be visually confirmed by scanning electron microscopy (SEM), but are not limited to this. When visual confirmation is difficult, it can be confirmed by analyzing the physical properties of the first edge 113 and the second edge 112. In one example, described later... Figure 5 In the cross-sectional view shown, the first interface 113a and the second interface 112a can be respectively disposed at two opposite diagonal corners where the first edge portion 113 and the second edge portion 112 of the ceramic body 110 intersect. On the other hand, since both the first edge portion 113 and the second edge portion 112 are continuous edge portions (or single edge portions as described below), this will be discussed later. Figure 5 In the cross-sectional view shown, the other two opposite diagonal corners of the ceramic body 110 may not have an interface in the material forming the first edge portion 113 and the second edge portion 112.

[0058] Figure 5 It is along Figure 1 A cross-sectional view taken from line II-II'. Figure 6 yes Figure 5 Enlarged views of regions A and B. (Refer to...) Figure 5 and Figure 6 According to the embodiment, the ceramic body 110 of the multilayer ceramic electronic component 100 may include two interfaces (i.e., the first interface 113a and the second interface 112a) that are in contact with each other.

[0059] In the above example, the first interface 113a of the multilayer ceramic electronic assembly 100 according to the embodiment, where the first edge portion 113 and the second edge portion 112 contact each other, is provided on the same plane as the fourth surface S4 of the capacitor forming portion 120, and the second interface 112a may be provided on the same plane as the third surface S3 of the capacitor forming portion 120. (Refer to...) Figure 5 and Figure 6According to this example, the first interface 113a of the multilayer ceramic electronic assembly 100 may be disposed on the same plane as the fourth surface S4 of the capacitor forming portion 120. The second interface 112a may be disposed on the same plane as the third surface S3 of the capacitor forming portion 120. The fact that the interface is disposed on the same plane as a surface of the capacitor forming portion 120 (e.g., the third surface S3 or the fourth surface S4) not only means the same plane in a strict sense, but may also include cases where the angle between the interface and that surface of the capacitor forming portion is within a certain range. For example, the range of angles may refer to angles less than or equal to 10°, and its lower limit is not particularly limited, but may be, for example, greater than or equal to 0°. The angle between the interface and a surface of the capacitor forming portion may refer to the average of the angles of the contact surfaces at any five points where the interface and that surface of the capacitor forming portion are in contact with each other.

[0060] In embodiments of this disclosure, only a first edge portion 113 is formed at the edge where the third surface S3 and the fifth surface S5 of the capacitor forming portion 120 of the multilayer ceramic electronic assembly 100 according to the embodiment contact each other. That is, the first edge portion 113 extends continuously from the third surface S3 to the fifth surface S5 to cover the edge between the third surface S3 and the fifth surface S5. Only a second edge portion 112 may be provided at the edge where the fourth surface S4 and the sixth surface S6 of the capacitor forming portion 120 contact each other. That is, the second edge portion 112 extends continuously from the fourth surface S4 to the sixth surface S6 to cover the edge between the fourth surface S4 and the sixth surface S6. In the multilayer ceramic electronic assembly 100 according to the embodiment, two edge portions (e.g., the first edge portion 113 and the second edge portion 112) may be provided around the four surfaces of the capacitor forming portion 120. Therefore, the first edge portion 113 and the second edge portion 112 may be configured to cover the two surfaces of the capacitor forming portion 120, respectively. Therefore, only the first edge portion 113 is disposed at the edge where the third surface S3 and the fifth surface S5 of the capacitor forming portion 120 of the multilayer ceramic electronic component 100 in this embodiment contact each other, and only the second edge portion 112 may be disposed at the edge where the fourth surface S4 and the sixth surface S6 of the capacitor forming portion 120 contact each other. For example, a single edge portion may be disposed on the third surface S3 and the fifth surface S5 of the capacitor forming portion 120, and a single edge portion may be disposed on the fourth surface S4 and the sixth surface S6 of the capacitor forming portion 120, which means that one edge portion simultaneously covers two surfaces of the capacitor forming portion 120. In one example, a single edge portion may refer to a continuously extending edge portion. In another example, a single edge portion may refer to an edge portion without an internal interface.

[0061] In an embodiment, the maximum width of each of the first edge portion 113 and the second edge portion 112 of the multilayer ceramic electronic component 100 in the second direction (Y direction) may be greater than the maximum vertical distance between the third surface S3 and the fourth surface S4 of the capacitor forming portion 120. The maximum width of each of the first edge portion 113 and the second edge portion 112 in the second direction (Y direction) may refer to the maximum value from the interface between the first edge portion 113 and the second edge portion 112 up to a surface of the first edge portion 113 or the second edge portion 112 in the second direction. For example, the maximum width of the first edge portion 113 in the second direction (Y direction) may refer to the maximum value from the first interface 113a between the first edge portion 113 and the second edge portion 112 to the outermost surface of the first edge portion 113 in the Y direction, and the maximum width of the second edge portion 112 in the second direction (Y direction) may refer to the maximum value from the second interface 112a between the first edge portion 113 and the second edge portion 112 to the outermost surface of the second edge portion 112 in the Y direction. Furthermore, the vertical distance between the third surface S3 and the fourth surface S4 of the capacitor forming section 120 can be a value measured based on a straight line perpendicular to both the third surface S3 and the fourth surface S4 of the capacitor forming section 120. The maximum value of the vertical distance between the third surface S3 and the fourth surface S4 of the capacitor forming section 120 can refer to the maximum value among the values ​​measured based on the vertical straight line.

[0062] In the above embodiments, the sum of the width of the fifth surface S5 of the capacitor forming portion 120 in the second direction (Y direction) and the height of the third surface S3 of the capacitor forming portion 120 in the third direction (Z direction) may be less than the sum of the width of the first edge portion 113 in the second direction (Y direction) and the height of the first edge portion 113 in the third direction (Z direction). Furthermore, the sum of the width of the sixth surface S6 of the capacitor forming portion 120 in the second direction (Y direction) and the height of the fourth surface S4 in the third direction (Z direction) may be less than the sum of the width of the second edge portion 112 in the second direction (Y direction) and the height of the second edge portion 112 in the third direction (Z direction). Specifically, in the multilayer ceramic electronic assembly 100 according to the embodiment, all surfaces of the two surfaces of the capacitor forming portion 120 in the second direction (Y direction) and the two surfaces of the capacitor forming portion 120 in the third direction (Z direction) may be covered only by the first edge portion 113 and the second edge portion 112.

[0063] In the example, the YZ cross-section of the first edge portion 113 and / or the second edge portion 112 of the multilayer ceramic electronic assembly 100 according to the embodiment may have an L-shape. The YZ cross-section of the first edge portion 113 and / or the second edge portion 112 may refer to the cross-section obtained by cutting the ceramic body 110 using a plane perpendicular to the first direction (X direction) of the ceramic body 110 of the multilayer ceramic electronic assembly 100. The L-shape of the first edge portion 113 and / or the second edge portion 112 may be the shape formed in the aforementioned YZ cross-section by the cutting surfaces of the first edge portion 113 and / or the second edge portion 112 in the second direction (Y direction) and the third direction (Z direction).

[0064] The first edge portion 113 and the second edge portion 112 may include ceramic materials, such as barium titanate (BaTiO3) based ceramic materials.

[0065] The first edge portion 113 and the second edge portion 112 can be formed by stacking a single dielectric layer or two or more dielectric layers respectively, and can be used to substantially prevent damage to the inner electrode due to physical or chemical stress.

[0066] In an embodiment, the first edge portion 113 and the second edge portion 112 of the multilayer ceramic electronic assembly 100 according to the embodiment may include a ceramic component as a main component, the composition of which is similar to the composition of the dielectric layer 111 of the capacitor forming portion 120. In this specification, the term "main component" may mean a component that occupies a relatively large weight percentage compared to a sub-component, and may mean a component that is greater than or equal to 50% by weight based on the total weight of the components or the entire dielectric layer. Conversely, "sub-component" may mean a component that occupies a relatively small weight percentage compared to a main component, and may mean a component that is less than 50% by weight based on the total weight of the components or the entire dielectric layer.

[0067] The principal component can be composed of (Ba 1-x Ca x (Ti) 1-y (Zr,Sn,Hf) y The composition is represented by BaTiO3 (0≤x≤1, 0≤y≤0.5). The main component can be, for example, a chemical product of Ca, Zr, Sn, and / or Hf partially dissolved in BaTiO3. In the above composition formula, x can be greater than or equal to 0 and less than or equal to 1, and y can be greater than or equal to 0 and less than or equal to 0.5, but is not limited thereto. For example, when x is 0 and y is 0 in the above composition formula, the main component can be BaTiO3.

[0068] In one example, the first edge portion 113 and the second edge portion 112 of the multilayer ceramic electronic component 100 according to an embodiment may include at least one selected from the group consisting of sodium (Na), lithium (Li), and boron (B) as a sub-component. In another example of this disclosure, the first edge portion 113 and the second edge portion 112 of the multilayer ceramic electronic component 100 according to an embodiment may include magnesium (Mg) as a sub-component. As described above, the density of the first edge portion 113 and the second edge portion 112 can be adjusted by adjusting the content of the sub-components in the first edge portion 113 and the second edge portion 112, thereby improving moisture resistance.

[0069] According to the examples of this disclosure, the average thickness of the first edge portion 113 and / or the second edge portion 112 of the multilayer ceramic electronic assembly 100 may be in the range of greater than or equal to 10 μm and less than or equal to 25 μm. In this specification, "thickness" may refer to the thickness of the component measured in a direction perpendicular to the surface of the component, and "average thickness" may refer to the arithmetic mean of the thickness measured at points in the second direction (Y direction) that divide the region where the first edge portion 113 and / or the second edge portion 112 is disposed into 10 equal parts at equal intervals, relative to a cut surface (YZ plane) cut through the center of the multilayer ceramic electronic assembly in a direction perpendicular to the X-axis (or alternatively, a cut surface cut in the Z-axis direction (XY plane)). For example, a scanning electron microscope (SEM) may be used to measure the thickness. Other methods and / or tools that are understood by those skilled in the art, even if not described in this disclosure, may also be used.

[0070] In an embodiment, the thickness deviation (|ab| / a) between the average thickness (b) of the first edge portion 113 disposed on the fifth surface S5 of the capacitor forming portion 120 of the multilayer ceramic electronic assembly 100 and the average thickness (a) of the first edge portion 113 disposed on the third surface S3 of the capacitor forming portion 120 can be less than or equal to 5%. The average thickness (b) of the first edge portion 113 disposed on the fifth surface S5 of the capacitor forming portion 120 can refer to the average thickness of the first edge portion 113 in contact with the fifth surface S5 of the capacitor forming portion 120 in the third direction (Z direction), and can refer to the arithmetic mean of the distances in the third direction (Z direction) measured at 10 equally spaced points on the YZ cross section passing through the center of the multilayer ceramic electronic assembly 100 relative to the first edge portion 113 in contact with the fifth surface S5 of the capacitor forming portion 120. The average thickness (a) of the first edge portion 113 provided on the third surface S3 of the capacitor forming portion 120 can be the arithmetic mean of the distances measured at 10 equally spaced points in the second direction (Y direction) relative to the first edge portion 113 in contact with the third surface S3 of the capacitor forming portion 120. The thickness deviation (|ab| / a) between the average thickness (b) of the first edge portion 113 provided on the fifth surface S5 of the capacitor forming portion 120 and the average thickness (a) of the first edge portion 113 provided on the third surface S3 of the capacitor forming portion 120 can be less than or equal to 5%, less than or equal to 4%, or less than or equal to 3%, and its lower limit is not particularly limited, but can be, for example, greater than or equal to 0%.

[0071] Furthermore, according to the embodiment, the thickness deviation (|cd| / c) of the average thickness (d) of the second edge portion 112 disposed on the sixth surface S6 of the capacitor forming portion 120 relative to the average thickness (c) of the second edge portion 112 disposed on the fourth surface S4 of the capacitor forming portion 120 may be less than or equal to 5%. The average thickness (d) of the second edge portion 112 disposed on the sixth surface S6 of the capacitor forming portion 120 may refer to the average thickness of the second edge portion 112 in contact with the sixth surface S6 of the capacitor forming portion 120 in the third direction (Z direction), and may refer to the arithmetic mean of the distances in the third direction (Z direction) measured at 10 equally spaced points on the YZ cross section passing through the center of the multilayer ceramic electronic assembly 100 relative to the second edge portion 112 in contact with the sixth surface S6 of the capacitor forming portion 120. The average thickness (c) of the second edge portion 112 provided on the fourth surface S4 of the capacitor forming portion 120 can be the arithmetic mean of the distances in the second direction (Y direction) measured at 10 equally spaced points on the YZ cross section relative to the second edge portion 112 in contact with the fourth surface S4 of the capacitor forming portion 120. The thickness deviation (|cd| / c) between the average thickness (d) of the second edge portion 112 provided on the sixth surface S6 of the capacitor forming portion 120 and the average thickness (c) of the second edge portion 112 provided on the fourth surface S4 of the capacitor forming portion 120 can be less than or equal to 5%, less than or equal to 4%, or less than or equal to 3%, and its lower limit is not particularly limited, but can be, for example, greater than or equal to 0%.

[0072] In the existing structure, two covering portions are formed above and below the capacitor forming portion 120, and two edge portions are provided on the left and right sides, resulting in a thickness variation between the covering portions and the edge portions. However, in the case of the multilayer ceramic electronic assembly 100 according to the embodiment of this disclosure, since the first edge portion 113 is provided on both the third surface S3 and the fifth surface S5 of the capacitor forming portion 120, the dimensional change after sintering can be reduced.

[0073] In the example, the thickness deviation (|ad| / a) of the average thickness (d) of the second edge portion 112 disposed on the sixth surface S6 of the capacitor forming portion 120 relative to the average thickness (a) of the first edge portion 113 disposed on the third surface S3 of the capacitor forming portion 120 according to the embodiment may be less than or equal to 5%, less than or equal to 4%, or less than or equal to 3%, and may be greater than or equal to 0%.

[0074] Furthermore, the thickness deviation (|cb| / c) of the average thickness (b) of the first edge portion 113 provided on the fifth surface S5 of the capacitor forming portion 120 relative to the average thickness (c) of the second edge portion 112 provided on the fourth surface S4 of the capacitor forming portion 120 may be less than or equal to 5%, less than or equal to 4%, or less than or equal to 3%, and may be greater than or equal to 0%.

[0075] In the multilayer ceramic electronic assembly 100 according to this example, the first edge portion 113 and the second edge portion 112 may be formed using the same ceramic sheet to reduce the thickness deviation between the first edge portion 113 and the second edge portion 112.

[0076] In another embodiment of this disclosure, in the multilayer ceramic electronic assembly 100 according to the embodiment, the first edge portion 113 and the second edge portion 112 may have different physical properties.

[0077] In the example, the first edge portion 113 and the second edge portion 112 of the multilayer ceramic electronic assembly 100 according to the embodiment may have different average densities. In this specification, "average density" may mean the average density of samples taken at equal intervals in a second direction (Y direction) relative to a YZ cross section passing through the center of the multilayer ceramic electronic assembly 100; for example, it may be a value measured using a density meter Excellence D6 manufactured by METTLER TOLEDO. The multilayer ceramic electronic assembly 100 of this embodiment includes a first edge portion 113 and a second edge portion 112 with different average densities to prevent cracking due to plastic mismatch that may occur during the sintering process, thereby further improving moisture resistance reliability. In the case of average density at the edges, the average density of the first edge portion 113 may be greater than the average density of the second edge portion 112, but is not limited thereto.

[0078] According to an embodiment, each of the first edge portion 113 and the second edge portion 112 of the multilayer ceramic electronic assembly 100 includes dielectric grains, and the average grain size of the dielectric grains in the first edge portion 113 and the second edge portion 112 may be different from each other. In this specification, the “average grain size” of the grains may mean: the average length of the grains in the X-direction of the image at 10 points, calculated using an image analysis program (Mediacybernetics’ Image Pro Plus ver 4.5), relative to an XZ cross-section passing through the center of the multilayer ceramic electronic assembly 100, after capturing images of 10 points at equal intervals in the first direction (X-direction) using a scanning electron microscope (SEM, JSM-7400F manufactured by Jeol). The aforementioned average density, etc., can be achieved by differentiating the average grain size of the dielectric grains in the first edge portion 113 and the second edge portion 112. In the case of the average grain size of the dielectric grains, the average grain size of the dielectric grains in the first edge portion 113 may be larger than the average grain size of the dielectric grains in the second edge portion 112, but is not limited thereto.

[0079] When, as in this embodiment, the average density of the first edge portion 113 and the second edge portion 112 and / or the average grain size of the dielectric grains of the first edge portion 113 and the second edge portion 112 are different, the content of the sub-components of the first edge portion 113 and the second edge portion 112 may be different. Specifically, the first edge portion 113 and the second edge portion 112 may include one or more elements selected from the group consisting of sodium (Na), lithium (Li), and boron (B) as sub-components, and the content of the sub-component in the first edge portion 113 may be higher than the content of the sub-component in the second edge portion 112.

[0080] Furthermore, both the first edge portion 113 and the second edge portion 112 contain magnesium (Mg), and the magnesium (Mg) content in the first edge portion 113 and the magnesium (Mg) content in the second edge portion 112 may differ. The density of the first edge portion 113 and the second edge portion 112 can be adjusted by regulating the content of the sub-component and the magnesium (Mg) content. For example, the magnesium (Mg) content in the second edge portion 112 may be higher than that in the first edge portion 113, but this is not a limitation.

[0081] In another embodiment, in the multilayer ceramic electronic assembly 100 according to the embodiment, the dielectric layer 111 and the first edge portion 113 of the capacitor forming portion 120 may have different physical properties.

[0082] In the above embodiments, the average density of the outermost dielectric layer 111 in the third direction (Z direction) of the capacitor forming portion 120 of the multilayer ceramic electronic component 100 according to the embodiments may be different from the average density of the first edge portion 113 disposed on the third surface S3 of the capacitor forming portion 120. Specifically, the average density of the outermost dielectric layer 111 in the third direction (Z direction) of the capacitor forming portion 120 may be lower than the average density of the first edge portion 113 disposed on the third surface S3 of the capacitor forming portion 120.

[0083] In another embodiment, the dielectric layer 111 and the first edge portion 113 of the capacitor forming portion 120 of the multilayer ceramic electronic component 100 according to the embodiment both include dielectric grains, and the average grain size of the dielectric grains of the outermost dielectric layer 111 of the capacitor forming portion 120 in the third direction (Z direction) may be different from the average grain size of the dielectric grains of the first edge portion 113 disposed on the third surface S3 of the capacitor forming portion 120. Specifically, the average grain size of the dielectric grains of the outermost dielectric layer 111 of the capacitor forming portion 120 in the third direction (Z direction) may be larger than the average grain size of the dielectric grains of the first edge portion 113 disposed on the third surface S3 of the capacitor forming portion 120.

[0084] The descriptions of the average density and average grain size of the dielectric grains are the same as those above, and therefore will be omitted.

[0085] In another embodiment of this disclosure, the first edge portion 213 of the multilayer ceramic electronic component may be configured to contact a surface of the capacitor forming portion 220 in the second direction (Y direction) and a surface of the second edge portion 212 in the second direction (Y direction), and to contact a surface of the capacitor forming portion 220 in the third direction (Z direction) and a surface of the second edge portion 212 in the third direction (Z direction). Figures 7 to 9 This is a diagram illustrating a multilayer ceramic electronic assembly according to this embodiment. (Refer to...) Figures 7 to 9 The multilayer ceramic electronic component in this embodiment includes a ceramic body 210, which includes alternately stacked first internal electrodes 221 and second internal electrodes 222, with a dielectric layer 211 located between the first internal electrodes 221 and the second internal electrodes 222. Furthermore, the ceramic body 210 may also include a first edge portion 213 disposed on the third surface S3 of the capacitor forming portion 220, and may also be disposed on a surface of a second edge portion 212 in the second direction (Y direction). Additionally, the first edge portion 213 may be simultaneously disposed on the fifth surface S5 of the capacitor forming portion 220 and on a surface of the second edge portion 212 in the third direction (Z direction). For example, the size of the first edge portion 213 may be larger than the size of the second edge portion 212.

[0086] In the above embodiments, the first interface 213a and the second interface 212a, which are in contact with each other, can be formed on a surface of the first edge portion 213 in a third direction (Z direction) and on a surface of the second edge portion 212 in a second direction (Y direction), respectively. In this case, the first edge portion 213 and the second edge portion 212 have asymmetrical shapes, and as described above, electronic components with desired physical properties can be provided by adjusting the average density and average grain size of the dielectric grains.

[0087] Figure 10 This is a perspective view schematically illustrating the ceramic body of a multilayer ceramic electronic component according to another exemplary embodiment. Figure 11 It is along Figure 10 A cross-sectional view taken from line IV-IV'. Figure 12 yes Figure 11 Enlarged views of regions E and F. In the case of a multilayer ceramic electronic assembly according to an embodiment of the present disclosure, the first internal electrode 321 and / or the second internal electrode 322 may be exposed in the third direction (Z direction) of the capacitor forming portion 320. (Refer to...) Figures 10 to 12 The fact that the first inner electrode 321 and / or the second inner electrode 322 are exposed in the third third direction (Z direction) of the capacitor forming portion 320 means that the first inner electrode 321 and / or the second inner electrode 322 are disposed at the outermost part of the capacitor forming portion 320 (where the dielectric layer 311 and the first inner electrode 321 and the second inner electrode 322 are stacked in the third third direction (Z direction)). In this case, the first edge portion 313 and / or the second edge portion 312 may be configured to be in direct contact with the first inner electrode 321 and / or the second inner electrode 322.

[0088] Even when the first inner electrode 321 and / or the second inner electrode 322 are configured to be exposed in the third third direction (Z direction) of the capacitor forming portion 320, as in this embodiment, the first inner electrode 321 and the second inner electrode 322 can be concealed from the outside of the ceramic body 310 by passing through the first edge portion 313 and the second edge portion 312. Therefore, the dielectric layer 311 may not be disposed on the outermost first inner electrode 321 and / or the outermost second inner electrode 322 in the third third direction (Z direction), and the inner electrodes may be disposed up to the outermost part of the capacitor forming portion 320, thereby significantly increasing the effective capacitance.

[0089] In the above embodiments, the ceramic body 310 of the multilayer ceramic electronic component may include a first interface 313a and a second interface 312a, and the first edge portion 313 and the second edge portion 312 are in contact with each other at the first interface 313a and the second interface 312a.

[0090] The descriptions of the capacitor forming section, inner electrode, edge section, and interface are the same as those described above, and therefore will be omitted.

[0091] The method for forming the edge portion of the multilayer ceramic electronic component 100 according to the embodiment is not particularly limited, but the edge portion can be formed, for example, by attaching a ceramic sheet for forming the first edge portion 113 and a ceramic sheet for forming the second edge portion 112. Figure 13 This is a schematic diagram illustrating a method for manufacturing a multilayer ceramic electronic component 100 according to an exemplary embodiment. The method for manufacturing a multilayer ceramic electronic component may include: forming a capacitor forming portion; simultaneously forming a first edge portion on a third surface and a fifth surface; simultaneously forming a second edge portion on a fourth surface and a sixth surface; forming a first outer electrode connected to a first inner electrode; and forming a second outer electrode connected to a second inner electrode. (Refer to...) Figure 13 The following method can be used: First, a capacitor forming portion 120 is formed, and then two ceramic sheets forming the first edge portion 113 and the second edge portion 112 can be attached to the capacitor forming portion 120. The first edge portion 113 and the second edge portion 112 can be formed by transferring the ceramic sheets after fixing the capacitor forming portion 120 to a fixture or similar fixture, but the method is not limited to this. In one example, before forming the first edge portion 113 and the second edge portion 112, the capacitor forming portion 120 is formed at least by a cutting process to expose the first inner electrode 121 and the second inner electrode 122 from the third surface S3 and the fourth surface S4.

[0092] In the multilayer ceramic electronic assembly 100 according to an exemplary embodiment, a first external electrode 131 and a second external electrode 132 may be disposed on the outer surface of the ceramic body 110. The first external electrode 131 may be connected to a first internal electrode 121, and the second external electrode 132 may be connected to a second internal electrode 122.

[0093] The first external electrode 131 and the second external electrode 132 can be sintered electrodes comprising a conductive metal and glass. The conductive metal may include, for example, one or more of nickel (Ni), copper (Cu), tin (Sn), palladium (Pd), platinum (Pt), iron (Fe), gold (Au), silver (Ag), tungsten (W), titanium (Ti), lead (Pb), and alloys thereof. The glass may be a composition containing oxides, and may be at least one selected from silicon oxide, boron oxide, aluminum oxide, transition metal oxides, alkali metal oxides, and alkaline earth metal oxides, but is not particularly limited thereto. Transition metals may be selected from the group consisting of zinc (Zn), titanium (Ti), copper (Cu), vanadium (V), manganese (Mn), iron (Fe), and nickel (Ni); alkali metals may be selected from the group consisting of lithium (Li), sodium (Na), and potassium (K); and alkaline earth metals may be selected from the group consisting of magnesium (Mg), calcium (Ca), strontium (Sr), and barium (Ba).

[0094] As an example of a method for forming the first external electrode 131 and the second external electrode 132, the first external electrode 131 and the second external electrode 132 can be formed by immersing the ceramic body 110 in a conductive paste containing a conductive metal and then sintering it, or by printing the conductive paste on the surface of the ceramic body 110 using screen printing or gravure printing and then sintering it. Alternatively, methods can be used such as coating the surface of the ceramic body 110 with conductive paste or transferring a dry film obtained by drying the conductive paste onto the ceramic body 110, followed by sintering, but are not limited to these methods. For example, the conductive paste can be formed on the ceramic body 110 and then sintered using various methods other than those described above.

[0095] In the example, the multilayer ceramic electronic component 100 according to the embodiment may further include plating layers respectively disposed on the first external electrode 131 and the second external electrode 132. The plating layer may include at least one selected from the group consisting of copper (Cu), nickel (Ni), tin (Sn), palladium (Pd), platinum (Pt), gold (Au), silver (Ag), tungsten (W), titanium (Ti), lead (Pb), and alloys thereof, but the material is not limited thereto. The plating layer may be formed using a single layer or multiple layers, and may be formed by sputtering or electroplating, but the formation method is not limited thereto.

[0096] As described above, according to an exemplary embodiment, the moisture resistance reliability of multilayer ceramic electronic components can be improved.

[0097] In addition, it can improve the mechanical strength of multilayer ceramic electronic components.

[0098] While this disclosure includes specific examples, it will be readily understood by those skilled in the art that various changes in form and detail may be made to these examples without departing from the spirit and scope of the claims and their equivalents. The examples described herein are to be considered descriptive only and not for limiting purposes. Descriptions of features or aspects in each example are to be considered applicable to similar features or aspects in other examples. Suitable results may be obtained if the described techniques are performed with a different order, and / or if components in the described system, architecture, apparatus, or circuit are combined in different ways and / or if components in the described system, architecture, apparatus, or circuit are replaced or supplemented with other components or their equivalents. Therefore, the scope of this disclosure is not limited by the specific embodiments but by the claims and their equivalents, and all variations within the scope of the claims and their equivalents are to be construed as included in this disclosure.

Claims

1. A multilayer ceramic electronic component, comprising: A ceramic body includes a dielectric layer and a first inner electrode and a second inner electrode, wherein the first inner electrode and the second inner electrode are arranged to face each other, and the dielectric layer is located between the first inner electrode and the second inner electrode. The first external electrode is connected to the first internal electrode; as well as The second external electrode is connected to the second internal electrode. The ceramic body includes a capacitor forming portion having a first and a second surface opposite to each other in a first direction, a third and a fourth surface opposite to each other in a second direction, and a fifth and a sixth surface opposite to each other in a third direction. In the capacitor forming portion, a first inner electrode and a second inner electrode are stacked in the third direction to form a capacitor. The ceramic body further includes: a first edge portion disposed on the third and fifth surfaces of the capacitor forming portion; and a second edge portion disposed on the fourth and sixth surfaces of the capacitor forming portion and distinguished from the first edge portion. Wherein, the maximum value of the width of each of the first edge portion and the second edge portion in the second direction is greater than the maximum value of the vertical distance between the third surface and the fourth surface of the capacitor forming portion.

2. The multilayer ceramic electronic component as described in claim 1, wherein, The first edge portion is configured to contact the third and fifth surfaces of the capacitor forming portion, and The second edge portion is configured to contact the fourth and sixth surfaces of the capacitor forming portion.

3. The multilayer ceramic electronic component as described in claim 1, wherein, The first edge portion and the second edge portion each have a single structure.

4. The multilayer ceramic electronic component as claimed in claim 1, wherein the multilayer ceramic electronic component includes a first interface and a second interface, the first interface and the second interface being disposed in the region where the first edge portion and the second edge portion are in contact with each other.

5. The multilayer ceramic electronic component as described in claim 4, wherein, The first interface is disposed on the same plane as the fourth surface of the capacitor forming portion, and the second interface is disposed on the same plane as the third surface of the capacitor forming portion.

6. The multilayer ceramic electronic component as described in claim 1, wherein, The first edge portion extends continuously from the third surface of the capacitor forming portion to the fifth surface, covering the edge where the third surface and the fifth surface meet. The second edge portion extends continuously from the fourth surface of the capacitor forming portion to the sixth surface, so as to cover the edge where the fourth surface and the sixth surface meet each other.

7. The multilayer ceramic electronic component as described in claim 1, wherein, The first edge portion is disposed on only the fifth surface of the fifth surface and the sixth surface, and the second edge portion is disposed on only the sixth surface of the fifth surface and the sixth surface.

8. The multilayer ceramic electronic component as described in claim 1, wherein, The thickness deviation |ab| / a of the average thickness b of the first edge portion disposed on the fifth surface of the capacitor forming portion relative to the average thickness a of the first edge portion disposed on the third surface of the capacitor forming portion is less than or equal to 5%.

9. The multilayer ceramic electronic component as described in claim 1, wherein, The thickness deviation |cd| / c of ​​the average thickness d of the second edge portion disposed on the sixth surface of the capacitor forming portion relative to the average thickness c of the second edge portion disposed on the fourth surface of the capacitor forming portion is less than or equal to 5%.

10. The multilayer ceramic electronic component as claimed in claim 1, wherein, The first edge portion and the second edge portion have different average densities.

11. The multilayer ceramic electronic component as claimed in claim 1, wherein, Each of the first edge portion and the second edge portion includes a dielectric grain. The average grain size of the dielectric grains in the first edge portion is different from the average grain size of the dielectric grains in the second edge portion.

12. The multilayer ceramic electronic component as claimed in claim 1, wherein, Each of the first edge portion and the second edge portion includes magnesium. The magnesium content in the first edge portion is different from that in the second edge portion.

13. The multilayer ceramic electronic component as described in claim 1, wherein, The average density of the outermost dielectric layer of the capacitor forming portion in the third direction is different from the average density of the first edge portion disposed on the third surface of the capacitor forming portion.

14. The multilayer ceramic electronic component as claimed in claim 1, wherein, The dielectric layer of the capacitor forming portion and the first edge portion both include dielectric grains, and The average grain size of the dielectric grains in the outermost dielectric layer of the capacitor forming portion in the third direction is different from the average grain size of the dielectric grains in the first edge portion disposed on the third surface of the capacitor forming portion.

15. The multilayer ceramic electronic component as claimed in claim 1, wherein, The first edge portion is configured to simultaneously contact the third and fifth surfaces of the capacitor forming portion, as well as a surface of the second edge portion in the second direction and a surface in the third direction.

16. The multilayer ceramic electronic component as claimed in claim 1, wherein, The second-third-direction cross section of the first edge portion and / or the second edge portion has an L-shape.

17. The multilayer ceramic electronic component as claimed in claim 1, wherein, The average thickness of the first edge portion and / or the second edge portion is in the range of greater than or equal to 10 μm and less than or equal to 25 μm.

18. A multilayer ceramic electronic component, comprising: A ceramic body includes a dielectric layer and a first inner electrode and a second inner electrode, wherein the first inner electrode and the second inner electrode are arranged to face each other, and the dielectric layer is located between the first inner electrode and the second inner electrode. The first external electrode is connected to the first internal electrode; as well as The second external electrode is connected to the second internal electrode. The ceramic body includes a capacitor forming portion having a first and a second surface opposite to each other in a first direction, a third and a fourth surface opposite to each other in a second direction, and a fifth and a sixth surface opposite to each other in a third direction. In the capacitor forming portion, the first inner electrode and the second inner electrode are stacked in the third direction to form a capacitor. The ceramic body further includes: a first edge portion disposed on the third and fifth surfaces; and a second edge portion disposed on the fourth and sixth surfaces. The first edge portion is configured to contact the first inner electrode or the second inner electrode disposed on the fifth surface of the capacitor forming portion.

19. The multilayer ceramic electronic component as claimed in claim 18, wherein, The first edge portion is configured to contact the third and fifth surfaces of the capacitor forming portion, and The second edge portion is configured to contact the fourth and sixth surfaces of the capacitor forming portion.

20. The multilayer ceramic electronic component as claimed in claim 19, wherein, The first edge portion is configured to simultaneously contact the third surface and the fifth surface of the capacitor forming portion, and the first edge portion extends to both the first surface and the second surface of the capacitor forming portion. The second edge portion is configured to simultaneously contact the fourth surface and the sixth surface of the capacitor forming portion, and the second edge portion extends to the first surface and the second surface of the capacitor forming portion.

21. The multilayer ceramic electronic component as claimed in claim 19, wherein, The first edge portion is configured to contact the surface of the second edge portion in the second direction, the surface of the second edge portion in the third direction, and the capacitor forming portion.

22. The multilayer ceramic electronic component as described in claim 19, wherein, The first edge portion and the second edge portion each have a single structure, and the first edge portion and the second edge portion are in contact with each other.

23. The multilayer ceramic electronic component as described in claim 19, wherein, The second edge portion is configured to contact the first inner electrode or the second inner electrode disposed on the sixth surface of the capacitor forming portion.

24. The multilayer ceramic electronic component as claimed in claim 19, wherein, The second-third-direction cross section of the first edge portion and / or the second edge portion has an L-shape.

25. A multilayer ceramic electronic component, comprising: A ceramic body includes a dielectric layer and a first inner electrode and a second inner electrode, wherein the first inner electrode and the second inner electrode are arranged to face each other, and the dielectric layer is located between the first inner electrode and the second inner electrode. The first external electrode is connected to the first internal electrode; as well as The second external electrode is connected to the second internal electrode. The ceramic body includes a capacitor forming portion having a first and a second surface opposite to each other in a first direction, a third and a fourth surface opposite to each other in a second direction, and a fifth and a sixth surface opposite to each other in a third direction. In the capacitor forming portion, the first inner electrode and the second inner electrode are stacked in the third direction to form a capacitor. The ceramic body includes edge portions further disposed on the third, fourth, fifth, and sixth surfaces, and In the second-third direction cross section, the interface between the edges is only located at the two diagonal corners of the ceramic body.

26. The multilayer ceramic electronic component as described in claim 25, wherein, The thickness deviation |yx| / y of the portion of the edge portion disposed on one of the third, fourth, fifth, and sixth surfaces relative to the average thickness y of the portion of the edge portion disposed on the other of the third, fourth, fifth, and sixth surfaces is less than or equal to 5%, and In the second-third direction cross section, one of the third, fourth, fifth, and sixth surfaces and another of the third, fourth, fifth, and sixth surfaces provide one of the four corners of the ceramic body, the four corners including the two diagonal corners and the other two diagonal corners.

27. The multilayer ceramic electronic component as described in claim 25, wherein, The dielectric material of the edge portion is separated from that of the capacitor forming portion.

28. The multilayer ceramic electronic component of claim 25, wherein the multilayer ceramic electronic component includes an interface between the capacitor forming portion and the edge portion.

29. The multilayer ceramic electronic component as described in claim 25, wherein, In the second direction-third direction section, the edge portion includes a first L-shaped edge portion and a second L-shaped edge portion connected to the first L-shaped edge portion.

30. A method for manufacturing a multilayer ceramic electronic component, the method comprising: A capacitor forming portion is formed, the capacitor forming portion having a first surface and a second surface opposite to each other in a first direction, a third surface and a fourth surface opposite to each other in a second direction, and a fifth surface and a sixth surface opposite to each other in a third direction, the capacitor forming portion including a first inner electrode and a second inner electrode stacked in the third direction to form a capacitor; A first edge portion is formed simultaneously on both the third surface and the fifth surface; A second edge portion is formed simultaneously on both the fourth surface and the sixth surface; A first external electrode is formed and connected to the first internal electrode; as well as A second outer electrode is formed and connected to the second inner electrode. The first edge portion and the second edge portion are in contact with each other, and there is an interface between the first edge portion and the second edge portion.

31. The method of claim 30, wherein, The first edge portion and the second edge portion each have a single structure.

32. The method of claim 30, wherein, Each of the first edge portion and the second edge portion is formed by transferring a ceramic sheet onto the capacitor forming portion.

33. The method of claim 30, wherein, The thickness deviation |ab| / a of the average thickness b of the first edge portion formed on the fifth surface of the capacitor forming portion relative to the average thickness a of the first edge portion formed on the third surface of the capacitor forming portion is less than or equal to 5%.

34. The method of claim 30, wherein, The thickness deviation |cd| / c of ​​the average thickness d of the second edge portion formed on the sixth surface of the capacitor forming portion relative to the average thickness c of the second edge portion formed on the fourth surface of the capacitor forming portion is less than or equal to 5%.

35. A multilayer ceramic electronic component, comprising: A ceramic body includes a dielectric layer and a first inner electrode and a second inner electrode, wherein the first inner electrode and the second inner electrode are arranged to face each other, and the dielectric layer is located between the first inner electrode and the second inner electrode. The first external electrode is connected to the first internal electrode; as well as The second external electrode is connected to the second internal electrode. The ceramic body includes a capacitor forming portion having a first and a second surface opposite to each other in a first direction, a third and a fourth surface opposite to each other in a second direction, and a fifth and a sixth surface opposite to each other in a third direction. In the capacitor forming portion, a first inner electrode and a second inner electrode are stacked in the third direction to form a capacitor. The ceramic body further includes: a first edge portion disposed on the third and fifth surfaces of the capacitor forming portion; and a second edge portion disposed on the fourth and sixth surfaces of the capacitor forming portion and distinguished from the first edge portion. The multilayer ceramic electronic component includes a first interface and a second interface, which are disposed in the region where the first edge portion and the second edge portion are in contact with each other.

36. A multilayer ceramic electronic component, comprising: A ceramic body includes a dielectric layer and a first inner electrode and a second inner electrode, wherein the first inner electrode and the second inner electrode are arranged to face each other, and the dielectric layer is located between the first inner electrode and the second inner electrode. The first external electrode is connected to the first internal electrode; as well as The second external electrode is connected to the second internal electrode. The ceramic body includes a capacitor forming portion having a first and a second surface opposite to each other in a first direction, a third and a fourth surface opposite to each other in a second direction, and a fifth and a sixth surface opposite to each other in a third direction. In the capacitor forming portion, the first inner electrode and the second inner electrode are stacked in the third direction to form a capacitor. The ceramic body further includes: a first edge portion disposed on the third and fifth surfaces of the capacitor forming portion; and a second edge portion disposed on the fourth and sixth surfaces of the capacitor forming portion. Wherein, the second-third direction cross section of the first edge portion and / or the second edge portion has an L-shape.

Images