Voltage surge control method, circuit and power supply circuit applying the same

Abstract

The application discloses a voltage surge control method and circuit and a power supply circuit applying the same. The voltage surge control method comprises the following steps: detecting a DC bus voltage; adding a preset bias voltage to the filtered DC bus voltage to obtain a voltage threshold for judging whether a voltage surge occurs; and increasing an output voltage of an inverter circuit when the DC bus voltage is higher than the voltage threshold during a speed reduction process of a permanent magnet motor, so that the permanent magnet motor no longer charges the bus, thereby achieving the purpose of suppressing voltage surge and protecting a chip under any power supply voltage. The voltage surge is completely suppressed by software, and no additional device needs to be added.

Description

Technical Field

[0001] This invention relates to a technique for controlling the rotation of a rotating body, and more specifically, to a voltage surge control method, circuit, and power supply circuit for a three-phase permanent magnet motor. Background Technology

[0002] In existing technologies, braking circuits are often used to discharge voltage surges caused by rapid motor deceleration in the control of three-phase permanent magnet motors. However, due to space and cost constraints, voltage surge suppression must be implemented on top of the original control circuit without adding additional components.

[0003] like Figure 1 The diagram illustrates a prior art method for determining voltage surges by detecting the DC bus voltage. When the voltage detection circuit 140 detects a surge, the braking control circuit 150 determines whether to enable the braking circuit 120, thereby suppressing the voltage surge. This method requires a preset voltage surge comparison threshold. When the DC bus voltage exceeds this threshold, braking discharge is initiated. The braking circuit switch is turned on, and energy is dissipated from the braking circuit, quickly suppressing the voltage surge. This method is relatively reliable under a fixed supply voltage. However, once the comparison threshold is preset, if the supply voltage changes, the voltage surge suppression effect may be less than ideal, requiring a reset of the comparison threshold for reliable surge suppression. Besides requiring an additional switch and braking resistor, this method also results in a large braking resistor due to its high power consumption for surge energy dissipation. Furthermore, in some applications, cost and space constraints preclude the installation of a braking circuit. Summary of the Invention

[0004] In view of this, the present invention provides a simple control method for suppressing voltage surges caused by the deceleration of a permanent magnet motor under adjustable DC power supply voltage, so as to achieve the purpose of reliable voltage surge suppression when the power supply voltage changes, and the technical solution of the present invention does not require the addition of additional components.

[0005] In a first aspect, a voltage surge control method is provided for use in a permanent magnet motor system, characterized by comprising:

[0006] When the permanent magnet motor receives a command indicating that it needs to reduce speed, it judges the numerical state of the DC bus voltage. In the first state, it increases the drive voltage output by the inverter circuit to suppress the permanent magnet motor from charging the bus and suppress voltage surges. In the second state, it decreases the drive voltage to reduce the speed of the permanent magnet motor.

[0007] Preferably, when the DC bus voltage is greater than a voltage threshold, the system is in the first state, indicating that a voltage surge has occurred; when the DC bus voltage is not greater than the voltage threshold, the system is in the second state, indicating that no voltage surge has occurred.

[0008] Preferably, if a voltage surge occurs, the duty cycle of the PWM signal used to control the three-phase bridge arm in the inverter circuit is increased to improve the drive voltage output by the inverter circuit, thereby suppressing the permanent magnet motor from charging the bus; if no voltage surge occurs, the duty cycle of the PWM signal is decreased to reduce the drive voltage, thereby reducing the speed of the permanent magnet motor.

[0009] Preferably, if a voltage surge occurs, the duty cycle of the PWM signal used to control the three-phase bridge arm in the inverter circuit is increased so that the drive voltage output by the inverter circuit is close to the back electromotive force of the permanent magnet motor.

[0010] Preferably, determining the numerical state of the DC bus voltage includes:

[0011] By detecting the DC bus voltage, a voltage sampling signal characterizing the magnitude of the DC bus voltage is generated;

[0012] The voltage sampling signal is filtered to obtain a filtered signal, and the filtered signal is increased to a predetermined value and used as the voltage threshold for determining the occurrence of a voltage surge.

[0013] By comparing the voltage sampling signal with the voltage threshold, it is determined whether a voltage surge has occurred.

[0014] Preferably, the predetermined value is obtained by superimposing the filtered signal with a bias voltage as the voltage threshold for determining the occurrence of a voltage surge.

[0015] Preferably, the predetermined value is obtained by amplifying the filtered signal by a predetermined factor and then using it as the voltage threshold for determining the occurrence of a voltage surge.

[0016] Preferably, when the voltage surge occurs, the voltage sampling signal will be higher than the voltage threshold; when the voltage surge does not occur, the voltage sampling signal will not be higher than the voltage threshold.

[0017] Preferably, obtaining the filtered signal by filtering the voltage sampling signal includes: passing the voltage sampling signal through a low-pass filter circuit to obtain the filtered signal.

[0018] Preferably, obtaining a filtered signal by filtering the voltage sampling signal includes: obtaining a filtered signal by digitally filtering the voltage sampling signal as follows:

[0019] Vdc filter[kTs]=(1-f)×Vdc filter [(k-1)Ts]+f×Vdc[kTs]

[0020] In the formula, Vdc[kTs] is the voltage sampling signal of the DC bus voltage obtained at the kTs sampling time, f is the digital filter coefficient, and f is a positive number less than 1. filter The initial value is 0.

[0021] Preferably, the drive voltage output by the inverter circuit is obtained by multiplying the DC bus voltage and the duty cycle; the back electromotive force is obtained by multiplying the back electromotive force coefficient and the motor speed, wherein the back electromotive force coefficient is an inherent parameter of the permanent magnet motor.

[0022] Secondly, a voltage surge control circuit is provided for use in a permanent magnet motor power supply circuit, characterized in that it includes:

[0023] The surge detection circuit determines the DC bus voltage value when the permanent magnet motor receives a command indicating that it needs to reduce speed, in order to generate a surge detection signal.

[0024] The control circuit receives the surge detection signal and, when the DC bus voltage is in a first state, increases the drive voltage output by the inverter circuit to suppress the permanent magnet motor from charging the bus to suppress voltage surges; when the DC bus voltage is in a second state, decreases the drive voltage output by the inverter circuit to reduce the speed of the permanent magnet motor.

[0025] Preferably, when the DC bus voltage is greater than a voltage threshold, the system is in the first state, and the surge detection signal indicates that a voltage surge has occurred; when the DC bus voltage is not greater than the voltage threshold, the system is in the second state, and the surge detection signal indicates that no voltage surge has occurred.

[0026] Preferably, when a voltage surge occurs, the control circuit increases the duty cycle of the PWM signal used to control the three-phase bridge arm in the inverter circuit to increase the drive voltage output by the inverter circuit, thereby suppressing the permanent magnet motor from charging the bus; when no voltage surge occurs, the control circuit decreases the duty cycle of the PWM signal to decrease the drive voltage, thereby reducing the speed of the permanent magnet motor.

[0027] Preferably, when a voltage surge occurs, the control circuit increases the duty cycle of the PWM signal used to control the three-phase bridge arm in the inverter circuit so that the drive voltage output by the inverter circuit is close to the back electromotive force of the permanent magnet motor.

[0028] Preferably, the surge detection circuit generates the surge detection signal based on a voltage sampling signal characterizing the magnitude of the DC bus voltage and a voltage threshold used to determine the occurrence of a voltage surge.

[0029] The voltage threshold is obtained by increasing the filtered signal obtained after filtering the voltage sampling signal to a predetermined value.

[0030] Preferably, the surge detection circuit superimposes the filtered signal with a bias voltage to obtain the predetermined value as the voltage threshold.

[0031] Preferably, the surge detection circuit amplifies the filtered signal by a predetermined factor to obtain the predetermined value as the voltage threshold.

[0032] Preferably, the surge detection circuit is configured such that when the voltage surge occurs, the voltage sampling signal will be higher than the voltage threshold; and when the voltage surge does not occur, the voltage sampling signal will not be higher than the voltage threshold.

[0033] Preferably, the surge detection circuit obtains the filtered signal by passing the voltage sampling signal through a low-pass filter circuit.

[0034] Preferably, the surge detection circuit obtains the filtered signal by digitally filtering the voltage sampling signal as follows:

[0035] Vdc filter [kTs]=(1-f)×Vdc filter [(k-1)Ts]+f×Vdc[kTs]

[0036] In the formula, Vdc[kTs] is the voltage sampling signal of the DC bus voltage obtained at the kTs sampling time, f is the digital filter coefficient, and f is a positive number less than 1. filter The initial value is 0.

[0037] Preferably, the surge detection circuit includes:

[0038] A sampling circuit is used to receive the DC bus voltage and generate a voltage sampling signal characterizing the magnitude of the DC bus voltage.

[0039] A filtering circuit is used to perform low-pass filtering or digital filtering on the voltage sampling signal to obtain a filtered signal;

[0040] A boosting circuit is used to amplify the filtered signal to a predetermined value and then use it as the voltage threshold.

[0041] The comparison circuit generates the surge detection signal by comparing the voltage sampling signal with the voltage threshold.

[0042] Preferably, the control circuit obtains the drive voltage output by the inverter circuit based on the product of the DC bus voltage and the duty cycle; and obtains the back electromotive force based on the product of the back electromotive force coefficient and the motor speed, wherein the back electromotive force coefficient is an inherent parameter of the permanent magnet motor.

[0043] Thirdly, a power supply circuit for a permanent magnet motor is provided, characterized in that it includes:

[0044] Permanent magnet motor, and,

[0045] The voltage surge control circuit described above.

[0046] This invention aims to provide a voltage surge control method. By detecting the DC bus voltage, filtering it, and then adding a preset bias voltage, a voltage threshold is used to determine the occurrence of a voltage surge. When the DC bus voltage exceeds the threshold during permanent magnet motor deceleration, the inverter circuit output voltage is increased to prevent the permanent magnet motor from charging the bus. This achieves the goal of suppressing voltage surges and protecting the chip under any supply voltage. Furthermore, the voltage surge suppression is entirely implemented through software, requiring no additional components. Attached Figure Description

[0047] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0048] Figure 1 This is a schematic diagram of a prior art motor brake surge voltage suppression circuit;

[0049] Figure 2 A schematic diagram of a voltage surge control circuit according to the present invention;

[0050] Figure 3 This is a schematic diagram of a surge detection circuit according to the present invention. Detailed Implementation

[0051] The present invention is described below based on embodiments, but the invention is not limited to these embodiments. In the detailed description of the invention below, certain specific details are described in detail. Those skilled in the art will fully understand the invention even without these details. To avoid obscuring the essence of the invention, well-known methods, processes, flows, elements, and circuits are not described in detail.

[0052] Furthermore, those skilled in the art should understand that the accompanying drawings provided herein are for illustrative purposes only and are not necessarily drawn to scale.

[0053] Furthermore, it should be understood that in the following description, "circuit" refers to a conductive loop consisting of at least one element or sub-circuit connected by electrical or electromagnetic connections. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it can be directly coupled or connected to another element, or there may be intermediate elements. The connection between elements can be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.

[0054] Unless the context explicitly requires it, the words "comprising," "including," and similar terms throughout the specification and claims should be interpreted as encompassing rather than being exclusive or exhaustive; that is, meaning "including but not limited to."

[0055] In the description of this invention, it should be understood that the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance. Furthermore, in the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0056] Figure 2 The circuit diagram shows a three-phase permanent magnet motor system using the voltage surge control circuit of this invention. Figure 2 As shown, the three-phase permanent magnet motor system includes a three-phase permanent magnet motor M, a rectifier circuit 21, a voltage surge control circuit 22, and an inverter circuit 23.

[0057] The input terminal of the rectifier circuit 21 is connected to the AC power supply. The rectifier circuit 110 has a first output terminal and a second output terminal. The rectifier circuit 21 receives the AC power output from the AC power supply and rectifies the AC power to output DC power. The bus capacitor C0 is connected between the first output terminal and the second output terminal of the rectifier circuit 110. In this embodiment, the bus capacitor C0 can be a film capacitor or a small-capacity electrolytic capacitor. It is used to filter out the rectified voltage and absorb voltage spikes during abnormalities. The bus capacitor C0 is smaller and less expensive than the electrolytic capacitors commonly used in related technologies. It is understood that the voltage of the bus capacitor C0 is the DC bus voltage Vdc.

[0058] The voltage surge control circuit 22 generates a surge detection signal Vsur based on the DC bus voltage Vdc. The surge detection signal Vsur is used to characterize whether a voltage surge occurs during the deceleration process of the permanent magnet motor system. When a voltage surge occurs during the deceleration process of the permanent magnet motor, the voltage surge control circuit 22 suppresses the charging of the permanent magnet motor to the bus by increasing the drive voltage output of the inverter circuit, thereby suppressing the voltage surge.

[0059] The inverter circuit 23 is connected to the first output terminal and the second output terminal of the rectifier circuit 21 respectively. The driving voltage output by the inverter circuit 23 is used to control the permanent magnet motor M.

[0060] The inverter circuit 23 is controlled by the PWM control signal of the three-phase bridge arm to ensure that the drive current or drive voltage of the permanent magnet motor M meets the drive requirements. In an optional embodiment, the inverter circuit 23 is composed of a three-phase inverter circuit, with transistors Q1 and Q2, Q3 and Q4, Q5 and Q6 (… Figure 2 (Not shown in the diagram) These transistors (Q1-Q6) serve as the switching transistors for the upper and lower arm bridges of the a-phase stator winding, the b-phase stator winding, and the c-phase stator winding. Transistors Q1-Q6 are controlled by the PWM control signal for the three-phase bridge arms, ensuring that one of phases a, b, and c is connected to the positive terminal of the DC bus voltage Udc, another to the negative terminal, and the third is de-energized. This allows control of the drive signal output to the permanent magnet motor M via the inverter circuit.

[0061] Specifically, according to the three-phase permanent magnet motor system of the present invention, the AC power supply inputs AC power to the rectifier circuit 21. The rectifier circuit 21 rectifies the AC power output from the AC power supply and outputs DC power. The bus capacitor C0 smooths and filters the DC power to obtain the DC bus voltage Vdc. Then, the inverter circuit 23 inverts the DC bus voltage Vdc into AC power and provides it to the load, i.e., the permanent magnet motor M, to control its operation. Because the bus capacitor C0 has a small capacitance, its ability to absorb abnormal surges is reduced, which may lead to excessively high DC bus voltage and damage to components. When the permanent magnet motor receives a deceleration command, the duty cycle of the control signal PWM of the inverter circuit 23 decreases, and the drive voltage output by the inverter circuit 23 decreases. If the permanent magnet motor M has a large inertia and the deceleration acceleration is fast, the back electromotive force of the motor will be higher than the output voltage of the inverter circuit 23. The permanent magnet motor M charges the bus, causing a voltage surge, indicating that the back electromotive force of the motor is greater than the drive voltage output by the inverter circuit 23. At this time, the output of the surge detection circuit changes from low to high.

[0062] Furthermore, the voltage surge control circuit 22 includes a surge detection circuit 221 and a control circuit 222.

[0063] The surge detection circuit 221 is connected in parallel with the bus capacitor C0. When the permanent magnet motor M receives a command indicating a need to reduce speed, it determines the numerical state of the DC bus voltage to detect whether a voltage surge has occurred in the DC bus voltage Vdc, thereby generating a surge detection signal Vsur. Specifically, the surge detection circuit 221 generates the surge detection signal Vsur based on the voltage sampling signal Vs, which represents the magnitude of the DC bus voltage Vdc, and the voltage threshold Vth used to determine whether a voltage surge has occurred.

[0064] When the DC bus voltage Vdc is greater than the voltage threshold Vth, it is in the first state, indicating that a voltage surge has occurred; when the DC bus voltage Vdc is not greater than the voltage threshold Vth, it is in the second state, indicating that no voltage surge has occurred.

[0065] More specifically, the voltage threshold Vth can be obtained by amplifying the filtered signal obtained after filtering the voltage sampling signal Vs to a predetermined value. Preferably, the filtered signal is obtained by passing the voltage sampling signal Vs through a low-pass filter circuit. In one optional embodiment, the surge detection circuit 221 uses the predetermined value obtained by superimposing the low-pass filtered signal of the voltage sampling signal Vs with a bias voltage as the voltage threshold Vth; in another optional embodiment, the surge detection circuit 221 uses the predetermined value obtained by amplifying the low-pass filtered signal of the voltage sampling signal Vs by a predetermined factor as the voltage threshold Vth.

[0066] Optionally, the surge detection circuit 221 can also digitally filter the voltage sampling signal Vs to obtain the filtered signal Vdc. filter Specifically, the filtered signal Vdc can be obtained using the following formula. filter :

[0067] Vdc filter [kTs]=(1-f)×Vdc filter [(k-1)Ts]+f×Vdc[kTs]

[0068] In the formula, Vdc[kTs] is the DC bus voltage sampling signal obtained at the kTs sampling time, k is a positive integer, Ts is the sampling period, f is the digital filter coefficient, and f is a positive number less than 1. filter The initial value is 0.

[0069] It should be noted that the purpose of raising the low-pass filtered signal of the voltage sampling signal Vs to a predetermined value as the voltage threshold Vth is solely to ensure that when a voltage surge occurs, the voltage sampling signal Vs is higher than the voltage threshold Vth, so that the surge detection circuit 221 outputs a valid surge detection signal Vsur (e.g., a high level); and when no voltage surge occurs, the voltage sampling signal Vs is not higher than the voltage threshold Vth, so that the surge detection circuit 221 outputs an invalid surge detection signal Vsur (e.g., a low level).

[0070] The control circuit 222 is used to receive the surge detection signal Vsur and, when a voltage surge occurs during the deceleration process of the permanent magnet motor system, it increases the drive voltage output by the inverter circuit 23 to suppress the permanent magnet motor M from charging the bus to suppress the voltage surge; when no voltage surge occurs, it decreases the drive voltage output by the inverter circuit 23 to reduce the speed of the permanent magnet motor M.

[0071] Furthermore, when a voltage surge occurs, the control circuit 222 increases the duty cycle of the control signal PWM used to control the three-phase bridge arm in the inverter circuit to increase the drive voltage output by the inverter circuit 23, thereby preventing the permanent magnet motor M from charging the bus. When no voltage surge occurs, the control circuit 222 decreases the duty cycle of the control signal PWM in the three-phase bridge arm in the inverter circuit 23 to decrease its output drive voltage, thereby reducing the speed of the permanent magnet motor M.

[0072] Furthermore, when a voltage surge occurs, the control circuit 222 increases the duty cycle of the PWM control signal used to control the three-phase bridge arm in the inverter circuit, so that the drive voltage output by the inverter circuit 23 is close to the back electromotive force of the permanent magnet motor M. Preferably, the control circuit 222 can obtain the drive voltage output by the inverter circuit based on the product of the DC bus voltage Vdc and the duty cycle of the PWM control signal; and can obtain the back electromotive force based on the product of the back electromotive force coefficient and the motor speed, wherein the back electromotive force coefficient is an inherent parameter of the permanent magnet motor and can be directly measured, and the motor speed can be directly obtained through existing control algorithms.

[0073] When the voltage surge control circuit 22 detects a voltage surge in the bus capacitor C0, that is, when the fluctuation of the DC bus voltage Vdc exceeds the predetermined range, the control circuit 222 controls the drive voltage output by the inverter circuit 23 to approach the back electromotive force of the permanent magnet motor M, so that the permanent magnet motor M stops charging the bus, thereby suppressing the abnormal surge. Thus, it can prevent the voltage across the bus capacitor C0 from rising further and protect the power devices (such as the power devices in the inverter circuit 23) from being damaged by high voltage.

[0074] Upon receiving the surge detection signal Vsur, which transitions from low to high, the system increases the PWM duty cycle, ensuring the inverter output voltage equals the motor's back EMF. This prevents the motor from further decelerating, halts the rise in bus voltage, and suppresses the voltage surge. After surge suppression, the bus voltage decreases until the surge detection signal Vsur from the surge detection circuit transitions from high to low before resuming deceleration. Thus, this invention achieves surge suppression during motor deceleration, preventing overvoltage damage to the system or chips.

[0075] Therefore, it can be seen that the control method and circuit for suppressing bus voltage surges proposed in this invention do not require additional braking resistors and braking switch transistors. Moreover, by comparing the directly acquired DC bus voltage signal with the DC bus voltage after low-pass filtering and amplification, a surge detection signal characterizing whether a voltage surge has occurred is obtained, thereby achieving the purpose of suppressing voltage surges and protecting the system under any supply voltage.

[0076] Figure 3 This is a schematic diagram of the surge detection circuit of the present invention. Figure 3 As shown, in this embodiment of the invention, the surge detection circuit 221 includes a sampling circuit 2211, a filtering circuit 2212, a boosting circuit 2213, and a comparison circuit U2.

[0077] Specifically, the sampling circuit 2211 is used to receive the DC bus voltage Vdc and generate a voltage sampling signal Vs characterizing the magnitude of the DC bus voltage Vdc. In a specific example of the present invention, such as Figure 3 As shown, the sampling circuit 2211 includes a first voltage divider resistor R1 and a second voltage divider resistor R2. One end of the first voltage divider resistor R1 is connected to one end of the bus capacitor C0 to receive the DC bus voltage Vdc. One end of the second voltage divider resistor R2 is connected to the other end of the first voltage divider resistor R1, and the other end of the second voltage divider resistor R2 is connected to the other end of the bus capacitor C0. A voltage sampling signal Vs is generated at the common node of the first voltage divider resistor R1 and the second voltage divider resistor R2. In other words, the voltage of the bus capacitor C0 is detected through the voltage divider circuit composed of the first voltage divider resistor R1 and the second voltage divider resistor R2.

[0078] The filter circuit 2212 is used to perform low-pass filtering or digital filtering on the voltage sampling signal Vs to obtain a filtered signal. In a specific example of the present invention, such as... Figure 3As shown, the filter circuit 2212 includes a low-pass filter circuit composed of a third resistor R3 and a first capacitor C1. One end of the third resistor R3 is connected to the common node of the first voltage divider resistor R1 and the second voltage divider resistor R2 to receive the voltage sampling signal Vs, and the other end is connected to one end of the first capacitor C1, which is connected to the ground terminal. A filtered signal of the voltage sampling signal Vs is generated at the common node of the third resistor R3 and the first capacitor C1. Furthermore, the values ​​of the third resistor R3 and the first capacitor C1 need to ensure that the time constant t of the low-pass filter is large, where the time constant t = R3 * C1.

[0079] The boost circuit 2213 is used to amplify the aforementioned filtered signal to a predetermined value, which is then used as the voltage threshold Vth. In a specific example of the present invention, such as... Figure 3 As shown, the boost circuit 2213 includes an amplifier circuit consisting of amplifier U1, a fourth resistor R4, and a fifth resistor R5. The filtered signal is amplified by the amplifier circuit to obtain the voltage threshold Vth, and the amplification factor of the amplifier circuit is (R4+R5) / R5. In other embodiments, the filtered signal can also be used as the voltage threshold Vth by directly superimposing a bias voltage on it.

[0080] Comparator circuit U2 is used to generate a surge detection signal Vsur by comparing the voltage sampling signal Vs and the voltage threshold Vth. In this example, the non-inverting input of comparator circuit U2 receives the voltage sampling signal Vs, and the inverting input receives the voltage threshold Vth. When the permanent magnet motor system is operating normally without voltage surges, the voltage threshold Vth is slightly higher than the voltage sampling signal Vs, and the surge detection signal Vsur is low. When a voltage surge occurs in the permanent magnet motor system, the DC bus voltage Vdc rises rapidly. However, due to the presence of a low-pass filter with a large time constant t, the change in the voltage threshold Vth at the inverting input of comparator circuit U2 lags significantly, remaining essentially at its previous value. Therefore, the surge detection signal Vsur is high, thus determining whether a voltage surge has occurred.

[0081] In this embodiment, amplifier U1 and comparator circuit U2 can be either dedicated integrated circuit chips or circuits with the same function composed of discrete components.

[0082] The surge detection circuit 221 uses a method of filtering and increasing the DC bus voltage Vdc to a predetermined value as the voltage threshold Vth for determining the occurrence of a voltage surge. In applications where the supply voltage is adjustable, the voltage threshold Vth can automatically adjust with the supply voltage, eliminating the need for software-preset voltage thresholds based on the supply voltage. Furthermore, it eliminates the need for an additional braking circuit in the system to suppress motor voltage surges.

[0083] Therefore, the voltage surge control method of the present invention can determine whether a voltage surge has occurred under any supply voltage, without the need to set a voltage surge threshold for voltage surge detection under different supply voltage conditions as in the prior art.

[0084] In summary, this invention aims to provide a control method for suppressing voltage surges caused by motor deceleration under adjustable DC supply voltage. The core of this invention lies in building upon existing permanent magnet motor control system hardware. By detecting the DC bus voltage, filtering it, and then adding a manually set bias voltage, a voltage threshold is set as the threshold for voltage surges. When the DC bus voltage exceeds this threshold during permanent magnet motor deceleration, the inverter circuit output voltage is increased, preventing the permanent magnet motor from charging the bus. This achieves the goal of suppressing voltage surges and protecting the chip under any supply voltage. Furthermore, the voltage surge suppression is entirely implemented through software, requiring no additional components.

[0085] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. For those skilled in the art, the present invention can be modified and varied in various ways. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principle of the present invention should be included within the scope of protection of the present invention.

Claims

1. A voltage surge control method for use in a permanent magnet motor system, characterized in that, include: When the permanent magnet motor receives a command indicating that it needs to reduce speed, it judges the numerical state of the DC bus voltage. In the first state, it increases the drive voltage output by the inverter circuit to suppress the permanent magnet motor from charging the bus and suppress voltage surges. In the second state, it decreases the drive voltage to reduce the speed of the permanent magnet motor. Specifically, by detecting the DC bus voltage, a voltage sampling signal representing the magnitude of the DC bus voltage is generated; the voltage sampling signal is filtered to obtain a filtered signal, and the filtered signal is increased to a predetermined value to serve as a voltage threshold for determining the occurrence of a voltage surge; the numerical state of the DC bus voltage is obtained by comparing the voltage sampling signal and the voltage threshold.

2. The voltage surge control method according to claim 1, characterized in that, When the DC bus voltage is greater than a voltage threshold, it is in the first state, indicating that a voltage surge has occurred; when the DC bus voltage is not greater than the voltage threshold, it is in the second state, indicating that no voltage surge has occurred.

3. The voltage surge control method according to claim 2, characterized in that, If a voltage surge occurs, the duty cycle of the PWM signal used to control the three-phase bridge arm in the inverter circuit is increased to improve the drive voltage output by the inverter circuit, thereby suppressing the permanent magnet motor from charging the bus. If no voltage surge occurs, the duty cycle of the PWM signal is decreased to reduce the drive voltage, thereby reducing the speed of the permanent magnet motor.

4. The voltage surge control method according to claim 2, characterized in that, If a voltage surge occurs, the duty cycle of the PWM signal used to control the three-phase bridge arm in the inverter circuit is increased so that the drive voltage output by the inverter circuit is close to the back electromotive force of the permanent magnet motor.

5. The voltage surge control method according to claim 1, characterized in that, The filtered signal is superimposed with a bias voltage to obtain the predetermined value, which is used as the voltage threshold for determining the occurrence of a voltage surge.

6. The voltage surge control method according to claim 1, characterized in that, The filtered signal is amplified by a predetermined factor to obtain the predetermined value, which is used as the voltage threshold for determining the occurrence of a voltage surge.

7. The voltage surge control method according to claim 1, characterized in that, When the voltage surge occurs, the voltage sampling signal will be higher than the voltage threshold; when the voltage surge does not occur, the voltage sampling signal will not be higher than the voltage threshold.

8. The voltage surge control method according to claim 1, characterized in that, Obtaining a filtered signal by filtering the voltage sampling signal includes passing the voltage sampling signal through a low-pass filter circuit to obtain the filtered signal.

9. The voltage surge control method according to claim 1, characterized in that, Obtaining a filtered signal by filtering the voltage sampling signal includes: The filtered signal obtained by digitally filtering the voltage sampling signal is: In the formula, Vdc[kTs] is the voltage sampling signal of the DC bus voltage obtained at the kTs sampling time, f is the digital filter coefficient, and f is a positive number less than 1. The initial value is 0.

10. The voltage surge control method according to claim 4, characterized in that, The drive voltage output by the inverter circuit is obtained by multiplying the DC bus voltage and the duty cycle; the back electromotive force is obtained by multiplying the back electromotive force coefficient and the motor speed, wherein the back electromotive force coefficient is an inherent parameter of the permanent magnet motor.

11. A voltage surge control circuit for use in a permanent magnet motor power supply circuit, characterized in that, include: The surge detection circuit determines the DC bus voltage value when the permanent magnet motor receives a command indicating that it needs to reduce speed, in order to generate a surge detection signal. It generates the surge detection signal based on a voltage sampling signal characterizing the magnitude of the DC bus voltage and a voltage threshold used to determine the occurrence of a voltage surge; wherein, the voltage threshold is obtained by increasing a filtered signal obtained by filtering the voltage sampling signal to a predetermined value; The control circuit receives the surge detection signal and, when the DC bus voltage is in a first state, increases the drive voltage output by the inverter circuit to suppress the permanent magnet motor from charging the bus to suppress voltage surges; when the DC bus voltage is in a second state, decreases the drive voltage output by the inverter circuit to reduce the speed of the permanent magnet motor.

12. The voltage surge control circuit according to claim 11, characterized in that, When the DC bus voltage is greater than a voltage threshold, it is in the first state, and the surge detection signal indicates that a voltage surge has occurred; when the DC bus voltage is not greater than the voltage threshold, it is in the second state, and the surge detection signal indicates that no voltage surge has occurred.

13. The voltage surge control circuit according to claim 12, characterized in that, When a voltage surge occurs, the control circuit increases the duty cycle of the PWM signal used to control the three-phase bridge arm in the inverter circuit to increase the drive voltage output by the inverter circuit, thereby suppressing the permanent magnet motor from charging the bus. When no voltage surge occurs, the control circuit decreases the duty cycle of the PWM signal to decrease the drive voltage, thereby reducing the speed of the permanent magnet motor.

14. The voltage surge control circuit according to claim 12, characterized in that, When a voltage surge occurs, the control circuit increases the duty cycle of the PWM signal used to control the three-phase bridge arm in the inverter circuit, so that the drive voltage output by the inverter circuit is close to the back electromotive force of the permanent magnet motor.

15. The voltage surge control circuit according to claim 11, characterized in that, The surge detection circuit superimposes the filtered signal with a bias voltage to obtain the predetermined value as the voltage threshold.

16. The voltage surge control circuit according to claim 11, characterized in that, The surge detection circuit amplifies the filtered signal by a predetermined factor to obtain the predetermined value as the voltage threshold.

17. The voltage surge control circuit according to claim 11, characterized in that, The surge detection circuit is configured such that when the voltage surge occurs, the voltage sampling signal will be higher than the voltage threshold; and when the voltage surge does not occur, the voltage sampling signal will not be higher than the voltage threshold.

18. The voltage surge control circuit according to claim 11, characterized in that, The surge detection circuit obtains the filtered signal by passing the voltage sampling signal through a low-pass filter circuit.

19. The voltage surge control circuit according to claim 11, characterized in that, The surge detection circuit performs digital filtering on the voltage sampling signal to obtain the filtered signal, which is: In the formula, Vdc[kTs] is the voltage sampling signal of the DC bus voltage obtained at the kTs sampling time, f is the digital filter coefficient, and f is a positive number less than 1. The initial value is 0.

20. The voltage surge control circuit according to claim 11, characterized in that, The surge detection circuit includes: A sampling circuit is used to receive the DC bus voltage and generate a voltage sampling signal characterizing the magnitude of the DC bus voltage. A filtering circuit is used to perform low-pass filtering on the voltage sampling signal to obtain a filtered signal; A boosting circuit is used to amplify the filtered signal to a predetermined value and then use it as the voltage threshold. The comparison circuit generates the surge detection signal by comparing the voltage sampling signal with the voltage threshold.

21. The voltage surge control circuit according to claim 11, characterized in that, The surge detection circuit includes: A sampling circuit is used to receive the DC bus voltage and generate a voltage sampling signal characterizing the magnitude of the DC bus voltage. A filtering circuit is used to digitally filter the voltage sampling signal to obtain a filtered signal; A boosting circuit is used to amplify the filtered signal to a predetermined value and then use it as the voltage threshold. The comparison circuit generates the surge detection signal by comparing the voltage sampling signal with the voltage threshold.

22. The voltage surge control circuit according to claim 14, characterized in that, The control circuit obtains the drive voltage output by the inverter circuit based on the product of the DC bus voltage and the duty cycle; and obtains the back electromotive force based on the product of the back electromotive force coefficient and the motor speed, wherein the back electromotive force coefficient is an inherent parameter of the permanent magnet motor.

23. A power supply circuit for a permanent magnet motor, characterized in that, include: Permanent magnet motor, and, The voltage surge control circuit according to any one of claims 11-22.

Images