Control device and bridge circuit having such a control device

CN114600362BActive Publication Date: 2026-09-04THYSSENKRUPP PRESTA AG +1
View PDF 1 Cites 0 Cited by

Patent Information

Application Number
CN202080056305.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2019-08-09
Filing Date
2020-08-07
Publication Date
2026-09-04
Estimated Expiration
2040-08-07

AI Technical Summary

Technical Problem

然而,这些解决方案带来高制造成本,尤其是对于相隔离器,因为在角速度和相隔离器的电流中断能力之间仅存在间接相关性,并且因此为了防止高压峰值而需要过大尺寸的相隔离器

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN114600362B_ABST
    Figure CN114600362B_ABST
Patent Text Reader

Abstract

The invention relates to a bridge control device for a bridge circuit for controlled alternating voltage generation. The control device has a voltage meter for each FET of a bridge branch, wherein each voltage meter can be connected to the respective FET for a drain-source voltage measurement and outputs a measurement value and / or a status value, field effect transistors as phase isolators for each alternating voltage output, wherein one or more phase isolators can be connected to the alternating voltage output respectively and can be switched by a control signal respectively, and a logic circuit for detecting the values of the voltage meters and outputting the control signals to the phase isolators respectively. Furthermore, the invention relates to a bridge circuit having such a control device.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to a control device for a power module or inverter, and more particularly to a control device for a bridge circuit for controlled AC power generation. The invention also relates to a bridge circuit having such a control device. Background Technology

[0002] An inverter is an electrical device that converts direct current (DC) voltage to alternating current (AC) voltage. A bridge circuit is an exemplary implementation of an inverter, having one or more parallel bridge branches and capable of generating sinusoidal AC current or voltage using a pulse-width modulation (PWM) signal. The bridge branches consist of at least one high-side (HS) switch and at least one low-side (LS) switch, with the AC current output located between the two switches. The HS switch is at one DC voltage potential, and the LS switch is at the other DC voltage potential.

[0003] Currently, semiconductor circuit breakers, such as field-effect transistors (FETs), are used as isolators or switches between inverters or power modules and the motors to be driven, to electrically disconnect the motor from the power module in the event of a short circuit in the power module. This isolation or disconnection is necessary to reduce the braking effect of the motor. However, deactivating the phase isolators that connect the power module to the motor in the ON or OFF state is not always without problems, because if the current is suddenly interrupted, the motor's inductance will generate a high voltage spike, which can damage and even destroy inverter components and other switching elements, such as the phase isolators.

[0004] According to existing technology, there are many solutions for deactivating phase isolators based on the rotor angular velocity of the motor. However, these solutions incur high manufacturing costs, especially for phase isolators, because there is only an indirect correlation between angular velocity and the current interruption capability of the phase isolator, and therefore excessively large phase isolators are required to prevent high voltage spikes. There are also many other methods for deactivating phase isolators based on detecting the zero-ampere current passing through the phase isolator. However, this requires additional ammeters in the three-phase AC phases to disconnect the phase isolator at that specific zero-ampere point or to interrupt the phase conductor using the phase isolator.

[0005] It should be noted that electric motors are typically powered by three-phase alternating current, where each phase forms a sinusoidal signal and is offset by 120° relative to the other phases. These phases are referred to as the U phase, V phase, and W phase. Summary of the Invention

[0006] The object of this invention is to avoid or at least minimize the aforementioned problems and disadvantages. In particular, it provides a device capable of identifying various scenarios, such as short circuits, and subsequently isolating the circuit. This device should be able to reliably interrupt current, be simple and inexpensive to manufacture, and have a long service life.

[0007] To achieve the above objectives, the present invention provides a control device for inverters, particularly for bridge circuits used in controlled AC power generation.

[0008] Specifically, this relates to a control device for a bridge circuit used in controlled alternating current generation. The bridge circuit is equipped with at least one bridge branch having at least one high-side field-effect transistor (FET), at least one low-side FET, and an alternating current output terminal located therebetween. The control device has…

[0009] - A voltmeter for each FET in the bridge branch, wherein each voltmeter for drain-source voltage measurement can be connected to the corresponding FET and output the measured value and / or status value;

[0010] - A field-effect transistor serving as a phase isolator for each AC output terminal, wherein the one or more phase isolators can be individually connected to the AC output terminal and can be individually switched by a control signal; and

[0011] - A logic circuit used to detect the value of the voltmeter and output control signals to the phase isolators respectively.

[0012] The logic circuit is designed to output a control signal to block one or more phase isolators based on the detected value.

[0013] The solution involves qualitatively and / or quantitatively determining the current intensity and direction of the corresponding phase by measuring the voltage drop at the FET, particularly at its body diode. Therefore, the drain and source terminals of each FET are electrically connected to a voltmeter; that is, the number of voltmeters corresponds to the number of FETs in the bridge circuit. Voltage measurements are performed on the HS and / or LS FETs. The logic circuit receives a blocking signal indicating that one or more specific phases or all phases should be disconnected or interrupted from the bridge circuit.

[0014] The advantage of the control device is that it measures specific characteristics of a bridge circuit or inverter with a small number of components. Once these characteristics or state values ​​or measurements have been generated and transmitted to the logic circuit, it is determined that a control signal can be output to interrupt the phase isolator. Preferably, the voltage is measured periodically, i.e., at constant time intervals or in real time, to determine the alternating current in different phases.

[0015] It has proven advantageous that the voltmeter is designed to determine and output the first and second states:

[0016] - When the measured voltage is below a predetermined value, especially below -0.5 volts, it is in the first state, and the first state is used to determine the direction of current; and

[0017] - When the measured voltage is higher than a predetermined value, especially higher than -0.5 volts, it is in the second state, and the second state is used to determine that either no current flows through the body diode of the FET or the FET has a drain-source short circuit and is damaged.

[0018] The advantage of this implementation is that a voltmeter can be added to or replace its measured value to determine a state value, which is provided to the logic circuit and thus conclusions can be drawn about the bridge circuit and its state. In the first state, in particular, it is determined that the current flows through the body diode, thereby determining the direction of the current.

[0019] In another advantageous embodiment, the control device includes a main control circuit (also known as an EPAS) or is connectable to a main control circuit, wherein the EPAS can determine predetermined values ​​at any time, and especially during the operation of the control device and / or bridge circuit. The EPAS is equipped with, for example, data for the FET and can draw conclusions about the state of the FET and / or its body diode based on the measured voltage values. Additionally or alternatively, the main control circuit can output a blocking signal to the logic circuit. The output of the blocking signal can be manually triggered by user input and / or automatically triggered by electronic circuitry or measuring circuitry (such as the aforementioned and / or other voltmeters).

[0020] In another advantageous embodiment, the source connection of one or more phase isolators can be connected to an AC-powered load. A first advantageous arrangement of the phase isolator relates here, in which the isolator can be connected either via its drain connection to an AC output or via its source connection to a load. The logic circuit is particularly configured to accommodate this arrangement when controlling the phase isolator.

[0021] Preferably, the logic circuit is designed to output a control signal to block the phase isolator at the AC output terminal of the corresponding high-side FET when a current conduction on the high-side FET, as measured by a voltmeter, is detected. In other words, the control signal can preferably be output only when the corresponding current conduction is measured. Due to the arrangement of the phase isolators, the corresponding high-side FET can be used to block the corresponding phase isolator. Even when the phase isolator is blocked, current can still be drawn from the motor coils, particularly its phase, via the body diode of the phase isolator and the body diode of the high-side FET. This avoids sudden interruptions of current in the corresponding phase or high voltage peaks through the motor coils.

[0022] Furthermore, the logic circuit can be designed to determine, based on the detected values, that the high-side FET is not short-circuited and that the current in the body diode of the high-side FET is directed in the conduction direction of the body diode of the corresponding phase isolator, and thus output a control signal to block the phase isolator at the AC output terminal of the corresponding high-side FET. Based on the voltmeter readings and status values ​​on the high-side FET, it can be determined that there is no short circuit on the FET and that the current through the body diode of the high-side FET and the body diode of the corresponding phase isolator is directed in the same direction. Once these conditions are identified, the corresponding control signal to block the phase isolator is output, and the current can continue to flow through the corresponding body diode.

[0023] Preferably, the logic circuit is designed to determine, based on the detected value, that the low-side FET is not short-circuited and that current is directed in the body diode of the low-side FET to conduct in the conduction direction of the body diode of the corresponding phase isolator, and that the value indicates that no current is directed in the body diode of the high-side FET in the same phase, and therefore outputs a control signal for blocking the phase isolator at the AC output terminal of the corresponding low-side FET.

[0024] Similarly, the logic circuit can be designed such that, after two arbitrary phase isolators have been deactivated, it determines, based on the detected values, that there is no current conduction in the body diode of the corresponding low-side FET in the conduction direction, and these values ​​indicate that there is no current conduction in the body diode of the high-side FET in the last phase, and therefore outputs a control signal to block the phase isolator at the AC output terminal of the last low-side FET.

[0025] Furthermore, the logic circuit can be designed to output a control signal to block the phase isolator when the voltmeter used for the high-side FET changes its state from current-driven in the body diode to no current-driven in the body diode, and the voltmeter used for the low-side FET indicates that there is no current-driven in the body diodes of the two other phases.

[0026] In another advantageous embodiment, the drain connection of one or more phase isolators can be connected to an AC-powered load. A second advantageous arrangement of the phase isolators involves connecting or being able to connect their source connection to the AC output or their drain connection to the load. In this case, the body diode is connected so that current can flow from the bridge branch of the bridge circuit to the coil. This arrangement is particularly advantageous for logic circuitry when controlling the phase isolators.

[0027] The logic circuit is preferably designed to issue a control signal to block the phase isolator at the corresponding low-side FET's AC output when a current-driven current (measured by a voltmeter) is detected on the low-side FET. This advantageous design enables the determination of when to block the corresponding phase using a phase isolator. For this purpose, the body diode of the low-side FET must have current-driven characteristics.

[0028] Similarly, the logic circuit can be designed to determine, based on the detected value, that the low-side FET is not short-circuited and that the current in the body diode of the low-side FET is directed in the conduction direction of the body diode of the corresponding phase isolator, and thus output a control signal for blocking the phase isolator at the AC output terminal of the corresponding low-side FET. This advantageous embodiment illustrates two conditions under which the phase isolator can be blocked by the control signal.

[0029] Preferably, the logic circuit is designed to output a control signal to block all phase isolators when no voltmeter measures current conduction. This illustrates the situation where it is necessary to block all phase isolators. In particular, a short circuit to a DC voltage source may be relevant here.

[0030] Similarly, the logic circuit can be designed to output a control signal to block all phase isolators when all voltmeters on the high side show current conduction in the body diode of the high-side FET at least once, while the voltmeters do not show current conduction in the body diode of the low-side FET.

[0031] Furthermore, it has proven advantageous that the logic circuit is designed to detect or receive a blocking signal not originating from outside the voltmeter, and to activate phase isolation by outputting a control signal to the phase isolator based on that blocking signal. Similarly, alternatively or additionally, the blocking signal can be generated by the logic circuit itself based on the value detected by the voltmeter. The voltmeter value provides the logic circuit with the condition or prerequisite for at what point in time the phase isolator can be turned off or on.

[0032] The present invention also relates to a three-phase bridge circuit having a control device according to any of the foregoing aspects or embodiments of the present invention. Attached Figure Description

[0033] The accompanying drawings described below relate to preferred embodiments of the control device according to the invention, wherein these drawings are not intended to limit but are essentially illustrative of the invention. Elements from different drawings but having the same reference numerals are identical; therefore, the description of an element from one drawing also applies to elements from other drawings having the same reference numerals or numbers.

[0034] Figure 1 A three-phase bridge circuit with a control device according to the invention is shown, wherein the bridge circuit is connected to the motor.

[0035] Figure 2 A three-phase bridge circuit with a control device according to a second preferred embodiment is shown, wherein a motor with three coils is connected to the output of the bridge circuit.

[0036] Figure 3 The current-time plot is shown under DC voltage short-circuit conditions.

[0037] Figure 4 The current-time plot is shown with the high-side FET short-circuited.

[0038] Figure 5 The current-time plot is shown with the low-side FET short-circuited. Detailed Implementation

[0039] Figure 1 A three-phase bridge circuit 8, serving as an inverter, is shown, having first, second, and third bridge branches 9, 10, and 11. These bridge branches are connected in parallel. Each bridge branch 9, 10, and 11 has a high-side field-effect transistor 12, 14, 16 and a low-side field-effect transistor 13, 15, 17, and AC output terminals 23, 24, 25 between two FETs. HS-FETs 12, 14, and 16 are connected to the positive potential of the DC voltage with their drain terminals connected, while LS-FETs 13, 15, and 17 are connected to the negative potential of the DC voltage with their source terminals connected. Each FET is shown as a body diode formed in parallel between its drain and source terminals. HS-FET 12 in the first bridge branch 9 is a body diode 18, and LS-FET 13 in the first bridge branch 9 is a body diode 19. In the other two bridge branches 10 and 11, the FETs are constructed similarly. Each FET is connected to a voltmeter to measure, in particular, the body diode voltage between its drain and source. exist Figure 1The diagram specifically shows voltmeter 2 of HS-FET 12 and second voltmeter 3 of LS-FET 13, which are part of the control device 1 according to the invention. The control device 1 includes voltmeters (only 2 and 3 are shown), logic circuit 4, and phase isolators 5, 6, and 7. All six voltmeters are connected to logic circuit 4, which outputs control signals to the corresponding phase isolators 5, 6, and 7 based on the measured values ​​and / or status values ​​output by the voltmeters. The control signals are sent to the corresponding gate connections of phase isolators 5, 6, and 7 to cut off the current flowing through them. The source connections of the corresponding phase isolators 5, 6, and 7 are connected to coils 27, 28, and 29 of motor 26. Because the body diodes of phase isolators 5, 6, and 7 have the same conduction direction as field-effect transistors 12, 14, and 16, the corresponding phase isolators are turned off when current flows from coils 27, 28, and 29 through phase isolators 5, 6, and 7 to the corresponding high-side field-effect transistors. Once the corresponding phase isolator is blocked, the current can be bypassed through the corresponding body diode, thereby preventing sudden current interruption and protecting the phase isolator against high voltage peaks.

[0040] Figure 2 The same three-phase bridge circuit 8 is shown, which has a motor 26 and its coils 27, 28, 29. Control circuit 1 is similar to... Figure 1 The difference in the control circuit is that phase isolators 5, 6, and 7 are connected in opposite configurations; that is, their drain terminals are connected to the coil, and their source terminals are connected to the AC output terminals 23, 24, and 25. Therefore, once current flows through the body diode of the low-side field-effect transistor and through the phase isolator, the corresponding phase isolator can be turned off to block the current. The current can then bypass the body diode of the phase isolator.

[0041] Figures 3 to 5 A current-time graph is shown, qualitatively illustrating the signal strength of different currents. Phase currents U, V, and W, a blocking signal (top signal in the graph), and three control signals (bottom signals in the graph) are shown here. The blocking and control signals, shown subsequently, have steps equal to the on and off signals, respectively.

[0042] Figure 3The current-time diagrams of three phases U, V, W or phases 31, 32, 33, offset from each other by 120°, are shown. A blocking command A30 generated or received in the logic circuit of the control device according to the invention causes the control device to block the phase isolators. For this purpose, a control signal 34 is output first for phase U, then a control signal 35 for phase V, and finally a control signal 36 for phase W, to block the respective phase isolators. It is important to ensure that a specific condition is met when outputting the control signals: the phase current must be negative or zero. As can be seen, after control signal 36, the entire phase current is zero.

[0043] Figure 4 A current-time diagram is shown, in which a high-side field-effect transistor short circuit exists in this case. The characteristic is that phases U, V, and W, or phases 38, 39, and 40, cannot correctly generate three-phase current. Once a blocking command B 37 is generated or received in the logic circuit, the phase isolator is blocked, where current can pass through the phase isolator and the body diode of the low-side field-effect transistor. This is phase V in this case. Then, phase W, and therefore its phase isolator, is blocked, and finally, phase U, the last phase isolator, is blocked. Finally, the phase current is completely zero, protecting the motor from potential damage due to current spikes.

[0044] Figure 5 The current-time plot is shown, for example, in the case of a short circuit in the low-side FET. Similar to... Figure 4 Phases U, V, W, or phases 45, 46, 47 do not form the correct three-phase current. Once a blocking command C 44 is generated or received in the logic circuit, and no voltmeter detects current conduction in the body diode, especially during a specific time period, all phase isolators can be turned off simultaneously.

[0045] Explanation of reference numerals in the attached figures

[0046] 1 Control device

[0047] 2. Voltmeter of the HS-FET in the first bridge branch

[0048] 3. Voltmeter of the LS-FET in the first bridge branch

[0049] 4 Logic Circuits

[0050] 5. FET (Q7) for phase U of the first phase isolator.

[0051] 6 is the FET (Q8) for phase V of the second phase isolator.

[0052] 7. FET (Q9) for phase W of the third phase isolator

[0053] 8. Three-phase bridge circuit as inverter

[0054] 9 First Bridge Branch Road

[0055] 10 Second Bridge Branch Road

[0056] 11 Third Bridge Branch Road

[0057] 12. High-side field-effect transistor in the first bridge branch, HS-FET (Q1)

[0058] 13. Low-side field-effect transistor of the first bridge branch, LS-FET (Q2)

[0059] 14. High-side field-effect transistor (Q3) in the second bridge branch.

[0060] 15. Low-side field-effect transistor (Q4) in the second bridge branch.

[0061] 16. High-side field-effect transistor (Q5) of the third bridge branch.

[0062] 17. Low-side field-effect transistor (Q6) in the third bridge branch.

[0063] 18 Q1 body diode

[0064] 19 Q2 body diode

[0065] 20 Q7 body diode

[0066] 21 Q8 body diode

[0067] 22 Q9 body diode

[0068] 23 First Bridge Branch - Phase U's AC Output Terminal

[0069] 24 Second Bridge Branch - Phase V AC Output Terminal

[0070] 25 Third Bridge Branch - Phase W AC Output Terminal

[0071] 26 motors

[0072] The first coil (L1) of motor 27

[0073] The second coil (L2) of the 28 motor

[0074] The third coil (L3) of motor 29

[0075] 30 Blocking signal A

[0076] 31 AC Current - Phase U

[0077] 32 AC current-phase V

[0078] 33 AC current - phase W

[0079] 34 Control signals for Q7-phase U

[0080] 35 is used for the control signal of Q8-phase V.

[0081] 36 Control signals for Q9-phase W

[0082] 37 Blocking signal B

[0083] 38 AC current-phase U

[0084] 39 AC current - phase V

[0085] 40 AC current-phase W

[0086] 41 Control signals for Q7-phase U

[0087] 42 Control signals for Q8-phase V

[0088] 43 Control signals for Q9-phase W

[0089] 44 Blocking signal C

[0090] 45 AC current - phase U

[0091] 46 AC current - phase V

[0092] 47 AC current - phase W

[0093] 48 Control signals for Q7-phase U

[0094] 49 Control signals for Q8-phase V

[0095] 50 is used for the control signal of Q9-phase W.

Claims

1. A control device for a bridge circuit for controlled alternating current generation, the bridge circuit having at least one bridge branch, the bridge branch having at least one high-side FET, at least one low-side FET, and an alternating current output terminal located between the two. Its features are, The control device has - A voltmeter for each FET in the bridge branch, wherein each voltmeter is connected to the corresponding FET to measure the drain-source voltage and output the measured value and / or status value; - A field-effect transistor serving as a phase isolator for each AC output terminal, wherein one or more phase isolators can be individually connected to the AC output terminal and can be individually switched by a control signal; and - Logic circuitry used to detect the voltmeter reading and output control signals to the phase isolators. The logic circuit outputs a control signal to block one or more phase isolators based on the detected value. The voltmeter is designed to determine and output the first and second states: - When the measured voltage is lower than a predetermined value, it is in the first state, and the first state is used to determine the current direction; and - When the measured voltage is higher than a predetermined value, it is in the second state, and the second state is used to determine that either no current flows through the body diode of the FET, or the FET has a drain-source short circuit and is damaged.

2. The control device according to claim 1, Its features are, The voltmeter is designed to determine and output the first and second states: - When the measured voltage is below -0.5 volts, it is in the first state, and the first state is used to determine the direction of the current; and - When the measured voltage is above -0.5 volts, it is in the second state, and the second state is used to determine either that no current flows through the body diode of the FET or that the FET has a drain-source short circuit and is damaged.

3. The control device according to claim 1, Its features are, The control device has a main control circuit capable of determining predetermined values ​​at any time and during operation of the control device and / or the bridge circuit.

4. The control device according to any one of claims 1 to 3, Its features are, The source terminal of the one or more phase isolators can be connected to a load that needs to be powered by AC.

5. The control device according to claim 4, Its features are, The logic circuit is designed to output a control signal when a current-driven current on the high-side FET, as measured by a voltmeter, is detected, in order to block the phase isolator at the corresponding AC output terminal of the high-side FET.

6. The control device according to claim 5, Its features are, The logic circuit is designed to determine, based on the detected value, that the high-side FET is not short-circuited and that the current in the body diode of the high-side FET is directed in the conduction direction of the body diode of the corresponding phase isolator, and thus outputs a control signal for blocking the phase isolator at the AC output terminal of the corresponding high-side FET.

7. The control device according to any one of claims 1 to 2, Its features are, The drain connection of the one or more phase isolators can be connected to a load that needs to be powered by AC.

8. The control device according to claim 7, Its features are, The logic circuit is designed to output a control signal to block the phase isolator at the corresponding low-side FET AC output terminal when a current-driven current on the low-side FET, as measured by a voltmeter, is detected.

9. The control device according to claim 8, Its features are, The logic circuit is designed to determine, based on the detected value, that the low-side FET is not short-circuited and that the current in the body diode of the low-side FET is directed in the conduction direction of the body diode of the corresponding phase isolator, and thereby outputs a control signal for blocking the phase isolator at the AC output terminal of the corresponding low-side FET.

10. The control device according to claim 8, Its features are, The logic circuit is designed to determine, based on the detected value, that the low-side FET is not short-circuited and that the current in the body diode of the low-side FET is directed in the conduction direction of the body diode of the corresponding phase isolator, and that the value indicates that there is no current in the body diode of the high-side FET on the same phase, and therefore outputs a control signal for blocking the phase isolator at the AC output terminal of the corresponding low-side FET.

11. The control device according to claim 8, Its features are, This logic circuit is designed to determine, based on the detected value, that there is no current flowing in the conduction direction in the body diode of the corresponding low-side FET after two arbitrary phase isolators have been deactivated, and that the value indicates that there is no current flowing in the body diode of the high-side FET on the last phase, and therefore outputs a control signal to block the phase isolator at the AC output terminal of the last low-side FET.

12. The control device according to claim 8, Its features are, The logic circuit is designed to output a control signal to block the phase isolator when the voltmeter for the high-side FET changes its state from current-driven in the body diode to no current-driven in the body diode, and the voltmeter for the low-side FET indicates that there is no current-driven in the body diodes on the other two phases.

13. The control device according to any one of claims 1 to 3, Its features are, The logic circuit is designed to output a control signal to block all phase isolators when no voltmeter measures current conduction.

14. The control device according to any one of claims 1 to 3, Its features are, The logic circuit is designed to output a control signal to block all phase isolators when all voltmeters on the high side show current conduction in the body diode of the high-side FET at least once, while the voltmeters do not show current conduction in the body diode of the low-side FET.

15. A three-phase bridge circuit having a control device according to any one of claims 1 to 14, the bridge circuit having three bridge branches, wherein each bridge branch has a high-side FET, a low-side FET and an AC output terminal located between them.

Citation Information

Patent Citations

  • Control circuit for a multi-phase motor

    CN111418148A