Display device

Abstract

A display device is disclosed. The display device according to an embodiment of the present disclosure includes at least one recess formed in an organic film disposed above a substrate, and thus, moisture generated in a manufacturing process of the display device or a gas remaining in the organic film or delaying movement of the moisture or the gas can be discharged. As a result, display quality and lifespan of the display device can be improved.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2020-0170760, filed with the Korean Intellectual Property Office on December 8, 2020, the entire disclosure of which is incorporated herein by reference. Technical Field

[0003] This disclosure relates to display devices, and more specifically, to display devices that improve display quality and lifespan by venting moisture generated during the manufacturing process or gases remaining in an organic film and / or delaying the movement of said moisture or gases. Background Technology

[0004] Various solutions and types of display devices for displaying images on televisions, monitors, smartphones, tablets, laptops, and other devices have been widely used.

[0005] In display devices, following the widely used liquid crystal display (LCD) devices, organic light-emitting diode (OLED) devices (or organic light-emitting display devices) have been increasingly used, and their application scope has been greatly expanded.

[0006] The display device includes multiple light-emitting elements or liquid crystals for displaying images and a display panel, in which thin-film transistors for individually controlling the operation of each light-emitting element or liquid crystal are disposed on a substrate. Therefore, such a display device allows multiple light-emitting elements or liquid crystals to be operated according to the information or data to be displayed.

[0007] In display devices, organic light-emitting displays (OLEDs), which are self-emissive displays based on the electro-excitation of organic materials, can be driven at low voltages and manufactured with relatively thin structures. OLEDs have attracted attention as display devices that can overcome the shortcomings of liquid crystal displays (e.g., wide viewing angle, short response time).

[0008] In an organic light-emitting display device, a light-emitting layer formed of organic material is disposed between an anode electrode and a cathode electrode. When a positive voltage and a negative voltage are applied to the anode and cathode electrodes of the organic light-emitting display device, respectively, holes injected from the anode electrode can move to the light-emitting layer via a hole transport layer, and electrons can move from the cathode electrode to the light-emitting layer via an electron transport layer. Therefore, electrons and holes can recombine in the corresponding light-emitting elements; as a result, excitons can be generated.

[0009] When such excitons move from the excited state to the ground state, fluorescent molecules in the luminescent layer emit light to form an image. In the case of panchromatic organic electroluminescent devices, this includes pixels that emit various colors such as red, green, and blue.

[0010] To form the light-emitting portion of the organic light-emitting display device, a pixel-defining layer is formed on the anode electrode. Subsequently, a portion of the pixel-defining layer in the area where a portion of the anode electrode is located is removed. Next, a light-emitting layer is formed in the area where the pixel-defining layer has been removed, and a cathode electrode is formed on the light-emitting layer. Summary of the Invention

[0011] To house the light-emitting element and thin-film transistors in an organic light-emitting display (OLED), multiple organic films are used. Consequently, during manufacturing, gases and moisture are generated in the areas where the organic films are located, and even after the OLED manufacturing process is complete, some of these gases and moisture may remain within the device. These residual gases and moisture can migrate to the light-emitting layer formed from organic materials. As a result, the light-emitting layer is damaged, and the brightness of the OLED decreases. This leads to the OLED incompletely emitting light over time.

[0012] Embodiments of this disclosure relate to an organic light-emitting display device that can prevent residual gas and moisture in the display device from damaging the light-emitting layer by venting gas and moisture or delaying the movement of gas and moisture towards the light-emitting layer.

[0013] The issues or problems addressed in this disclosure are not limited thereto, and other issues or problems will become apparent to those skilled in the art as described below.

[0014] According to one aspect of this disclosure, a display device is provided, comprising: a substrate including an active region having a plurality of pixels and an active region surrounding the active region; a thin-film transistor disposed above the substrate; a first planarization film disposed on the thin-film transistor; a first electrode disposed on the first planarization film and electrically connected to the thin-film transistor; and a pixel defining layer disposed on the first electrode. Furthermore, the active region may include: a first groove corresponding to a first region in which one or more of the pixel defining layer and the first planarization film are partially removed; and a second groove corresponding to a second region in which a portion of the pixel defining layer is removed and is different from the first region.

[0015] According to another aspect of this disclosure, a display device is provided, comprising: a substrate including an active region having a plurality of pixels and an active region surrounding the active region; a thin-film transistor disposed above the substrate; a first planarization film disposed on the thin-film transistor; a first electrode disposed on the first planarization film and electrically connected to the thin-film transistor; a pixel defining layer disposed on the first electrode; a light-emitting layer disposed in contact with a portion of each of the first electrode and the pixel defining layer; a second electrode disposed on the light-emitting layer; a common electrode line for transmitting a common voltage to the second electrode; and a common electrode connection line electrically connected between the second electrode and the common electrode line. Furthermore, the active region may include a first groove corresponding to a first region in which one or more of the pixel defining layer and the first planarization film are partially removed, and the common electrode connection line may include at least one outlet for venting gas.

[0016] According to various aspects of this disclosure, by forming multiple grooves for venting moisture generated during the manufacturing process of the organic light-emitting display device or gas remaining in the organic film, or for delaying the movement of said moisture or gas, damage to the light-emitting layer of the display device by gas and moisture can be prevented.

[0017] Therefore, the display quality and lifespan of the display device can be improved.

[0018] The effects of this disclosure are not limited thereto, and other effects will become apparent to those skilled in the art from the following description. Attached Figure Description

[0019] Figure 1A This is a perspective view showing the display device.

[0020] Figure 1B It is along Figure 1A The cross-sectional view taken by line A-A'.

[0021] Figure 2 This is a plan view showing various aspects of the substrate according to this disclosure.

[0022] Figure 3 It is along Figure 2 The cross-sectional view taken by line B-B'.

[0023] Figure 4 The path of gas or water is shown.

[0024] Figure 5 It is shown Figure 2 An enlarged plan view of area "C". Detailed Implementation

[0025] The advantages and features of this disclosure, as well as methods for implementing it, will become apparent from the embodiments described in detail below with reference to the accompanying drawings. However, this disclosure is not limited to the embodiments set forth below, but can be implemented in various different forms. The following embodiments are provided only to fully disclose this disclosure and to inform those skilled in the art of its scope, and this disclosure is limited only by the scope of the appended claims.

[0026] Furthermore, the shapes, dimensions, ratios, angles, numbers, etc., shown in the accompanying drawings to describe exemplary embodiments of this disclosure are merely examples, and this disclosure is not limited thereto. Throughout this specification, the same reference numerals generally denote the same elements. Additionally, in the following description of this disclosure, detailed descriptions of well-known functions and configurations incorporated herein may render the subject matter of some embodiments of this disclosure considerably unclear, such detailed descriptions will be omitted. Unless used herein in conjunction with the term "only," terms such as "comprising," "having," "including," "consisting of," and "composed of" are generally intended to allow for the addition of additional components. Unless the context clearly indicates otherwise, the singular forms used herein are intended to include the plural forms.

[0027] In interpreting any element or feature of embodiments of this disclosure, even without specific description, it should be understood that any size and relative dimensions of layers, regions, and areas include tolerances or error ranges.

[0028] In this document, spatially relative terms such as “above,” “on top,” “above,” “below,” “below,” “under,” “below,” “above,” “near,” “close to,” “adjacent” may be used to describe the relationship between one element or feature shown in the figure and another (one or more) elements or features, and unless terms such as “directly” or “only” are used, it should be interpreted that one or more elements may be further “inserted” between these elements.

[0029] The position, arrangement, or placement of the first element or layer "on" the second element or layer may include not only the first element or layer being directly located, arranged, or placed on the second element or layer, but may also include a third element or layer being inserted between the first element or layer and the second element or layer.

[0030] When terms such as "first," "second," etc., are used herein to describe various elements or components, it should be understood that such elements or components are not limited thereto. These terms are used only to distinguish one element from other elements. Therefore, the first element mentioned below may be a second element in the technical concept of this disclosure.

[0031] Throughout this specification, the same reference numerals generally denote the same elements.

[0032] The size and thickness of each component shown in the accompanying drawings are for ease of description, and therefore, embodiments of this disclosure are not necessarily limited thereto.

[0033] Elements or features of the various exemplary embodiments of this disclosure may be joined or combined with each other in part or in whole, and may be interlocked and operated in a variety of technical ways as can be fully understood by those skilled in the art, and the various exemplary embodiments may be performed independently or in association with each other.

[0034] It should be understood that the embodiments described herein can be applied not only to organic light-emitting display devices, but also to various other display devices, such as liquid crystal display devices, field emission display devices, quantum dot display devices, etc.

[0035] In the following, embodiments of the display device will be discussed in detail with reference to the accompanying drawings. This display device can improve the display quality and lifespan by venting moisture generated during the manufacturing process of the display device or gas remaining in the organic film, or by delaying the movement of said moisture or gas.

[0036] Figure 1A This is a perspective view showing the display device 10. (Refer to...) Figure 1A The display device 10 includes a substrate 100 and a front member 200 disposed on the substrate 100. The substrate 100 may include a front portion FP and a pad portion PAD extending from the lower portion of the front portion FP.

[0037] To display and control the display of images, components such as a light-emitting element layer and a thin-film transistor layer for driving the light-emitting element layer can be disposed between the substrate 100 and the front member 200. Components disposed between the substrate 100 and the front member 200 for displaying images, such as a light-emitting element layer and a thin-film transistor layer for driving the light-emitting element layer, will be described later.

[0038] The light-emitting element layer is located in the front portion FP of the substrate 100, and the front portion FP can be divided into an active region AA for displaying an image and a non-active region NA, which is the area other than the active region AA. The non-active region NA is the area where the light-emitting element layer is not located and corresponds to the area surrounding the active region AA.

[0039] One or more driving components for applying signals from the outside to the display device 10—such as driving chips, flexible printed circuit boards (FPCBs), etc.—can be mounted on the pad portion PAD.

[0040] The substrate 100 may be formed of a flexible plastic material and may have flexible properties. The substrate 100 may include polyimide and may be formed of a flexible thin glass material.

[0041] Because the substrate 100 has flexible properties, the left and right edges of the front FP can be bent downwards. When the left and right edges of the front FP are bent downwards, the portions of the non-active region corresponding to the left and right edges of the front FP are positioned facing the corresponding side surfaces of the substrate 100, thus reducing the area of ​​the user-perceived non-active region NA located in front of the display device (Z-axis). Furthermore, when the pad portion PAD located at the lower part of the substrate 100 is bent, the pad portion PAD can be positioned facing the rear surface of the substrate 100; therefore, the portion of the non-active region NA corresponding to the lower part of the substrate 100 can be reduced.

[0042] Meanwhile, since the front member 200 overlaps with the active area AA of the displayed image, the front member 200 can be formed of a transparent material such as encapsulating glass in order to make the image visible. For example, the front member 200 can be formed of a transparent plastic material, a glass material, or a reinforced glass material.

[0043] Figure 1B It is along Figure 1A The cross-sectional view taken by line AA'.

[0044] Figure 1B It is a cross-sectional view used to approximate a portion of the panel and to show some elements located between the substrate 100 and the front member 200, such as thin-film transistor layers, light-emitting element layers, etc.

[0045] Reference Figure 1A and Figure 1B A thin-film transistor layer 110 is disposed on the substrate 100. The thin-film transistor layer 110 may include gate lines, data lines, and at least one thin-film transistor. The thin-film transistor includes a gate electrode, a semiconductor layer, and source and drain electrodes. When a gate driver 20 that generates a gate signal and applies the gate signal to the gate electrode is formed using a gate in-panel driver (GIP) scheme, the gate driver 20 may be formed together with the thin-film transistor layer 110.

[0046] The light-emitting element layer 120 can be disposed on the thin-film transistor layer 110. The light-emitting element layer 120 may include an anode electrode as a first electrode, a light-emitting organic material layer, a cathode electrode as a second electrode, and a pixel defining layer. The light-emitting organic material layer may include a hole transport layer, a light-emitting layer, and an electron transport layer. In this case, when a voltage is applied to the first electrode and the second electrode, holes and electrons can move to the light-emitting layer through the hole transport layer and the electron transport layer, respectively, and combine in the light-emitting layer to emit light. Since the pixel is disposed in the region where the light-emitting element layer 120 is disposed, the region where the light-emitting element layer 120 is disposed can be an active region AA. The region near or surrounding the active region AA can be a non-active region NA.

[0047] An encapsulation layer 130 is disposed on the light-emitting element layer 120. The encapsulation layer 130 is used to prevent oxygen or moisture from penetrating into the light-emitting element layer 120. The encapsulation layer 130 may include at least one organic film and at least one inorganic film.

[0048] Thin-film transistors are used to drive and control each pixel in the light-emitting element layer 120. A gate signal is applied to the gate electrode of the thin-film transistor via a gate line, and when a data voltage is applied to the source and drain electrodes via a data line, a corresponding current can be applied to the anode electrode, which serves as the first electrode of the light-emitting element layer 120. Therefore, the light-emitting layer of each pixel can emit light at a predetermined brightness according to a predetermined current.

[0049] The driving of at least one pixel disposed in the active region AA of the substrate 100 can be controlled by at least one signal provided from the gate driver 20 and at least one signal provided from the data driver 30. The pixel can be a region in which the light-emitting layer emits light, or a region in which a thin-film transistor and the light-emitting layer are disposed.

[0050] The gate driver 20 can provide a gate signal to the gate line according to the gate control signal input from the timing controller 60. The gate driver 20 can be implemented in a portion or more of the portion corresponding to one or two edges or two lateral edges of the active region AA of the substrate 100 in a panel gate in-place (GIP) scheme. In another embodiment, the gate driver 20 can be implemented as a gate driver chip and attached to the pad portion PAD of the substrate 100.

[0051] The data driver 30 receives digital video / image data and source control signals from the timing controller 60. Based on the source control signals, the data driver 30 converts the digital video / image data into analog data voltages, and then outputs the converted data voltages to the data lines. When the data driver 30 is implemented as a data driver chip, this type of data driver can be mounted on the flexible printed circuit board 40 using a chip-on-film (COF) solution or a chip-on-panel (COP) solution.

[0052] An anisotropic conductive film can be used to mount the flexible printed circuit board 40 onto the pad portion PAD of the substrate 100 and electrically connect it to the pad portion PAD.

[0053] Furthermore, circuit board 50 can be attached to flexible printed circuit board 40. Multiple circuits implemented as corresponding driver chips can be mounted on circuit board 50. For example, timing controller 60 can be mounted on circuit board 50. Circuit board 50 can be a printed circuit board (PCB) or a flexible printed circuit board (FPCB).

[0054] The timing controller 60 receives digital video / image data and timing signals from an external system board via a cable from the circuit board 50. Based on the timing signals, the timing controller 60 generates gate control signals for controlling the operating time of the gate driver 20, and data control signals for controlling the data driver 30. The timing controller 60 provides the gate control signals and data control signals to the gate driver 20 and the data driver 30, respectively.

[0055] Figure 2 This is a plan view of a substrate according to aspects of this disclosure.

[0056] According to aspects of this disclosure, a first groove GR1 and a second groove GR2 formed by partially removing at least one of a planarization layer and a pixel defining layer can be disposed in the non-active region NA of the substrate 100.

[0057] The first groove GR1 and the second groove GR2 can be formed along the outer edge of the substrate 100 in the non-active region NA, and also in the top edge, left edge, and right edge of the substrate 100. Therefore, residual gases and moisture after the respective manufacturing processes can be discharged or their movement can be delayed. In another embodiment, the first groove GR1 and the second groove GR2 can be formed in the lower portion, such as the bottom edge of the substrate 100. In this case, when the pad portion PAD is located in the lower portion of the substrate, multiple wirings for transmitting various drive signals may be densely located in the pad portion PAD. Therefore, when the portion of the planarization layer used to form the grooves is removed, there is a possibility that the wirings may be exposed. Therefore, the first groove GR1 and the second groove GR2 can be formed considering the configuration of components or elements such as wirings densely located in the pad portion PAD, or they may not be formed in the lower portion of the substrate 100.

[0058] The first groove GR1 and the second groove GR2 can be formed to discharge gas gas (GAS) generated during the manufacturing process of the display device 10 when heat is applied to an organic film such as a planarization layer and / or moisture generated due to a sudden temperature difference during the manufacturing process to the outside, or to delay the movement of gas gas (GAS) and / or moisture to the light-emitting layer.

[0059] When such gases or moisture inside the display device 10 are not expelled or their movement is not delayed, the corresponding light-emitting organic material layer may degrade or be damaged, potentially leading to pixel shrinkage. When pixel shrinkage occurs, the brightness of the display device 10 may decrease, and the pixels may not emit light completely over time. Therefore, it is necessary to provide a configuration for removing or reducing the gases or moisture inside the display device 10.

[0060] Figure 3 It is along Figure 2 The cross-sectional view taken by line B-B'.

[0061] Figure 3 This is a cross-sectional view of a display device including a first recess GR1 and a second recess GR2. A thin-film transistor layer 110, a light-emitting element layer 120, and an encapsulation layer 130 are disposed in the active region AA of the substrate 100.

[0062] The thin-film transistor layer 110 includes a thin-film transistor TFT, a gate insulating film 112, an interlayer insulating film 113, a protective film 114, and a first planarization film 116.

[0063] The detailed configuration of the thin-film transistor layer 110 will be discussed below.

[0064] A buffer film 111 is disposed on the substrate 100. The buffer film 111 is disposed on the substrate 100 to protect the thin-film transistor (TFT) and the light-emitting device from moisture that permeates through the moisture-sensitive substrate 100. The buffer film 111 may consist of a plurality of inorganic films stacked alternately. For example, the buffer film 111 may consist of a plurality of films in which one or more inorganic films of silicon oxide (SiOx), silicon nitride (SiNx), and SiON are stacked alternately; however, embodiments of the present disclosure are not limited thereto.

[0065] A thin-film transistor (TFT) is disposed on a buffer film 111. The TFT includes an active layer ACT, a gate electrode G, a source electrode S, and a drain electrode D. Figure 3 A top-gate thin-film transistor is shown in which the gate electrode G is located above the active layer ACT; however, embodiments of the present disclosure are not limited thereto. For example, the thin-film transistor TFT can be formed as a bottom-gate type in which the gate electrode G is located below the active layer ACT, and as a dual-gate type in which each gate electrode G is located above and below the active layer ACT.

[0066] An active layer ACT is disposed on a buffer film 111. The active layer ACT can be formed of a silicon-based semiconductor material or an oxide-based semiconductor material. A light-blocking layer for blocking external light incident on the active layer ACT can be disposed between the buffer film 111 and the active layer ACT.

[0067] The gate insulating film 112 may be disposed on the active layer ACT. The gate insulating film 112 may be composed of inorganic films such as silicon oxide films (SiOx) or silicon nitride films (SiNx) or multiple layers thereof; however, embodiments of the present disclosure are not limited thereto.

[0068] The gate electrode G and the gate line can be disposed on the gate insulating film 112. The gate electrode (G) and the gate line can be configured as a single layer or multiple layers composed of any one or two or more alloys of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (nd), and copper (Cu); however, the embodiments of this disclosure are not limited thereto.

[0069] Interlayer insulating film 113 can be disposed on the gate electrode (G) and the gate line. Interlayer insulating film 113 can be composed of inorganic films such as silicon oxide film (SiOx) or silicon nitride film (SiNx) or multiple layers thereof; however, embodiments of the present disclosure are not limited thereto.

[0070] The source electrode S, drain electrode D, and data line can be disposed on the interlayer insulating film 113. Each of the source electrode S and drain electrode D can contact the active layer ACT through an access hole formed by partially removing one or more of the gate insulating film 112 and the interlayer insulating film 113. The source electrode S, drain electrode D, and data line can be configured as a single layer or multiple layers formed of any one or two or more alloys of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (nd), and copper (Cu); however, embodiments of this disclosure are not limited thereto.

[0071] To insulate against the thin-film transistor (TFT), a protective film 114 can be disposed on the source electrode S, the drain electrode D, and the data lines. The protective film 114 may consist of inorganic films such as silicon oxide films (SiOx) or silicon nitride films (SiNx) or multiple layers thereof; however, embodiments of this disclosure are not limited thereto.

[0072] A first planarization film 116 may be disposed on the protective film 114 to planarize the steps caused by the thin-film transistor (TFT). The first planarization film 116 may be composed of an organic film such as acrylic resin, polyimide resin, epoxy resin, phenolic resin, and polyamide resin.

[0073] When needed, a second planarization film 115 can be disposed below the first planarization film 116. The second planarization film 115 can be composed of an organic film formed from the same or different material as the first planarization film 116, and the spacing between the light-emitting element layer 120 disposed on or above the second planarization film 115 and the thin-film transistor TFT can be increased. As the spacing between the light-emitting element layer 120 and the thin-film transistor TFT increases, potential signal interference between the signals of the electrodes included in the light-emitting element layer 120 and the signals of the thin-film transistor TFT can be prevented.

[0074] A second planarization film 115 may be optionally provided when needed. A discussion of structures with a second planarization film 115 is given below; however, embodiments of this disclosure are also applicable to structures without a second planarization film 115. Therefore, the second planarization film 115 described herein may refer to a first planarization film 116 in a structure that does not include a second planarization film 115.

[0075] The light-emitting element layer 120 may be disposed on the first planarization film 116. The light-emitting element layer 120 includes a first electrode 121 as an anode electrode, a light-emitting organic material layer 122, a second electrode 123 as a cathode electrode, and a pixel defining layer 124. In another example, the first electrode 121 may be a cathode electrode, and the second electrode 123 may be an anode electrode.

[0076] The first electrode 121 can be disposed in a pixel within the active region AA. In the non-active region NA, a common electrode connection line 125 can be configured to have the same material as the first electrode 121. The common electrode connection line 125 is spaced apart from the first electrode 121 and disposed on the same layer as the first electrode 121. The common electrode connection line 125 is used to connect the common electrode line Vss to the second electrode 123. The common electrode connection line 125 can extend to the first planarization film 116 and the dam DAM; however, embodiments of this disclosure are not limited thereto. The common electrode connection line 125 can be connected to the common electrode line Vss disposed on the side surface of the substrate 100 via a common electrode connection electrode 126. The common electrode connection electrode 126 can be disposed on the same layer as the source electrode S and formed of the same material as the source electrode S.

[0077] The first electrode 121 can contact the source electrode S of the thin-film transistor TFT via a protective film 114, a first planarization film 116, and an anode connection electrode 117 formed in an access hole, which is formed by removing a portion of the second planarization film 115. The first electrode 121 can be formed of a stacked structure of aluminum and titanium (Ti / Al / Ti), an aluminum and ITO stacked structure (ITO / Al / ITO), an APC alloy, and an APC alloy and ITO stacked structure (ITO / APC / ITO). The APC alloy can be an alloy of silver (Ag), palladium (Pd), and copper (Cu).

[0078] The pixel limiting layer 124 can be disposed on the first planarization film 116 and the first electrode 121 in the active region AA, and on the first planarization film 116 and the common electrode connection line 125 in the non-active region NA.

[0079] To define pixels, the pixel defining layer 124 disposed in the active region AA can be configured to cover the edge of the first electrode 121 on the first planarization film 116.

[0080] The pixel limiting layer 124 set in the non-active region NA can be configured to protect the common electrode connection line 125 and flatten the non-active region NA.

[0081] The pixel defining layer 124 may be composed of an organic film such as acrylic resin, polyimide resin, epoxy resin, phenolic resin and polyamide resin; however, embodiments of the present disclosure are not limited thereto.

[0082] The first groove GR1 and the second groove GR2 can be formed in the non-active region NA. The first groove GR1 and the second groove GR2 can be formed to discharge gases caused by heat applied after the organic films such as the first planarization film 116, the second planarization film 115, the pixel defining layer 124, etc. are deposited, or to delay the movement of such gases.

[0083] Furthermore, the first groove GR1 and the second groove GR2 can be formed to drain moisture generated after the common electrode connection line 125 is disposed on the first planarization film 116 and after the cleaning process and curing process for removing impurities are performed, or to delay the movement of the moisture.

[0084] In this case, during the room temperature waiting time after the curing process for depositing the pixel defining layer 124, as the substrate temperature decreases, moisture may be adsorbed on the surface of the common electrode interconnect 125. The curing process is a process of applying high-temperature heat to the substrate on which the common electrode interconnect 125 is disposed to remove moisture remaining on the substrate and gas remaining in the organic film.

[0085] As described above, gases or moisture generated during the manufacturing process of the display device 10 may migrate to the active region AA along the interface or surface of one or more of the pixel defining layer 124, the first planarization film 116, and the second planarization film 115. Such gases or moisture reaching the active region AA may damage the light-emitting organic material layer 122, and this may cause pixel shrinkage where the light-emitting layer shrinks. When the light-emitting layer shrinks, its brightness may decrease, and therefore, over time, the light-emitting layer may not be able to fully emit the desired light.

[0086] To remove gases or moisture generated during the manufacturing process, one or more grooves can be formed by partially removing one or more of the first planarization film 116, the second planarization film 115, and the pixel defining layer 124.

[0087] In addition, an opening pattern for venting gas or moisture can be formed by removing a portion of the common electrode connection line 125.

[0088] Figure 4 The diagram shows the path of gas or moisture generated after the pixel-defining layer is set.

[0089] Figure 5 It shows Figure 2 An enlarged plan view of the “C” region, showing the first groove, the second groove, and at least one outlet.

[0090] Reference Figure 4Gas generated from the first planarization film 116 or the second planarization film 115, which is an organic film, can move upward or laterally. In this case, since the common electrode connection line 125 or the common electrode connection electrode 126 covers the first planarization film 116 or the second planarization film 115, which is the gas's path, such gas cannot be discharged to the outside. Therefore, in order to discharge such gas generated in the organic film, one or more outlets can be formed in the common electrode connection line 125 or the common electrode connection electrode 126 provided on the first planarization film 116 or the second planarization film 115 as openings OP to allow such gas to be discharged.

[0091] The outlets formed in the common electrode connection line 125 or the common electrode connection electrode 126 can be configured to have equal opening shapes while being spaced apart from each other by a predetermined distance.

[0092] For example, such exits can be arranged at predetermined distances from each other. Figure 5 Multiple outlets OP in the common electrode connection line 125. The outlets can have various shapes, such as square, circular, triangular, etc.; however, embodiments of the present disclosure are not limited thereto. Since the common electrode connection line 125 is disposed in the entire non-active region NA, the outlets OP disposed in the entire non-active region NA can cause the gas generated from the first planarization film 116 or the second planarization film 115 to be discharged.

[0093] Reference Figure 3 and Figure 5 The first groove GR1 can be formed between multiple outlets OP. The first groove GR1 can be a groove formed on or above a portion of the thin-film transistor TFT by partially removing all or one or more of the first planarization film 116, the second planarization film 115, and the pixel defining layer 124, each of which is an organic film. As a result, the first groove GR1 can prevent gas generated from the organic film from moving to the light-emitting organic material layer 122 by being formed to break the continuous formation of the organic film along its middle portion (or line) or predetermined portion (or line) in the non-active region NA. For example, gas generated from the organic film on the left side of the first groove GR1 relative to the left edge or left side (or line) of the substrate 100 can be prevented from moving toward the organic film on the right side of the first groove GR1.

[0094] When a portion of the first planarization film 116 or a portion of the first planarization film 116 and the second planarization film 115 is removed, the resulting first groove GR1 is formed such that its side surface corresponding to the removed portion is exposed to the outside. Therefore, it is possible to prevent gas or moisture in the organic film from moving in the horizontal direction.

[0095] Furthermore, since the common electrode connection line 125 is disposed on such a portion where the first planarization film 116 and the second planarization film 115 have been removed, it is possible to further prevent the gas or moisture generated in the organic film from moving to the right.

[0096] Since the first groove GR1 can be formed by partially removing one or more of the first planarization film 116, the second planarization film 115, and the pixel defining layer 124, each of which is an organic film, the first groove GR1 can be formed by removing a desired portion or at least a portion of one or more organic films disposed on or above the thin film transistor TFT.

[0097] The second groove GR2 can be formed on the right edge of the common electrode connection line 125 or on the outer edge of the non-active region NA. Similar to the first groove GR1, the second groove GR2 can be formed to discharge the gas generated in the organic film, or to prevent or delay the movement of moisture absorbed on the common electrode connection line 125 located in the first groove GR1 along the common electrode connection line 125 to the luminescent organic material layer 122.

[0098] Since the second groove GR2 is formed to prevent or delay the movement of moisture generated in the first groove GR1 towards the luminescent organic material layer 122, the second groove GR2 is positioned closer to the active region AA where the luminescent organic material layer 122 is located than the first groove GR1. The second groove GR2 can be disposed between the luminescent organic material layer 122, which serves as the moisture travel path, and the common electrode connection line 125.

[0099] As described above, since moisture reaching the luminescent organic material layer 122 can cause pixel shrinkage by damaging the luminescent organic material layer 122, it is necessary to prevent moisture from contacting the luminescent organic material layer 122.

[0100] Similar to the first groove GR1, the second groove GR2 can be formed by partially removing one or more of the first planarization film 116, the second planarization film 115, and the pixel defining layer 124, each of which is an organic film. For example, as Figure 4 As shown, the second groove GR2 can be formed by removing a portion of the pixel defining layer 124. When the second groove GR2 is formed by removing a portion of the pixel defining layer 124, since a portion of the upper surface of the first planarization film 116 is exposed, moisture moving between the pixel defining layer 124 and the second planarization film 115 can be discharged to the outside, or gas generated between the first planarization film 116 and the second planarization film 115 can be discharged to the outside.

[0101] After the second electrode 123 is set, the movement of water towards the light-emitting organic material layer 122 can be minimized by delaying the movement of water located between the pixel defining layer 124 and the first planarization film 116.

[0102] In another embodiment of the second groove GR2, the second groove GR2 can be formed by partially removing one or more of the pixel defining layer 124 and the first planarization film 116, or partially removing one or more of the pixel defining layer 124, the first planarization film 116, and the second planarization film 115. When the second groove GR2 is formed by partially removing the pixel defining layer 124, the first planarization film 116, and the second planarization film 115, the gas generated in the first planarization film 116 and the second planarization film 115 can be discharged from the side surface of the second groove GR2. Therefore, compared with the case where only a portion of the pixel defining layer 124 is removed, this allows moisture and gas to be discharged to the outside more effectively, and allows the movement of moisture to the light-emitting organic material layer 122 to be more effectively delayed.

[0103] However, when multiple organic films (or layers) are partially removed to form the first groove GR1 or the second groove GR2, the rigidity of the display device 10 may be weakened, and therefore the display device 10 may be damaged when it is bent. Therefore, it is necessary to consider the characteristics of each display device or display panel to determine whether to partially remove all or one or more organic films (or layers), and the first groove GR1 and the second groove GR2 can be formed with different depths from each other.

[0104] For example, in order to remove one or more organic films (or layers) to an optimal level, a first groove GR1 is formed by partially removing the pixel defining layer 124, the first planarization film 116, and the second planarization film 115, primarily to drain the gas generated in one or more organic films, and a second groove GR2 is formed by partially removing the pixel defining layer 124, primarily to drain or delay the movement of moisture toward the light-emitting organic material layer 122.

[0105] The light-emitting organic material layer 122 may be disposed on the pixel defining layer 124. The light-emitting organic material layer 122 may be disposed on the first electrode 121 exposed by partially removing the pixel defining layer in the active region AA, and may be disposed on at least a portion of the partially removed region and the region adjacent to the partially removed region.

[0106] The light-emitting organic material layer 122 may include a hole transport layer, a light-emitting layer, and an electron transport layer. In this case, when a voltage is applied to the first electrode 121 and the second electrode 123, holes and electrons can move to the light-emitting layer through the hole transport layer and the electron transport layer, respectively, and combine in the light-emitting layer to emit light.

[0107] The light-emitting organic material layer 122 can be one of a red light-emitting organic material layer emitting red light, a green light-emitting organic material layer emitting green light, and a blue light-emitting organic material layer emitting blue light. The light-emitting organic material layer 122 can be disposed in the region corresponding to the first electrode 121. Alternatively, the light-emitting organic material layer 122 can be a white light-emitting organic material layer emitting white light. In this case, the light-emitting organic material layer 122 can be disposed to cover the first electrode 121 and the pixel defining layer 124, and a color filter can be disposed in a predetermined region above the substrate 100.

[0108] The second electrode 123 can be disposed on the light-emitting organic material layer 122 and the pixel defining layer 124. When the display device 10 has a top-emitting structure, the second electrode 123 can be formed of a transparent conductive material (TCO) such as ITO or IZO that can transmit light through it, or a semi-transmissive conductive material such as magnesium (Mg), silver (Ag), or an alloy of magnesium (Mg) and silver (Ag).

[0109] Simultaneously, in the edge of the non-active region NA, a common electrode line Vss, formed in the same layer as the source electrode S and made of the same material as the source electrode S, can be disposed in the edge of the substrate 100. The common electrode line Vss is a wiring for applying a common voltage, such as a low voltage or a ground voltage, to the anode or the second electrode 123, and a common electrode connection electrode 126 and a common electrode connection line 125 for connecting the common electrode line Vss and the second electrode 123 can be disposed between the common electrode line Vss and the second electrode 123.

[0110] The common electrode connection electrode 126 can be disposed in the same layer as the anode connection electrode 117 and formed of the same material as the anode connection electrode 117. For example, the common electrode connection electrode 126 can directly contact the common electrode line Vss, extend along the lateral edge and upper outer edge of the first planarization film 116, and extend to a predetermined length of the upper outer edge of the first planarization film 116. As described above, the common electrode connection electrode 126 can include a plurality of outlets as openings for discharging gases generated in one or more organic membranes.

[0111] A common electrode connection line 125, disposed in the same layer as the first electrode 121 and formed of the same material as the first electrode 121, can directly contact the common electrode connecting electrode 126, for example, the upper part of the common electrode connecting electrode 126. The common electrode connection line 125 can be located in the first groove GR1, extending along the respective outer edges of the first planarization film 116 and the second planarization film 115, and extending to a predetermined length at the upper outer edge of the first planarization film 116. The common electrode connection line 125 can contact the second electrode 123 in the first groove GR1. The common electrode connection line 125 may also include multiple outlets serving as openings for discharging gases generated in one or more organic films.

[0112] Furthermore, the second electrode 123 can contact the light-emitting organic material layer 122 in the active region AA, extend along the outer edge of the pixel defining layer 124, contact the common electrode connection line 125 in the first groove GR1, and extend to one side of the first groove GR1, such as the left side, and the region of the pixel defining layer 124 adjacent to the said side of the first groove GR1.

[0113] The capping layer can be disposed on the second electrode 123.

[0114] The encapsulation layer 130 can be disposed on the light-emitting element layer 120 and is configured to extend to the non-active region NA and the active region AA of the substrate 100.

[0115] The encapsulation layer 130 is configured to cover the active region AA above the pixel defining layer 124 and to prevent oxygen or moisture from penetrating into the light-emitting organic material layer 122 and the second electrode 123. For this purpose, the encapsulation layer 130 may include at least one inorganic film and at least one organic film. For example, the encapsulation layer 130 may include a first inorganic film 131, an organic film 132, and a second inorganic film 133.

[0116] The first inorganic film 131 of the encapsulation layer 130 can be disposed on the second electrode 123. The first inorganic film 131 can be configured to cover the second electrode 123. For example, the first inorganic film 131 can be configured to cover the second electrode 123 and the pixel defining layer 124 in the active region AA, and extend to the non-active region NA to cover the common electrode connection line 125, the pixel defining layer 124, and the dam DAM, etc., in the non-active region NA. The first inorganic film 131 can be configured to cover the first groove GR1 and the second groove GR2.

[0117] Depending on the stacked structure or shape disposed beneath the first inorganic film 131, the first inorganic film 131 may have at least one step, and defects may occur where the first inorganic film 131 is not disposed in the step region. To compensate for possible defects and steps in the first inorganic film 131, an organic film 132 of the encapsulation layer 130 may be disposed on the first inorganic film 131. The organic film 132 can prevent foreign matter from entering the light-emitting organic material layer 122 and the second electrode 123, and can be configured to have sufficient thickness to compensate for step differences.

[0118] The second inorganic film 133 of the encapsulation layer 130 can be disposed on the organic film 132. The second inorganic film 133 can be configured to cover the organic film 132. For example, the second inorganic film 133 can be configured to cover the organic film 132 in the active region AA and extend to the non-active region NA to cover the dam DAM and the first inorganic film 131. Since the second inorganic film 133 is free from defects or steps due to the organic film 132 disposed beneath it, no path is formed for external moisture to be absorbed into the display device. As a result, the reliability and quality degradation of the display device 10 can be prevented.

[0119] Each of the first inorganic film 131 and the second inorganic film 133 of the encapsulation layer 130 may be formed of silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, or titanium oxide; however, embodiments of this disclosure are not limited thereto. The organic film 132 may be formed of acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin; however, embodiments of this disclosure are not limited thereto.

[0120] The dam DAM can be disposed in the non-active region NA and can block the flow of the organic film 132 included in the encapsulation layer 130. For example, the dam DAM can be disposed around the edge of the active region AA and can block the flow of the organic film 132 included in the encapsulation layer 130. Furthermore, the dam DAM can be disposed in the non-active region NA and can block the flow of the organic film 132, so that the organic film 132 included in the encapsulation layer 130 cannot reach the exposed pads in the pad portion PAD of the substrate 100. In this way, the dam DAM can prevent the organic film 132 of the encapsulation layer 130 from being exposed to the outside of the display device 10 or reaching the pads in the pad portion PAD.

[0121] A dam DAM can be formed by depositing the material of the first planarization film 116 or the second planarization film 115, the material of the pixel defining layer 124, and spacers 141, and then patterning all or part of one or more of these deposited elements. For example, a dam DAM can include multiple dams, such as an inner dam DAM 1, an outer dam DAM 2, an intermediate dam DAM 3, etc. The inner dam DAM 1 can be arranged adjacent to the active region AA and positioned around the edge of the active region AA. Therefore, the inner dam DAM 1 can initially block the flow of the organic film 132 included in the encapsulation layer 130. The outer dam DAM 2 can be positioned around the edge of the inner dam DAM 1 and spaced apart from the inner dam DAM 1, such that the outer dam DAM 2 and the inner dam DAM 1 can be parallel to each other. The intermediate dam DAM 3 can additionally be located between the inner dam DAM 1 and the outer dam DAM 2, and thus can effectively block the flow of the organic film 132. A dam (DAM) can be a partition, a barrier, or a protrusion, etc.; however, embodiments of this disclosure are not limited to the specific terminology.

[0122] Touch electrodes, polarizing plates, front components 200, etc. can be disposed on or above the encapsulation layer 130.

[0123] Therefore, since the first groove GR1 and the second groove GR2 formed in one or more of the first planarization film 116, the second planarization film 115, and the pixel defining layer 124, each of which is an organic film, can cause the gas or moisture remaining in the display device 10 to be discharged or the movement of gas or moisture to the light-emitting organic material layer 122 to be delayed, the phenomenon of shrinkage of the corresponding light-emitting layer is effectively prevented. As a result, the reliability and quality degradation of the display device 10 can be prevented.

[0124] The display device according to embodiments of this disclosure can be described as follows.

[0125] According to the embodiments described herein, a display device includes: a substrate including an active region in which a plurality of pixels are disposed and an active region surrounding the active region; a thin-film transistor disposed above the substrate; a first planarization film disposed on the thin-film transistor; a first electrode disposed on the first planarization film and electrically connected to the thin-film transistor; and a pixel defining layer disposed on the first electrode. Furthermore, the active region may include: a first groove corresponding to a first region in which one or more of the pixel defining layer and the first planarization film are partially removed; and a second groove corresponding to a second region in which the pixel defining layer is partially removed and is different from the first region.

[0126] According to some embodiments described herein, the display device may further include: a second planarization film disposed below the first planarization film; and an anode connection electrode disposed between the thin-film transistor and the first electrode and electrically connected between the thin-film transistor and the first electrode.

[0127] According to some embodiments described herein, the first groove can be formed by partially removing one or more of the pixel defining layer, the first planarization film, and the second planarization film.

[0128] According to some embodiments described herein, the second groove can be formed by partially removing one or more of the pixel defining layer, the first planarization film, and the second planarization film.

[0129] According to some embodiments described herein, the second groove may be positioned closer to the active region than the first groove.

[0130] According to some embodiments described herein, the first groove and the second groove may be disposed in the left side region, the right side region, and the upper region of the substrate.

[0131] According to some embodiments described herein, the first groove may expose the side surface of the first planarization film, and the second groove may expose a portion of the upper surface of the first planarization film.

[0132] According to some embodiments described herein, the display device may further include: a light-emitting layer disposed in a portion of the first electrode and the pixel defining layer; a second electrode disposed on the light-emitting layer; a common electrode line for applying a common voltage to the second electrode; and a common electrode connection line for electrically connecting the second electrode and the common electrode line. In this case, the second recess may be disposed between the light-emitting layer and the common electrode connection line.

[0133] According to some embodiments described herein, the common electrode connection line may include at least one outlet.

[0134] According to some embodiments described herein, the display device may further include a common electrode connection electrode disposed between the common electrode line and the common electrode connection line, and the common electrode connection electrode may include at least one outlet.

[0135] According to the embodiments described herein, a display device includes: a substrate including an active region in which a plurality of pixels are disposed and an active region surrounding the active region; a thin-film transistor disposed above the substrate; a first planarization film disposed on the thin-film transistor; a first electrode disposed on the first planarization film and electrically connected to the thin-film transistor; a pixel defining layer disposed on the first electrode; a light-emitting layer disposed in contact with a portion of each of the first electrode and the pixel defining layer; a second electrode disposed on the light-emitting layer; a common electrode line for applying a common voltage to the second electrode; and a common electrode connection line electrically connecting the second electrode and the common electrode line. In this case, the active region may include a first groove corresponding to a first region in which one or more of the pixel defining layer and the first planarization film are partially removed, and the common electrode connection line may include at least one outlet.

[0136] According to some embodiments described herein, the display device includes a second planarization film disposed beneath the first planarization film, and the first groove can be formed by partially removing one or more of the pixel defining layer, the first planarization film, and the second planarization film.

[0137] According to some embodiments described herein, the non-active region may further include a second groove formed by partially removing one or more of the pixel defining layer, the first planarization film, and the second planarization film.

[0138] According to some embodiments described herein, the depth of the first groove and the depth of the second groove may be different from each other.

[0139] The above description has been presented to enable those skilled in the art to make and use the invention, and is provided in the context of a particular application and its requirements. Various modifications, additions, and substitutions to the described embodiments will be apparent to those skilled in the art, and the general principles defined herein can be applied to other embodiments and applications without departing from the spirit and scope of the invention. Although exemplary embodiments have been described for illustrative purposes, those skilled in the art will understand that various modifications and applications can be made without departing from the essential characteristics of this disclosure. For example, various modifications can be made to specific components of the exemplary embodiments. The above description and drawings provide examples of the technical ideas of the invention for illustrative purposes only. That is, the disclosed embodiments are intended to illustrate the scope of the technical ideas of this disclosure. Therefore, the scope of this disclosure is not limited to the embodiments shown, but is consistent with the widest scope consistent with the claims. The scope of protection of this disclosure will be interpreted according to the claims, and all technical ideas within the scope of the claims should be interpreted as being included within the scope of the invention.

Claims

1. A display device, comprising: A substrate, comprising an active region having a plurality of pixels and an active region surrounding the active region; A thin-film transistor disposed above the substrate; A first planarization film is disposed on the thin-film transistor; A first electrode is disposed on the first planarization film and electrically connected to the thin-film transistor; The second planarization film is disposed below the first planarization film; A dam surrounds the active area; A pixel defining layer is disposed on the first electrode; A light-emitting layer is disposed in a portion of the first electrode and the pixel defining layer; The second electrode is disposed on the light-emitting layer; A common electrode line, which is used to apply a common voltage to the second electrode; as well as A common electrode connection wire is used for electrical connection between the second electrode and the common electrode wire. The non-active region includes: a first groove between the dam and the active region, and the first groove corresponds to one or more first regions of the pixel defining layer and the first planarization film that are partially removed. A second groove, corresponding to a second region where a portion of the pixel defining layer has been removed and is different from the first region, and located between the first groove and the active region; and The common electrode connection line includes a plurality of first outlets located between the first groove and the dam.

2. The display device according to claim 1, further comprising: An anode connection electrode is disposed between the thin-film transistor and the first electrode and is electrically connected between the thin-film transistor and the first electrode.

3. The display device according to claim 2, wherein, The first groove corresponds to one or more regions of the pixel defining layer, the first planarization film, and the second planarization film that are partially removed.

4. The display device according to claim 2, wherein, The second groove corresponds to one or more regions of the pixel defining layer, the first planarization film, and the second planarization film that are partially removed.

5. The display device according to claim 1, wherein, The common electrode connection line directly contacts the side surface of the second planarization film, the upper surface of the second planarization film, the side surface of the first planarization film, and the upper surface of the first planarization film.

6. The display device according to claim 1, wherein, The first groove and the second groove are disposed in the left side region, the right side region and the upper region of the substrate.

7. The display device according to claim 1, wherein, The first groove exposes the side surface of the first planarization film, and the second groove exposes a portion of the upper surface of the first planarization film.

8. The display device according to claim 1, wherein, The common electrode connection line includes a plurality of second outlets located between the first groove and the second groove, allowing gas to escape.

9. The display device according to claim 1, further comprising a common electrode connecting electrode disposed between the common electrode line and the common electrode connecting line. in, The common electrode connection electrode includes at least one outlet.

10. The display device according to claim 1, wherein, The depth of the first groove is different from the depth of the second groove.

11. The display device according to claim 1, wherein, A portion of the first planarization film is disposed between the first groove and the dam; and A portion of the second planarization film is disposed between the first groove and the dam.

Images