Demodulating a wireless signal modulated by phase shift keying

Abstract

The present disclosure relates to demodulating a wireless signal modulated by phase shift keying. A method and apparatus for demodulating a wireless signal modulated by phase shift keying is provided. The signal comprises a plurality of symbols. The method comprises obtaining (310) a first sequence of samples based on the signal; converting (320) the first sequence of samples to a first sequence of frequency domain samples; selecting (330), in the first sequence of frequency domain samples, a sample having a largest magnitude as a decision variable; and identifying (340) a symbol or a symbol transition based on the decision variable.

Description

Technical Field

[0001] This invention relates to the demodulation of wireless signals modulated by phase shift keying (PSK). It is particularly relevant to the demodulation of signals transmitted in the context of a Global Navigation Satellite System (GNSS). Background Technology

[0002] Positioning is known to be performed using a Global Navigation Satellite System (GNSS) (e.g., Global Positioning System (GPS)). Traditionally, position calculations rely on trilateration based on the times of arrival of signals from multiple different satellites (called "spacecraft" or SVs). For example, in the case of GPS, satellite signals in the L1 band are typically used for trilateration.

[0003] The signals transmitted by each SV also include navigation messages containing information related to the SV constellation. For example, GPS navigation messages include the time, clock correction, and ephemeris parameters for each vehicle, as well as the almanac parameters for all SVs. Information decoded from the navigation messages enables the receiver to calculate the positions of several satellites and, consequently, its own position relative to the satellites via trilateration.

[0004] GPS navigation messages are modulated on the carrier at 50 bps, making each bit 20 ms long. This corresponds to 20 cycles of the L1 coarse acquisition (“C / A”) spreading code. The L1 C / A code consists of 1023 chips, repeated every 1 millisecond, with a chip rate of 1.023 Mcps.

[0005] Using binary phase shift keying (BPSK), navigation bits are modulated onto the carrier signal via differential coding. In other words, each bit transition in the navigation message (from 0 to 1 or from 1 to 0) is reflected by a 180° phase shift of the carrier signal.

[0006] The receiver must demodulate the bits of the navigation message to calculate the location. However, the frequency and phase of the received signal may constantly change. This can make the demodulation task difficult, leading to bit errors. Exceeding a certain error rate will prevent successful decoding of the navigation message. Summary of the Invention

[0007] It has been recognized that GNSS receivers embedded in wearable devices may face unique challenges in demodulating navigation bits. Particularly for devices worn on the wrist, rapidly changing Doppler shifts have been observed as the arm swings backward and forward (e.g., during walking, running, etc.). This variable Doppler shift may be sufficient to prevent successful demodulation of navigation bits using conventional methods.

[0008] This invention is defined by the claims. According to a first aspect, a method is provided for demodulating a wireless signal modulated by phase-shift keying, the signal comprising a plurality of symbols, the method comprising:

[0009] The first sample sequence is obtained based on this signal;

[0010] Convert the first sample sequence into the first frequency domain sample sequence;

[0011] Select the sample with the largest amplitude from the first sequence frequency domain samples as the decision variable; and

[0012] Identifying symbols or symbolic shifts based on decision variables.

[0013] This method can increase robustness to frequency shifts by converting the sample sequence to a frequency domain representation and detecting symbols (or symbol transitions) based on a frequency bin with the largest amplitude.

[0014] The first sample sequence can represent the entire symbol period or a portion of the symbol period. This method can be repeated for consecutive symbols in the signal.

[0015] Symbols or symbol transitions can be identified based on the phase of decision variables.

[0016] If the signal uses differential coding, the method may include identifying symbol transitions to demodulate one or more bits of the data message. If the symbols do not use differential coding, the method may include identifying symbols to directly demodulate one or more bits of the data message.

[0017] Phase shift keying can be binary phase shift keying. In this case, each symbol can include one bit.

[0018] Identifying symbols or symbol transitions can include comparing decision variables with reference variables associated with previous symbol periods.

[0019] The first sample sequence may begin at the start of the symbol period. Optionally, the method further includes: obtaining a second sample sequence based on the signal, wherein the second sample sequence ends at the start of the symbol period; inverting the second sample sequence relative to the first sample sequence; converting the inverted second sample sequence into a second frequency domain sample sequence; and selecting the sample with the largest amplitude value in the second frequency domain sample sequence as a reference variable, wherein identifying the symbol or symbol transition includes comparing the decision variable with the reference variable.

[0020] This method can be applied universally, regardless of the type of frequency transform used, such as whether DFT or some other frequency transform is used.

[0021] In an example with 20 samples per symbol period and sample numbers 1 to 40 covering two symbol periods, the "first sample sequence" can consist of samples numbered 21 to 40, and the "second sample sequence" can consist of samples numbered 1 to 20. The symbol edge (or "start of the symbol period") lies between sample 20 and sample 21.

[0022] By converting the second sample sequence into a frequency domain representation and selecting a reference variable based on a frequency window with the largest amplitude, this method can provide enhanced robustness to rapid changes in frequency shift in dynamic environments. For example, the method can be robust to changes in Doppler frequency shift between the first and second sequences.

[0023] Each of the first and second sample sequences can represent the entire symbol period. Alternatively, each of the first and second sample sequences can represent a portion of the symbol period.

[0024] This method may include delaying one of the following by one symbol period before comparing the decision variable with a reference variable: a second sample sequence; an inverted second sample sequence; a second frequency domain sample sequence; and the reference variable. This provides a way to allow comparison of the decision variable from the current symbol period with a reference variable from a previous symbol period. In particular, delaying the reference variable may have the benefit of reducing the amount of data that needs to be stored. In contrast, delaying the sampled sequence may require storing more data.

[0025] Converting a first sample sequence into a first frequency domain sample sequence may include performing a discrete Fourier transform, wherein the first sample sequence is related to the current symbol period, and wherein identifying a symbol or symbol transition includes comparing a decision variable selected for the current symbol period with a reference variable, wherein the reference variable is a decision variable selected for a previous symbol period.

[0026] When the frequency transform is converted to a DFT, decision variables for previous symbol periods can conveniently provide reference variables for the current symbol period. The current symbol period and the previous symbol period can be consecutive symbol periods.

[0027] Identifying symbols or symbol shifts can include comparing the phase of the decision variable with the phase of the reference variable.

[0028] The first sample sequence and / or the second sample sequence may include complex samples output from correlation operations. Complex samples can be generated through coherent integration.

[0029] The correlation operation can be a correlation between a signal and a local copy of the spreading code. In this case, the signal can be a direct sequence spread spectrum signal.

[0030] As described above, converting individual sample sequences into frequency domain sample sequences may include performing a discrete Fourier transform.

[0031] The method may also include using a frequency-locked loop to track the frequency of the signal.

[0032] The signal can be received from a spacecraft within a global navigation satellite system. These symbols can encode navigation messages from the spacecraft. This method can then be used to decode the navigation messages.

[0033] If the signal is a GPS signal, each sample sequence may consist of 20 complex samples output by the correlation operation. Each sample can be generated by multiplying the received signal with a local copy of the spreading code and coherently integrating the multiplication result over one repetition of the spreading code. The spreading code can be an L1 C / A code.

[0034] This method can be used in wearable devices, particularly those suitable for wearing on the wrist, such as smartwatches, sports watches, or fitness trackers. Specifically, it can be used in GNSS receivers for wearable devices.

[0035] This method may be particularly useful in the context of wrist-worn wearable devices. For these devices, the wearer's arm movements cause a time-varying Doppler shift. This method can help counteract this time-varying Doppler shift.

[0036] A demodulator is also provided for a wireless signal modulated by phase shift keying, the signal comprising multiple symbols, the demodulator comprising:

[0037] An input unit configured to obtain a first sample sequence based on the signal;

[0038] A first frequency transformation block is configured to convert a first sample sequence into a first frequency domain sample sequence;

[0039] A first selection box is used to select the sample with the largest amplitude value as a decision variable in a first frequency domain sample sequence; and

[0040] A decision box, which is configured to identify symbols or symbolic transitions based on decision variables.

[0041] The decision box can be configured to identify symbols or symbol transitions based on the phase of the decision variable. The decision box can also be configured to compare the decision variable with a reference variable associated with a previous symbol period.

[0042] The first sample sequence may begin at the start of the symbol period, and the input unit may be configured to obtain a second sample sequence based on the signal, wherein the second sample sequence ends at the start of the symbol period. The demodulator further includes: an inversion box configured to invert the second sample sequence relative to the first sample sequence; a second frequency conversion box configured to convert the inverted second sample sequence into a second frequency domain sample sequence; and a second selection box configured to select the sample with the largest amplitude value as a reference variable in the second frequency domain sample sequence. The decision box is configured to identify symbols and symbol transitions by comparing the decision variable with the reference variable.

[0043] Each of the first and second sample sequences can represent the entire symbol period. Alternatively, each of the first and second sample sequences can represent a portion of the symbol period.

[0044] The decision box can be configured to identify signs or sign transitions by comparing the phase of the decision variable with the phase of the reference variable.

[0045] The input unit may include a buffer configured to buffer sample sequences and provide the buffered sample sequences to a first frequency transform box and an inversion box; wherein the demodulator may also optionally include a delay box; wherein a second selection box is configured to output a reference variable to the delay box; wherein the delay box is configured to delay the reference variable by one symbol period and output the delayed reference variable to a decision box; and wherein the decision box is configured to identify a symbol or symbol transition by comparing the decision variable with the delayed reference variable.

[0046] The first frequency transform box can be configured to perform a discrete Fourier transform, wherein the demodulator may also optionally include a delay box, wherein the first selection box is configured to output the selected decision variable to the delay box, wherein the delay box is configured to delay the decision variable by one symbol period and output the delayed decision variable as a reference variable to the decision box, and wherein the decision box is configured to identify a symbol or symbol transition by comparing the decision variable from the current symbol period with the delayed decision variable from the previous symbol period.

[0047] The demodulator may also include a correlator configured to generate a first sample sequence and a second sample sequence.

[0048] The correlator can be configured to generate complex samples through coherent integration. The correlator performs correlation between the signal and a local copy of the spreading code. This signal can be a direct sequence spread spectrum signal.

[0049] Each frequency transform box can be configured to perform a discrete Fourier transform on the corresponding sample sequence.

[0050] The demodulator can be included in a Global Navigation Satellite System (GNSS) receiver. The receiver can be a Global Positioning System (GPS) receiver.

[0051] Demodulators can be included in wearable devices.

[0052] The demodulator can be included in a Global Navigation Satellite System (GNSS) receiver, which can then be included in a wearable device. As mentioned above, the wearable device could be, for example, a fitness tracker or a smartwatch.

[0053] A computer program including computer program code is also provided, the computer program code being configured to cause the at least one physical computing device to perform all the steps of the method as outlined above when the computer program is executed.

[0054] Computer programs may be implemented on computer-readable media (optionally, non-transitory computer-readable media). At least one physical computing device may be a processor of a wireless communication device. Attached Figure Description

[0055] The invention will now be described by way of example with reference to the accompanying drawings, in which:

[0056] Figure 1 This is a block diagram illustrating a portion of a GPS receiver;

[0057] Figure 2 This is a block diagram of a demodulator according to an implementation method;

[0058] Figure 3 This is a flowchart illustrating a method for demodulating GPS signals to determine navigation positions according to an embodiment;

[0059] Figure 4A This is a polar plot showing the complex output of the correlator in a GPS receiver, illustrating the decision and reference variables formed by integration over the symbol period for the same continuous symbols;

[0060] Figure 4B It is similar to Figure 4A The polar plot is shown, but it illustrates the decision and reference variables formed by integration over shorter intervals;

[0061] Figure 4C It is similar to Figure 4A The polar coordinate plot is shown, but the decision variables and reference variables formed by the method according to the implementation method are illustrated.

[0062] Figures 5A to 5C Is with Figures 4A to 4C Polar graphs similar to those for different continuous signs;

[0063] Figure 6 This is a block diagram of a demodulator according to another embodiment; and

[0064] Figure 7 This is a flowchart illustrating a method for demodulating navigation bits, which is suitable for... Figure 6 The demodulator. Detailed Implementation

[0065] Exemplary implementations will now be described in the context of GNSS receivers (particularly GPS receivers). However, it should be understood that this example is non-limiting.

[0066] Figure 1 This is a simplified block diagram illustrating a portion of a GPS receiver 100. As shown, the GPS receiver 100 includes a radio frequency (RF) section 110 and a baseband processing section 120. The RF section includes an antenna and an RF front end (not shown). These can be of any suitable type (including those known in the art). The output of the RF front end, and thus the output of the RF section 110, is a digital sample stream of an SV signal received via the antenna and down-converted by the RF front end. The baseband processing section 120 performs digital signal processing on this digital sample stream.

[0067] The baseband processing unit 120 includes a Doppler removal block 121, a tracking loop 124, a correlator 125, and a local code generation block 126. The correlator 125 includes a pair of multipliers 122a and 122b and a pair of accumulators 123a and 123b (also referred to as an "integrate-and-dump" block). The tracking loop includes a delay-locked loop (DLL) and a frequency-locked loop (FLL). The DLL tracks the code phase delay of the spreading code of the SV signal. The FLL tracks the carrier frequency of the currently observed SV signal. Figure 1 The baseband processing unit 120 shown processes one "channel," meaning it is responsible for acquiring and tracking a given signal from a given SV. Other baseband processing units (not shown) are typically provided to process signals from other SVs.

[0068] Doppler removal box 121 is responsible for compensating for the Doppler shift observed in the carrier frequency of the SV signal. This Doppler shift includes components caused by the motion of the SV, and may also include components caused by the motion of the GPS receiver. Doppler removal box 121 uses an estimate of the currently observed carrier frequency provided by tracking loop 124.

[0069] Local code generation box 126 generates a local copy of the spreading code (pseudo-random noise code) associated with the SV. The local copy code is generated based on the current estimates of the code delay and Doppler frequency provided by tracking loop 124.

[0070] After Doppler removal in Doppler removal box 121, correlator 125 correlates the local copy code with the in-phase (I) and quadrature (Q) components of the incoming signal. At multiplier 122a, the in-phase sample is multiplied by the local copy code. The result of this product is accumulated (i.e., summed) in accumulator 123a. Similarly, at multiplier 122b, the quadrature sample is multiplied by the local copy code, and the result is summed in accumulator 123b. It can be understood that the correlation between the local copy code and the received SV signal is one of the core operations of the GPS receiver to allow the calculation of the pseudorange to the SV.

[0071] The output of correlator 125 is modulated via the navigation message. (By SV) The bits of the navigation message are modulated onto the signal using BPSK modulation. For a GPS L1 signal, each navigation bit corresponds to 20 repetitions of the spreading code; therefore, to demodulate each navigation bit, 20 complex-valued correlator outputs need to be considered. Typically, these 20 correlator outputs are integrated to produce decision variables for identifying (i.e., detecting) the navigation bit. Since the signal is tracked via FLL, BPSK bit detection does not have a constant reference phase. Instead, the system detects bits differentially, i.e., using the phase of the previous bit as a reference to detect the relative phase of the current bit. In a conventional GPS receiver, the decision variable of the previous bit typically provides a reference variable for the next bit. If two consecutive bits are the same (11 or 00), no phase change is expected between the decision variable and the reference variable. On the other hand, if two consecutive bits are different (10 or 01), there should be a 180° phase shift between the reference variable and the decision variable.

[0072] Noise and other variations often interfere with the demodulation of BPSK signals, which can lead to errors in the detected navigation message bits. In particular, errors in the current estimate of the carrier frequency will mean that arbitrary phase rotations will be introduced into the complex samples of the correlator 125 output. This problem has been found to be particularly challenging for rapidly changing Doppler values ​​observed in highly dynamic scenarios. An example of this is a wrist-worn GPS receiver, such as a smartwatch. When the wearer is running, the user's arm may swing rapidly in a wide arc. Depending on the user's gait and the current position of the SV in the sky, the receiver may repeatedly accelerate towards and then move away from the SV.

[0073] Typically, a phase-locked loop (PLL) is provided as one of the tracking loops. Its task is to accurately track the carrier phase, thereby ideally avoiding errors in the estimated carrier frequency. This is to ensure proper Doppler removal to avoid bit detection errors. However, it has been found that PLLs are susceptible to rapidly changing Doppler frequency shifts caused by the swing arm. PLLs tend to lose phase lock, while the current loop (FLL) tracks the average Doppler frequency (rather than the instantaneous Doppler frequency) over the loop update period. In the case of the swing arm, this has proven insufficient for proper bit detection.

[0074] In the following implementation, different strategies are applied to demodulate the navigation bits in an attempt to be more robust, particularly to rapidly changing Doppler shifts in highly dynamic scenarios (e.g., arm swings while running). Instead of simply integrating the complex correlator outputs in the time domain, they are transformed to the frequency domain. Decision and reference variables are then formed and compared in the frequency domain. This method, through appropriate selection of decision and reference variables, can help mitigate the effects of instantaneous Doppler shifts.

[0075] Figure 2 This is a block diagram of the demodulator 200 according to the implementation method. Figure 3 This is a flowchart of the method performed by demodulator 200. According to this example, the demodulator includes correlator 125, buffer 210, inversion box 220, first frequency conversion box 232, second frequency conversion box 234, first selection box 242, second selection box 244, decision box 250, and delay box 260.

[0076] As described above, correlator 125 outputs a series of complex samples, i.e., one sample for each repetition of the spreading code; therefore, in this example, there are 20 samples for each navigation bit. In other words, one complex sample is output every millisecond. These complex samples are output to buffer 210. Buffer 210 buffers a sequence of 20 samples for each navigation bit. For each navigation bit, buffer 210 outputs the buffered sample sequence to the first frequency transform box 232 and the inversion box 220.

[0077] The first frequency transform block 232 is configured to perform a frequency transform to convert the sample sequence into a first frequency domain sample sequence. The inversion block 220 is configured to reverse the order of the sample sequence. That is, the inversion block 220 outputs the inverted sample sequence, where the first sample becomes the last sample, and the last sample becomes the first sample, and so on. The inverted sample sequence is output by the inversion block 220 to the second frequency transform block 234. This second frequency transform block 234 is configured to perform a frequency transform to convert the inverted sample sequence into a second frequency domain sample sequence. As a result of the operation of the inversion block 220, the frequency transform performed by the second frequency transform block 234 actually involves the phase of the last sample in the buffered sample sequence, while the frequency transform performed by the first frequency transform block 232 involves the first sample in the buffered sample sequence. Blocks 232 and 234 perform the same frequency transform. Generally, any type of frequency transform can be used. Suitable frequency transforms include, but are not limited to, the Discrete Fourier Transform (DFT) or the Fast Fourier Transform (FFT). As an alternative to these Fourier transforms, the frequency transform box can implement a matched filter bank. The use of a matched filter bank offers greater flexibility in selecting the number and range of frequency windows for computation. For example, with a matched filter bank, the number of frequency domain samples does not need to equal the number of time domain samples.

[0078] The first selection box 242 is configured to select (within the first frequency domain sample sequence) the frequency domain sample with the largest amplitude as the decision variable for bit identification (i.e., bit detection). Specifically, the phase of this frequency domain sample will form the decision variable. The first selection box 242 is configured to output this decision variable to the decision box 250.

[0079] The second selection box 244 is configured to select (within the second frequency domain sample sequence) the frequency domain sample with the largest amplitude as the reference variable for bit identification. Specifically, the phase of this frequency domain sample will form the reference variable. The second selection box 244 is configured to output the reference variable to the delay box 260.

[0080] Delay box 260 is configured to delay the reference variable by one period and output the delayed reference variable to decision box 250. This delay means that in decision box 250, the decision variable derived from the current position is compared with the reference variable derived from the previous position.

[0081] Decision box 250 is configured to identify (i.e., detect) bit transitions by comparing a decision variable generated by first selection box 242 with a delayed reference variable generated by second selection box 244. Specifically, decision box 250 is configured to calculate the phase difference between the decision variable and the reference variable and detect bit transitions based on that phase difference. For example, if the absolute phase difference is less than 90°, decision box 250 will determine that the bit transition is between two identical bits (i.e., the bit sequence is 11 or 00). Conversely, if the absolute phase difference is greater than 90°, decision box 250 will determine that the bit transition exists between two different bits (i.e., the bit sequence is 10 or 01).

[0082] The purpose of inverting box 220 is to ensure that the first and second frequency domain sample sequences are aligned with a common phase reference. By inverting the sample sequence that forms the basis of the reference variable (and then delaying the reference variable at delay box 260), the common phase reference will be the phase at the boundary between a pair of consecutive bits.

[0083] Now refer to Figure 3 The method performed by demodulator 200 is described in more detail. In step 310, buffer 210 obtains a first complex sample sequence from correlator 125. These samples correspond to the current navigation bit. In step 320, first frequency transformation block 232 converts the first sample sequence into a first frequency domain sample sequence. In step 330, first selection block 242 selects the frequency domain sample with the largest amplitude to form a decision variable. The bit transition between the previous navigation bit and the current navigation bit will be detected based on this decision variable.

[0084] Previously, the demodulator had received and processed a second complex sample sequence corresponding to the previous navigation bit. This early processing is represented by steps 312, 314, 322, and 332 of the method. In step 312, buffer 210 obtains the second complex sample sequence from correlator 125. In step 314, inversion box 220 inverts the second sample sequence relative to the first sample sequence. In step 322, second frequency transformation box 234 converts the inverted second sample sequence into a second frequency domain sample sequence. In step 332, second selection box 244 (in the second frequency domain sample sequence) selects the frequency domain sample with the largest amplitude to form a reference variable. The reference variable is delayed by one bit period in delay box 260, so that the delayed reference variable for the previous bit is compared with the decision variable for the current bit in decision box 250. This comparison is performed by... Figure 3 Step 340 in the diagram indicates that the comparison determines whether there is no bit change between bit periods (and therefore no phase shift is applied to the carrier at the transmitter), or whether a bit change has occurred between bit periods (and therefore a 180° phase shift is applied to the transmitter). The output of this method is the identified bit transition.

[0085] Selecting decision and reference variables based on a frequency window (i.e., a frequency sample) with the largest amplitude implies that instantaneous Doppler frequencies are implicitly removed from these variables. Note that in this method, the reference variable for the previous bit is determined independently of the decision variable for the current bit. This means that the reference variable may come from a different frequency window than the one providing the decision variables. This can make the method more robust to changes in Doppler frequency between two bits.

[0086] The benefits of doing this can be found in [link to relevant documentation]. Figures 4A to 4C as well as Figures 5A to 5C . Figures 4A to 4C Exemplary first and second complex sample sequences are shown. The same sequences are shown in each figure. In this example, the two consecutive bits are identical; therefore, there is no phase shift between the bit periods at the transmitter. The frequency errors observed at the receiver within the two bit periods are 16 Hz and 31 Hz, respectively. The choices for the reference and decision variables differ in each figure. Figure 4A The diagram illustrates the conventional choice of the decision variable, formed by the coherent integral of all 20 samples from the first sequence (for the current position). Similarly, it illustrates the conventional choice of the reference variable, formed by the coherent integral of all 20 samples from the second sequence (for previous positions). As can be seen from the diagram, although there is no phase shift at the transmitter, the effect of the varying Doppler shift causes the decision variable to be almost 180° out of phase with the reference variable. In other words, this situation will lead to errors in identifying position transitions. Figure 4B An example is given based on coherent integration of the decision and reference variables over shorter time intervals (specifically, only 5 samples out of 20 samples (5 ms)). In this case, the phases of the decision and reference variables are closer, and no error occurs during the detection bit transition. Nevertheless, a significant phase rotation still exists between the decision and reference variables (ideally, there should be no phase difference between them). Furthermore, reducing the integration period in this way results in a 6 dB decrease in the signal-to-noise ratio (SNR). Figure 4C The decision and reference variables selected according to the method described above are illustrated. By constructing independent reference and decision variables based on frequency domain samples with their respective maximum amplitudes, it can be seen that the phase shift between them is minimized. This provides more reliable bit transition detection.

[0087] Figures 5A to 5C Another practical example is shown. In this case, the two consecutive bits are different; therefore, a 180° phase shift is expected between the reference variable and the decision variable. Figure 5AThe experiment demonstrates that conventional integration with a 20 ms integration period leads to detection error because the phases of the two variables are almost perfectly aligned (i.e., the phase difference is close to 0°). This situation is improved by reducing the integration period to 5 ms. Figure 5B In this case, the phase difference between the variables increases, allowing for accurate detection of the bit transition. However, there is still a significant deviation from the ideal result, which should exhibit a 180° phase shift; and the SNR also decreases by 6 dB, as previously mentioned. Using the method described above... Figure 5C This is closer to the ideal outcome. Figure 4C and Figure 5C This illustrates the optimal separation between two cases, namely, the case of two consecutive bits. Figure 4C ) and the case of two different bits ( Figure 5C This indicates that the method described above is more robust to the effects of variable Doppler frequency shift compared to other methods analyzed. More extensive experiments confirm this. The method according to this example can improve the decoding success rate of GPS L1 C / A subframes by 36%. It can improve the decoding success rate of GLONASS L1OF by 46%.

[0088] This method also reduces reliance on a tracking loop. In fact, in some implementations, it can eliminate the need for a PLL altogether. Considering any Doppler variations that still need to be addressed, it is sufficient for the FLL to track the average carrier frequency using a combination of frequency transformation blocks 232 and 234 and selection blocks 242 and 244.

[0089] In the case where the frequency transform is a special case of the Discrete Fourier Transform (DFT), simplification can be performed. Figure 6 This is a block diagram illustrating a simplified demodulator according to such an implementation. Here, DFT block 632 replaces... Figure 2 The first frequency conversion block 232. Figure 7 This is an example of... Figure 6 The flowchart illustrates the method performed by the demodulator. Here, similarly, step 720, performing the DFT, is a special case of the general step 320, which converts samples to the frequency domain. Figure 2 and Figure 3 In the embodiments, corresponding items with the same boxes and steps are given the same reference numerals.

[0090] The Directional Transform (DFT) is a specific frequency transform with certain properties. One of these properties is that inverting a sample sequence in the time domain will result in inverting a sample sequence in the frequency domain. This property can be used to eliminate [the inversion of the DFT] when it is used as a frequency transform. Figure 2 Some boxes in (and) Figure 3(Some steps in the process). In fact, it can be seen that when using DFT, the reference variable selected by the second selection box 244 is always the same as the decision variable selected by the first selection box 242 for the previous symbol period. This means that the inversion box 220, the second frequency transformation box 234, and the second selection box 244 are redundant and can be eliminated. Instead, the output of the first selection box 242 is connected to the input of the delay box 260 (and the input of the decision box 250). Therefore, in each symbol period, the decision box 250 identifies the current symbol (or the current symbol transition) by comparing the decision variable for the current symbol period with the reference variable consisting of the delayed decision variable for the previous symbol period. This comparison is made by Figure 7 Step 740 in the document specifies this.

[0091] As can be clearly seen from the foregoing explanation, the method and demodulator in this example are well-suited for use in GPS receivers implemented in wearable devices, especially wrist-worn wearable devices.

[0092] It should be noted that the above embodiments are illustrative and not limiting of the invention, and those skilled in the art will be able to devise many alternative embodiments without departing from the scope of the appended claims.

[0093] For example, the implementation can be used with GNSS receivers other than GPS receivers. More generally, the implementation can be used in any receiver that demodulates a signal modulated by phase shift keying.

[0094] exist Figure 2 In this implementation, the identification (i.e., detection) of bit transitions is based on both decision variables and reference variables. In some other implementations, detection may be based solely on decision variables without requiring a reference variable to provide a relative reference phase; for example, using coherent detection with a PLL.

[0095] exist Figure 2 In one implementation, the first and second sample sequences each represent a full bit period (symbol period). In other implementations, the respective frequency domain sample sequences can be computed based on sample sequences lasting less than one full bit / symbol period. For example, the frequency transform frame can operate on the first half of the sample sequence of the current symbol and the second half of the sample sequence of the previous symbol. Similarly, in this case, the boundary between symbols serves as a common phase reference for the two frequency transforms.

[0096] To avoid ambiguity, this method assumes that the timing of the bit edges (i.e., the boundaries between symbols) is known. It is understood that the GNSS receiver will learn this timing after successfully acquiring the SV signal and bit synchronization. Alignment with the bit edges will be maintained over time by the tracking loop.

[0097] Similarly, in other implementations, instead of detecting bit transitions, demodulation of the signal can end with the detection of a bit. Whether a bit is detected or a bit transition occurs can depend on the coding scheme used when modulating the signal at the SV transmitter.

[0098] In the case of GPS signals and other GNSS signals, BPSK is used to modulate navigation messages onto a carrier wave. Therefore, each symbol has one bit. It should be understood that this method can also be applied to other communication schemes that employ more than one bit per symbol. For example, it can be applied to Quadrature Phase Shift Keying (QPSK) with two bits per symbol. In this case, the above statements regarding bit transitions and bit periods will more generally apply to symbol transitions and symbol periods of the modulated signal.

[0099] In the claims, any reference marks between parentheses should not be construed as limiting the claims. The word "comprising" does not exclude the presence of elements or steps other than those listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. Embodiments can be implemented by hardware comprising several different elements. In an apparatus claim enumerating several means, several of these means can be implemented by one and the same item of hardware. The mere fact that certain measures are cited in mutually different dependent claims does not imply that a combination of these measures cannot be used advantageously. Furthermore, in the appended claims, the enumeration of "at least one of the following: A; B; and C" should be interpreted as (A and / or B) and / or C.

[0100] In flowcharts, summaries, claims, and descriptions relating to a method, the order in which steps are listed is not generally intended to limit the order in which they are performed. These steps may be performed in a different order than indicated (unless specifically stated otherwise, or if subsequent steps depend on the product of previous steps). However, the described order of steps may reflect a preferred sequence of operations.

[0101] exist Figure 2 In the current implementation of the exemplary embodiment, the frequency conversion block is implemented in dedicated hardware, while other blocks are implemented in software running on a digital signal processor. This allows relatively computationally intensive frequency conversion operations to be performed efficiently without exhausting the processing power of the digital signal processor.

[0102] Generally, various implementations can be carried out in hardware or dedicated circuitry, software, logic, or any combination thereof. For example, some aspects may be implemented in hardware, while others may be implemented in firmware or software, which may be executed by a controller, microprocessor, or other computing device, but these are not limiting examples. While the various aspects described herein may be illustrated and described as block diagrams, flowcharts, or using other illustrations, it should be understood that these blocks, apparatuses, systems, techniques, or methods described herein can be implemented (as non-limiting examples) in hardware, software, firmware, dedicated circuitry or logic, general-purpose hardware or controllers or other computing devices, or some combination thereof.

[0103] The embodiments described herein can be implemented by computer software, or hardware, or a combination of software and hardware, executable by the device's data processor. In this regard, it should be further noted that any block in the logical flow of the figures may represent a program step or an interconnected logical circuit, block, and function, or a combination of program steps and logical circuits, blocks, and functions. Software may be stored on physical media such as memory chips or memory cells implemented within the processor, magnetic media such as hard disks or floppy disks, and optical media such as, for example, DVDs and their data variants.

[0104] The memory can be of any type suitable for the local technological environment and can be implemented using any suitable data storage technology, such as semiconductor-based storage devices, magnetic storage devices and systems, optical storage devices and systems, fixed memory, and removable memory. The data processor can be of any type suitable for the local technological environment and can include one or more of the following (as non-limiting examples): general-purpose computers, special-purpose computers, microprocessors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), gate-level circuits, and processors based on multi-core processor architectures.

[0105] The implementations discussed herein can be carried out in a variety of components, such as integrated circuit frames. Integrated circuit design is typically a highly automated process. Complex and powerful software tools can be used to transform logic-level designs into semiconductor circuit designs ready to be etched and formed on a semiconductor substrate.

Claims

1. A method for demodulating a wireless signal modulated by phase shift keying, the signal comprising a plurality of symbols, the method comprising the following steps: Based on the signal, obtain (310) the first sample sequence; The first sample sequence is converted into a first frequency domain sample sequence (320, 720); In the first frequency domain sample sequence, select (330) samples with the largest amplitude as decision variables; as well as Based on the aforementioned decision variables, identify (340, 740) symbols or symbol transitions. Wherein, the first sample sequence begins at the start of the symbol period, and the method further includes the following steps: (312) A second sample sequence is obtained based on the signal, wherein the second sample sequence ends at the beginning of the symbol period; The second sample sequence is inverted (314) relative to the first sample sequence; The inverted second sample sequence is transformed (322) into a second frequency domain sample sequence; and In the second frequency domain sample sequence, the sample with the largest amplitude (332) is selected as the reference variable. The step of identifying the symbol or the symbol transformation includes: comparing (340) the decision variable with the reference variable. Each of the first sample sequence and the second sample sequence represents the entire symbol period or a portion of the symbol period.

2. A method for demodulating a wireless signal modulated by phase shift keying, the signal comprising a plurality of symbols, the method comprising the following steps: Based on the signal, obtain (310) the first sample sequence; The first sample sequence is converted into a first frequency domain sample sequence (320, 720); In the first frequency domain sample sequence, select (330) samples with the largest amplitude as decision variables; as well as Based on the aforementioned decision variables, identify (340, 740) symbols or symbol transitions. The step of converting the first sample sequence into the first frequency domain sample sequence includes: performing a discrete Fourier transform (720). The first sample sequence is related to the current symbol period. Furthermore, the step of identifying the symbol or the symbol transition includes: comparing (740) a decision variable selected for the current symbol period with a reference variable, wherein the reference variable is a decision variable selected for a previous symbol period.

3. The method according to claim 1 or claim 2, wherein, The step of identifying the symbol or the symbol transition includes: comparing the phase of the decision variable with the phase of the reference variable.

4. The method according to any one of claims 1 to 3, wherein, The first sample sequence and / or the second sample sequence include complex samples output from the correlation operation.

5. The method according to claim 4, wherein, The correlation operation is the correlation between the signal and a local copy of the spreading code.

6. The method according to any one of the preceding claims, further comprising: The frequency of the signal is tracked using a frequency-locked loop.

7. The method according to any one of the preceding claims, wherein, The signal was received from a spacecraft in the Global Navigation Satellite System.

8. A demodulator (200) for a wireless signal modulated by phase shift keying, the signal comprising a plurality of symbols, the demodulator comprising: An input unit configured to obtain (310) a first sample sequence based on the signal; The first frequency transformation block (232, 632) is configured to transform the first sample sequence (320, 720) into a first frequency domain sample sequence; The first selection box (242) is configured to select (330) the sample with the largest amplitude value in the first frequency domain sample sequence as the decision variable; as well as A decision box (250) is configured to identify (340, 740) symbols or symbol transitions based on the decision variables. Wherein, the first sample sequence begins at the start of the symbol period, and The input unit is configured to obtain (312) a second sample sequence based on the signal, wherein the second sample sequence ends at the beginning of the symbol period. The demodulator further includes: Inverted box (220), the inverted box (220) is configured to invert (314) the second sample sequence relative to the first sample sequence; The second frequency transformation block (234) is configured to transform (322) the inverted second sample sequence into a second frequency domain sample sequence; and The second selection box (244) is configured to select (332) the sample with the largest amplitude value from the second frequency domain sample sequence as the reference variable. The decision box (250) is configured to identify the symbol or the symbol transition by comparing (340) the decision variable with the reference variable. Each of the first sample sequence and the second sample sequence represents the entire symbol period or a portion of the symbol period.

9. The demodulator according to claim 8, wherein, The input section includes a buffer configured to buffer sample sequences and provide each buffered sample sequence to the first frequency conversion frame and the inversion frame; The demodulator also includes a delay frame (260). The second selection box (244) is configured to output the reference variable to the delay box (260). The delay box (260) is configured to delay the reference variable by one symbol period and output the delayed reference variable to the decision box (250); and The decision box (250) is configured to identify the symbol or the symbol transition by comparing (340) the decision variable with the delayed reference variable.

10. A demodulator (200) for a wireless signal modulated by phase shift keying, the signal comprising a plurality of symbols, the demodulator comprising: An input unit configured to obtain (310) a first sample sequence based on the signal; The first frequency transformation block (232, 632) is configured to transform the first sample sequence (320, 720) into a first frequency domain sample sequence; The first selection box (242) is configured to select (330) the sample with the largest amplitude value in the first frequency domain sample sequence as the decision variable; as well as A decision box (250) is configured to identify (340, 740) symbols or symbol transitions based on the decision variables. The first frequency transformation block (632) is configured to perform a discrete Fourier transform. The demodulator also includes a delay frame (260). The first selection box (242) is configured to output the selected decision variable to the delay box (260). The delay box (260) is configured to delay the decision variable by one symbol period, and output the delayed decision variable as a reference variable to the decision box (250). The decision box (250) is configured to identify the symbol or the symbol transition by comparing (340) the decision variable from the current symbol period with the delayed decision variable from the previous symbol period.

11. The demodulator according to any one of claims 8 to 10, wherein, The demodulator is included in the Global Navigation Satellite System receiver (100).

12. The demodulator according to any one of claims 8 to 11, wherein, The demodulator is included in the wearable device.

13. A computer program comprising computer program code configured to, if executed by at least one physical computing device, cause the at least one physical computing device to perform all the steps of the method according to any one of claims 1 to 7.

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