Semiconductor device

Abstract

The present application relates to semiconductor devices and methods of manufacturing the same. A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a first source layer, a second source layer, a first insulating passivation layer partially interposed between the first source layer and the second source layer, and a gate structure on the second source layer. The semiconductor device further includes a source contact structure through the gate structure, the second source layer, and the first insulating passivation layer. The source contact structure is coupled to the first source layer.

Claims

1. A semiconductor device, the semiconductor device comprising: First source layer; The second source layer is located above the first source layer; A first insulating passivation layer is partially interposed between the first source layer and the second source layer; A gate structure located above the second source layer; as well as A source contact structure that passes through the gate structure, the second source layer, and the first insulating passivation layer and is connected to the first source layer. The first insulating passivation layer extends between the first source layer and at least a portion of the source contact structure.

2. The semiconductor device according to claim 1, wherein, The second source layer passes through the first insulating passivation layer to be electrically connected to the first source layer.

3. The semiconductor device according to claim 1, further comprising: A channel structure that passes through the gate structure, the second source layer, and the first insulating passivation layer.

4. The semiconductor device according to claim 3, wherein, The first insulating passivation layer is spaced apart from the sidewall of the channel structure.

5. The semiconductor device according to claim 3, wherein, The second source layer includes: The first part is inserted between the first source layer and the gate structure; The second part, which is connected to the first part and surrounds the sidewall of the channel structure; and The third part protrudes from the second part toward the first insulating passivation layer.

6. The semiconductor device according to claim 1, wherein, The source contact structure includes: A conductive power electrode contact layer, which is electrically connected to the first source electrode layer; and An insulating spacer surrounds the sidewalls of the conductive electrode contact layer.

7. The semiconductor device according to claim 6, further comprising: An interlayer insulating layer is inserted between the second source layer and the gate structure.

8. The semiconductor device according to claim 7, wherein, The insulating spacer includes: A first portion, which extends through the gate structure; and The second part extends through the interlayer insulation layer, and is wider than the first part.

9. The semiconductor device of claim 6, further comprising: A second insulating passivation layer is inserted between the insulating spacer and the second source layer.

10. The semiconductor device according to claim 9, wherein, The second insulating passivation layer extends between the insulating spacer and the first insulating passivation layer.

11. The semiconductor device according to claim 1, wherein, The source contact structure is formed of insulating material.

12. The semiconductor device according to claim 1, wherein, The source contact structure includes a first portion passing through the gate structure and a third portion passing through the second source layer, wherein the width of the third portion is wider than the width of the first portion.

13. The semiconductor device of claim 1, further comprising: A second insulating passivation layer is inserted between the source contact structure and the second source layer.

14. The semiconductor device according to claim 13, wherein, The second insulating passivation layer extends between the source contact structure and the first insulating passivation layer.

15. The semiconductor device according to claim 1, wherein, The gate structure includes: Multiple conductive layers; and Multiple insulating layers are alternately stacked with the multiple conductive layers.

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