Transparent display device

Abstract

A transparent display device. The transparent display device can optimize the arrangement area of ​​multiple signal lines and circuit regions, and can prevent brightness differences between sub-pixels emitting light of the same color. The transparent display device includes: a substrate having a transmissive region, a first non-transmissive region disposed between the transmissive regions in a first direction, and a second non-transmissive region disposed between the transmissive regions in a second direction; a first signal line disposed along the first non-transmissive region in the first non-transmissive region and extending from an intersection region where the first and second non-transmissive regions intersect each other in a direction intersecting the first direction; and a second signal line disposed along the second non-transmissive region in the second non-transmissive region and extending from the intersection region in a direction intersecting the second direction. Two adjacent first signal lines are symmetrical to each other, with the transmissive region interposed therebetween, and two adjacent second signal lines are symmetrical to each other, with the transmissive region interposed therebetween.

Description

Technical Field

[0001] This disclosure relates to transparent display devices. Background Technology

[0002] With the development of the information society, the demand for display devices for displaying images has increased in various forms. Recently, various types of display devices, such as liquid crystal displays (LCDs), plasma display panels (PDPs), organic light-emitting diode (OLEDs), and quantum dot light-emitting diode (QLEDs), have been widely used.

[0003] Recently, research has been actively conducted on transparent display devices that allow users to view objects or images arranged on the opposite side of a display device after they are transmitted through the display device.

[0004] Transparent display devices can have high light transmittance in the display area through a transmissive region. However, due to the transmissive region, the resolution of transparent display devices deteriorates. The problem with transparent display devices is that the higher the resolution, the lower the transmittance.

[0005] Transparent display devices comprise multiple signal lines and circuit areas in non-transmissive regions. As the area of ​​these signal lines and circuit areas increases, the transmissive area decreases. For this reason, the light transmittance decreases. In transparent display devices, it is important to minimize the area of ​​the signal lines and circuit areas to achieve high light transmittance. Summary of the Invention

[0006] This disclosure is made in view of the above problems, and the purpose of this disclosure is to provide a transparent display device that can optimize the arrangement area of ​​multiple signal lines and circuit areas.

[0007] Another technical benefit of the present invention is that it provides a transparent display device that can prevent brightness differences between sub-pixels used to emit light of the same color.

[0008] In addition to the technical benefits of this disclosure as mentioned above, those skilled in the art will clearly understand additional technical benefits and features of this disclosure based on the following description of this disclosure.

[0009] According to one aspect of this disclosure, the above and other technical benefits can be achieved by providing a transparent display device, the transparent display device comprising: a substrate having a transmissive region, a first non-transmissive region disposed between the transmissive regions in a first direction, and a second non-transmissive region disposed between the transmissive regions in a second direction; a first signal line disposed along the first non-transmissive region in the first non-transmissive region and extending from an intersection region where the first non-transmissive region and the second non-transmissive region intersect each other in a direction intersecting the first direction; and a second signal line disposed along the second non-transmissive region in the second non-transmissive region and extending from the intersection region in a direction intersecting the second direction. Two adjacent first signal lines are symmetrical to each other, such that the transmissive region is interposed therebetween, and two adjacent second signal lines are symmetrical to each other, such that the transmissive region is interposed therebetween.

[0010] According to another aspect of this disclosure, the above and other technical benefits can be achieved by providing a transparent display device, the transparent display device comprising: a substrate having a transmissive region, a first non-transmissive region disposed between the transmissive regions in a first direction, and a second non-transmissive region disposed between the transmissive regions in a second direction; a first scan line and a second scan line disposed along the second non-transmissive region in the second non-transmissive region and extending in an oblique direction from an intersection region where the first non-transmissive region and the second non-transmissive region intersect each other; a third scan line configured symmetrical to the second scan line, such that the transmissive region is interposed therebetween; and a fourth scan line configured symmetrical to the first scan line, such that the transmissive region is interposed therebetween. Attached Figure Description

[0011] The above and other objects, features and advantages of this disclosure will become clearer from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0012] Figure 1 This is a perspective view illustrating a transparent display device according to one embodiment of the present disclosure;

[0013] Figure 2 This is a schematic plan view illustrating a transparent display panel according to one embodiment of the present disclosure;

[0014] Figure 3 This is an example Figure 2 A magnified view of region A;

[0015] Figure 4 This is a schematic diagram illustrating the connection relationship between signal lines and circuit areas;

[0016] Figure 5This is a view illustrating the input order of data to multiple data lines and multiple scan lines;

[0017] Figure 6A This is a view illustrating the capacitance of a capacitor located in the third sub-pixel of the first pixel;

[0018] Figure 6B This is a view illustrating the capacitance of a capacitor located in the third sub-pixel of the second pixel;

[0019] Figure 7A This is a view illustrating the capacitance of a capacitor located in the fourth sub-pixel of the first pixel; and

[0020] Figure 7B This is a view illustrating the capacitance of the capacitor located in the fourth sub-pixel of the second pixel. Detailed Implementation

[0021] The advantages and features of this disclosure and its implementation methods will be illustrated by the following embodiments described with reference to the accompanying drawings. However, this disclosure may be implemented in different ways and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of this disclosure to those skilled in the art.

[0022] The shapes, sizes, ratios, angles, and numbers disclosed in the accompanying drawings for the purpose of describing embodiments of this disclosure are merely examples, and therefore, this disclosure is not limited to the illustrated details. Throughout this specification, similar reference numerals refer to similar elements. In the following description, detailed descriptions of relevant known functions or configurations will be omitted where it is determined that such detailed descriptions unnecessarily obscure the essential points of this disclosure. Where terms such as “comprising,” “having,” and “including” are used in this specification, an additional part may be added unless “only” is used. Singular terms may include plural forms unless the opposite is indicated.

[0023] When understanding a component, it is interpreted as including a range of tolerances, even though this is not explicitly described.

[0024] When describing positional relationships, for example, when the positional relationship is described as “~above”, “~above”, “~below” and “~side”, one or more parts may be arranged between two other parts unless “direct” or “right” is used.

[0025] It should be understood that although the terms “first,” “second,” etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are merely used to distinguish one element from another. For example, without departing from the scope of this disclosure, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element.

[0026] In describing the elements of this disclosure, the terms “first,” “second,” etc., may be used. These terms are intended to identify the respective elements from other elements, and the basis, order, or number of the respective elements is not limited by these terms. The statement that an element is “connected” or “linked” to another element should be understood to mean that the element may be directly connected or linked to the other element, but may be indirectly connected or linked to the other element (unless specifically mentioned), or that a third element may be inserted between the respective elements.

[0027] Features of the various embodiments of this disclosure may be linked or combined with each other in part or in whole, and may interact with each other in various ways and be technically driven, as will be fully understood by those skilled in the art. Embodiments of this disclosure may be performed independently of each other, or may be performed together in an interdependent manner.

[0028] Hereinafter, examples of transparent display devices according to the present disclosure will be described in detail with reference to the accompanying drawings. Wherever possible, the same reference numerals will be used throughout the drawings to denote the same or similar parts.

[0029] Figure 1 This is a perspective view illustrating a transparent display device according to one embodiment of the present disclosure.

[0030] In the following text, the X-axis indicates a line parallel to the scan line, the Y-axis indicates a line parallel to the data line, and the Z-axis indicates the height direction of the transparent display device 100.

[0031] Although the specification has been described based on the transparent display device 10 implemented as an organic light-emitting display device according to one embodiment of the present disclosure, the transparent display device 100 may be implemented as a liquid crystal display device, a plasma display panel (PDP), a quantum dot light-emitting display (QLED) or an electrophoretic display device.

[0032] Reference Figure 1 According to one embodiment of the present disclosure, a transparent display device 100 includes a transparent display panel 110, a source driver integrated circuit IC 210, a flexible film 220, a circuit board 230, and a timing controller 240.

[0033] The transparent display panel 110 may include a first substrate 111 and a second substrate 112 facing each other. The second substrate 112 may be an encapsulation substrate. The first substrate 111 may be a plastic film, a glass substrate, or a silicon wafer substrate formed using semiconductor processes. The second substrate 112 may be a plastic film, a glass substrate, or an encapsulation film. The first substrate 111 and the second substrate 112 may be made of transparent materials.

[0034] The scan driver can be positioned on one side of the display area of ​​the transparent display panel 110 or in the non-display areas of the two peripheral sides of the transparent display panel 110 using the gate-in-panel (GIP) method. Alternatively, the scan driver can be fabricated in a driver chip, mounted on a flexible film, and attached to one or both peripheral sides of the display area of ​​the transparent display panel 110 using the tape autobonding (TAB) method.

[0035] If the source driver IC 210 is manufactured in the driver chip, the source driver IC 140 can be mounted on the flexible film 220 by the chip-on-film (COF) method or the chip-on-plastic (COP) method.

[0036] Pads such as power pads and data pads can be formed in the pad area PA of the transparent display panel 110. Lines connecting the pads to the source driver IC 210 and lines connecting the pads to the circuit board 230 are formed in the flexible film 220. The flexible film 220 can be attached to the pads using an anisotropic conductive film, thereby allowing the pads to be connected to the lines of the flexible film 220.

[0037] Figure 2 This is a schematic plan view illustrating a transparent display panel according to one embodiment of the present disclosure, and Figure 3 This is an example Figure 2 A magnified view of region A. Figure 4 It is a schematic diagram illustrating the connection relationship between signal lines and circuit areas, and Figure 5 This is a view that illustrates the input order of data to multiple data lines and multiple scan lines.

[0038] Reference Figure 2 and Figure 5 The transparent display panel 110 may include a display area DA with pixels P for displaying images and a non-display area NDA where no images are displayed.

[0039] The non-display area NDA can be configured with a pad area PA in which pads PAD are set and at least one scan driver 205.

[0040] Scan driver 205 is connected to scan line SL and supplies scan signals to scan line SL. Scan driver 205 can be positioned on one side of the display area DA of the transparent display panel 110 or in the non-display areas NDA on both peripheral sides of the transparent display panel 110 using an in-panel gate driver (GIP) method. For example, as Figure 2 As shown, the scan driver 205 can be formed on both sides of the display area DA of the transparent display panel 110, but these scan drivers are not limited to this. The scan driver 205 can also be formed only on one side of the display area DA of the transparent display panel 110.

[0041] The display area DA includes a transmissive area TA and a non-transmissive area NTA. The transmissive area TA is the region through which most of the external incident light passes, and the non-transmissive area NTA is the region through which most of the external incident light cannot pass. For example, the transmissive area TA can be a region with a transmittance greater than α% (e.g., about 90%), and the non-transmissive area NTA can be a region with a transmittance less than β% (e.g., about 50%). In this case, α is greater than β. Due to the transmissive area TA, the user can view objects or backgrounds arranged on the rear surface of the transparent display panel 110.

[0042] The non-transmissive region NTA may include multiple pixels P and multiple first signal lines SL1 and second signal lines SL2 for supplying signals to the multiple pixels P. For example... Figure 4 As shown, the non-transmissive region NTA may include a first non-transmissive region NTA1 extending in a first direction (e.g., the Y-axis direction) between the transmissive regions TA and a second non-transmissive region NTA2 extending in a second direction (e.g., the X-axis direction) between the transmissive regions TA. In some embodiments, the overlap of one or more first non-transmissive regions NTA1 and one or more second non-transmissive regions NTA2 may form a grid-like or lattice-like shape.

[0043] Pixel P can be configured to overlap with at least one of the first signal line SL1 and the second signal line SL2, thereby emitting predetermined light to display an image. The emitting region EA can correspond to the region in pixel P from which light is emitted.

[0044] Each of pixel P may include at least one of a first sub-pixel SP1, a second sub-pixel SP2, a third sub-pixel SP3, and a fourth sub-pixel SP4. The first sub-pixel SP1 may include a first emitting region EA1 that emits green light. The second sub-pixel SP2 may include a second emitting region EA2 that emits red light. The third sub-pixel SP3 may include a third emitting region EA3 that emits blue light. The fourth sub-pixel SP4 may include a fourth emitting region EA4 that emits white light. However, the emitting regions are not limited to this example. Each of pixel P may also include a sub-pixel that emits light of colors other than red, green, blue, and white. Furthermore, the arrangement order of sub-pixels SP1, SP2, and SP3 can be varied in various ways.

[0045] The light-emitting regions EA1, EA2, EA3, and EA4, respectively included in multiple sub-pixels SP1, SP2, SP3, and SP4, can each comprise multiple segmented light-emitting regions. Specifically, the first light-emitting region EA1, located in the first sub-pixel SP1, can comprise two segmented regions: a first segmented light-emitting region EA1-1 and a second segmented light-emitting region EA1-2. The second light-emitting region EA2, located in the second sub-pixel SP2, can comprise two segmented regions: a first segmented light-emitting region EA2-1 and a second segmented light-emitting region EA2-2. The third light-emitting region EA3, located in the third sub-pixel SP3, can comprise two segmented regions: a first segmented light-emitting region EA3-1 and a second segmented light-emitting region EA3-2. The fourth light-emitting region EA4, located in the fourth sub-pixel SP4, can comprise two segmented regions: a first segmented light-emitting region EA4-1 and a second segmented light-emitting region EA4-2.

[0046] In the following text, for ease of description, the description will be based on the following: the first sub-pixel SP1 is a green sub-pixel that emits green light, the second sub-pixel SP2 is a red sub-pixel that emits red light, the third sub-pixel SP3 is a blue sub-pixel that emits blue light, and the fourth sub-pixel SP4 is a white sub-pixel that emits white light.

[0047] The first sub-pixel SP1 and the second sub-pixel SP2 may be configured to overlap at least a portion of the first signal line SL1, and may be alternately positioned along the first signal line SL1. The third sub-pixel SP3 and the fourth sub-pixel SP4 may be configured to overlap at least a portion of the second signal line SL2, and may be alternately positioned along the second signal line SL2.

[0048] In some implementations, the overlap of one or more first signal lines SL1 and one or more second signal lines SL2 can form a grid or lattice shape.

[0049] In some implementations, the cross region IA includes the area where the first signal line SL1 and the second signal line SL2 intersect each other.

[0050] like Figure 3 As shown, the third sub-pixel SP3 and the fourth sub-pixel SP4 can be located in the intersection region IA where the first signal line SL1 and the second signal line SL2 intersect. For example, EA3-2 of the third sub-pixel SP3 partially overlaps with the intersection region IA, and EA4-1 of the fourth sub-pixel SP4 partially overlaps with the intersection region IA. Here, EA3-1 of the third sub-pixel SP3 and EA4-2 of the fourth sub-pixel SP4 are spaced apart from the intersection region IA. In this case, the first sub-pixel SP1 and the second sub-pixel SP2 can be spaced apart from each other in the intersection region IA with the third sub-pixel SP3 and the fourth sub-pixel SP4 interposed therebetween, but are not limited to this.

[0051] In another embodiment, the first sub-pixel SP1 and the second sub-pixel SP2 can be disposed in the intersection region IA where the first signal line SL1 and the second signal line SL2 intersect each other. In this case, the third sub-pixel SP3 and the fourth sub-pixel SP4 can be spaced apart from each other in the intersection region IA with the first sub-pixel SP1 and the second sub-pixel SP2 interposed therebetween.

[0052] In a transparent display panel 110 according to one embodiment of the present disclosure, a first sub-pixel SP1 and a second sub-pixel SP2 may be alternately arranged along a first signal line SL1, and a third sub-pixel SP3 and a fourth sub-pixel SP4 may be alternately arranged along a second signal line SL2. Therefore, in the transparent display panel 110 according to one embodiment of the present disclosure, sub-pixels of the same color are spaced apart and do not cluster together, thereby demonstrating color uniformity in terms of image quality.

[0053] The first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, and the fourth sub-pixel SP4 may each include circuit regions CA1, CA2, CA3, and CA4, as well as light-emitting diodes. The circuit regions CA1, CA2, CA3, and CA4 may include capacitors, thin-film transistors, etc., and the thin-film transistors may include switching transistors, sensing transistors, and driving transistors.

[0054] In some embodiments, the first signal line SL1 has a first portion FP, a second portion SP, and a third portion TP located between the first and second portions. The first portion FP and the third portion TP are continuous and adjacent to each other, and the second portion SP and the third portion TP are continuous and adjacent to each other. The first and second portions are arranged along a first direction FD (e.g., the Y-axis), while the third portion is arranged along a third direction TD transverse to the first direction. Here, the third portion TP of the first signal line SL1 overlaps with at least one of a plurality of overlapping regions.

[0055] Similarly, in some embodiments, the second signal line SL2 includes a first portion, a second portion, and a third portion between the first and second portions. The first and third portions of the second signal line SL2 are continuous and adjacent to each other, and the second and third portions of the second signal line SL2 are also continuous and adjacent to each other. The first and second portions of the second signal line SL2 are arranged along a second direction (e.g., the X-axis). Here, the third portion is arranged along a fourth direction FTD that is transverse to the second direction. The third direction TD is different from and transverse to the fourth direction FTD, such as... Figure 3 As shown.

[0056] The switching transistor switches on and off according to the scan signal supplied to the scan line to supply the data voltage supplied from the data line to the driving transistor.

[0057] The sensing transistor can detect deviations in the threshold voltage of the driving transistor that cause image quality degradation.

[0058] The driving transistor switches on and off according to the data voltage supplied from the switching thin-film transistor, generates data current using the power supply from the pixel power lines, and supplies the data current to the anode electrode of the light-emitting diode. The driving transistor includes an active layer, a gate electrode, a source electrode, and a drain electrode.

[0059] A capacitor is used to hold the data voltage supplied to the driving transistor for one frame. The capacitor may include, but is not limited to, two capacitor electrodes. In one embodiment, the capacitor may include three capacitor electrodes.

[0060] A light-emitting diode (LED) may include an anode electrode, an emissive layer, and a cathode electrode. When a voltage is applied to the anode and cathode electrodes of the LED, holes and electrons move to the emissive layer through the hole transport layer and electron transport layer, respectively, and recombine with each other in the emissive layer to emit light.

[0061] Multiple first signal lines SL1 can extend from the first non-transmissive region NTA1 along the first non-transmissive region NTA1. The multiple first signal lines SL1 can be spaced apart from each other, with the transmissive region TA interposed between them.

[0062] The first signal line SL1 may include a data line. In this case, as... Figure 4 As shown, the first signal line SL1 may include two data lines. The first signal line SL1 may include a first data line DL1 for supplying data voltages to two of the plurality of sub-pixels SP1, SP2, SP3, and SP4, and a second data line DL2 for supplying data voltages to the remaining two of the plurality of sub-pixels SP1, SP2, SP3, and SP4. For example, the first signal line SL1 may include a first data line DL1 for supplying data voltages to the second sub-pixel SP2 and the third sub-pixel SP3, and a second data line DL2 for supplying data voltages to the first sub-pixel SP1 and the fourth sub-pixel SP4.

[0063] Although not in Figure 4 As shown in the figure, the second signal line SL2 may also include at least one of a pixel power line, a common power line, or a reference line.

[0064] Pixel power lines can supply a first power supply to the driving transistors of each of the sub-pixels SP1, SP2, SP3, and SP4 located in the display area DA. A common power line can supply a second power supply to the cathode electrodes of the sub-pixels SP1, SP2, SP3, and SP4 located in the display area DA. In this case, the second power supply can be a common power supply shared by the sub-pixels SP1, SP2, SP3, and SP4. A reference line can supply an initialization voltage (or reference voltage or sensing voltage) to the driving transistors of each of the sub-pixels SP1, SP2, SP3, and SP4 located in the display area DA.

[0065] In the following text, when the first signal line SL1 includes multiple lines, the first signal line SL1 can refer to a signal line group including multiple lines. For example, when the first signal line SL1 includes two data lines DL, a pixel power line, a common power line, and a reference line, the first signal line SL1 can refer to a signal line group including two data lines DL, a pixel power line, a common power line, and a reference line.

[0066] Multiple second signal lines SL2 can extend from the second non-transmissive region NTA2. The multiple second signal lines SL2 can be spaced apart from each other, with the transmissive region TA interposed between them.

[0067] Multiple second signal lines SL2 can intersect with multiple first signal lines SL1 in the intersection region IA where the first non-transmissive region NTA1 and the second non-transmissive region NTA2 intersect each other.

[0068] The second signal line SL2 may include a scan line. For example... Figure 4As shown, the second signal line SL2 may include two scan lines. The second signal line SL2 may include a first scan line SCANL1 for supplying scan signals to two of the plurality of sub-pixels SP1, SP2, SP3, and SP4, and a second scan line SCANL2 for supplying scan data to the other two of the plurality of sub-pixels SP1, SP2, SP3, and SP4. For example, the second signal line SL2 may include a first scan line SCANL1 for supplying scan signals to the first sub-pixel SP1 and the third sub-pixel SP3, and a second scan line SCANL2 for supplying scan signals to the second sub-pixel SP2 and the fourth sub-pixel SP4.

[0069] In the following text, when the second signal line SL2 comprises multiple lines, the second signal line SL2 can refer to a signal line group comprising multiple lines. For example, when the second signal line SL2 comprises two scan lines SCANL, the second signal line SL2 can refer to a signal line group comprising two scan lines SCANL.

[0070] The transmission region TA can be positioned between adjacent first signal lines SL1. Additionally, the transmission region TA can be positioned between adjacent second signal lines SL2. That is, the transmission region TA can be surrounded by two first signal lines SL1 and two second signal lines SL2. The transmission region TA can have the following characteristics: Figure 3 The rectangular shape shown is not limited to this. The transmission region TA can have polygonal shapes such as hexagonal and octagonal shapes, circular shapes, or oval shapes. The transmission region TA includes multiple sides, and at least two sub-pixels can be set on each of the multiple sides. For example, the transmission region TA can include shapes such as... Figure 3 The four sides shown are provided, and two sub-pixels can be set for each of the four sides.

[0071] A transparent display panel 110 according to one embodiment of the present disclosure is characterized in that the extending directions of the first signal line SL1 and the second signal line SL2 are changed in the intersection area IA.

[0072] Specifically, the first signal line SL1 can extend from the first non-transmissive region NTA1 along the first non-transmissive region NTA1. The first signal line SL1 can extend from the first non-transmissive region NTA1 (excluding the intersection region IA) in a first direction (Y-axis direction), and can extend from the intersection region IA in a direction intersecting the first direction. For example, the first signal line SL1 can be as follows: Figure 3 The diagram shows the signal line SL1 extending from the intersection region IA in an oblique direction relative to the first direction, but it is not limited to this. As another example, the first signal line SL1 may extend from the intersection region IA in a direction perpendicular to the first direction.

[0073] like Figure 3 As shown, in some embodiments, the first signal line SL1 includes a portion extending along a first direction (e.g., the Y-axis direction). As the first signal line SL1 approaches the intersection region IA, the first signal line SL1 extends in a third direction TD different from the first direction. The first signal line SL1 passes through a non-transmissive region arranged along a second direction (e.g., the X-axis direction). Figure 4 After the intersection region IA (referred to as NTA2 in the original text) and the cross region IA, alignment can be performed along the first direction. Similarly, in some embodiments, the second signal line SL2 includes a portion extending along the second direction. As the second signal line SL2 approaches the cross region IA, the second signal line SL2 extends in a fourth direction FTD, different from the second direction. After the second signal line SL2 passes through the non-transmissive region arranged along the first direction (in the original text), the second signal line SL2 extends along the cross region IA. Figure 4 After NTA1 and the cross area IA, the second signal line SL2 can be aligned along the second direction.

[0074] The first signal line SL1 may include a first line portion SL1-1, a second line portion SL1-2, and a connecting portion SL1-3.

[0075] The first line portion SL1-1 of the first signal line SL1 can be disposed on the first side of the center line NTC1 of the first non-transmissive region NTA1, which is parallel to the first direction. At this time, the circuit region of the sub-pixel can be disposed on the second side of the center line NTC1 of the first non-transmissive region, facing the first line portion SL1-1 of the first signal line SL1, so that the center line NTC1 of the first non-transmissive region is inserted therebetween.

[0076] The second line portion SL1-2 of the first signal line SL1 can be disposed on the second side of the center line NTC1 of the first non-transmissive region. At this time, the circuit region of the sub-pixel can be disposed on the first side of the center line NTC1 of the first non-transmissive region facing the second line portion SL1-2 of the first signal line SL1, so that the center line NTC1 of the first non-transmissive region is inserted therebetween.

[0077] For example, the first line portion SL1-1 can be located to the left of the center line NTC1 of the first non-transmissive region and extend in the first direction, and the second line portion SL1-2 can be located to the right of the center line NTC1 of the first non-transmissive region and extend in the first direction. In this case, the connecting portion SL1-3 for connecting the first line portion SL1-1 and the second line portion SL1-2 can extend in a direction parallel to the first direction.

[0078] The connecting portion SL1-3 of the first signal line SL1 can connect the first line portion SL1-1 to the second line portion SL1-2. The first line portion SL1-1 and the second line portion SL1-2 can be alternately arranged along the first non-transmissive region NTA1 and can be spaced apart from each other in the intersection region IA. The connecting portion SL1-3 can connect the first line portion SL1-1 and the second line portion SL1-2, which are spaced apart from each other in the intersection region IA. Since the first line portion SL1-1 and the second line portion SL1-2 are alternately arranged along the first non-transmissive region NTA1, the connecting portions SL1-3 arranged in the intersection regions IA adjacent to each other in the first direction can extend relative to each other.

[0079] Furthermore, the connection portion SL1-3 of the first signal line SL1 can be set only in the cross area IA. For example... Figure 3 As shown, two sub-pixels (e.g., the second sub-pixel SP2 of the first pixel P1 and the first sub-pixel SP1 of the third pixel P3) can be positioned between two adjacent intersection regions IA in the first direction. When connecting portions SL1-3 are positioned between the corresponding sub-pixels, in addition to the intersection regions IA, the connecting portions SL1-3 can also be positioned between two adjacent intersection regions IA. The number of connecting portions SL1-3 extending in the inclined direction can be increased, thus increasing the length of the first signal line SL1. For this reason, the RC delay (or load) can be increased.

[0080] Furthermore, when the connecting portion SL1-3 extends in the inclined direction, the areas of circuit regions CA1, CA2, CA3, and CA4 can be reduced, thereby allowing circuit regions CA1, CA2, CA3, and CA4 to protrude towards the transmission region TA. As a result, the size of the transmission region TA decreases, thereby reducing the light transmittance.

[0081] In a transparent display panel 110 according to one embodiment of the present disclosure, the connecting portion SL1-3 of the first signal line SL1 is only provided in the intersection region IA, thereby reducing the length of the first signal line SL1 and the RC delay (or load). Furthermore, in a transparent display panel 110 according to one embodiment of the present disclosure, the inclined connecting portion SL1-3 is not formed between two adjacent intersection regions IA, thereby ensuring sufficient space to accommodate two of the circuit regions CA1, CA2, CA3, and CA4. Therefore, since the circuit regions CA1, CA2, CA3, and CA4 do not protrude towards the transmission region TA, the light transmittance does not decrease.

[0082] The aforementioned first signal line SL1 can be configured as multiple lines, and two first signal lines SL1 adjacent to each other in the second direction can be configured to be symmetrical to each other based on the transmission region TA, such as... Figure 3 As shown in the diagram. In detail, the two first signal lines SL1 that are adjacent to each other in the second direction can be symmetrical to each other based on the first transmission region center line TC1 that passes through the center of the transmission region TA in the first direction.

[0083] Multiple second signal lines SL2 can extend from the second non-transmissive region NTA2 along the second non-transmissive region NTA2. The second signal lines SL2 can extend from the second non-transmissive region NTA2 (excluding the intersection region IA) in a second direction (X-axis direction), and can extend from the intersection region IA in a direction intersecting the second direction. For example, the second signal lines SL2 can be as follows: Figure 3 The second signal line SL2 extends from the cross region IA in an oblique direction relative to the second direction, but is not limited thereto. In another example, the second signal line SL2 may extend from the cross region IA in a direction perpendicular to the second direction.

[0084] The second signal line SL2 may include a first line portion SL2-1, a second line portion SL2-2, and a connecting portion SL2-3.

[0085] The first line portion SL2-1 of the second signal line SL2 can be disposed on the third side of the center line NTC2 of the second non-transmissive region, which is parallel to the first direction, within the second non-transmissive region NTA2. In this case, the circuit region of the sub-pixel can be disposed on the fourth side of the center line NTC2 of the second non-transmissive region, facing the first line portion SL2-1 of the second signal line SL2, so that the center line NTC2 of the second non-transmissive region is interposed therebetween.

[0086] The second line portion SL2-2 of the second signal line SL2 can be located on the fourth side of the center line NTC2 of the second non-transmissive region. At this time, the circuit region of the sub-pixel can be located on the third side of the center line NTC2 of the second non-transmissive region, facing the second line portion SL2-2 of the second signal line SL2, so that the center line NTC2 of the second non-transmissive region is interposed therebetween.

[0087] For example, the first line portion SL2-1 can be disposed below the center line NTC2 of the second non-transparent region and extend in the second direction, and the second line portion SL2-2 can be disposed above the center line NTC2 of the second non-transparent region and extend in the second direction. In this case, the connecting portion SL2-3 for connecting the first line portion SL2-1 and the second line portion SL2-2 can extend in a direction that is not parallel to the second direction.

[0088] The connecting portion SL2-3 of the second signal line SL2 can connect the first line portion SL2-1 and the second line portion SL2-2. The first line portion SL2-1 and the second line portion SL2-2 can be alternately arranged along the second non-transmissive region NTA2 and can be spaced apart from each other in the intersection region IA. The connecting portion SL2-3 can connect the first line portion SL2-1 and the second line portion SL2-2, which are spaced apart from each other in the intersection region IA. Since the first line portion SL2-1 and the second line portion SL2-2 are alternately arranged along the second non-transmissive region NTA2, the connecting portions SL2-3 arranged in the intersection regions IA adjacent to each other in the second direction can extend relative to each other.

[0089] Furthermore, the connection portion SL2-3 of the second signal line SL2 can be set only in the cross area IA. For example... Figure 3 As shown, two sub-pixels (e.g., the fourth sub-pixel SP4 of the first pixel P1 and the third sub-pixel SP3 of the third pixel P3) can be positioned between two adjacent intersection regions IA in the first direction. When connecting portions SL2-3 are positioned between corresponding sub-pixels, in addition to the intersection regions IA, connecting portions SL2-3 can also be positioned between two adjacent intersection regions IA. The number of connecting portions SL2-3 extending in the inclined direction increases, thus increasing the length of the second signal line SL2. For this reason, the RC delay (or load) can be increased.

[0090] Furthermore, when the connecting portion SL2-3 extends in the inclined direction, the areas of circuit regions CA1, CA2, CA3, and CA4 can be reduced, thereby allowing circuit regions CA1, CA2, CA3, and CA4 to protrude towards the transmission region TA. As a result, the size of the transmission region TA decreases, thereby reducing the light transmittance.

[0091] In a transparent display panel 110 according to one embodiment of the present disclosure, the connecting portion SL2-3 of the second signal line SL2 is only provided in the cross region IA, thereby reducing the length of the second signal line SL2 and the RC delay (or load). Furthermore, in a transparent display panel 110 according to one embodiment of the present disclosure, the inclined connecting portion SL2-3 is not formed between two adjacent cross regions IA, thereby ensuring sufficient space to accommodate two of the circuit regions CA1, CA2, CA3, and CA4. Therefore, since the circuit regions CA1, CA2, CA3, and CA4 do not protrude towards the transmissive region TA, the light transmittance does not decrease.

[0092] The aforementioned second signal line SL2 can be configured as multiple lines, and two second signal lines SL2 adjacent to each other in the first direction can be configured to be symmetrical to each other based on the transmission region TA, such as... Figure 3 As shown in the diagram. In detail, two second signal lines SL2 that are adjacent to each other in the first direction can be symmetrical to each other based on the second transmission region center line TC2 that passes through the center of the transmission region TA in the second direction.

[0093] In addition, such as Figure 4 As shown, the first signal line SL1 may include two data lines, and the second signal line SL2 may include two scan lines. Therefore, the data lines may have the same structure as the first signal line SL1, and the scan lines may have the same structure as the second signal line SL2.

[0094] Specifically, a first signal line SL1 may include a first data line DL1 and a second data line DL2. Additionally, another first signal line SL1 adjacent to a first signal line SL1 in the second direction may include a third data line DL3 and a fourth data line DL4.

[0095] At this time, the first data line DL1 and the second data line DL2 can be arranged parallel to each other in the first non-transmissive region NTA1. For example... Figure 4 As shown, the third data line DL3 can be configured to be symmetrical to the second data line DL2, with the transmission region TA interposed between them. That is, the third data line DL3 can be symmetrical to the second data line DL2 based on the center line TC1 of the first transmission region. The fourth data line DL4 can be configured to be symmetrical to the first data line DL1, with the transmission region TA interposed between them. That is, the fourth data line DL4 can be symmetrical to the first data line DL1 based on the center line TC1 of the first transmission region.

[0096] Each of the first data line DL1, the second data line DL2, the third data line DL3, and the fourth data line DL4 may include a first line portion DL-1, a second line portion DL-2, and a connection portion DL-3.

[0097] The first line portion DL-1 can be disposed on the first side of the first non-transmissive region center line NTC1, which is parallel to the first direction, within the first non-transmissive region NTA1. In this case, the circuit region of the sub-pixel can be disposed on the second side of the first non-transmissive region center line NTC1, facing the first line portion DL-1, with the first non-transmissive region center line NTC1 interposed therebetween.

[0098] The second line portion DL-2 can be located on the second side of the center line NTC1 of the first non-transmissive region. In this case, the circuit region of the sub-pixel can be located on the first side of the center line NTC1 of the first non-transmissive region facing the second line portion DL-2, so that the center line NTC1 of the first non-transmissive region is inserted therebetween.

[0099] For example, a first line portion DL-1 of each of the first data line DL1 and the second data line DL2 can be disposed on a first side of the center line NTC1 of the first non-transmissive region. When the first line portion DL-1 of each of the first data line DL1 and the second data line DL2 overlaps with at least a portion of the first sub-pixel SP1, a first circuit region CA1 of the first sub-pixel SP1 can be disposed on a second side of the center line NTC1 of the first non-transmissive region. The first circuit region CA1 of the first sub-pixel SP1 can face the first line portion DL-1 of each of the first data line DL1 and the second data line DL2, such that the center line NTC1 of the first non-transmissive region is interposed therebetween.

[0100] The second line portion DL-2 of each of the first data line DL1 and the second data line DL2 can be disposed on the second side of the center line NTC1 of the first non-transmissive region. When the second line portion DL-2 of each of the first data line DL1 and the second data line DL2 overlaps with at least a portion of the second sub-pixel SP2, the second circuit region CA2 of the second sub-pixel SP2 can be disposed on the first side of the center line NTC1 of the first non-transmissive region. The second circuit region CA2 of the second sub-pixel SP2 can face the second line portion DL-2 of the first data line DL1 and the second data line DL2, such that the center line NTC1 of the first non-transmissive region is interposed therebetween.

[0101] Furthermore, since the third data line DL3 and the fourth data line DL4 are symmetrical to the first data line DL1 and the second data line DL2, the second line portion DL-2 of each of the third data line DL3 and the fourth data line DL4 can be configured to face the first line portion DL-1 of each of the first data line DL1 and the second data line DL2, with the transmission region TA interposed therebetween. Additionally, the first line portion DL-1 of each of the third data line DL3 and the fourth data line DL4 can be configured to face the second line portion DL-2 of each of the first data line DL1 and the second data line DL2, with the transmission region TA interposed therebetween.

[0102] The connecting portion DL-3 connects the first line portion DL-1 and the second line portion DL-2. The first line portion DL-1 and the second line portion DL-2 can be alternately arranged along the first non-transmissive region NTA1 and can be spaced apart from each other in the crossing region IA. The connecting portion DL-3 connects the first line portion DL-1 and the second line portion DL-2, which are spaced apart from each other in the crossing region IA. Since the first line portion DL-1 and the second line portion DL-2 are alternately arranged along the first non-transmissive region NTA1, the connecting portion DL-3 arranged in the crossing regions IA adjacent to each other in the first direction can extend relative to each other. Furthermore, since the corresponding data lines DL1, DL2, DL3, and DL4 are symmetrical to each other when the transmissive region TA is inserted therebetween, the connecting portion DL-3 arranged in the crossing regions IA adjacent to each other in the second direction can extend relative to each other.

[0103] The connecting portion DL-3 of each of the first data line DL1, the second data line DL2, the third data line DL3, and the fourth data line DL4 can be provided only in the crossover area IA. Therefore, the length of each of the first data line DL1, the second data line DL2, the third data line DL3, and the fourth data line DL4 can be reduced, and the RC delay (or load) can also be reduced. Furthermore, the inclined connecting portion DL-3 is not formed between two adjacent crossover areas IA, thereby ensuring sufficient space to accommodate two of the circuit areas CA1, CA2, CA3, and CA4. Therefore, since the circuit areas CA1, CA2, CA3, and CA4 do not protrude towards the transmission area TA, the light transmittance does not need to be reduced.

[0104] In addition, a second signal line SL2 may include a first scan line SCANL1 and a second scan line SCANL2, and another first signal line SL1 adjacent to it in the first direction may include a third scan line SCANL3 and a fourth scan line SCANL4.

[0105] At this time, the first scan line SCANL1 and the second scan line SCANL2 can be set parallel to each other in the second non-transmissive region NTA2. For example... Figure 4 As shown, the third scan line SCANL3 can be configured to be symmetrical to the second scan line SCANL2, with the transmission region TA interposed between them. That is, the third scan line SCANL3 can be symmetrical to the second scan line SCANL2 based on the center line TC2 of the second transmission region. The fourth scan line SCANL4 can be configured to be symmetrical to the first scan line SCANL1, with the transmission region TA interposed between them. That is, the fourth scan line SCANL4 can be symmetrical to the first scan line SCANL1 based on the center line TC2 of the second transmission region.

[0106] Each of the first scan line SCANL1, the second scan line SCANL2, the third scan line SCANL3, and the fourth scan line SCANL4 may include a first line portion SCANL-1, a second line portion SCANL-2, and a connecting portion SCANL-3.

[0107] The first line portion SCANL-1 can be positioned on the third side of the center line NTC2 of the second non-transparent region, which is parallel to the second direction, within the second non-transparent region NTA2. In this case, the circuit region of the sub-pixel can be positioned on the fourth side of the center line NTC2 of the second non-transparent region, facing the first line portion SCANL-1, with the center line NTC2 of the second non-transparent region interposed therebetween.

[0108] The second line portion SCANL-2 can be positioned on the fourth side of the center line NTC2 of the second non-transparent region. In this case, the circuit region of the sub-pixel can be positioned on the third side of the center line NTC2 of the second non-transparent region, facing the second line portion SCANL-2, with the center line NTC2 of the second non-transparent region interposed therebetween.

[0109] For example, the first line portion SCANL-1 of each of the first scan line SCANL1 and the second scan line SCANL2 can be disposed on the third side of the center line NTC2 of the second non-transmissive region. When the first line portion SCANL-1 of each of the first scan line SCANL1 and the second scan line SCANL2 overlaps with at least a portion of the third sub-pixel SP3, the third circuit region CA3 of the third sub-pixel SP3 can be disposed on the fourth side of the center line NTC2 of the second non-transmissive region. The third circuit region CA3 of the third sub-pixel SP3 can face the first line portion SCANL-1 of each of the first scan line SCANL1 and the second scan line SCANL2, such that the center line NTC2 of the second non-transmissive region is interposed therebetween.

[0110] The second line portion (SCANL-2) of each of the first scan lines SCANL1 and SCANL2 can be disposed on the fourth side of the center line NTC2 of the second non-transmissive region. When the second line portion (SCANL-2) of each of the first scan lines SCANL1 and SCANL2 overlaps with at least a portion of the fourth sub-pixel SP4, the fourth circuit region (CA4) of the fourth sub-pixel SP4 can be disposed on the third side of the center line NTC2 of the second non-transmissive region. The fourth circuit region (CA4) of the fourth sub-pixel SP4 can face the second line portion (SCANL-2) of the first scan lines SCANL1 and SCANL2, such that the center line NTC2 of the second non-transmissive region is interposed therebetween.

[0111] Furthermore, since the third scan line SCANL3 and the fourth scan line SCANL4 are symmetrical to the first scan line SCANL1 and the second scan line SCANL2, the second line portion SCANL-2 of each of the third scan line SCANL3 and the fourth scan line SCANL4 can be configured to face the first line portion SCANL-1 of each of the first scan line SCANL1 and the second scan line SCANL2, with the transmission region TA interposed therebetween. Additionally, the first line portion SCANL-1 of each of the third scan line SCANL3 and the fourth scan line SCANL4 can be configured to face the second line portion SCANL-2 of each of the first scan line SCANL1 and the second scan line SCANL2, with the transmission region TA interposed therebetween.

[0112] The connecting portion SCANL-3 connects the first line portion SCANL-1 to the second line portion SCANL-2. The first line portion SCANL-1 and the second line portion SCANL-2 can be alternately arranged along the second non-transmissive region NTA2 and can be spaced apart from each other in the intersection region IA. The connecting portion SCANL-3 connects the first line portion SCANL-1 and the second line portion SCANL-2, which are spaced apart from each other in the intersection region IA. Since the first line portion SCANL-1 and the second line portion SCANL-2 are alternately arranged along the second non-transmissive region NTA2, the connecting portion SCANL-3 arranged in the intersection regions IA adjacent to each other in the second direction can extend relative to each other. Furthermore, since the corresponding scan lines SCANL1, SCANL2, SCANL3, and SCANL4 are symmetrical to each other when the transmissive region TA is interposed therebetween, the connecting portion SCANL-3 arranged in the intersection regions IA adjacent to each other in the first direction can extend relative to each other.

[0113] The connecting portion SCANL-3 of each of the first scan line SCANL1, the second scan line SCANL2, the third scan line SCANL3, and the fourth scan line SCANL4 can be set only in the cross region IA. Therefore, the length of each of the first scan line SCANL1, the second scan line SCANL2, the third scan line SCANL3, and the fourth scan line SCANL4 can be reduced, and the RC delay (or load) can also be reduced. Furthermore, the inclined connecting portion SCANL-3 is not formed between two adjacent cross regions IA, thereby ensuring sufficient space to set two of the circuit regions CA1, CA2, CA3, and CA4. Therefore, since the circuit regions CA1, CA2, CA3, and CA4 do not protrude towards the transmission region TA, the transmittance does not need to be reduced.

[0114] As described above, two of the data lines DL1, DL2, DL3, and DL4 can have the same data input order, while the other two data lines can have the same data input order. Specifically, the first data line DL1 and the third data line DL3 have the same data input order, and the second data line DL2 and the fourth data line DL4 can have the same data input order.

[0115] Furthermore, the first data line DL1 and the third data line DL3 can alternately input data (or data voltage) to two of the four sub-pixels SP1, SP2, SP3, and SP4. For example, each of the first data line DL1 and the third data line DL3 can be alternately connected along a first direction to a second circuit region CA2 located in the second sub-pixel SP2 and a third circuit region CA3 located in the third sub-pixel SP3. That is, as... Figure 4 As shown, the first data line DL1 can be sequentially connected along a first direction to the third circuit region CA3 disposed in the third sub-pixel SP3 of the first pixel P1, the second circuit region CA2 disposed in the second sub-pixel SP2 of the first pixel P1, the third circuit region CA3 disposed in the third sub-pixel SP3 of the third pixel P3, and the second circuit region CA2 disposed in the second sub-pixel SP2 of the third pixel P3. Figure 4 As shown, the third data line DL3 can be sequentially connected along the first direction to the third circuit region CA3 in the third sub-pixel SP3 of the second pixel P2, the second circuit region CA2 in the second sub-pixel SP2 of the second pixel P2, the third circuit region CA3 in the third sub-pixel SP3 of the fourth pixel P4, and the second circuit region CA2 in the second sub-pixel SP2 of the fourth pixel P4.

[0116] In this configuration, the data (or data voltage) input to the second circuit region CA2 and the data (or data voltage) input to the third circuit region CA3 can be alternately input to each of the first data line DL1 and the third data line DL3 along the first direction. When the second sub-pixel SP2 is a blue sub-pixel and the third sub-pixel SP3 is a green sub-pixel, the data (or data voltage) input to the green sub-pixel G and the data (or data voltage) input to the blue sub-pixel B can be alternately input to each of the first data line DL1 and the third data line DL3, as follows. Figure 5 As shown in the image.

[0117] Furthermore, the second data line DL2 and the fourth data line DL4 can alternately input data (or data voltage) to two of the four sub-pixels SP1, SP2, SP3, and SP4. For example, each of the second data line DL2 and the fourth data line DL4 can be alternately connected along a first direction to a first circuit region CA1 disposed in the first sub-pixel SP1 and a fourth circuit region CA4 disposed in the fourth sub-pixel SP4. That is, as... Figure 4 As shown, the second data line DL2 can be sequentially connected along the first direction to the first circuit region CA1 disposed in the first sub-pixel SP1 of the first pixel P1, the fourth circuit region CA4 disposed in the fourth sub-pixel SP4 of the first pixel P1, the first circuit region CA1 disposed in the first sub-pixel SP1 of the third pixel P3, and the fourth circuit region CA4 disposed in the fourth sub-pixel SP4 of the third pixel P3. Figure 4 As shown, the fourth data line DL4 can be sequentially connected along the first direction to the first circuit region CA1 disposed in the first sub-pixel SP1 of the second pixel P2, the fourth circuit region CA4 disposed in the fourth sub-pixel SP4 of the second pixel P2, the first circuit region CA1 disposed in the first sub-pixel SP1 of the fourth pixel P4, and the fourth circuit region CA4 disposed in the fourth sub-pixel SP4 of the fourth pixel P4.

[0118] In this configuration, the data (or data voltage) input to the first circuit region CA1 and the data (or data voltage) input to the fourth circuit region CA4 can be alternately input to each of the second data line DL2 and the fourth data line DL4 along the first direction. When the first sub-pixel SP1 is a white sub-pixel and the fourth sub-pixel SP4 is a red sub-pixel, the data (or data voltage) input to the white sub-pixel W and the data (or data voltage) input to the red sub-pixel R can be alternately input to each of the second data line DL2 and the fourth data line DL4, as follows. Figure 5 As shown in the image.

[0119] Furthermore, two of the scan lines SCANL1, SCANL2, SCANL3, and SCANL4 configured as described above can have the same data input order, while the other two scan lines can have the same data input order. For example, the first scan line SCANL1 and the third scan line SCANL3 can have the same data input order, and the second scan line SCANL2 and the fourth scan line SCANL4 can have the same data input order.

[0120] Furthermore, the first scan line SCANL1 and the third scan line SCANL3 can alternately input data (or scan signals) to two of the four sub-pixels SP1, SP2, SP3, and SP4. For example, each of the first scan line SCANL1 and the third scan line SCANL3 can be alternately connected along the second direction to the first circuit region CA1 located in the first sub-pixel SP1 and the third circuit region CA3 located in the third sub-pixel SP3. That is, as... Figure 4 As shown, the first scan line SCANL1 can be sequentially connected along the second direction to the third circuit region CA3 disposed in the third sub-pixel SP3 of the first pixel P1, the first circuit region CA1 disposed in the first sub-pixel SP1 of the first pixel P1, the third circuit region CA3 disposed in the third sub-pixel SP3 of the second pixel P2, and the first circuit region CA1 disposed in the first sub-pixel SP1 of the second pixel P2. Figure 4 As shown, the third scan line SCANL3 can be sequentially connected along the second direction to the third circuit region CA3 disposed in the third sub-pixel SP3 of the third pixel P3, the first circuit region CA1 disposed in the first sub-pixel SP1 of the third pixel P3, the third circuit region CA3 disposed in the third sub-pixel SP3 of the fourth pixel P4, and the first circuit region CA1 disposed in the first sub-pixel SP1 of the fourth pixel P4.

[0121] In this case, the data (or scan signal) input to the first circuit region CA1 and the data (or scan signal) input to the third circuit region CA3 can be alternately input to each of the first scan line SCANL1 and the third scan line SCANL3 along the second direction. When the first sub-pixel SP1 is a white sub-pixel and the third sub-pixel SP3 is a green sub-pixel, the data (or scan signal) input to the green sub-pixel G and the data (or scan signal) input to the white sub-pixel W can be alternately input to each of the first scan line SCANL1 and the third scan line SCANL3, as follows. Figure 5 As shown in the image.

[0122] Furthermore, the second scan line SCANL2 and the fourth scan line SCANL4 can alternately input data (or scan signals) to two of the four sub-pixels SP1, SP2, SP3, and SP4. For example, each of the second scan line SCANL2 and the fourth scan line SCANL4 can be alternately connected along the second direction to the second circuit region CA2 located in the second sub-pixel SP2 and the fourth circuit region CA4 located in the fourth sub-pixel SP4. That is, as... Figure 4As shown, the second scan line SCANL2 can be sequentially connected along the second direction to the second circuit region CA2 disposed in the second sub-pixel SP2 of the first pixel P1, the fourth circuit region CA4 disposed in the fourth sub-pixel SP4 of the first pixel P1, the second circuit region CA2 disposed in the second sub-pixel SP2 of the second pixel P2, and the fourth circuit region CA4 disposed in the fourth sub-pixel SP4 of the second pixel P2. Figure 4 As shown, the fourth scan line SCANL4 can be sequentially connected along the second direction to the second circuit region CA2 in the second sub-pixel SP2 of the second pixel P2, the fourth circuit region CA4 in the fourth sub-pixel SP4 of the second pixel P2, the second circuit region CA2 in the second sub-pixel SP2 of the fourth pixel P4, and the fourth circuit region CA4 in the fourth sub-pixel SP4 of the fourth pixel P4.

[0123] In this case, the data (or scan signal) input to the second circuit region CA2 and the data (or scan signal) input to the fourth circuit region CA4 can be alternately input to each of the second scan line SCANL2 and the fourth scan line SCANL4 along the second direction. When the second sub-pixel SP2 is a blue sub-pixel and the fourth sub-pixel SP4 is a red sub-pixel, the data (or scan signal) input to the blue sub-pixel B and the data (or scan signal) input to the red sub-pixel R can be alternately input to each of the second scan line SCANL2 and the fourth scan line SCANL4, as follows. Figure 5 As shown in the image.

[0124] In a transparent display panel 110 according to one embodiment of the present disclosure, the data input order of the first data line DL1 can be matched with the data input order of the third data line DL3, and the data input order of the second data line DL2 can be matched with the data input order of the fourth data line DL4. Furthermore, in a transparent display panel 110 according to one embodiment of the present disclosure, the data input order of the first scan line SCANL1 can be matched with the data input order of the third scan line SCANL3, and the data input order of the second scan line SCANL2 can be matched with the data input order of the fourth scan line SCANL4.

[0125] Therefore, in a transparent display panel 110 according to one embodiment of the present disclosure, the data input order of adjacent pixels P can be matched with each other. For example, in a transparent display panel 110 according to one embodiment of the present disclosure, the data input order of the first pixel P1 can be matched with the data input order of the second pixel P2. Furthermore, in a transparent display panel 110 according to one embodiment of the present disclosure, the data input order of the third pixel P3 can be matched with the data input order of the fourth pixel P4. In this way, a transparent display panel 110 according to one embodiment of the present disclosure can simplify the algorithm by matching the data input order of adjacent pixels P with each other.

[0126] Furthermore, in a transparent display panel 110 according to one embodiment of the present disclosure, data for two sub-pixels can be alternately and repeatedly input to each of the data lines DL1, DL2, DL3, and DL4. Therefore, in a transparent display panel 110 according to one embodiment of the present disclosure, since the previously input data (or data voltage) in each of the plurality of pixels P1, P2, P3, and P4 is always the same, the charging rate between pixels P1, P2, P3, and P4 can be constant.

[0127] For example, it can be assumed that the data (or data voltage) for the green sub-pixel G, the data (or data voltage) for the blue sub-pixel B, the data (or data voltage) for the white sub-pixel W, and the data (or data voltage) for the green sub-pixel G are repeatedly input to the first data line DL1.

[0128] In this scenario, the same data may not be input before the green sub-pixel G. In some pixels, data (or data voltage) can be input to the green sub-pixel G of another pixel just before the data (or data voltage) is input to the green sub-pixel G of that pixel. In this way, when a green sub-pixel G changes to a green sub-pixel G, since these sub-pixels are of the same color, the same data voltage can be charged into the gate node of the driving transistor. Therefore, the data voltage used to drive the green sub-pixel G is continuously input to the corresponding pixel while the data voltage remains constant.

[0129] Furthermore, in some other pixels, data (or data voltage) can be input to the white sub-pixel W before the corresponding green sub-pixel G is input. In this way, when the white sub-pixel W changes to the green sub-pixel G, since these sub-pixels are of different colors, different data voltages may be charged into the gate node of the driving transistor. Therefore, the data voltage for driving the green sub-pixel G should be input to the corresponding pixel immediately, even before any data voltage is input.

[0130] As mentioned above, when the colors of the light emitted from the sub-pixels of the previous level are different, the amount of change in data voltage may be different. When data lines DL1, DL2, DL3, and DL4 have large RC delays, the data charging rates between pixels may differ, which may result in brightness differences between pixels P1, P2, P3, and P4.

[0131] In a transparent display panel 110 according to one embodiment of the present disclosure, in order to prevent brightness differences between pixels, data for two sub-pixels can be alternately and repeatedly input to each of the data lines DL1, DL2, DL3 and DL4.

[0132] For example, data (or data voltage) for the green sub-pixel G and data (or data voltage) for the blue sub-pixel B can be repeatedly input to each of the first data line DL1 and the third data line DL3, as follows: Figure 5 As shown in the image.

[0133] In this scenario, the same data can be input before the green sub-pixel G. That is, in all pixels, the data (or data voltage) can be input to the blue sub-pixel B just before the data (or data voltage) is input to the corresponding green sub-pixel G. Similarly, the same data can be input before the blue sub-pixel B. In all pixels, the data (or data voltage) can be input to the green sub-pixel G just before the data (or data voltage) is input to the corresponding blue sub-pixel B.

[0134] In this way, in the transparent display panel 110 according to one embodiment of the present disclosure, since the previous input data (or data voltage) in each of the plurality of pixels P1, P2, P3, and P4 is always the same, the data charging rate among pixels P1, P2, P3, and P4 can be constant. Therefore, in the transparent display panel 110 according to one embodiment of the present disclosure, uniform brightness with minimal differences can be maintained among different pixels.

[0135] Figure 6A This is a view illustrating the capacitance of a capacitor set in the third sub-pixel within the first pixel, and Figure 6B This is a view illustrating the capacitance of a capacitor included in the third sub-pixel of the second pixel. Figure 7A This is a view illustrating the capacitance of the capacitor included in the fourth sub-pixel of the first pixel, and Figure 7B This is a view illustrating the capacitance of the capacitor in the fourth sub-pixel included in the second pixel.

[0136] In a transparent display panel 110 according to one embodiment of the present disclosure, the capacitors Cst of sub-pixels of the same color disposed in each of the pixels disposed adjacent to each other in a second direction have corresponding capacitances that are different from each other.

[0137] Reference Figure 6A and Figure 6B In a transparent display panel 110 according to one embodiment of the present disclosure, the capacitor Cst3a of the third sub-pixel SP3 disposed in the first pixel P1 may have a different capacitance than the capacitor Cst3b of the third sub-pixel SP3 disposed in the second pixel P2.

[0138] Specifically, in the first pixel P1, the third circuit region CA3 of the third sub-pixel SP3 can be disposed on the third side (e.g., the upper side) of the first scan line SCANL1 and the second scan line SCANL2. On the other hand, in the second pixel P2, the third circuit region CA3 of the third sub-pixel SP3 can be disposed on the fourth side (e.g., the lower side) of the first scan line SCANL1 and the second scan line SCANL2. Therefore, the third circuit region CA3 disposed in the first pixel P1 and the second pixel P2 respectively can have different spacing distances from the first scan line SCANL1 and the second scan line SCANL2.

[0139] When the third circuit region CA3, respectively located in the first pixel P1 and the second pixel P2, is connected to the same scan line (e.g., the first scan line SCANL1) to receive the scan signal, the current transmitted to the capacitor Cst and the current transmission rate may differ depending on the distance between the second scan line SCANL2 and the capacitor Cst. The smaller the distance between the second scan line SCANL2 and the capacitor Cst, the larger the parasitic capacitance, and the smaller the current transmitted to the capacitor Cst and the current transmission rate.

[0140] The third circuit region CA3 of the first pixel P1 can be configured to be adjacent to the first scan line SCANL1 and spaced apart from the second scan line SCANL2, such that the first scan line SCANL1 and the pixel power line VDDL are interposed therebetween. In this case, the third circuit region CA3 of the first pixel P1 can be spaced apart from the second scan line SCANL2 by a first distance d1.

[0141] On the other hand, the third circuit region CA3 of the second pixel P2 can be configured to be adjacent to the second scan line SCANL2 and spaced apart from the first scan line SCANL1, so that the second scan line SCANL2 and the pixel power line VDDL are interposed therebetween. In this case, the third circuit region CA3 of the second pixel P2 can be spaced apart from the second scan line SCANL2 by a second distance d2 that is smaller than the first distance d1.

[0142] In other words, the distance between the third circuit region CA3 of the second pixel P2 and the second scan line SCANL2 is less than the distance between the third circuit region CA3 of the first pixel P1 and the second scan line SCANL2. Therefore, the parasitic capacitance between the capacitor Cst3b of the second pixel P2 and the second scan line SCANL2 is greater than the parasitic capacitance between the capacitor Cst3a of the first pixel P1 and the second scan line SCANL2. When the capacitor Cst3b of the second pixel P2 has the same capacitance as the capacitor Cst3a of the first pixel P1, the third sub-pixel SP3 of the second pixel P2 and the third sub-pixel SP3 of the first pixel P1 will have a difference in the current transmitted to capacitors Cst3a and Cst3b and the current transmission rate due to the difference in parasitic capacitance, thus resulting in a difference in brightness.

[0143] In a transparent display panel 110 according to one embodiment of the present disclosure, the capacitance of capacitor Cst3b of the second pixel P2, which has a large parasitic capacitance due to its small distance from the second scan line SCANL2, can be increased to prevent brightness differences between the third sub-pixels SP3. That is, capacitor Cst3b of the second pixel P2 can have a larger capacitance than capacitor Cst3a of the first pixel P1, which has a larger distance from the second scan line SCANL2.

[0144] In a transparent display panel 110 according to one embodiment of the present disclosure, the capacitor Cst3b of the third sub-pixel SP3 with large parasitic capacitance is formed to have an area larger than that of the capacitor Cst3a of the third sub-pixel SP3 with small parasitic capacitance. As a result, the difference in current and current transmission rate between the third sub-pixels SP3 can be reduced, and therefore, the brightness difference can be reduced.

[0145] Furthermore, parasitic capacitance can also occur between the pixel power line VDDL and the capacitor Cst. However, the third circuit region CA3, located in the first pixel P1 and the second pixel P2, is spaced at the same distance from the pixel power line VDDL, and therefore can have the same parasitic capacitance as the pixel power line VDDL. Therefore, the parasitic capacitance between the pixel power line VDDL and the capacitor Cst does not affect the brightness difference between the third sub-pixels SP3.

[0146] Reference Figure 7A and Figure 7B In a transparent display panel 110 according to one embodiment of the present disclosure, the capacitor Cst4a of the fourth sub-pixel SP4 disposed in the first pixel P1 may have a different capacitance than the capacitor Cst4b of the fourth sub-pixel SP4 disposed in the second pixel P2.

[0147] Specifically, in the first pixel P1, the fourth circuit region CA4 of the fourth sub-pixel SP4 can be disposed on the fourth side (e.g., the lower side) of the first scan line SCANL1 and the second scan line SCANL2. On the other hand, in the second pixel P2, the fourth circuit region CA4 of the fourth sub-pixel SP4 can be disposed on the third side (e.g., the upper side) of the first scan line SCANL1 and the second scan line SCANL2. Therefore, the fourth circuit region CA4 disposed in the first pixel P1 and the second pixel P2 respectively can have different spacing distances from the first scan line SCANL1 and the second scan line SCANL2.

[0148] When the fourth circuit region CA4, respectively located in the first pixel P1 and the second pixel P2, is connected to the same scan line (e.g., the second scan line SCANL2) to receive the scan signal, the current transmitted to the capacitor Cst and the current transmission rate may differ depending on the distance between the first scan line SCANL1 and the capacitor Cst. The smaller the distance between the first scan line SCANL1 and the capacitor Cst, the larger the parasitic capacitance, and the smaller the current transmitted to the capacitor Cst and the current transmission rate.

[0149] The fourth circuit region CA4 of the first pixel P1 can be configured to be adjacent to the second scan line SCANL2 and spaced apart from the first scan line SCANL1, with the second scan line SCANL2 and the pixel power line VDDL interposed therebetween. In this case, the fourth circuit region CA4 of the first pixel P1 can be spaced apart from the first scan line SCANL1 by a third distance d3.

[0150] On the other hand, the fourth circuit region CA4 of the second pixel P2 can be configured to be adjacent to the first scan line SCANL1 and spaced apart from the second scan line SCANL2, such that the first scan line SCANL1 and the pixel power line VDDL are interposed therebetween. In this case, the fourth circuit region CA4 of the second pixel P2 can be spaced apart from the first scan line SCANL1 by a fourth distance d4 that is smaller than the third distance d3.

[0151] In other words, the distance between the fourth circuit region CA4 of the second pixel P2 and the first scan line SCANL1 is less than the distance between the fourth circuit region CA4 of the first pixel P1 and the first scan line SCANL1. Therefore, the parasitic capacitance between the capacitor Cst4b of the second pixel P2 and the first scan line SCANL1 is greater than the parasitic capacitance between the capacitor Cst4a of the first pixel P1 and the first scan line SCANL1. When the capacitor Cst4b of the second pixel P2 has the same capacitance as the capacitor Cst4a of the first pixel P1, the fourth sub-pixel SP4 of the second pixel P2 and the fourth sub-pixel SP4 of the first pixel P1 will have a difference in the current transmitted to capacitors Cst4a and Cst4b and the current transmission rate due to the difference in parasitic capacitance, thus resulting in a difference in brightness.

[0152] In a transparent display panel 110 according to one embodiment of the present disclosure, the capacitance of capacitor Cst4b of the second pixel P2, which has a large parasitic capacitance due to its small distance from the first scan line SCANL1, can be increased to prevent brightness differences between the fourth sub-pixels SP4. That is, capacitor Cst4b of the second pixel P2 can have a larger capacitance than capacitor Cst4a of the first pixel P1, which has a larger distance from the first scan line SCANL1.

[0153] In a transparent display panel 110 according to one embodiment of the present disclosure, the capacitor Cst4b of the fourth sub-pixel SP4 with a large parasitic capacitance is formed to have an area larger than that of the capacitor Cst4a of the fourth sub-pixel SP4 with a small parasitic capacitance. As a result, the difference in current and current transmission rate between the fourth sub-pixels SP4 can be reduced, and therefore, the brightness difference can be reduced.

[0154] Furthermore, parasitic capacitance can also occur between the pixel power line VDDL and the capacitor Cst. However, since the fourth circuit region CA4, which is respectively located in the first pixel P1 and the second pixel P2, is spaced at the same distance from the pixel power line VDDL, it can have the same parasitic capacitance as the pixel power line VDDL. Therefore, the parasitic capacitance between the pixel power line VDDL and the capacitor Cst does not affect the brightness difference between the fourth sub-pixels SP4.

[0155] According to this disclosure, the following favorable effects can be obtained.

[0156] This disclosure provides a pixel structure that maximizes the transmissive region and minimizes the non-transmissive region, thereby maximizing light transmittance. This disclosure prevents the increase in the length of multiple signal lines when multiple signal lines and circuit regions are placed in the minimized non-transmissive region, and prevents a decrease in light transmittance due to the circuit regions by configuring the circuit regions not to protrude towards the transmissive region.

[0157] Furthermore, in the pixel structure proposed in this disclosure, data for two sub-pixels can be alternately and repeatedly input into each of the data lines. In this disclosure, in each of the plurality of pixels, the previous input data (or data voltage) is always the same, thereby preventing differences in data charging rates and brightness between pixels.

[0158] Furthermore, in the pixel structure proposed in this disclosure, the capacitance of the capacitor is designed differently to take into account the differences in parasitic capacitance, thereby preventing brightness differences between subpixels that emit light of the same color.

[0159] Those skilled in the art will understand that the present disclosure is not limited to the above-described embodiments and drawings, and various substitutions, modifications, and variations can be made in the present disclosure without departing from the spirit or scope thereof. Therefore, the scope of the present disclosure is defined by the appended claims, and all variations or modifications derived from the meaning, scope, and equivalent concepts of the claims fall within the scope of the present disclosure.

Claims

1. A transparent display device, the transparent display device comprising: A substrate having a transmissive region, a first non-transmissive region disposed between the transmissive regions in a first direction, and a second non-transmissive region disposed between the transmissive regions in a second direction. The first signal line extends along the first non-transmissive region in the first direction and in the intersection region where the first non-transmissive region and the second non-transmissive region intersect each other in a direction intersecting the first direction. as well as The second signal line extends along the second non-transmissive region in the second direction and extends in the intersection region in a direction intersecting the second direction. Wherein, two adjacent first signal lines are symmetrical to each other, with the transmission region interposed between them, and two adjacent second signal lines are symmetrical to each other, with the transmission region interposed between them, and The first signal line includes: a first line portion disposed on a first side of the center line of the first non-transparent region, which is parallel to the first direction; a second line portion disposed on a second side of the center line of the first non-transparent region; and a connecting portion connecting the first line portion and the second line portion in the intersection region.

2. The transparent display device according to claim 1, wherein, The two adjacent first signal lines are symmetrical to each other based on the center line of the first transmission region that passes through the center of the transmission region in the first direction, and the two adjacent second signal lines are symmetrical to each other based on the center line of the second transmission region that passes through the center of the transmission region in the second direction.

3. The transparent display device according to claim 1, wherein, The connection portion of the first signal line is only located in the intersection area.

4. The transparent display device according to claim 1, wherein the transparent display device further comprises a circuit region, the circuit region being provided with a first line portion of the first signal line inserted between the circuit regions and a center line of the first non-transparent region, or being provided with a second line portion of the first signal line inserted between the circuit regions and a center line of the first non-transparent region.

5. The transparent display device according to claim 1, wherein, The second signal line includes: a first line portion disposed on a third side of the center line of the second non-transparent region, which is parallel to the second direction; a second line portion disposed on a fourth side of the center line of the second non-transparent region; and a connecting portion connecting the first line portion and the second line portion in the intersection region.

6. The transparent display device according to claim 5, wherein, The connection portion of the second signal line is only located in the cross region.

7. The transparent display device according to claim 5, wherein the transparent display device further comprises a circuit region, the circuit region being provided with a first line portion of the second signal line inserted between the circuit regions and a center line of the second non-transparent region, or being provided with a second line portion of the second signal line inserted between the circuit regions and a center line of the second non-transparent region.

8. The transparent display device according to claim 1, further comprising: The first sub-pixel and the second sub-pixel are alternately arranged along the first signal line; as well as The third and fourth sub-pixels are alternately arranged along the second signal line.

9. The transparent display device according to claim 8, wherein, The first signal line includes: A first data line supplies data voltage to the second sub-pixel and the third sub-pixel; and The second data line supplies data voltage to the first sub-pixel and the fourth sub-pixel.

10. The transparent display device according to claim 9, wherein, The first data line is alternately connected along the first direction to a second circuit region disposed in the second sub-pixel and a third circuit region disposed in the third sub-pixel, and the second data line is alternately connected along the first direction to a first circuit region disposed in the first sub-pixel and a fourth circuit region disposed in the fourth sub-pixel.

11. The transparent display device according to claim 8, wherein, The second signal line includes: A first scan line supplies scan signals to the first sub-pixel and the third sub-pixel; and The second scan line supplies scan signals to the second sub-pixel and the fourth sub-pixel.

12. The transparent display device according to claim 11, wherein, The first scan line is alternately connected along the second direction to a first circuit region disposed in the first sub-pixel and a third circuit region disposed in the third sub-pixel, and the second scan line is alternately connected along the second direction to a second circuit region disposed in the second sub-pixel and a fourth circuit region disposed in the fourth sub-pixel.

13. The transparent display device according to claim 12, wherein, Each of the first to fourth circuit regions includes a capacitor, and two third circuit regions adjacent to each other in the second direction include capacitors having corresponding capacitances that are different from each other, and two fourth circuit regions adjacent to each other in the second direction include capacitors having corresponding capacitances that are different from each other.

14. The transparent display device according to claim 12, wherein, The second circuit is configured such that two third circuit regions adjacent to each other in the second direction have different spacing distances from the second scan line, and two fourth circuit regions adjacent to each other in the second direction have different spacing distances from the first scan line.

15. A transparent display device, the transparent display device comprising: A substrate having a transmissive region, a first non-transmissive region disposed between the transmissive regions in a first direction, and a second non-transmissive region disposed between the transmissive regions in a second direction. First scan line and second scan line, the first scan line and the second scan line extend along the second non-transmissive region in the second direction and extend from the intersection region where the first non-transmissive region and the second non-transmissive region intersect each other in the oblique direction; A third scan line is configured to be symmetrical to the second scan line, with the transmission region interposed therebetween; as well as A fourth scan line is configured to be symmetrical to the first scan line, with the transmission region interposed therebetween.

16. The transparent display device according to claim 15, further comprising: A first data line and a second data line are arranged along the first non-transparent region in the first non-transparent region and extend from the intersection region in an inclined direction. A third data line is configured to be symmetrical with the second data line, such that the transmission region is interposed therebetween. as well as A fourth data line is configured to be symmetrical to the first data line, such that the transmission region is interposed therebetween.

17. The transparent display device according to claim 16, wherein, Each of the first to the fourth data lines includes: a first line portion disposed on a first side of the center line of the first non-transparent region, which is parallel to the first direction; a second line portion disposed on a second side of the center line of the first non-transparent region; and a connecting portion that connects the first line portion and the second line portion in the intersection region, and the connecting portion is disposed only in the intersection region.

18. The transparent display device according to claim 15, wherein, Each of the first to the fourth scan lines includes: a first line portion disposed on a third side of the center line of the second non-transmissive region, which is parallel to the second direction; a second line portion disposed on a fourth side of the center line of the second non-transmissive region; and a connecting portion that connects the first line portion and the second line portion in the intersection region, and the connecting portion is disposed only in the intersection region.

19. The transparent display device according to claim 15, further comprising: A first sub-pixel and a second sub-pixel are alternately disposed along the first direction in the first non-transmissive region; The third sub-pixel and the fourth sub-pixel are alternately disposed in the second non-transmissive region along the second direction; A first circuit region is set in the first sub-pixel; The second circuit region is set in the second sub-pixel; The third circuit region is disposed in the third sub-pixel; and The fourth circuit region is set in the fourth sub-pixel. The first to the fourth sub-pixels emit light of different colors.

20. The transparent display device according to claim 19, wherein, Each of the first scan line and the third scan line is alternately connected to the first circuit region and the third circuit region along the second direction, and each of the second scan line and the fourth scan line is alternately connected to the second circuit region and the fourth circuit region along the second direction.

21. The transparent display device according to claim 20, wherein, The second circuit is configured such that two third circuit regions adjacent to each other in the second direction have different spacing distances from the second scan line, and two fourth circuit regions adjacent to each other in the second direction have different spacing distances from the first scan line.

22. The transparent display device according to claim 20, wherein, Each of the first to fourth circuit regions includes a capacitor, and two third circuit regions adjacent to each other in the second direction include capacitors having corresponding capacitances that are different from each other, and two fourth circuit regions adjacent to each other in the second direction include capacitors having corresponding capacitances that are different from each other.

23. The transparent display device according to claim 22, wherein, The capacitance of the capacitor in the third circuit region with a smaller distance from the second scan line among two adjacent third circuit regions in the second direction is set to be greater than the capacitance of the capacitor in the third circuit region with a larger distance from the second scan line. The capacitance of the capacitor in the fourth circuit region that is closer to the first scan line than the capacitance of the capacitor in the fourth circuit region that is closer to the first scan line than the capacitance of the capacitor in the fourth circuit region that is closer to the first scan line.

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