Flyback power converter and associated control method

Abstract

A flyback power converter and related control method convert an input power source located on the primary side into an output power source located on the secondary side. The flyback power converter includes a signal transmission device and a secondary-side controller. The signal transmission device is connected to both the primary and secondary sides and is configured to generate a compensation signal on the primary side, which controls the conversion power from the primary side to the secondary side. The secondary-side controller is located on the secondary side and connected to the output power source and the signal transmission device, and is configured to perform the following actions: monitor the output power source; generate a representative signal that represents the characteristics of the output power source; maintain a count that does not change with a clock when the representative signal falls within a first range relative to a reference target; change the count according to a clock when the representative signal falls within a second range different from the first range; and generate a drive current based on the count to control the signal transmission device.

Description

Technical Field

[0001] This invention generally relates to feedback control of flyback power converters, and more particularly to a secondary-side controller and related control method that provides feedback control on the primary side of a flyback power converter. Background Technology

[0002] A flyback power converter alters the primary winding current of a transformer to induce voltage and current in the secondary winding. After rectification, these inducers establish an output power supply. A flyback power converter can provide DC isolation between the primary and secondary sides. In other words, the primary input ground can be independent of the secondary output ground.

[0003] To control the output voltage or current of the power supply, the secondary-side controller on the secondary side of the flyback power converter needs to monitor the output voltage or current and establish an appropriate closed-loop control system to regulate the power conversion from the primary side to the secondary side. To ensure output voltage or current stability, the loop gain of the closed-loop control system must be properly designed; for example, it needs sufficient phase margin or gain margin, or the loop gain should have appropriate zeros and poles.

[0004] When the secondary controller is an integrated circuit, the zeros and poles required for a stable control system can be created by using external components such as resistors and capacitors. However, the disadvantage is that in addition to increasing the cost of external resistors and capacitors, the secondary controller may also need additional pins to electrically connect to those external components.

[0005] Another approach to stabilizing the control system is to integrate a fully digital proportional-integral-derivative (PID) controller within the secondary controller to process the digitized output voltage or current information. However, such a secondary controller often requires high-resolution analog-to-digital conversion and a large number of floating-point operations, all of which necessitate a considerably large chip area. Summary of the Invention

[0006] This invention provides a flyback power converter that converts an input power source located on a primary side into an output power source located on a secondary side. The flyback power converter includes a signal transmission device and a secondary-side controller. The signal transmission device is connected to both the primary and secondary sides and is configured to generate a compensation signal on the primary side, which controls the conversion power from the primary side to the secondary side. The secondary-side controller is located on the secondary side and connected to the output power source and the signal transmission device, and is configured to perform the following operations: monitor the output power source; generate a representative signal representing a characteristic of the output power source; maintain a count that does not change with a clock when the representative signal falls within a first range relative to a reference target; change the count according to the clock when the representative signal falls within a second range different from the first range; and generate a drive current based on the count to control the signal transmission device.

[0007] This feature can be either an output voltage or an output current of the output power supply.

[0008] This invention provides a control method applicable to a flyback power converter. The flyback power converter converts an input power source located on a primary side into an output power source located on a secondary side. The control method includes: monitoring the output power source; generating a representative signal representing a characteristic of the output power source; maintaining a count so that it does not change with a clock when the representative signal falls within a first range relative to a reference target; changing the count according to the clock when the representative signal falls within a second range different from the first range; and generating a drive current based on the count to control a compensation signal output by a signal transmission device. The signal transmission device is connected to both the primary and secondary sides, configured to generate the compensation signal on the primary side, which can control a conversion power from the primary side to the secondary side. Attached Figure Description

[0009] Figure 1 This is a flyback power converter 100 implemented according to the present invention.

[0010] Figure 2 This shows the secondary-side controller 124A implemented according to the present invention.

[0011] Figure 3 Displays the signal waveform of the feedback voltage VFB.

[0012] Figure 4 The control method 300 applicable to the secondary-side controller 124A is shown.

[0013] Figure 5 This shows the secondary-side controller 124B implemented according to the present invention.

[0014] Figure 6 The control method 400 applicable to the secondary side controller 124B is shown.

[0015] Figure 7 and Figure 8 The secondary-side controllers 124C and 124D implemented according to the present invention are shown.

[0016] [Symbol Explanation]

[0017] 100 flyback power converter

[0018] 102 Transformer

[0019] 104 Pulse Width Modulation Generator

[0020] 106 Power Switch

[0021] 108 compensation capacitor

[0022] 110 rectifier diode

[0023] Output capacitors 112 and 114

[0024] 116 Output Switch

[0025] 118 Current sensing resistor

[0026] 120 current-limiting resistor

[0027] 122 Optical Coupler

[0028] Secondary controllers 124, 124A, 124B, 124C, and 124D

[0029] 126 USB connection ports

[0030] 128 Input Location

[0031] 130 Output Location

[0032] 202, 204 voltage divider resistors

[0033] 206 Analog-to-Digital Converter

[0034] 208 Subtractors

[0035] 210, 220 counters

[0036] 212 Auxiliary compensation device

[0037] 214 Digital-to-Analog Converter

[0038] 300, 400 control methods

[0039] 606 operational amplifier

[0040] 602 and 604 resistors

[0041] CLK clock

[0042] CNT count

[0043] COMP compensation points

[0044] D_VFB digital signal

[0045] D_VREF reference digital signal

[0046] DLP1, DLN1 (dashed lines)

[0047] ERR error signal

[0048] ERR+, ERR+ preset values

[0049] IAUX auxiliary current

[0050] I CC Output current

[0051] IDR drive current

[0052] IN Input power line

[0053] ISEN pin

[0054] LP main winding

[0055] N_CTL control points

[0056] OPTO contact

[0057] PRM Junior Side

[0058] S300, S302, S304, S306, S308, S402 Steps

[0059] S COMP Compensation signal

[0060] SEC secondary side

[0061] UIN Input Power

[0062] UVCC output power supply

[0063] V CC Output voltage

[0064] VCC power cord

[0065] VFB feedback voltage

[0066] VREF reference voltage

[0067] VREF+, VREF- Preset Values

[0068] V SEN Detection voltage

[0069] Ranges ZH, Z1+, Z2+, Z1-, Z2-, Z+, Z- Detailed Implementation

[0070] In this specification, some identical symbols are used to represent elements having the same or similar structure, function, or principle, which can be inferred by those skilled in the art based on the teachings of this specification. For the sake of brevity, elements with the same symbols will not be repeated.

[0071] According to some embodiments of the present invention, a flyback power converter converts an input power source located on a primary side into an output power source located on a secondary side. The flyback power converter has a secondary-side controller that monitors the output power source and generates a representative signal representing either the output voltage or the output current of the output power source. When the representative signal falls within a first range relative to a reference target, a counter in the secondary-side controller maintains a count that remains unchanged with a clock. When the representative signal falls within a second range different from the first range, the counter changes its count according to the clock. The count is converted into a drive current via a digital-to-analog converter to control a signal transmission device, thereby controlling a compensation signal on the primary side. The flyback power converter has a pulse width modulation generator on the primary side that controls the conversion power from the primary side to the secondary side based on the compensation signal. Therefore, the representative signal is maintained approximately near the reference target.

[0072] This flyback power converter uses a counter on the secondary side to influence the compensation signal, providing feedback control. Therefore, with proper design, this flyback power converter may be able to achieve a closed-loop control system with stable output voltage or output current without additional external components or floating-point operations. However, the above are only possible advantages of the present invention, and embodiments of the present invention are not limited to the absence of external components or floating-point operations.

[0073] Figure 1 According to the flyback power converter 100 implemented in this invention, the input power supply UIN located on the primary side PRM can be converted into the output power supply UVCC located on the secondary side SEC. The flyback power converter 100 is connected to the input power supply UIN via the input power line IN and the input ground 128, and generates the output power supply UVCC via the power line VCC and the output ground 130, having an output voltage V.CC With output current I CC This is used to supply power to a load, for example, an electronic device connected to USB port 126.

[0074] The flyback power converter 100 includes a transformer 102, a pulse width modulation generator 104, a power switch 106, a compensation capacitor 108, a rectifier diode 110, output capacitors 112 and 114, an output switch 116, a current sensing resistor 118, a current limiting resistor 120, an optocoupler 122, and a secondary-side controller 124.

[0075] On the primary side PRM, the primary winding LP of transformer 102 is connected in series with power switch 106 between input power line IN and input ground 128. Pulse width modulation generator 104 controls power switch 106 to change the winding current flowing through primary winding LP.

[0076] Because of the voltage and current changes in the primary winding LP, an induced current and voltage are generated in the secondary winding LS of the secondary side SEC. After rectification, these can establish the output power supply UVCC on the output capacitor 112. When the output power supply UVCC is appropriate, the secondary side controller 124 can turn on the output switch 116 through the control point N_CTL, so that the output power supply UVCC supplies power to the USB connection port 126.

[0077] In one embodiment, the secondary-side controller 124 is an integrated circuit that can monitor the output voltage V of the output power supply UVCC via the power supply line VCC. CC The output current I of the output power supply UVCC can be monitored via the ISEN pin. CC Its current sensing resistor is 118Ω. Output voltage V CC With output current I CC These are all characteristics of the output power supply UVCC. The secondary-side controller 124 can compare the output voltage V. CC With target voltage V TAR ( Figure 1 (Not shown), based on their differences, the current flowing through optocoupler 122 and current-limiting resistor 120 is controlled via contact OPTO. Optocoupler 122 is a signal transmission device connected to both the primary side PRM and the secondary side SEC, configured to generate a compensation signal S at the compensation point COMP of the primary side PRM. COMP The pulse width modulation generator 104 operates based on the compensation signal S. COMP This controls the duty cycle of the power switch 106, thereby controlling the switching power from the primary side PRM to the secondary side SEC. For example, when the output voltage V... CCBelow the target voltage V TAR At this time, the secondary-side controller 124 reduces the drive current IDR flowing through the optocoupler 122 and the current-limiting resistor 120, so the compensation signal S COMP The increased duty cycle of power switch 106 leads to an increased switching power from the primary side PRM to the secondary side SEC, thus allowing the output voltage V to increase. CC The output voltage V increases. Therefore, the flyback power converter 100 has a closed-loop control system that uses a negative feedback mechanism to aim to increase the output voltage V. CC Approximately stabilized at the target voltage V TAR Similarly, the flyback power converter 100 can also have another closed-loop control system inside to ensure that the output current I... CC Not greater than the target current I TAR ( Figure 1 (Not displayed).

[0078] Figure 2 The secondary-side controller 124A implemented according to the present invention is applicable to... Figure 1 The secondary-side controller 124A includes voltage divider resistors 202 and 204, an analog-to-digital converter 206, a subtractor 208, a counter 210, an auxiliary compensation device 212, and a digital-to-analog converter 214.

[0079] Voltage divider resistors 202 and 204 are connected to the output power supply UVCC via the power supply line VCC and output ground 130. Voltage divider resistors 202 and 204 are connected in series between the power supply line VCC and output ground 130, generating a feedback voltage VFB at their connection point. The feedback voltage VFB can represent the output voltage V. CC ,because Figure 2 The feedback voltage VFB is approximately proportional to the output voltage V. CC .

[0080] The analog-to-digital converter 206 converts the feedback voltage VFB to obtain the digital signal D_VFB, which is the digital form of the feedback voltage VFB.

[0081] Subtractor 208 acts as a comparator, comparing the digital signal D_VFB with the reference digital signal D_VREF. The reference digital signal D_VREF is the digital form of the reference voltage VREF, which can be provided by a microprocessor (not shown) within the secondary-side controller 124A. The reference voltage VREF is a reference target, corresponding to the target voltage V. TAR For example, subtractor 208 subtracts the reference digital signal D_VREF from the digital signal D_VFB, generating an error signal ERR. The error signal ERR can represent the difference between the feedback voltage VFB and the reference voltage VREF.

[0082] Figure 3 The display shows the signal waveform of the feedback voltage VFB, where the vertical axis represents the feedback voltage VFB or the error signal ERR, one in analog form and the other in digital form; the horizontal axis represents time t. Negative feedback control aims to ensure that the feedback voltage VFB eventually stabilizes approximately at the reference voltage VREF over time, as... Figure 3 As shown. Figure 3 It also displays several ranges relative to the reference voltage VREF: ZH, Z1+, Z2+, Z1-, Z2-, Z+, Z-, etc. (Similar to...) Figure 3 As shown, the range ZH lies between the dashed lines DLP1 and DLN1, while the reference voltage VREF lies within the range ZH. The dashed line DLP1 crosses the vertical axis at points where the feedback voltage VFB equals the preset value VREF+, or where the error signal ERR equals the preset value ERR+. The dashed line DLN1 crosses the vertical axis at points where the feedback voltage VFB equals the preset value VREF-, or where the error signal ERR equals the preset value ERR-. In one embodiment, the reference voltage VREF is the average of the preset values ​​VREF+ and VREF-. Above the range ZH, there are sequentially non-overlapping ranges Z1+, Z2+, etc. Below the range ZH, there are sequentially non-overlapping ranges Z1-, Z2-, etc. Figure 3 The range Z+ is also displayed, representing the area above the dashed line DLP1, encompassing ranges Z1+ and Z2+; the range Z- is displayed, representing the area below the dashed line DLN1, encompassing ranges Z1- and Z2-. For example, if the feedback voltage VFB belongs to the range ZH, it means that the feedback voltage VFB is between the preset value VREF+ and the preset value VREF-, or the error signal ERR is between the preset value ERR+ and the preset value ERR-. If the feedback voltage VFB belongs to the range Z+, it means that the feedback voltage VFB is greater than the preset value VREF+, or the error signal ERR is greater than the preset value ERR+. Figure 3 The ranges ZH, Z1+, Z2+, Z1-, Z2-, Z+, and Z- are all relative to the reference voltage VREF. If the reference voltage VREF changes, for example from 1V to 2.5V, all the ranges will change accordingly.

[0083] Please see Figure 2 and Figure 3Counter 210 generates a count CNT based on an error signal ERR and a clock CLK. In some embodiments, the clock CLK is provided by a microprocessor (not shown) within the secondary-side controller 124A. In one embodiment, when the error signal ERR indicates that the feedback voltage VFB is in the range ZH, counter 210 maintains the count CNT, preventing it from changing with the clock CLK. When the error signal ERR indicates that the feedback voltage VFB is in the range Z+, counter 210, triggered by the clock CLK, changes the count CNT, increasing it by a preset change value, such as 1. When the error signal ERR indicates that the feedback voltage VFB is in the range Z-, counter 210, triggered by the clock CLK, changes the count CNT, decreasing it by a preset change value, such as 1.

[0084] The digital-to-analog converter 214 converts the count CNT into a corresponding drive current IDR, which controls the optocoupler 122 via the contact OPTO.

[0085] The auxiliary compensation device 212 generates an auxiliary current IAUX based on the error signal ERR to change the drive current IDR. In one embodiment, when the error signal ERR indicates that the feedback voltage VFB belongs to the range ZH, Z1+, or Z1-, the auxiliary current IAUX is 0. When the error signal ERR indicates that the feedback voltage VFB belongs to the range Z2+, the auxiliary current IAUX is a positive preset value to increase the drive current IDR. When the error signal ERR indicates that the feedback voltage VFB belongs to the range Z2-, the auxiliary current IAUX is a negative preset value to decrease the drive current IDR. Simply put, when the error signal ERR indicates that the feedback voltage VFB deviates too much from the reference voltage VREF, the auxiliary compensation device 212 provides the auxiliary current IAUX to rapidly change the drive current IDR and increase the feedback gain.

[0086] This invention is not limited to only having Figure 3 The range shown in the figure can be defined in other embodiments to perform more fine-grained control. In one embodiment, Figure 3 Within the range Z2+, there is a range Z3+ (not shown), and within the range Z2-, there is a range Z3- (not shown). When the feedback voltage VFB belongs to the range Z2+, the auxiliary current IAUX provided by the auxiliary compensation device 212 is a first positive preset value; when the feedback voltage VFB belongs to the range Z3+, the auxiliary current IAUX is a second positive preset value, and the absolute value of the second positive preset value is greater than the absolute value of the first positive preset value. When the feedback voltage VFB belongs to the range Z2-, the auxiliary current IAUX is a first negative preset value; when the feedback voltage VFB belongs to the range Z3-, the auxiliary current IAUX is a second negative preset value, and the absolute value of the second negative preset value is greater than the absolute value of the first negative preset value.

[0087] Figure 4 This demonstrates a control method 300 applicable to the secondary-side controller 124A. Control method 300 includes steps S300, S302, S304, S306, and S308. Step S300 corresponds to the function of voltage divider resistors 202 and 204. Step S302 corresponds to the analog-to-digital converter 206 and subtractor 208. Step S304 corresponds to counter 210. Step S306 corresponds to digital-to-analog converter 214. Step S308 corresponds to auxiliary compensation device 212. Figure 4 It can be done Figure 1 , Figure 2 , Figure 3 This information is provided in the accompanying documentation and will not be elaborated upon further.

[0088] Figure 5 The secondary-side controller 124B implemented according to the present invention is applicable to... Figure 1 The secondary-side controller 124B includes voltage divider resistors 202 and 204, an analog-to-digital converter 206, a subtractor 208, a counter 220, and a digital-to-analog converter 214. The similarities and similarities between the secondary-side controller 124B and the secondary-side controller 124A can be understood from the previous teachings regarding the secondary-side controller 124A, and will not be repeated here.

[0089] The secondary controller 124B does not have the auxiliary compensation device 212 in the secondary controller 124A, and the counter 220 of the secondary controller 124B is different from the counter 210 of the secondary controller 124A.

[0090] Please see Figure 5 and Figure 3Counter 220 generates a count CNT based on the error signal ERR and the clock CLK. In some embodiments, the clock CLK is provided by a microprocessor (not shown) within the secondary-side controller 124B. In one embodiment, when the error signal ERR indicates that the feedback voltage VFB is in the range ZH, counter 220 maintains the count CNT, preventing it from changing with the clock CLK. When the error signal ERR indicates that the feedback voltage VFB is in the range Z1+, counter 220, triggered by the clock CLK, changes the count CNT by increasing it by a change value dN, for example, 1. When the error signal ERR indicates that the feedback voltage VFB is in the range Z2+, counter 220, triggered by the clock CLK, changes the count CNT by increasing it by another change value larger than the change value dN, for example, 2*dN. Similarly, when the error signal ERR indicates that the feedback voltage VFB is in the range Z1-, counter 220, triggered by the clock CLK, changes the count CNT by decreasing it by a change value dN. When the error signal ERR indicates that the feedback voltage VFB is within the range Z2-, the counter 220, triggered by the clock CLK, changes the count CNT, reducing it by another change value larger than the change value dN, such as 2*dN.

[0091] This invention is not limited to only having Figure 3 The range shown in the figure can be defined in other embodiments to perform more fine-grained control. In one embodiment, Figure 3 Within the range Z2+, there is a range Z3+, and within the range Z2-, there is a range Z3-. When the feedback voltage VFB belongs to the range Z3+, the count CNT increases by 4*dN with the clock CLK; when the feedback voltage VFB belongs to the range Z3-, the count CNT decreases by 4*dN with the clock CLK.

[0092] Simply put, when the error signal ERR indicates that the feedback voltage VFB deviates too much from the reference voltage VREF, the counter 220 causes the count CNT to change more rapidly with the clock CLK, thereby accelerating the change in the drive current IDR and increasing the feedback gain.

[0093] Figure 6 This displays a control method 400 applicable to the secondary-side controller 124B. Control method 400 includes steps S300, S302, S402, and S306. Step S300 corresponds to the function of voltage divider resistors 202 and 204. Step S302 corresponds to the analog-to-digital converter 206 and subtractor 208. S402 corresponds to counter 220. Step S306 corresponds to digital-to-analog converter 214. Figure 6 It can be done Figure 1 , Figure 3 , Figure 5 This information is provided in the accompanying documentation and will not be elaborated upon further.

[0094] The secondary-side controllers 124A and 124B are used as examples to illustrate how the present invention can be applied to stabilize the output voltage V. CC This is one characteristic of the output power supply UVCC, but the present invention is not limited thereto. The present invention can also be applied to other characteristics of a stable output power supply UVCC, such as the output current I... CC .

[0095] Figure 7 and Figure 8 The secondary-side controllers 124C and 124D implemented according to the present invention are both applicable to... Figure 1 In the middle, it is used to stabilize the output current I. CC . Figure 7 as well as Figure 8 respectively with Figure 2 as well as Figure 5 Similarity, where the sameness or similarity can be obtained through previous observations. Figure 2 and Figure 5 I learned this from his teachings, so I will not repeat it here.

[0096] Please see Figure 1 The detection voltage V on pin ISEN SEN This can roughly represent the output current I. CC . Figure 7 and Figure 8 In the middle, the detection voltage V SEN The signal is amplified by the amplifier consisting of operational amplifier 606, resistors 602 and 604, generating a feedback voltage VFB at the output of operational amplifier 606. Therefore, Figure 7 and Figure 8 The feedback voltage VFB corresponds to the detection voltage V. SEN It can also represent the output current I. CC .when Figure 1 When the secondary-side controller 124 is implemented as a secondary-side controller 124C or 124D, according to previous teachings, the output current I... CC It may be possible to stabilize at a preset current value corresponding to the reference voltage VREF.

[0097] The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made in accordance with the claims of the present invention shall be within the scope of the present invention.

Claims

1. A flyback power converter that converts an input power source located on the primary side into an output power source located on the secondary side, comprising: A signal transmission device is connected to both the primary side and the secondary side, configured to generate a compensation signal on the primary side, which can control the conversion power from the primary side to the secondary side. a secondary side controller, located at the secondary side, connected to the output power supply and the signal transfer device, wherein The secondary controller includes a counter that generates counts based on an error signal and a clock signal. The architecture performs the following actions: Monitor the output power supply and generate a representative signal that represents the characteristics of the output power supply. When the representative signal is within a first range relative to the reference target, the count is maintained so that it does not change with the clock. When the representative signal belongs to a second range different from the first range, the count is changed according to the clock. as well as Based on this count, a drive current is generated to control the signal transmission device. The secondary controller also includes: An auxiliary compensation device is used to generate an auxiliary current when the representative signal falls within the third range, in order to change the driving current. The second range encompasses the third range.

2. The flyback power converter of claim 1, wherein, The secondary controller also includes: A first analog-to-digital converter is used to convert the representative signal into a first digital signal; A comparator compares the first digital signal with a reference digital signal to generate the error signal; as well as A first digital-to-analog converter converts the count to control the drive current.

3. The flyback power converter of claim 1, wherein, The secondary controller is further structured to perform the following actions: When the representative signal belongs to the fourth range, the first change value of the count is changed according to the clock. as well as When the representative signal is within the fifth range, the second change value of the count is changed according to the clock, and the second change value is different from the first change value; The second range encompasses both the fourth and fifth ranges, and the fourth range is different from the fifth range.

4. The flyback power converter of claim 1, wherein, The signal transmission device is an optical coupler.

5. The flyback power converter of claim 1, wherein, The secondary-side controller includes a two-divider resistor connected to the output power supply to generate a feedback voltage that represents the output voltage.

6. A control method applicable to a flyback power converter that converts an input power supply located on the primary side into an output power supply located on the secondary side, the control method comprising: Monitor the output power supply and generate a representative signal that represents the characteristics of the output power supply. When the representative signal falls within the first range relative to the reference target, the count is maintained so that it does not change with the clock. When the representative signal belongs to a second range different from the first range, the count is changed according to the clock. as well as Based on this count, a drive current is generated to control a compensation signal output by the signal transmission device; The signal transmission device is connected to both the primary and secondary sides, and is configured to generate the compensation signal on the primary side, which can control the conversion power from the primary side to the secondary side. The counting is generated based on an error signal and a clock signal. The control method also includes: When the representative signal is in the third range, it is used to generate an auxiliary current to change the driving current; The second range encompasses the third range.

7. The control method as described in claim 6 further comprises: The analog-to-digital conversion transforms the representative signal into a first digital signal; The first digital signal is compared with a reference digital signal to generate the error signal; and The digital-to-analog conversion of this count controls the drive current; wherein The reference digital signal corresponds to the reference target.

8. The control method as described in claim 6 further comprises: When the representative signal falls within the fourth range, the first change value of the count is changed according to the clock; and When the representative signal is within the fifth range, the second change value of the count is changed according to the clock, and the second change value is different from the first change value; wherein The second range encompasses both the fourth and fifth ranges, and the fourth range is different from the fifth range.

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