Data driving device and display device including the same

Abstract

The present disclosure relates to a data driving apparatus and a display apparatus including the same, and more particularly, to a data driving apparatus capable of overdriving pixels of a display panel by using a power supply voltage of the data driving apparatus, thereby improving a slew rate and a display speed of a display apparatus, and a display apparatus including the same.

Description

Technical Field

[0001] Various embodiments generally relate to a data driving device and a display device including the data driving device. Background Technology

[0002] The display device includes a data processing unit called a timing controller, a data driving unit called a source driver, and a display panel. The data processing unit can be designed to provide image data, control data, and clock data for display to the data driving unit in a package.

[0003] The data driving device receives image data and provides a data voltage corresponding to the image data to the display panel, and the display panel displays an image corresponding to the data voltage.

[0004] In such a display device, it is necessary to adopt technologies to improve the slew rate and display speed in various components, and the adoption of technologies to improve display speed at the level of data processing device and data driving device is being actively researched. Summary of the Invention

[0005] In this context, one aspect of this disclosure provides a technique for improving the slew rate and display speed of a display device by using the power supply voltage of a data driving device to overdrive the pixels of the display panel.

[0006] On one hand, this disclosure provides a data driving device comprising: a buffer configured to output a data voltage of a pixel by using a power supply voltage to drive a pixel of a plurality of pixels connected to a data line; and a multiplexer configured to receive the power supply voltage, receive the data voltage from the buffer, output the power supply voltage to the data line to overdrive the pixel, and then output the data voltage to the data line.

[0007] The data driving device may further include a driving control circuit for determining whether a pixel is overdriven by comparing the pixel data of the pixel with the pixel data of another pixel located before the pixel.

[0008] The drive control circuit can compare the first most significant bit (MSB) included in the pixel data of the other pixel with the second most significant bit (MSB) included in the pixel data of the first pixel. If the first MSB and the second MSB are different, the circuit identifies the overdrive time in a preset lookup table based on the separation distance between the first pixel and the buffer, generates an overdrive control signal corresponding to the overdrive time, and sends the overdrive control signal to the multiplexer.

[0009] On the other hand, this disclosure provides a display device, comprising: a data processing device configured to transmit image data including pixel data of a plurality of pixels; a power management device configured to output a power supply voltage; and a data driving device configured to receive the image data, output a data voltage of the one pixel by using the power supply voltage and the image data in order to drive the one pixel connected to a data line, and output the power supply voltage to the data line to overdrive the one pixel before outputting the data voltage of the one pixel.

[0010] The data driving device may include a buffer that outputs the data voltage of the pixel to the data line. When the pixel is located at its shortest distance from the buffer compared to the distances of other pixels, the data driving device drives the pixel for the shortest time; and when the pixel is located at its longest distance from the buffer compared to the distances of other pixels, the data driving device drives the pixel for the longest time.

[0011] As can be clearly seen from the above description, according to the embodiments, since the pixels are driven using a power supply voltage higher than the maximum output voltage of the buffer, the slew rate and display speed of the display device can be improved compared to the existing scheme that drives the pixels using the voltage output from the buffer. Attached Figure Description

[0012] Figure 1 This is a configuration diagram of a display device according to an embodiment.

[0013] Figure 2 This diagram is used to illustrate the overdrive scheme of a general data drive device.

[0014] Figure 3 This is a configuration diagram of a data driving device according to an embodiment.

[0015] Figure 4 This is a diagram used to illustrate the overdrive scheme of the data driving device according to the embodiment.

[0016] Figure 5 and Figure 6 This diagram is used to illustrate the configuration of the pixel overdrive time for each pixel in the data driving device according to the embodiment.

[0017] Figure 7 This diagram is used to illustrate the configuration of the overdrive time for pixels in each pixel group in the data driving device according to the embodiment.

[0018] Figure 8This is a diagram used to illustrate the configuration of changing the size of pixel groups in each frame of the data driving device according to an embodiment.

[0019] Figure 9 This diagram is used to illustrate the configuration of determining whether an overdriven pixel is used in the data processing apparatus according to an embodiment. Detailed Implementation

[0020] Figure 1 This is a configuration diagram of a display device according to an embodiment.

[0021] refer to Figure 1 The display device 100 may include a display panel 110, a data driving device 120, a gate driving device 130, and a data processing device 140.

[0022] Multiple data lines DL and multiple gate lines GL can be arranged on the display panel 110. Furthermore, multiple pixels P can be arranged in the display panel 110. Multiple pixels P can be arranged adjacent to each other in the horizontal direction H and the vertical direction V of the display panel 110 to represent a quadrilateral. The quadrilateral is similar to a matrix. A group of multiple pixels P arranged in the horizontal direction H can be defined as a pixel row or horizontal line, and a group of multiple pixels P in the vertical direction V can be defined as a pixel column or vertical line.

[0023] The gate driving device 130 can supply a scan signal with an on or off voltage to the gate line GL. When the on-voltage scan signal is supplied to pixel P, the corresponding pixel P is connected to the data line DL, and when the off-voltage scan signal is supplied to pixel P, the connection between the corresponding pixel P and the data line DL is released.

[0024] The data driving device 120 supplies data voltage to the data line DL. Based on the scan signal, the data voltage supplied to the data line DL is transmitted to the pixel P connected to the data line DL.

[0025] The data processing unit 140 can supply various control signals to the gate driving unit 130 and the data driving unit 120. The data processing unit 140 can generate a gate control signal GCS to start scanning according to the timing implemented in each frame, and can send the gate control signal GCS to the gate driving unit 130. The data processing unit 140 can convert externally input image data into image data IMG to conform to the data format used in the data driving unit 120, and can output the image data IMG to the data driving unit 120. The data processing unit 140 can send a data control signal DCS to control the data driving unit 120, causing the data driving unit 120 to supply data voltage to each pixel P according to various timings.

[0026] At least one of the above-mentioned data driving device 120, gate driving device 130 and data processing device 140 may be included in an integrated circuit (IC).

[0027] although Figure 1 Although not shown, the display device 100 may also include a power management device for outputting power supply voltage to the data drive device 120.

[0028] The power management device can generate a common electrode voltage (VCOM) and output the common electrode voltage (VCOM) to the display panel 110, and can generate a gate low voltage (VGL) and a gate high voltage (VGH) and output the gate low voltage (VGL) and the gate high voltage (VGH) to the gate driving device 130.

[0029] The display device 100 according to the embodiment may be a device driven at high speed.

[0030] The data driving device 120 can precharge the pixel P by outputting an overdrive voltage to the pixel P to reduce the display time.

[0031] In other words, the data driving device 120 can precharge the pixel P by outputting an overdrive voltage to the pixel P to improve the slew rate and display speed.

[0032] like Figure 2 As shown, in the overdrive scheme of a general data drive device, before the buffer 1 outputs the data voltage V_data to the pixel P connected to the data line DL, the buffer 1 precharges the pixel P by outputting the overdrive voltage to the pixel P itself.

[0033] Buffer 1 outputs the data voltage V_data and the overdrive voltage by using the power supply voltage.

[0034] Since the maximum output voltage of buffer 1 is lower than the power supply voltage, there is a limitation in reducing display time even if buffer 1 outputs the overdrive voltage at its maximum value.

[0035] In an embodiment, to overcome this problem, the data driving device 120 uses the power supply voltage to overdrive the pixel P.

[0036] Its detailed description is as follows.

[0037] Figure 3 This is a configuration diagram of the data driving device 120 according to an embodiment.

[0038] refer to Figure 3The data drive device 120 may include a first latch circuit 310, a second latch circuit 320, a digital-to-analog converter (DAC) 330, a buffer 340, a multiplexer (MUX) 350, and a drive control circuit 360.

[0039] The first latch circuit 310 can latch image data (IMG). The first latch circuit 310 can temporarily store image data and then output the image data to the second latch circuit 320. The first latch circuit 310 can temporarily store image data and then output the image data to the second latch circuit 320 according to the clock of the shift register (not shown).

[0040] The second latch circuit 320 can latch image data. The second latch circuit 320 can temporarily store image data and then output the image data to the digital-to-analog converter 330. The second latch circuit 320 can temporarily store image data and then output the image data to the digital-to-analog converter 330 according to the clock of the shift register (not shown).

[0041] The digital-to-analog converter 330 can receive image data from the second latch circuit 320. The digital-to-analog converter 330 can generate a data voltage as an analog signal from the image data. The digital-to-analog converter 330 can select a grayscale voltage corresponding to the image data sent from the second latch circuit 320 based on a grayscale voltage with a preset step size generated from an externally input gamma reference voltage, and can output the selected grayscale voltage to a buffer 340.

[0042] Buffer 340 can receive data voltage V_data from digital-to-analog converter 330. Buffer 340 can amplify the data voltage V_data and output the amplified data voltage to data line DL.

[0043] Specifically, such as Figure 4 As shown, in order to drive pixel P among a plurality of pixels P connected to data line DL, buffer 340 can amplify the data voltage of pixel P and output the amplified data voltage by using the power supply voltage input from power supply voltage line PL. The plurality of pixels P connected to data line DL can be defined as a channel CH. In an embodiment, the data voltage can be either a positive data voltage or a negative data voltage, and buffer 340 can be either a positive buffer or a negative buffer. The power supply voltage can be at least one of analog power supply voltage (AVDD), half power supply voltage (HVDD), and ground voltage (GND).

[0044] The multiplexer 350 can receive the power supply voltage from the power supply voltage line PL and the data voltage from the buffer 340.

[0045] The multiplexer 350 can receive the drive control signal OD_CTR from the drive control circuit 360, which will be described later.

[0046] By using the overdrive control signal OD_CTR, the multiplexer 350 can overdrive the pixel P by outputting the power supply voltage to the data line DL.

[0047] After driving pixel P, multiplexer 350 can output the data voltage input from buffer 340 to data line DL. The data voltage output to data line DL can then be supplied to pixel P.

[0048] The aforementioned multiplexer 350 may include a first switching circuit S1 for selecting one of the two inputs (see...). Figure 4 ) and the second switching circuit S2 (see Figure 4 ).

[0049] The first switching circuit S1 receives the data voltage from the buffer 340. The second switching circuit S2 receives the power supply voltage from the power supply voltage line PL.

[0050] When the second switching circuit S2 is turned on by the overdrive control signal OD_CTR, the first switching circuit S1 can be turned off. Conversely, when the first switching circuit S1 is turned on, the second switching circuit S2 can be turned off.

[0051] In this embodiment, when the second switching circuit S2 is turned on, pixel P can be overdriven by the power supply voltage.

[0052] Since the power supply voltage is greater than the maximum output voltage of the buffer 340, the slew rate can be improved compared to existing schemes that use the voltage output from the buffer 340 to overdrive the pixel P. This fact also allows for improved display speed.

[0053] Furthermore, in this embodiment, the overdrive time of the multiplexer 350 can be differentiated based on the separation distance between each pixel P of the plurality of pixels P connected to the data line DL and the buffer 340. That is, the turn-on time of the second switching circuit S2 can be differentiated based on this separation distance.

[0054] Specifically, such as Figure 5 As shown, the multiplexer 350 can overdrive the first pixel P, which is located at the shortest distance NEAR from the buffer 340, with the shortest time T1 among multiple pixels P.

[0055] The multiplexer 350 can overdrive the Nth pixel P_N, which is located at the longest distance FAR (farthest) from the buffer 340, among multiple pixels P for the longest time T1×N.

[0056] As described above, the multiplexer 350 can increase the overdrive time of pixel P in proportion to the separation distance between the buffer 340 and pixel P.

[0057] This is because the data cable DL may contain resistive and capacitive components, and the resistive component of the data cable DL may increase proportionally with the length of the data cable DL. Therefore, as... Figure 6 As shown, pixel P1, located at the shortest distance NEAR from the buffer 340, can be overdriven with the shortest overdrive time T1 due to the low resistance component of the data line DL (see...). Figure 6 (DL_out).

[0058] On the other hand, compared to other pixels, the pixel P_N located at the longest distance FAR from the buffer 340 requires a relatively long overdrive time T1×N due to the high resistance component of the data line DL.

[0059] Therefore, in this embodiment, if pixel P is located at the shortest distance from buffer 340, multiplexer 350 can overdrive pixel P in the shortest time.

[0060] Conversely, if pixel P is located at the longest distance from buffer 340, multiplexer 350 can overdrive pixel P for the longest time.

[0061] although Figure 6 It is shown that regardless of the separation distance between buffer 340 and pixel P, multiplexer 350 turns off the first switch S1 after a preset time t. However, the embodiment is not limited to this, and multiplexer 350 can also differentiate the turn-off time of the first switch S1 according to the separation distance between buffer 340 and pixel P. Therefore, compared with conventional technology, the display time can be shortened.

[0062] The above describes the configuration that differentiates the overdrive time of each pixel P.

[0063] The following describes the configuration for setting the overdrive time of pixel P for each pixel group.

[0064] refer to Figure 7 Multiple pixels P connected to the data line DL can be divided into two or more pixel groups based on their separation distance from the buffer 340 (e.g., Figure 7 (G1, G2, and G3).

[0065] The overdrive time T1 of the first pixel group G1, which is separated from the buffer 340 by the shortest distance among two or more pixel groups, can be set to the shortest, and the overdrive time T3 of the last pixel group G3, which is separated from the buffer 340 by the longest distance among two or more pixel groups, can be set to the longest.

[0066] If a pixel to be overdriven by multiplexer 350 is to be included in the first pixel group G1, then multiplexer 350 can overdrive the pixel for an overdrive time T1 set for the first pixel group G1.

[0067] If a pixel to be overdriven by multiplexer 350 is to be included in the last pixel group G3, multiplexer 350 can overdrive the pixel for an overdrive time T3 set for the last pixel group G3.

[0068] The drive control circuit 360 can receive image data IMG from the data processing device 140. The image data IMG may include multiple pixel data.

[0069] The drive control circuit 360 can transmit the pixel data of another pixel located before one of the multiple pixels to the first latch circuit 310. The pixel data of the other pixel can then be stored in the second latch circuit 320 via the first latch circuit 310.

[0070] While the pixel data of the other pixel is stored in the second latch circuit 320, the drive control circuit 360 can transmit the pixel data of the first pixel to the first latch circuit 310.

[0071] The drive control circuit 360 can determine whether a pixel is overdriven by comparing the pixel data of the one pixel stored in the first latch circuit 310 with the pixel data of the other pixel stored in the second latch circuit 320.

[0072] The drive control circuit 360 can compare the first MSB (most significant bit) included in the pixel data of the other pixel with the second MSB included in the pixel data of the first pixel.

[0073] If the first MSB and the second MSB are different from each other, the drive control circuit 360 can check the overdrive time in a preset lookup table based on the separation distance between the pixel and the buffer 340 or the separation distance between the pixel group including the pixel and the buffer 340, and can generate an overdrive control signal OD_CTR corresponding to the checked overdrive time and transmit the overdrive control signal OD_CTR to the multiplexer 350.

[0074] If the first MSB and the second MSB are the same, the drive control circuit 360 can skip the overdrive of the pixel using the multiplexer 350, and can generate an overdrive control signal OD_CTR for directly outputting the data voltage of the pixel and transmit the overdrive control signal OD_CTR to the multiplexer 350.

[0075] The drive control circuit 360 can compare all the pixel data of the other pixel with all the pixel data of the first pixel.

[0076] In the embodiment, when an overdrive time is set for each pixel group, such as Figure 8 As shown, the drive control circuit 360 can change the size or boundary of each pixel group of two or more pixel groups G1, G2 and G3 in each frame of the image data.

[0077] Therefore, it can prevent block dimming that may occur when the size of each pixel group in two or more pixel groups G1, G2 and G3 is consistent and fixed.

[0078] As described above, the drive control circuit 360 (i.e., the data drive device 120) determines whether a pixel is overdriven by comparing the pixel data of one pixel with the pixel data of another pixel.

[0079] However, it should be noted that the embodiments are not limited thereto, and the data processing device 140 can determine whether a pixel is overdriven.

[0080] Figure 9 This diagram is used to illustrate the configuration of determining whether an overdriven pixel is used in the data processing apparatus according to an embodiment.

[0081] refer to Figure 9 The data processing device 140 can send a first data packet 910 containing pixel data of another pixel to the data driving device 120, and then send a second data packet 920 containing pixel data of one pixel to the data driving device 120.

[0082] Before sending the second data packet 920, the data processing device 140 can compare the pixel data of the other pixel with the pixel data of the first pixel.

[0083] Based on the result of comparing the pixel data of the other pixel with the pixel data of the first pixel, the data processing device 140 can insert an indicator OD in the second data packet 920 to determine whether to overdrive the first pixel.

[0084] By comparing the first MSB included in the pixel data of the other pixel with the second MSB included in the pixel data of the first pixel, if the first MSB and the second MSB are different, the data processing device 140 can set the indicator OD to "1" and send the set indicator OD to the data driving device 120. The data driving device 120, which checks the indicator OD as "1" in the second data packet 920, performs overdriving on the first pixel.

[0085] When the first MSB and the second MSB are the same, the data processing device 140 can set the indicator OD to "0" and send the set indicator OD to the data driving device 120. The data driving device 120, which detects the indicator OD as "0" in the second data packet 920, can skip the overdriving of the pixel and directly output the data voltage of the pixel.

[0086] The data processing device 140 may insert an indicator OD in the dummy region DM included in the second data packet 920.

[0087] As can be clearly seen from the above description, according to the embodiment, since the pixels are driven using a power supply voltage higher than the maximum output voltage of the buffer 340, the slew rate and display speed of the display device 100 can be improved compared to the existing scheme of driving pixels using the voltage output from the buffer 340.

[0088] Cross-references to related applications

[0089] This application claims priority to Korean Patent Application 10-2020-0180767, filed on December 22, 2020, the entire contents of which are incorporated herein by reference.

Claims

1. A data driving device, the data driving device comprising: A buffer is configured to drive one of a plurality of pixels connected to a data line and output the data voltage of said pixel by using a power supply voltage from a power supply voltage line; as well as A multiplexer configured to receive the power supply voltage from the power supply voltage line, receive the data voltage from the buffer, output the power supply voltage to the one data line to overdrive the one pixel, and then output the data voltage to the one data line. The first input of the multiplexer is connected to the output of the buffer, the second input of the multiplexer is connected to the power supply voltage line, and the output of the multiplexer is connected to the data line. The power supply voltage from the power supply voltage line is higher than the maximum output voltage of the buffer.

2. The data driving device according to claim 1, wherein, The multiplexer selectively outputs the power supply voltage from the power supply voltage line to the one data line during the overdrive period, and then outputs the data voltage from the buffer to the one data line.

3. The data driving device according to claim 1, wherein, The multiplexer includes a first multiplexer circuit and a second multiplexer circuit for selecting one of two inputs.

4. The data driving device according to claim 3, wherein, The first multiplexer circuit is configured to receive the data voltage from the buffer, and the second multiplexer circuit is configured to receive the power supply voltage from the power supply voltage line.

5. The data driving device according to claim 4, wherein, When the second multiplexer circuit is turned on by the overdrive control signal, the first multiplexer circuit is configured to be turned off.

6. The data driving device according to claim 4, wherein, When the first multiplexer circuit is turned on, the second multiplexer circuit is configured to be turned off.

7. The data driving device according to claim 1, wherein, The multiplexer is configured to receive the power supply voltage from the power supply voltage line to receive the data voltage from the buffer.

8. The data driving device according to claim 7, wherein, The multiplexer is configured to output the power supply voltage to the one data line to overdrive the one pixel, and then output the data voltage to the one data line.

9. The data driving device according to claim 1, wherein, Compared to other pixels connected to the data line, the pixel is located at the shortest distance from the buffer, and the duration of overdriving the pixel is the shortest compared to the other pixels connected to the data line.

10. A data driving device, the data driving device comprising: A buffer is configured to drive one of a plurality of pixels connected to a data line and output the data voltage of said pixel by using a power supply voltage from a power supply voltage line; as well as A multiplexer configured to receive the power supply voltage from the power supply voltage line, receive the data voltage from the buffer, output the power supply voltage to the one data line to overdrive the one pixel, and then output the data voltage to the one data line. The first input of the multiplexer is connected to the output of the buffer, the second input of the multiplexer is connected to the power supply voltage line, and the output of the multiplexer is connected to the data line. The plurality of pixels are divided into at least two pixel groups based on how far each pixel is separated from the buffer, a duration of overdrive pixel is set for each pixel group, and the boundary of each of the at least two pixel groups is configured to be adjustable. The power supply voltage from the power supply voltage line is higher than the maximum output voltage of the buffer.

11. The data driving device according to claim 10, wherein, The at least two pixel groups include a first pixel group and a second pixel group adjacent to the first pixel group, and the size of the first pixel group and the size of the second pixel group are different.

12. The data driving device according to claim 10, wherein, Compared to other pixels connected to the data line, the pixel is located at the shortest distance from the buffer, and compared to other pixels connected to the data line, the duration of overdriving the pixel is the shortest, or Compared to the other pixels connected to the data line, the pixel is located at the longest distance from the buffer and has the longest overdrive duration compared to the other pixels connected to the data line.

13. The data driving device according to claim 10, wherein, The plurality of pixels are divided into at least two pixel groups based on how far each pixel is separated from the buffer. The pixel is included in a first pixel group, which, compared to another pixel group included in the at least two pixel groups, has the shortest separation distance from the buffer, and The duration of overdriving a pixel is the same as the duration of overdriving another pixel included in the first pixel group.

14. The data driving device according to claim 10, wherein, The plurality of pixels are divided into at least two pixel groups based on how far each pixel is separated from the buffer. The pixel is included in the last pixel group, which, compared to another pixel group included in the at least two pixel groups, has the longest separation distance from the buffer, and The duration of overdriving a pixel is the same as the duration of overdriving another pixel included in the last pixel group.

15. The data driving device according to claim 10, further comprising a driving control circuit for determining whether a pixel is overdriven by comparing pixel data of the pixel with pixel data of another pixel preceding the pixel.

16. The data driving device according to claim 15, wherein, The drive control circuit is configured as follows: The first most significant bit included in the pixel data of the other pixel is compared with the second most significant bit included in the pixel data of the first pixel. When the first most significant bit is different from the second most significant bit, the overdrive time of the pixel is identified in a preset lookup table based on the separation distance between the pixel and the buffer. An overdrive control signal corresponding to the overdrive time is generated, and the overdrive control signal is sent to the multiplexer.

17. A display device comprising: A data processing device configured to transmit image data comprising pixel data of multiple pixels; A power supply configured to output power voltage; as well as The data driving device according to claim 1 or 10.

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