Digital isolator element

Abstract

The embodiment of the present application discloses a kind of digital isolator elements, the digital isolator element includes first chip and the second chip electrically connected with the first chip.Therein, the first chip includes first substrate, first circuit formed on the first substrate, electromagnetic shielding structure covering the first circuit and isolation transmission structure arranged on the electromagnetic shielding structure, the second chip includes second substrate separated from the first substrate and second circuit formed on second substrate.The first circuit is one of encoding circuit or decoding circuit, the second circuit is the other one in encoding circuit or decoding circuit, and the isolation transmission structure is used to transmit encoded signal in electrically isolated manner.Through the digital isolator element, substrate utilization can be improved, chip area can be reduced, and chip cost can be reduced without affecting the performance of digital isolator.

Description

Technical Field

[0001] This invention relates to the field of circuit technology, and more specifically to a digital isolator element. Background Technology

[0002] Digital isolators are devices used in electronic systems to provide high resistive isolation between digital and analog signals, thus isolating the electronic system from the user. They typically employ optocouplers, inductive / magnetic isolation, and capacitive isolation. However, existing digital isolators suffer from low substrate utilization and large chip areas, leading to higher chip costs. Summary of the Invention

[0003] In view of this, embodiments of the present invention provide a digital isolator element to improve substrate utilization, reduce chip area, and lower chip cost without affecting the performance of the digital isolator.

[0004] In a first aspect, embodiments of the present invention provide a digital isolator element, the digital isolator element comprising:

[0005] A first chip, comprising a first substrate, a first circuit formed on the first substrate, an electromagnetic shielding structure covering the first circuit, and an isolation transmission structure disposed on the electromagnetic shielding structure, wherein the first circuit is either an encoding circuit or a decoding circuit, and the isolation transmission structure is used to transmit encoded signals in an electrically isolated manner; and

[0006] The second chip, electrically connected to the first chip, includes a second substrate separate from the first substrate and a second circuit formed on the second substrate, wherein the second circuit is another of an encoding circuit or a decoding circuit.

[0007] Furthermore, the electromagnetic shielding structure includes a first insulating layer, a metal shielding layer, and a second insulating layer stacked sequentially.

[0008] Furthermore, the metal shielding layer has a mesh structure or a sheet structure.

[0009] Furthermore, the isolated transmission structure includes at least one first winding and at least one second winding, wherein the first winding is electrically connected to the first circuit and the second winding is electrically connected to the second circuit.

[0010] Furthermore, the isolation transmission structure also includes a third insulating layer covering the first winding, the second winding being disposed on the third insulating layer, and the first winding and the corresponding second winding being disposed perpendicularly opposite each other.

[0011] Furthermore, the first winding is electrically connected to the first circuit through a through-hole, and the second winding is electrically connected to the second circuit through a lead wire.

[0012] Furthermore, both the first winding and the second winding are planar coils, and the first winding and the second winding are wound in a predetermined direction, which is either clockwise or counterclockwise.

[0013] Furthermore, both the first winding and the second winding are planar coils, and both the first winding and the second winding include a first portion wound along the predetermined direction and a second portion wound along the predetermined direction in a side-by-side region of the first portion, wherein the predetermined direction is either clockwise or counterclockwise.

[0014] Furthermore, the isolation transmission structure also includes an insulating layer covering the second winding.

[0015] Furthermore, the encoding circuit is used to receive the input digital signal and convert the input digital signal into the encoded signal, and the decoding circuit is used to receive the encoded signal and convert the encoded signal into an output digital signal that is consistent with the input digital signal.

[0016] Furthermore, the isolation transmission structure overlaps longitudinally with the first circuit.

[0017] The digital isolator element of this invention includes a first chip and a second chip electrically connected to the first chip. The first chip includes a first substrate, a first circuit formed on the first substrate, an electromagnetic shielding structure covering the first circuit, and an isolation transmission structure disposed on the electromagnetic shielding structure. The second chip includes a second substrate separate from the first substrate and a second circuit formed on the second substrate. The first circuit is either an encoding circuit or a decoding circuit, and the second circuit is either the other. The isolation transmission structure is used to transmit encoded signals in an electrically isolated manner. This digital isolator element can improve substrate utilization, reduce chip area, and lower chip cost without affecting the performance of the digital isolator. Attached Figure Description

[0018] The above and other objects, features and advantages of the present invention will become clearer from the following description of embodiments of the invention with reference to the accompanying drawings, in which:

[0019] Figure 1 This is a block diagram of the composition of the digital isolator elements according to an embodiment of the present invention;

[0020] Figure 2 This is a circuit diagram of a digital isolator element according to an embodiment of the present invention;

[0021] Figure 3 This is a schematic diagram of the structure of a digital isolator element in related technologies;

[0022] Figure 4 A cross-sectional view of a digital isolator element in another related technology;

[0023] Figure 5 This is a schematic diagram of the structure of a digital isolator element according to an embodiment of the present invention;

[0024] Figure 6 This is a cross-sectional view of the first chip according to an embodiment of the present invention;

[0025] Figure 7 This is a schematic diagram of the coil arrangement of an isolation transmission structure according to one embodiment of the present invention;

[0026] Figure 8 This is a schematic diagram of the coil arrangement of an isolation transmission structure according to another implementation of the present invention. Detailed Implementation

[0027] The present invention is described below based on embodiments, but the invention is not limited to these embodiments. In the detailed description of the invention below, certain specific details are described in detail. Those skilled in the art will fully understand the invention even without these details. To avoid obscuring the essence of the invention, well-known methods, processes, flows, elements, and circuits are not described in detail.

[0028] Furthermore, those skilled in the art should understand that the accompanying drawings provided herein are for illustrative purposes only and are not necessarily drawn to scale.

[0029] Furthermore, it should be understood that in the following description, "circuit" refers to a conductive loop consisting of at least one element or sub-circuit connected by electrical or electromagnetic connections. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it can be directly coupled or connected to another element, or there may be intermediate elements. The connection between elements can be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.

[0030] Unless the context explicitly requires it, words such as "including" or "contains" in the instruction manual should be interpreted as including rather than exclusive or exhaustive; that is, meaning "including but not limited to".

[0031] In the description of this invention, it should be understood that the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance. Furthermore, in the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0032] Digital isolators are devices used in electronic systems to provide high resistive isolation between digital and analog signals, thus isolating the electronic system from the user. They typically employ optocouplers, inductive / magnetic isolation, and capacitive isolation. However, existing digital isolators suffer from low substrate utilization and large chip areas, leading to higher chip costs.

[0033] Figure 1 This is a block diagram of the digital isolator elements according to an embodiment of the present invention. Figure 1 As shown, the digital isolator element includes an encoding circuit 11, an isolation element 12, and a decoding circuit 13. The encoding circuit 11 receives the input digital signal DIN and converts it into an encoded signal. The isolation element 12 transmits the encoded signal with electrical isolation. The decoding circuit 13 converts the encoded signal back into an output digital signal DOUT corresponding to the input digital signal DIN. Specifically, in practical applications, after receiving the input digital signal DIN, the encoding circuit 11 converts it into a corresponding encoded signal and transmits the converted encoded signal to the decoding circuit 13 through the isolation element 12. After receiving the encoded signal, the decoding circuit 13 converts it back into an output digital signal DOUT consistent with the input digital signal DIN. The digital isolator element in this embodiment enables electrically isolated signal transmission. Optionally, in this embodiment, the isolation element 12 can be a transformer, which can transmit the encoded signal through electromagnetic induction based on mutually coupled metal windings. In an optional implementation, the isolation element 12 can also be an isolation capacitor.

[0034] Figure 2 This is a circuit diagram of a digital isolator element according to an embodiment of the present invention. Figure 2As shown, the digital isolator includes an encoding circuit 21, an isolation element 22, and a decoding circuit 23. The encoding circuit 21 receives the input digital signal DIN and converts it into a corresponding encoded signal. Specifically, the encoded signal can be a pulse signal formed by encoding the rising or falling edge of the input digital signal DIN. The isolation element 22 includes a primary winding L11 and a secondary winding L12 coupled to the primary winding L11. The primary winding L11 is connected to the encoding circuit 21, and the secondary winding L12 is connected to the decoding circuit 23. When the primary winding L11 receives the encoded signal, it transmits the encoded signal to the decoding circuit 23 via the secondary winding L12 through electromagnetic induction. The decoding circuit 23 can convert the received encoded signal back into an output digital signal DOUT consistent with the input digital signal DIN. The method of converting the encoded signal into an output digital signal can be by decoding the received pulse signal to obtain an output digital signal consistent with the input digital signal. It should be understood that the number of coupled windings in the isolation element 22 in this embodiment can be adjusted according to actual usage requirements.

[0035] Figure 3 This is a schematic diagram of the structure of a digital isolator element in related technologies. For example... Figure 3 As shown, the digital isolator element includes an encoding circuit 31, a decoding circuit 32, and an isolation element. The encoding circuit 31 is integrated separately on chip 34, while the decoding circuit 32 and the isolation element are horizontally integrated on chip 35. Chips 34 and 35 are electrically isolated. The isolation element includes a first winding 33A and a second winding 33B. In this related technology, the digital isolator element occupies a large chip area, resulting in low substrate utilization and high chip cost.

[0036] Figure 4 This is a cross-sectional view of a digital isolator element in another related technology. (Example) Figure 4 As shown, the digital isolator element includes an encoding circuit 41, a decoding circuit 42, and an isolation element. The encoding circuit 41 and the decoding circuit 42 are integrated on the same substrate 40. The isolation element is integrated directly above the encoding circuit 41 and the decoding circuit 42, and includes a first winding 43A and a second winding 43B. In this related art, although the digital isolator element reduces the chip area, integrating the encoding circuit 41 and the decoding circuit 42 on the same substrate 40 makes electrical insulation of the circuit more difficult, affecting the electrical isolation performance of the digital isolator element.

[0037] Figure 5 This is a schematic diagram of the structure of a digital isolator element according to an embodiment of the present invention. Figure 5As shown, the digital isolator element includes a first chip and a second chip. The first chip includes a first substrate 51, a first circuit 52 formed on the first substrate 51, an electromagnetic shielding structure 53 covering the first circuit 52, and an isolation transmission structure 54 disposed on the electromagnetic shielding structure 53.

[0038] Specifically, the first substrate 51 may be a silicon (Si) wafer. The first substrate 51 is used to carry the first circuit 52 and the isolation transmission structure 54 of this embodiment. Optionally, the first substrate may also be a substrate made of materials such as germanium (Ge), gallium arsenide (GaAs), or silicon germanium (SiGe).

[0039] Furthermore, the first circuit 52 can be either an encoding circuit or a decoding circuit. The first circuit 52 can be formed on the first substrate 51 through existing semiconductor process flows, such as deposition, etching, ion implantation, etc., which will not be described in detail here.

[0040] Further, the electromagnetic shielding structure 53 is located between the first circuit 52 and the isolation transmission structure 54. The electromagnetic shielding structure 53 can be formed above the first circuit 52, covering the first circuit 52. The electromagnetic shielding structure 53 is used to reduce the magnetic field interference of the first circuit 52 on the isolation transmission structure 54. At the same time, the electromagnetic shielding structure 53 is also used to reduce the influence of the magnetic field changes generated by the isolation transmission structure 54 when transmitting encoded signals on the electrical characteristics of the first circuit 52. The electromagnetic shielding structure 53 can improve the electromagnetic compatibility (EMC) of the digital isolator. Optionally, the electromagnetic shielding structure 53 may specifically include at least one insulating layer and a metal shielding layer stacked sequentially. Optionally, the metal shielding layer may specifically adopt a mesh structure or a sheet structure.

[0041] Furthermore, the isolation transmission structure 54 can specifically be... Figure 1 and Figure 2 The isolation element shown is illustrated. The isolation transmission structure 54 includes at least one first winding 541, a third insulating layer 545 covering the first winding 541, and a second winding 543 disposed on the third insulating layer 545. The first winding 541 and the corresponding second winding 543 are arranged perpendicularly to each other and are used to transmit coded signals by electromagnetic induction. The third insulating layer 545 is used to withstand the isolation voltage required by the special test specifications of the isolation transmission structure 54. The material of the third insulating layer 545 can be polyimide (PI), silicon dioxide (SiO5), or silicon nitride (Si3N4). It should be understood that, in order to more intuitively illustrate the positional relationship between the first winding and the second winding, this embodiment uses... Figure 5The third insulating layer 545 and the second winding 543 shown are in cross-section. Further, in this embodiment, the first winding 541 and the second winding 543 can specifically be planar coils. It should be understood that when there are multiple coupled windings, each first winding and each second winding can be arranged side-by-side. Further, both the first winding 541 and the second winding 543 are wound along a predetermined direction, which can be clockwise. Optionally, the predetermined direction can also be counterclockwise. Optionally, the material of the first winding 541 and the second winding 543 can be a high-conductivity material such as gold (Au), copper (Cu), or silver (Ag). Optionally, the first winding 541 and the second winding 543 can be formed by a corresponding deposition process, such as chemical vapor deposition (CVD) or physical vapor deposition (PVD).

[0042] Furthermore, the first winding 541 is electrically connected to the first circuit 52 through a through-hole. The second winding 543 is electrically connected to the second circuit 57 deposited on the second chip substrate 56 through a lead 55. The second circuit 57 is another of the encoding circuit or decoding circuit. The material of the lead 55 can be gold (Au) or aluminum (Al), etc. The lead 55 can be crimped to the connection pad between the second winding 543 and the second circuit 57 by wire bonding.

[0043] The digital isolator element of this invention includes a first chip and a second chip electrically connected to the first chip. The first chip includes a first substrate, a first circuit formed on the first substrate, an electromagnetic shielding structure covering the first circuit, and an isolation transmission structure disposed on the electromagnetic shielding structure. The second chip includes a second substrate separate from the first substrate and a second circuit formed on the second substrate. The first circuit is either an encoding circuit or a decoding circuit, and the second circuit is the other of the encoding or decoding circuits. The isolation transmission structure is used to transmit encoded signals in an electrically isolated manner. By forming one of the encoding or decoding circuits and the isolation transmission structure on the same substrate in a vertically overlapping manner, and forming the other of the encoding or decoding circuits on a second substrate separate from the first substrate, the digital isolator element can improve substrate utilization, reduce chip area, and lower chip cost without affecting the performance of the digital isolator.

[0044] It should be understood that both the first chip and the second chip in this embodiment are bare dies. Furthermore, this embodiment can also employ packaging technology to encapsulate the first chip and the second chip within the same housing to protect them from interference or damage by the external environment. It should be understood that this embodiment can select an appropriate packaging form, such as DSP (Dual In-line Package), QFP (Quad Flat Package), or BGA (Ball Grid Array), and select corresponding packaging materials, such as plastic, ceramic, or metal, depending on the application scenario and environment of the digital isolator; these will not be elaborated further here.

[0045] Figure 6 This is a cross-sectional view of the first chip according to an embodiment of the present invention. Figure 6 As shown, the first chip includes a first substrate 61, a first circuit 62, a first insulating layer 63, a metal shielding layer 64, a second insulating layer 65, a first winding 66, a third insulating layer 67, and a second winding 68.

[0046] The first substrate 61 can specifically be a silicon (Si) wafer. A first circuit 62 is deposited on the first substrate 61, which can specifically be an encoding circuit or a decoding circuit. A first insulating layer 63, a metal shielding layer 64, and a second insulating layer 65 are sequentially stacked on the first circuit 62. The first insulating layer 63, the metal shielding layer 64, and the second insulating layer 65 specifically form an electromagnetic shielding structure for isolating the circuit structure and the transmission structure. Optionally, the metal shielding layer can adopt a mesh structure or a sheet structure. At least one first winding 66 is also formed on the second insulating layer 65. It should be understood that when there are multiple first windings, the first windings 66 are arranged side by side. Optionally, the first winding 66 can specifically be a planar coil wound in a predetermined direction, which can be clockwise or counterclockwise. A third insulating layer 67 covers the first winding 66. The third insulating layer 67 is used to bear the isolation voltage generated by the first winding 66 and the second winding 68 during operation. A second winding 68 is formed on the third insulating layer 67, perpendicularly opposite to the first winding 66. The second winding 68 and the first winding 66 are planar coils wound in the same direction. Optionally, the first winding 66 and the second winding 68 can be made of high-conductivity materials such as copper (Cu), gold (Au), or silver (Ag). Further, each of the first windings 66 is electrically connected to the first circuit 62 through a through-hole 69. Specifically, the through-hole 69 can be a metal through-hole formed by deposition of high-conductivity materials such as copper (Cu), gold (Au), or silver (Ag). Optionally, the materials of the first insulating layer 63, the second insulating layer 65, and the third insulating layer 67 can be insulating materials such as polyimide (PI), silicon dioxide (SiO2), or silicon nitride (Si6N4), and the first winding 66 can also be electrically connected to the first circuit by wire bonding. Each insulating layer can be formed by chemical vapor deposition, physical vapor deposition, or direct spin coating.

[0047] Furthermore, an insulating layer 681 is formed on the second winding 68. The insulating layer 681 is used to protect the internal circuit structure and electromagnetic shielding structure to prevent the digital isolator from being physically or chemically damaged, thereby improving the stability of the digital isolator. The material of the insulating layer 681 can be insulating materials such as polyimide (PI), silicon dioxide (SiO2), or silicon nitride (Si3N4).

[0048] Figure 7 This is a schematic diagram of the coil arrangement of an isolated transmission structure according to one embodiment of the present invention. Figure 7As shown, the isolation transmission structure includes a first winding 71, a first winding 72, a second winding 73, and a second winding 74. Each first winding and each second winding is a planar coil wound in a clockwise direction. The first winding 71 and the first winding 72 are arranged side-by-side, and the second winding 73 and the second winding 74 are arranged side-by-side. The first winding 71 is perpendicular to the corresponding second winding 73, and the first winding 72 is perpendicular to the corresponding second winding 74. It should be understood that in practical applications, the number of windings and the winding direction of the coils can be adjusted according to actual needs.

[0049] Figure 8 This is a schematic diagram of the coil arrangement of an isolated transmission structure according to another implementation of the present invention. Figure 8 As shown, the isolation transmission structure includes a first winding 81 and a second winding 82. Both the first winding 81 and the second winding 82 are planar coils. The first winding 81 includes a first portion 811 wound along a predetermined direction and a second portion 812 wound along a predetermined direction within a side-by-side area of ​​the first portion. The second winding 82 includes a first portion 821 wound along the predetermined direction and a second portion 822 wound along the predetermined direction within a side-by-side area of ​​the first portion. The predetermined direction is clockwise. It should be understood that in practical applications, the number of windings and the winding direction of the coils can be adjusted according to actual needs.

[0050] The digital isolator element of this invention includes a first chip and a second chip electrically connected to the first chip. The first chip includes a first substrate, a first circuit formed on the first substrate, an electromagnetic shielding structure covering the first circuit, and an isolation transmission structure disposed on the electromagnetic shielding structure. The second chip includes a second substrate separate from the first substrate and a second circuit formed on the second substrate. The first circuit is either an encoding circuit or a decoding circuit, and the second circuit is the other of the encoding or decoding circuits. The isolation transmission structure is used to transmit encoded signals in an electrically isolated manner. By forming one of the encoding or decoding circuits and the isolation transmission structure on the same substrate in a vertically overlapping manner, and forming the other of the encoding or decoding circuits on a second substrate separate from the first substrate, the digital isolator element can improve substrate utilization, reduce chip area, and lower chip cost without affecting the performance of the digital isolator.

[0051] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. For those skilled in the art, the present invention can be modified and varied in various ways. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principle of the present invention should be included within the scope of protection of the present invention.

Claims

1. A digital isolator element, characterized in that, The digital isolator element includes: A first chip, comprising a first substrate, a first circuit formed on the first substrate, an electromagnetic shielding structure covering the first circuit, and an isolation transmission structure disposed on the electromagnetic shielding structure, wherein the first circuit is either an encoding circuit or a decoding circuit, and the isolation transmission structure is used to transmit encoded signals in an electrically isolated manner; and The second chip is electrically connected to the first chip and includes a second substrate separate from the first substrate and a second circuit formed on the second substrate, wherein the second circuit is another of an encoding circuit or a decoding circuit. The electromagnetic shielding structure isolates the isolation transmission structure from the first circuit in the vertical direction. The isolation transmission structure overlaps with the first circuit in the longitudinal direction. The isolation transmission structure includes at least one first winding and at least one second winding. The first winding and the corresponding second winding are mutually coupled windings. The first winding and the corresponding second winding are arranged perpendicularly to each other for transmitting encoded signals between them by electromagnetic induction. The first winding is electrically connected to the first circuit, and the second winding is electrically connected to the second circuit.

2. The digital isolator element according to claim 1, characterized in that, The electromagnetic shielding structure includes a first insulating layer, a metal shielding layer, and a second insulating layer stacked sequentially.

3. The digital isolator element according to claim 2, characterized in that, The metal shielding layer has a mesh structure or a sheet structure.

4. The digital isolator element according to claim 1, characterized in that, The isolation transmission structure further includes a third insulating layer covering the first winding, and the second winding is disposed on the third insulating layer.

5. The digital isolator element according to claim 4, characterized in that, The first winding is electrically connected to the first circuit through a through hole, and the second winding is electrically connected to the second circuit through a lead wire.

6. The digital isolator element according to claim 4, characterized in that, Both the first winding and the second winding are planar coils, and the first winding and the second winding are wound in a predetermined direction, which is either clockwise or counterclockwise.

7. The digital isolator element according to claim 4, characterized in that, Both the first winding and the second winding are planar coils. Both the first winding and the second winding include a first portion wound along a predetermined direction and a second portion wound along the predetermined direction in a side-by-side area of ​​the first portion. The predetermined direction is either clockwise or counterclockwise.

8. The digital isolator element according to claim 1, characterized in that, The isolation transmission structure also includes an insulating layer covering the second winding.

9. The digital isolator element according to claim 1, characterized in that, The encoding circuit is used to receive the input digital signal and convert the input digital signal into the encoded signal, and the decoding circuit is used to receive the encoded signal and convert the encoded signal into an output digital signal that is consistent with the input digital signal.

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