Display device

Abstract

A display device. The display device includes: a pixel portion having sub-pixels disposed therein; and at least one transparent portion disposed in a region adjacent to the pixel portion. The at least one transparent portion allows external light to pass through it. The pixel portion may include: a first extension, a second extension, a third extension, and a fourth extension extending in different directions and including conductive wires; and a first circuit portion, a second circuit portion, a third circuit portion, and a fourth circuit portion. Each of the first circuit portion, the second circuit portion, the third circuit portion, and the fourth circuit portion is disposed between an adjacent pair of extensions of the first extension portion, the second extension portion, the third extension portion, and the fourth extension portion, and includes circuit elements of a corresponding sub-pixel of the sub-pixels.

Description

Technical Field

[0001] This disclosure relates to a display device. Background Technology

[0002] Organic light-emitting diodes (OLEDs) display images using organic light-emitting diodes (OLEDs), which generate light through the recombination of electrons and holes. OLEDs are self-emissive display devices with fast response times and low power consumption, making them a promising next-generation display technology.

[0003] Organic light-emitting display devices can be configured as transparent displays by making the transistors or light-emitting elements located inside the display device transparent, or by separating the circuitry from the transparent portion. Typical transparent display devices have a rectangular transparent portion with approximately 40% transparency. However, the rectangular transparent portion exhibits diffraction at its edges due to the ratio between its width and height, which have different lengths. This diffraction results in haze, which reduces the clarity of the display device. Summary of the Invention

[0004] Therefore, this disclosure is made in view of the above-mentioned problems in the related art, and the purpose of this disclosure is to provide a display device in which a transparent portion of a special shape is provided to reduce diffraction and haze.

[0005] To achieve the aforementioned technical advantages, a display device according to an embodiment of the present invention includes: a pixel portion having sub-pixels, and at least one transparent portion disposed in a region adjacent to the pixel portion. The at least one transparent portion allows external light to pass through it. The pixel portion may include: first, second, third, and fourth (or "first to fourth") extensions extending in different directions and including conductive lines; and first, second, third, and fourth (or "first to fourth") circuit portions. Each of the circuit portions is disposed between an adjacent pair of extensions among the first, second, third, and fourth extensions, and includes circuit elements of a corresponding sub-pixel among the sub-pixels.

[0006] The first extension, the second extension, the third extension, and the fourth extension may have shapes that are symmetrical with respect to the first axis and the second axis intersecting the first axis, respectively, with the adjacent extensions. The first circuit section, the second circuit section, the third circuit section, and the fourth circuit section may have shapes that are symmetrical with respect to the first axis and the second axis, respectively, with the adjacent circuit sections.

[0007] Each of the first circuit section, the second circuit section, the third circuit section, and the fourth circuit section has a triangular shape, the triangular shape including: a first side that contacts an extension adjacent to the first side; a second side that contacts an extension adjacent to the second side; and a third side that contacts a transparent portion.

[0008] The length of the third side may be longer than the length of the fourth side located at each of the first extension, the second extension, the third extension, and the fourth extension and in contact with at least one transparent portion.

[0009] The distance between the center of each of the first extension, the second extension, the third extension, and the fourth extension and the center of the adjacent transparent portion can be substantially the same.

[0010] At least one transparent portion may be partially surrounded by the third side of the circuit portion and the extension adjacent to the circuit portion.

[0011] The conductor may include: at least one first power line configured to apply a high-potential driving voltage to a sub-pixel, and at least one second power line configured to apply a low-potential driving voltage to the sub-pixel. Each of the first and second power lines includes a first pattern extending along a first axis via each of a first extension and a third extension, and at least one of the first and second power lines includes a second pattern extending along a second axis intersecting the first axis via each of a second extension and a fourth extension. The high-potential driving voltage may be greater than the low-potential driving voltage.

[0012] The conductor may include: a first power line configured to apply a high-potential driving voltage to a sub-pixel, and a second power line configured to apply a low-potential driving voltage to the sub-pixel. Each of the first and second power lines may include a second pattern extending along a second axis intersecting the first axis via each of a second and a fourth extension, and at least one of the first and second power lines may include a first pattern extending along a first axis intersecting the second axis via each of a first and a third extension.

[0013] Each of the sub-pixels may include a light-emitting portion disposed in the region overlapping between a corresponding circuit portion and a corresponding pair of adjacent extensions. The light-emitting portion may include a light-emitting element.

[0014] The light-emitting part can be configured to have a triangular shape, which has a curved edge that contacts at least one transparent part.

[0015] At least one transparent portion may be partially surrounded by the curved edge of the light-emitting portion.

[0016] The light-emitting portion may include a first light-emitting portion and a second light-emitting portion. The first light-emitting portion overlaps with a first portion of a circuit portion corresponding to the light-emitting portion and an extension portion adjacent to a first side of the corresponding circuit portion. The second light-emitting portion overlaps with a second portion of a corresponding circuit portion and an extension portion adjacent to a second side of the circuit portion.

[0017] The pixel unit may include: a substrate on which red sub-pixels, green sub-pixels, blue sub-pixels and white sub-pixels are disposed; a color filter that is disposed corresponding to the light-emitting part of each of the red sub-pixels, green sub-pixels and blue sub-pixels; and a black matrix disposed between adjacent color filters, wherein the black matrix may not be disposed on the white sub-pixels.

[0018] According to one embodiment of the display device, the display device includes: a display panel on which unit pixels are disposed. Each unit pixel includes a pixel portion and at least one transparent portion. Subpixels are disposed on the pixel portion. The at least one transparent portion is disposed in a region adjacent to the pixel portion and allows external light to pass through it. The pixel portion may include: a first extension to a fourth extension, the first extension to the fourth extension extending in different directions from each other and including conductive wires, and a first circuit portion to a fourth circuit portion. Each circuit portion is disposed between a corresponding pair of adjacent extensions in the first extension to the fourth extension and includes a corresponding circuit element of each of the subpixels.

[0019] Each of the first to fourth circuit portions can be configured to have a triangular shape. This triangular shape may include: a first side that contacts one of the adjacent first to fourth extension portions; a second side that contacts the other adjacent first to fourth extension portion; and a third side that contacts a transparent portion. The length of the third side may be longer than the length of the fourth side located at each of the first to fourth extension portions and contacting at least one transparent portion.

[0020] The distance between the center of each of the first to fourth extensions and the center of its adjacent transparent portion can be substantially the same.

[0021] At least one transparent portion may be surrounded by four sub-pixels belonging to different unit pixels, and may have an edge corresponding to the third side of the corresponding circuit portion in the four sub-pixels and the corresponding extension adjacent to the circuit portion.

[0022] At least one transparent part may have an overall regular octagonal shape.

[0023] Each of the sub-pixels may include at least one light-emitting portion disposed in a region. This region may be an overlapping area between a circuit portion and an extension portion. The at least one light-emitting portion may include a light-emitting element.

[0024] At least one transparent portion may be surrounded by four sub-pixels belonging to different unit pixels, and may have an edge corresponding to the curved edge of the corresponding light-emitting portion in the four sub-pixels. At least one transparent portion may have an overall circular shape.

[0025] In the display device according to the embodiment, a transparent portion that is basically a regular octagon or circle is provided, thereby reducing diffraction and haze at the edges of the transparent portion. Furthermore, the display device according to the embodiment has the same clarity as a transparent display device with a conventional rectangular transparent portion, and has improved clarity, thereby increasing the visibility of the background behind the display device.

[0026] In the display device according to the embodiment, the black matrix arranged on the white sub-pixels is removed, thereby further improving sharpness. Attached Figure Description

[0027] The above and other technical advantages, features and other benefits of this disclosure will become clearer from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0028] Figure 1 This is a block diagram illustrating the configuration of a display device according to an embodiment;

[0029] Figure 2 According to the implementation method Figure 1 The circuit diagram of the sub-pixel is shown;

[0030] Figure 3 This is a top view illustrating a display panel according to an embodiment;

[0031] Figure 4 This is a top view that roughly illustrates the structure of a unit pixel according to the embodiment;

[0032] Figure 5 It provides a detailed example. Figure 4 A top view of the structure of a unit pixel;

[0033] Figure 6 It is along Figure 5 A cross-sectional view taken from line II′;

[0034] Figure 7 It is along Figure 5 A cross-sectional view taken from line II-II′;

[0035] Figure 8 This is a top view that schematically illustrates the structure of a unit pixel according to another embodiment;

[0036] Figure 9 It provides a detailed example. Figure 8 A top view of the structure of a unit pixel shown; and

[0037] Figure 10 It is along Figure 9 The cross-sectional view taken from line III-III′. Detailed Implementation

[0038] In the following description, embodiments of the present disclosure will be described with reference to the accompanying drawings. In this specification, when a component (or region, layer, or portion, etc.) is referred to as being "on," "connected to," or "attached to" another component, it means that the component can be directly connected / attached to other components or that a third component can be disposed between them.

[0039] Similar reference numerals denote similar elements. Additionally, in the drawings, the thickness, scale, and dimensions of components are exaggerated for the purpose of effectively describing the technical content. "And / or" includes any combination of one or more associated configurations that can be defined.

[0040] Various elements may be described using terms such as first, second, etc., but the elements are not limited to these terms. The terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of this disclosure, a first component may be referred to as a second component. Similarly, a second component may be referred to as a first component. Unless the context clearly specifies otherwise, singular expressions include plural expressions.

[0041] Terms such as “below,” “on the lower side,” “above,” and “on the upper side” are used to describe the relationships between the components shown in the figures. These terms are relative and are described with reference to the directions indicated in the figures.

[0042] Terms such as “comprising” or “having” are intended to indicate the presence of the features, quantities, steps, operations, components or combinations thereof described in the specification, and should be understood as not excluding the possibility of the presence or addition of one or more other features or quantities, steps, operations, components or combinations thereof.

[0043] Figure 1 This is a block diagram illustrating the configuration of a display device according to an embodiment.

[0044] Reference Figure 1 The display device 1 includes a timing controller 10, a strobe driver 20, a data driver 30, a power supply 40, and a display panel 50.

[0045] The timing controller 10 can receive an image signal RGB and a control signal CS from an external source. The image signal RGB may include multiple grayscale data. For example, the control signal CS may include a horizontal synchronization signal, a vertical synchronization signal, and a master clock signal.

[0046] The timing controller 10 processes the image signal RGB and the control signal CS, making the image signal RGB and the control signal CS suitable for the operating conditions of the display panel 50, and can generate and output image data DATA, gating drive control signal CONT1, data drive control signal CONT2 and power control signal CONT3.

[0047] The gating driver 20 can be connected to the sub-pixels sP of the display panel 50 via multiple first gating lines GL11 to GL1n. The gating driver 20 can generate a gating signal based on the gating drive control signal CONT1 output from the timing controller 10. The gating driver 20 provides the generated gating signal to the sub-pixels sP to GL1n via the multiple first gating lines GL11.

[0048] In various embodiments, the gate driver 20 can also be connected to the sub-pixels sP of the display panel 50 via multiple second gate lines GL21 to GL2n. The gate driver 20 can provide sensing signals to the sub-pixels sP via the multiple second gate lines GL21 to GL2n. The sensing signals can be provided to the sub-pixels to measure the characteristics of the driving transistors and / or light-emitting elements located inside the sub-pixels sP.

[0049] The data driver 30 can be connected to the sub-pixels sP of the display panel 50 via multiple data lines DL1 to DLm. The data driver 30 can generate a data signal based on the image data DATA output from the timing controller 10 and the data drive control signal CONT2. The data driver 30 can provide the generated data signal to the sub-pixels sP via multiple data lines DL1 to DLm.

[0050] In various implementations, the data driver 30 may also be connected to the sub-pixels sP of the display panel 50 via multiple sensing lines SL1 to SLm (or reference lines). The data driver 30 may provide a reference voltage (or sensing voltage or initialization voltage) to the sub-pixels sP via the multiple sensing lines SL1 to SLm, or it may detect the state of each sub-pixel sP based on electrical signals fed back from the sub-pixels sP.

[0051] Power supply 40 can be connected to the sub-pixels sP of display panel 50 via multiple power lines PL1 and PL2. Power supply 40 can generate driving voltages to be supplied to display panel 50 based on power control signal CONT3. For example, the driving voltages may include a high-level driving voltage ELVDD and a low-level driving voltage ELVSS. Power supply 40 can supply the generated driving voltages ELVDD and ELVSS to the sub-pixels sP via power lines PL1 and PL2 corresponding to power supply 40.

[0052] Multiple subpixels sP are arranged in the display panel 50. For example, the subpixels sP can be arranged in a matrix on the display panel 50.

[0053] Each sub-pixel sP can be electrically connected to its corresponding gating line and data line. This sub-pixel sP can emit light with a brightness corresponding to the gating signal and data signal provided through the first gating lines GL11 to GL1n and the data lines DL1 to DLm, respectively.

[0054] Subpixels sP can display any one of the first to third colors. In one embodiment, each subpixel sP can display any one of red, green, and blue. In another embodiment, each subpixel sP can display any one of cyan, magenta, and yellow. In various embodiments, subpixels sP can be configured to display any one of four or more colors. For example, each subpixel sP can display any one of red, green, blue, and white.

[0055] The timing controller 10, the strobe driver 20, the data driver 30, and the power supply 40 can each be configured as a separate integrated circuit (IC), or they can be configured as an integrated circuit having at least some of the timing controller 10, strobe driver 20, data driver 30, and power supply 40 integrated with each other. For example, at least one of the data driver 30 and the power supply 40 can be configured as an integrated circuit integrated with the timing controller 10.

[0056] In addition, Figure 1 In this embodiment, the gate driver 20 and the data driver 30 are illustrated as components separate from the display panel 50; however, at least one of the gate driver 20 and the data driver 30 may be configured to be integrated with the display panel 50 depending on the panel type. For example, the gate driver 20 may be configured to be integrated with the display panel 50 depending on the gate in-panel (GIP) configuration.

[0057] Figure 2 According to the implementation method Figure 1 The circuit diagram of the sub-pixel is shown. Figure 2The example shows a sub-pixel sPij connected to the i-th gate lines GL1i and GL2i and the j-th data line DLj.

[0058] Reference Figure 2 The sub-pixel sPij includes a switching transistor ST, a driving transistor DT, a sensing transistor SST, a storage capacitor Cst, and a light-emitting element LD.

[0059] The first electrode (e.g., drain) of the switching transistor ST is electrically connected to the j-th data line DLj, and its second electrode (e.g., source) is electrically connected to the first node N1. The gate of the switching transistor ST is electrically connected to the i-th first gating line GL1i. When a gating signal with a gate on level is applied to the i-th first gating line GL1i, the switching transistor ST turns on and transmits the data signal applied to the j-th data line DLj to the first node N1.

[0060] The first electrode of the storage capacitor Cst is electrically connected to the first node N1, and its second electrode is connected to the first electrode of the light-emitting element LD. The storage capacitor Cst can be charged with a voltage corresponding to the difference between the voltage applied to the first node N1 and the voltage applied to the first electrode of the light-emitting element LD.

[0061] The first electrode (e.g., drain) of the driving transistor DT is configured to receive a high-potential driving voltage ELVDD, while its second electrode (e.g., source) is electrically connected to the first electrode (e.g., anode) of the light-emitting element LD. The gate of the driving transistor DT is electrically connected to a first node N1. When a gate-on voltage is applied to the gate through the first node N1, the driving transistor DT is turned on, and the amount of driving current flowing through the light-emitting element LD can be controlled in response to the voltage supplied to the gate.

[0062] The first electrode (e.g., drain) of the sensing transistor SST is electrically connected to the j-th sensing line SLj, while its second electrode (e.g., source) is electrically connected to the first electrode (e.g., anode) of the light-emitting element LD. The gate of the sensing transistor SST is electrically connected to the i-th second gating line GL2i. When a sensing signal with a gate-on level is applied to the i-th second gating line GL2i, the sensing transistor SST turns on and transmits the reference voltage applied to the j-th sensing line SLj to the first electrode of the light-emitting element LD.

[0063] The light-emitting element (LD) outputs light corresponding to the driving current. The LD can be an organic light-emitting diode (OLED) or a micro-inorganic light-emitting diode ranging in size from micrometers to nanometers, but embodiments of this disclosure are not limited thereto. Hereinafter, the technical concept of embodiments of this disclosure will be described with reference to embodiments in which the LD is configured as an organic light-emitting diode.

[0064] In embodiments of this disclosure, the structure of the sub-pixel sPij is not limited to... Figure 2 The structure is shown. According to an embodiment, the sub-pixel sPij may further include at least one element to compensate for the threshold voltage of the driving transistor DT, or to initialize the voltage of the gate of the driving transistor DT and / or the voltage of the first electrode of the light-emitting element LD.

[0065] exist Figure 2 In this disclosure, the switching transistor ST, driving transistor DT, and sensing transistor SST are exemplified as NMOS transistors, but the display device is not limited thereto. For example, at least some or all of the transistors constituting each sub-pixel sP may be configured as PMOS transistors. In various embodiments, each of the switching transistor ST, driving transistor DT, and sensing transistor SST may be configured as a low-temperature polycrystalline silicon (LTPS) thin-film transistor, an oxide thin-film transistor, or a low-temperature polycrystalline oxide (LTPO) thin-film transistor.

[0066] Figure 3 This is a top view illustrating a display panel according to an embodiment.

[0067] Reference Figure 3 A unit pixel P includes a pixel portion PA in which sub-pixels sP1, sP2, sP3, and sP4, each displaying a different color, are arranged, and a transparent portion TA is arranged adjacent to the pixel portion PA. The pixel portion PA and the transparent portion TA can be arranged continuously without being physically separated.

[0068] A unit pixel P can contain three or four sub-pixels, but is not limited to these.

[0069] In a pixel P, sub-pixels sP1, sP2, sP3, and sP4 are arranged in a pixel portion PA. In various embodiments, the pixel portion PA may each be provided with an extension extending in different directions and having a cross shape (i.e., a windmill shape). In this embodiment, one sub-pixel may be arranged in one extension. The structure of the pixel portion PA will be described in more detail below with reference to the accompanying drawings.

[0070] In this embodiment, the circuit section can be disposed between each adjacent extension section extending in different directions, wherein the circuit section has a triangular shape with three straight sides. Due to this shape of the pixel section PA, the transparent section TA can have an overall regular octagonal shape.

[0071] The transparent portion TA is the remaining portion excluding the pixel portion PA, and it does not contain sub-pixels sP1, sP2, sP3, and sP4. The edge of the transparent portion TA can be defined by two adjacent extensions and a triangular circuit portion disposed in the overlapping portion of the two extensions. In such an embodiment, the transparent portion TA can have an overall regular octagonal shape.

[0072] The transparent portion TA allows light to pass through and can be made transparent or translucent, allowing incident light to pass through. Therefore, transparent or translucent materials can be used for the layers stacked on top of the transparent portion TA. Through the structure of unit pixels P including the transparent portion TA, the display panel 50 can function as a transparent display device.

[0073] Each sub-pixel emits light through a light-emitting element (LD), and a light-emitting portion can be disposed in a pixel portion PA. In the pixel portion PA, the light-emitting portion can be disposed by overlapping a portion of an extension and a portion of a circuit portion. In such an embodiment, the light-emitting portion has a curved edge and can generally have a triangular shape. The curved edge can contact a transparent portion TA. In this case, the transparent portion TA can be surrounded by four sub-pixels belonging to different unit pixels. Furthermore, the transparent portion TA can have an edge defined by the light-emitting portion of each sub-pixel. The curved edge of the light-emitting portion contacting the transparent portion TA allows the transparent portion TA to have an overall circular shape.

[0074] The structure of the pixel portion PA and the shape of the transparent portion TA will be described in more detail below with reference to the accompanying drawings.

[0075] Figure 4 This is a top view that generally illustrates the structure of a unit pixel according to the implementation method.

[0076] Reference Figure 4 In a pixel arrangement structure based on four sub-pixels, a unit pixel P may include sub-pixels R, G, B, and W that emit red, green, blue, and white light, respectively. Each sub-pixel R, G, B, and W may be arranged at a predetermined or selected position within the pixel portion PA of the unit pixel P. The area where each sub-pixel R, G, B, and W emits light may be defined as a light-emitting portion EA1 or EA2. In the unit pixel P, a transparent portion TA may be formed in the area excluding the pixel portion PA. In the illustrated embodiment, the light-emitting portion EA1 or EA2 includes two light-emitting portions, but the embodiments of this disclosure are not limited to this, and one or two or more light-emitting portions may be provided.

[0077] The pixel unit PA can have a cross shape. That is, the pixel unit PA is provided with a first extension EXT1 to a fourth extension EXT4 (i.e., a first extension, a second extension, a third extension, and a fourth extension) extending in different directions from each other. Each of the first circuit units CA1 to the fourth circuit units CA4 is provided between adjacent extensions EXT1 to EXT4 extending in different directions from each other. Light-emitting units EA1 and EA2 are provided in the pixel unit PA. Each of the light-emitting units EA1 and EA2 is provided by overlapping a portion of each of the extensions EXT1 to EXT4 with a portion of each of the circuit units CA1 to CA4 corresponding to the light-emitting unit.

[0078] A sub-pixel R, G, B, or W can be disposed at each of two adjacent extensions EXT1 to EXT4 and in a circuit section CA1, CA2, CA3, or CA4 disposed between them. For example, the red sub-pixel R can be disposed at a portion of the first extension EXT1 and in the first circuit section CA1 disposed at the overlap of the first extension EXT1 and its adjacent second extension EXT2. The blue sub-pixel B can be disposed at a portion of the second extension EXT2 and in the second circuit section CA2 disposed at the overlap of the second extension EXT2 and its adjacent third extension EXT3. The green sub-pixel G can be disposed at a portion of the third extension EXT3 and in the third circuit section CA3 disposed at the overlap of the third extension EXT3 and its adjacent fourth extension EXT4. Additionally, the white sub-pixel W can be disposed at a portion of the fourth extension EXT4 and in the fourth circuit section CA4 disposed at the overlap of the fourth extension EXT4 and its adjacent first extension EXT1.

[0079] A wire is disposed in each of the first extension EXT1 to the fourth extension EXT4 to apply a signal to a circuit element disposed in each of the circuit sections CA1 to CA4. For example, the wire may include a reference wire. Figure 2 The description includes the gate lines GL1 and GL2, the data line DL, the sensing line SL, and the power lines PL1 and PL2.

[0080] The circuit elements constituting each sub-pixel R, G, B, and W are arranged in each of the first circuit section CA1 to the fourth circuit section CA4. For example, the circuit elements may include reference... Figure 2 The driving transistor DT, the switching transistor ST, the sensing transistor SST, and the storage capacitor Cst are described.

[0081] Specifically, in embodiments of this disclosure, each of the first circuit section CA1 to the fourth circuit section CA4 is configured to have a triangular shape with three straight sides. Of the three sides constituting circuit sections CA1 to CA4, the first side L1 contacts the side of each of the extensions EXT1 to EXT4 adjacent to the first side of each circuit section, the second side L2 contacts the side of each of the extensions EXT1 to EXT4 adjacent to the second side of each circuit section, and the third side L3 contacts the transparent portion TA. Each of the circuit sections CA1 to CA4 may have a right-angled triangle shape with its longest side contacting the transparent portion TA, but is not limited to this. Although the third side L3 is in... Figure 4 The middle part is shown as a dashed line and appears to be separated from the transparent part TA, but the third side L3 can contact the transparent part TA as just described.

[0082] In this embodiment, the length of the third side L3 of each of the circuit portions CA1 to CA4 is longer than the length of the fourth side L4 of each of the extensions EXT1 to EXT4 that do not contact each of the circuit portions CA1 to CA4 but contact the transparent portion TA. For example, the length of the third side L3 of each of the circuit portions CA1 to CA4 may be approximately twice the length of the fourth side L4 of each of the extensions EXT1 to EXT4 that do not contact each of the circuit portions CA1 to CA4 but contact the transparent portion TA. In this case, the third side L3 and the fourth side L4 of a sub-pixel surround the transparent portion. The ratio of the length of the third side L3 to the length of the fourth side L4 of the extension adjacent to the circuit portion is 1:1 / 2. Therefore, a transparent portion TA surrounded by four sub-pixels R, G, B, and W, which belong to different unit pixels respectively, can have an overall regular octagonal shape. In such an embodiment, the distance between the center of each of the extensions EXT1 to EXT4 and the center of the transparent portion TA adjacent to it, relative to the first axis, and the distance between them, relative to the second axis, are the same. For example, as Figure 4 As shown, the transparent portion TA can be adjacent to the first extension EXT1 and the second extension EXT2. The distance between the center of the first extension EXT1 and the center of the transparent portion TA along the AXIS1 direction can be substantially the same as the distance between the center of the second extension EXT2 and the center of the transparent portion TA along the AXIS2 direction. In one embodiment, the distance is measured between the center of the respective extensions EXT1-EXT4 and the center of the transparent portion TA. In one embodiment, the distance is measured between the nearest edge of the respective extensions EXT1-EXT4 and the center of the transparent portion TA. For example, the nearest edge can be the fourth edge L4. The distance between each of the first extension, the second extension, the third extension, and the fourth extension EXT1-EXT4 and the center of the transparent portion TA adjacent to it can be substantially the same (e.g., independent of the reference axes AXIS1, AXIS2).

[0083] Therefore, when the transparent portion TA is a regular octagon, light diffraction at the edges of the transparent portion TA can be minimized, and thus haze at its edges can be reduced. This improves the visibility of the transparent portion TA, which in turn improves the sharpness of the entire display panel 50.

[0084] Each sub-pixel R, G, B, and W emits light through a light-emitting element LD arranged in a light-emitting portion EA1 or EA2. In embodiments of this disclosure, each sub-pixel R, G, B, and W may include two light-emitting portions EA1 and EA2. The light-emitting portions EA1 or EA2 of the sub-pixel are arranged by overlapping a portion of each of the circuit portions CA1 to CA4 with each of the extension portions EXT1 to EXT4 of the sub-pixel. When each sub-pixel R, G, B, and W has multiple light-emitting portions EA1 and EA2, each of the multiple light-emitting portions EA1 and EA2 may overlap with a portion of each of the circuit portions CA1 to CA4 and each of the extension portions EXT1 to EXT4. Therefore, when the light-emitting portions EA1 and EA2 of the sub-pixel are arranged by overlapping a portion of each of the circuit portions CA1 to CA4 with each of the extension portions EXT1 to EXT4 of the sub-pixel, parasitic capacitors between adjacent sub-pixels can be prevented.

[0085] In this embodiment, sub-pixels R, G, B, and W have shapes and structures that are symmetrical with respect to the first axis AXIS1 and the second axis AXIS2, respectively, with respect to adjacent sub-pixels R, G, B, and W. That is, red sub-pixel R and white sub-pixel W are symmetrical with respect to the second axis AXIS2, while green sub-pixel G and blue sub-pixel B are symmetrical with respect to the second axis AXIS2. Additionally, red sub-pixel R and blue sub-pixel B are symmetrical with respect to the first axis AXIS1, while white sub-pixel W and green sub-pixel G are symmetrical with respect to the first axis AXIS1. Except for mirroring with respect to either the first axis AXIS1 or the second axis AXIS2, sub-pixels R, G, B, and W have substantially similar shapes, areas, and structures. That is, circuit elements, wires, and light-emitting elements located in sub-pixels R, G, B, and W can have substantially similar shapes and areas.

[0086] Subpixels R, G, B, and W have essentially similar shapes and structures, so they can be designed identically in the same way, and deviations between them can be minimized. Furthermore, when changing the circuitry (e.g., changing the transistor size), all subpixels R, G, B, and W can be easily modified, thus increasing the design freedom of the display panel 50.

[0087] In the following description, the planar structure and stacked structure (cross-sectional structure) of the pixel unit PA according to the embodiment will be described in more detail with reference to the following figures.

[0088] Figure 5 It provides a detailed example. Figure 4 A top view of the structure of a unit pixel; Figure 6 It is along Figure 5 A cross-sectional view taken from line II′; and Figure 7 It is along Figure 5 The cross-sectional view taken from line II-II′.

[0089] exist Figure 5 The diagram illustrates two adjacent unit pixels, P1 and P2. Each of unit pixels P1 and P2 may include sub-pixels R, G, B, and W that emit red, green, blue, and white light, respectively. Each sub-pixel R, G, B, and W may be arranged at a predetermined or selected position within the pixel portion PA of each unit pixel P1 and P2. The area emitting light for each sub-pixel R, G, B, and W may be defined as a light-emitting portion EA1 or EA2. A transparent portion TA may be formed in the area of ​​each unit pixel P1 and P2 other than the pixel portion PA.

[0090] As shown in the figure, the pixel part PA includes a second extension EXT2 and a fourth extension EXT4 extending in opposite directions along the first axis AXIS1, and a first extension EXT1 and a third extension EXT3 extending in opposite directions along the second axis AXIS2 intersecting the first axis AXIS1.

[0091] In embodiments of this disclosure, each of the extensions EXT1 to EXT4 has a substantially similar shape and structure (configuration) to each other. That is, each of the extensions EXT1 to EXT4 has the same length and width in its extending direction. In this embodiment, the extensions EXT1 to EXT4 each have a shape that is symmetrical with respect to the first axis AXIS1 and the second axis AXIS2 with respect to the adjacent different extensions EXT1 to EXT4.

[0092] The conductors are disposed in extensions EXT1 to EXT4. For example, the data line DL and the sensing line SL are disposed in the first extension EXT1 and the third extension EXT3, such that the data line DL and the sensing line SL extend along the second axis AXIS2, and the first gate line GL1 and the second gate line GL2 are disposed in the second extension EXT2 and the fourth extension EXT4, such that the first gate line GL1 and the second gate line GL2 extend along the first axis AXIS1. That is, the data line DL and the sensing line SL extend via the first extension EXT1 and the third extension EXT3, and the first gate line GL1 and the second gate line GL2 extend via the second extension EXT2 and the fourth extension EXT4.

[0093] In embodiments of this disclosure, the data line DL may include a first sub-data line DL-1, configured to apply data signals to white sub-pixels W and green sub-pixels G that are adjacent to each other along the extension direction of the data line DL (i.e., the second axis AXIS2). Additionally, the data line DL may include a second sub-data line DL-2, configured to apply data signals to red sub-pixels R and blue sub-pixels B that are adjacent to each other along the extension direction of the data line DL.

[0094] Each of the first gate line GL1, the second gate line GL2, the data line DL, and the sensing line SL can be connected to a circuit element located at each of the circuit sections CA1 to CA4 through a contact hole formed in each of the circuit sections CA1 to CA4.

[0095] Power lines PL1 and PL2 are provided in each of the extensions EXT1 to EXT4. Power lines PL1 and PL2 may include a first power line PL1 configured to apply a high-potential drive voltage ELVDD to each sub-pixel R, G, B, and W, and a second power line PL2 configured to apply a low-potential drive voltage ELVSS.

[0096] Each of the first power line PL1 and the second power line PL2 may extend along the first axis AXIS1 and the second axis AXIS2 to have a mesh structure. In such an embodiment, each of the first power line PL1 and the second power line PL2 has a first pattern extending along the first axis AXIS1 from each of the first extension EXT1 and the third extension EXT3, and a second pattern extending along the second axis AXIS2 from each of the second extension EXT2 and the fourth extension EXT4. The first pattern and the second pattern may be electrically connected to each other.

[0097] Generally, the thickness and width of the first power line PL1, to which the high-potential drive voltage ELVDD is applied, can be larger than those of the other wires. Therefore, when the first power line PL1 is only arranged in some portions of the extensions EXT1 to EXT4, the width of each extension EXT1 to EXT4 is set to be different from each other, so the extensions EXT1 to EXT4 may not have similar shapes to each other.

[0098] In embodiments of this disclosure, each of the first power line PL1 and the second power line PL2 has a mesh structure by being arranged in all extensions EXT1 to EXT4, so that the number and total width of the conductors provided in all extensions EXT1 to EXT4 can be configured to be the same. As a result, since each of the first power line PL1 and the second power line PL2 has a mesh structure, all extensions EXT1 to EXT4 can have a shape and structure that are substantially similar to each other.

[0099] However, the embodiments disclosed herein are not limited thereto. That is, in various other embodiments, the first pattern of at least one of the first power line PL1 and the second power line PL2 may be omitted in pixel P.

[0100] In this embodiment, the first pattern of either the first power line PL1 or the second power line PL2 may be provided in each of the first extension EXT1 and the third extension EXT3. For example, the first pattern of the first power line PL1 may be provided in each of the first extension EXT1 and the third extension EXT3 of either of the two adjacent unit pixels P1 and P2, and the first pattern of the second power line PL2 may be provided in each of the first extension EXT1 and the third extension EXT3 of the other of the two adjacent unit pixels P1 and P2.

[0101] As described above, each of the extensions EXT1 to EXT4 has the same width. Therefore, when either the first power line PL1 or the second power line PL2 is provided only in each of the first extension EXT1 and the third extension EXT3, the provided power line PL1 or PL2 can be formed to have a larger width. Therefore, the widths of the power lines PL1 and PL2 can be freely adjusted, so the display panel 50 can stably provide driving voltage to the unit pixels P1 and P2.

[0102] In one implementation, in a unit pixel P2 without a first pattern provided by the first power line PL1, a jumper JPN can be provided between them, connecting the second pattern of the first power line PL1 to the driving transistor DT. The jumper JPN can extend in the direction of the second axis AXIS2. The first and second ends of the jumper JPN can be connected to the drain of the driving transistor DT provided in the associated unit pixel P2. The jumper JPN can be connected to the second pattern of the first power line PL1 via a contact hole. Therefore, the high-potential driving voltage ELVDD applied through the second pattern of the first power line PL1 can be transmitted to the associated unit pixel P2.

[0103] Each of the first circuit section CA1 to the fourth circuit section CA4 is disposed between each of the adjacent extensions EXT1 to EXT4 extending in different directions. For example, the first circuit section CA1 is disposed between the second extension EXT2 extending along the first axis AXIS1 and the first extension EXT1 extending along the second axis AXIS2 and adjacent to the second extension EXT2. The second circuit section CA2 is disposed between the third extension EXT3 extending along the second axis AXIS2 and the second extension EXT2 extending along the first axis AXIS1 and adjacent to the third extension EXT3. The third circuit section CA3 is disposed between the fourth extension EXT4 extending along the first axis AXIS1 and the third extension EXT3 extending along the second axis AXIS2 and adjacent to the fourth extension EXT4. Furthermore, the fourth circuit section CA4 is disposed between the first extension EXT1 extending along the second axis AXIS2 and the fourth extension EXT4 extending along the first axis AXIS1 and adjacent to the first extension EXT1.

[0104] In the embodiment, circuit sections CA1 to CA4 each have a shape that is symmetrical with respect to the first axis AXIS1 and the second axis AXIS2 with respect to adjacent different circuit sections CA1 to CA4. In addition to the symmetry between circuit sections CA1 to CA4 and adjacent different circuit sections CA1 to CA4, each of the first circuit sections CA1 to the fourth circuit section CA4 has a shape and structure that are substantially similar to each other with respect to adjacent different circuit sections CA1 to CA4.

[0105] Circuit elements are disposed in each of the circuit sections CA1 to CA4. For example, the active layer constituting a transistor and its source, drain, and gate, as well as the electrodes constituting a capacitor, can be disposed in each of the circuit sections CA1 to CA4.

[0106] The electrodes of the transistor and capacitor can be electrically connected to the wires formed in each of the extensions EXT1 to EXT4 through contact holes. The circuit elements provided in each of the circuit sections CA1 to CA4 can control the amount of current applied to the light-emitting element LD in response to a signal applied through the wires.

[0107] Light-emitting portions EA1 and EA2 are disposed in the pixel portion PA. Each light-emitting portion EA1 and EA2 is disposed by overlapping a portion of each of the extension portions EXT1 to EXT4 with a portion of each of the circuit portions CA1 to CA4 corresponding to the light-emitting portion.

[0108] In the implementation, each sub-pixel R, G, B, and W may include two light-emitting portions EA1 and EA2. When each sub-pixel R, G, B, and W is provided with multiple light-emitting portions EA1 and EA2, each light-emitting portion EA1 and EA2 can be provided by overlapping a portion of each of the extensions EXT1 to EXT4 with each of the circuit portions CA1 to CA4 of the associated sub-pixel R, G, B, or W. For example, in a sub-pixel, a first light-emitting portion EA1 can be provided by overlapping a portion of the circuit portion with an extension provided on the first side of the circuit portion, and a second light-emitting portion EA2 can be provided by overlapping a second portion of the circuit portion with an extension provided on the second side of the circuit portion. Therefore, when light-emitting portions EA1 and EA2 are provided by overlapping a portion of each of the extensions EXT1 to EXT4 with each of the circuit portions CA1 to CA4 of the associated sub-pixel R, G, B, or W, parasitic capacitance between adjacent sub-pixels R, G, B, and W can be prevented.

[0109] The shape of the light-emitting portion EA1 or EA2 corresponds to the shape of each of the extensions EXT1 to EXT4 at the portion where the light-emitting portion EA1 or EA2 overlaps with a portion of each of the extensions EXT1 to EXT4. Furthermore, the shape of the light-emitting portion EA1 or EA2 corresponds to the shape of each of the circuit portions CA1 to CA4 at the portion where the light-emitting portion EA1 or EA2 overlaps with a portion of each of the circuit portions CA1 to CA4. As described below, the light-emitting portion EA1 or EA2 can be defined by the exposed portion of the anode electrode AE ​​of the light-emitting element LD, therefore this shape of the light-emitting portion EA1 or EA2 can correspond to the patterned shape of the anode electrode AE.

[0110] The light-emitting element LD is disposed at the light-emitting section EA1 or EA2. The light-emitting element LD disposed at the light-emitting section EA1 and EA2 is electrically connected to the driving transistor DT and receives driving current through the driving transistor DT.

[0111] In the following text, it will be described Figure 5 The stacked structure (cross-sectional structure) of a unit pixel P is shown.

[0112] Reference Figure 6 and Figure 7 The unit pixel P may include a substrate 100, and a circuit element layer CEL and a light-emitting element layer LDL disposed on the substrate 100.

[0113] The substrate 100, which serves as the base for the display panel 50, can be a light-transmitting substrate. The substrate 100 can be a rigid substrate, including glass or tempered glass, or a flexible substrate made of plastic. For example, the substrate 100 can be made of plastic materials such as polyimide, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), and polycarbonate (PC). However, the material of the substrate 100 is not limited to the materials described above.

[0114] At least one transistor and capacitor, as well as wires, constituting the circuit elements of each sub-pixel R, G, B, and W, can be arranged at the circuit element layer CEL. A transparent insulating layer can be arranged between the electrodes constituting each circuit element, such that the electrodes are electrically insulated between them. The circuit elements can be covered with a passivation layer and protected from foreign matter.

[0115] The outer coating OC can be formed on the circuit element layer CEL. The outer coating OC can be a planarization film used to reduce the lower structural steps, and can be made of organic materials such as polyimide, benzocyclobutene series resins or acrylates.

[0116] A light-emitting element layer (LDL) is formed on top of an outer coating layer (OC) and includes light-emitting elements (LDs). Each light-emitting element (LD) includes an anode electrode (AE), a light-emitting layer (EML), and a cathode electrode (CE). In the case where the display panel 50 is a display panel that emits light from its front surface, the anode electrode (AE) can be a reflective electrode, while the cathode electrode (CE) can be a transmissive electrode. However, in the case where the display panel 50 is a display panel that emits light from its rear surface, the anode electrode (AE) can be a transmissive electrode, while the cathode electrode (CE) can be a reflective electrode.

[0117] The anode electrode AE ​​is formed on the outer coating OC. The anode electrode AE ​​can be made of a transparent conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), or zinc oxide (ZnO). When the anode electrode AE ​​is a reflective electrode, it may include a reflective layer. The reflective layer can be made of aluminum (Al), copper (Cu), silver (Ag), nickel (Ni), or alloys thereof. In an embodiment, the reflective layer may be made of a silver, palladium, or copper alloy (APC).

[0118] A dammed layer (BNK) is formed on top of the outer coating (OC). The dammed layer (BNK) can be a defining layer that defines the light-emitting portion (EA1) or (EA2) for each sub-pixel (R, G, B, and W). In a unit pixel (P), the remaining area besides the light-emitting portion (EA1) or (EA2) can be defined as a non-light-emitting portion. The dammed layer (BNK) can be formed from an organic film such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin.

[0119] The dam portion (BNK) can be formed to cover a portion of the anode electrode (AE) (e.g., a portion of its edge), and the light-emitting layer (EML) is formed on the exposed portion of the anode electrode (AE) not covered by the dam portion (BNK). The light-emitting layer (EML) can have a multilayer thin-film structure including a light-generating layer. The region where the light-emitting layer (EML) is formed can be defined as the light-emitting portion (EA1) or (EA2) of each sub-pixel (R, G, B, and W). In the light-emitting portion (EA1) or (EA2), the anode electrode (AE), the light-emitting layer (EML), and the cathode electrode (CE) are stacked in direct contact with each other.

[0120] The cathode electrode (CE) is formed on the light-emitting layer (EML). The CE can be widely formed in the light-emitting portion (EA1 or EA2) and the non-light-emitting portion. The CE can be formed from a transparent conductive material (TCO) or a semi-transparent conductive material such as molybdenum (Mo), tungsten (W), silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), or alloys thereof. When the CE is formed from a semi-transparent conductive material, the light output efficiency of the cathode electrode can be increased due to its microcavity.

[0121] A PAC (Polymer Encapsulation Layer) can be used to cover circuit elements and light-emitting elements. The PAC prevents external moisture from entering the circuit elements and light-emitting elements. The PAC can be formed of inorganic insulating materials or can be configured in a structure in which inorganic and organic insulating materials are alternately layered, but is not limited to these.

[0122] The cover substrate 200 can be formed on the encapsulation layer PAC. The cover substrate 200 can be adhered to the encapsulation layer PAC by an adhesive.

[0123] A color filter CF can be formed between the encapsulation layer PAC and the cover substrate 200. The color filter CF can be configured to overlap with a portion of the light-emitting portion EA1 or EA2. The color filter CF is a wavelength-selective filter that allows light in a specific wavelength band to pass through while blocking light in other specific wavelength bands, selectively allowing only incident light in a portion of the wavelength band to pass through. The color filter CF can be made of a photosensitive resin containing colorants such as pigments or dyes. The light generated in the light-emitting element LD and passing through the color filter CF can be any of red, green, and blue. The color filter CF used to display the white sub-pixel W can be omitted.

[0124] A black matrix BM is formed between the color filters CF and prevents light leakage between the light-emitting parts EA1 and EA2. In the embodiment of this disclosure, the pixel part PA has a cross shape, so the sub-pixels R, G, B and W, which have different colors from each other, are spaced apart from each other in different directions, thus minimizing light leakage between the sub-pixels R, G, B and W. Therefore, the black matrix BM for the white sub-pixel W can be omitted.

[0125] In the region where the white sub-pixels W are arranged, the color filter CF and the black matrix BM are omitted. Therefore, Figure 7 The light-emitting portion EA1 or EA2 of the white sub-pixel W shown is greater than... Figure 6 The luminous portions EA1 and EA2 of the other color subpixels R, G, and B shown have larger areas. As the area of ​​the luminous portion EA1 or EA2 of the white subpixel W increases, the luminous loss of the white subpixel W is minimized, and its image quality is improved.

[0126] Specifically, when the color filter CF is omitted in the white sub-pixel W, the black matrix BM between the sub-pixels adjacent to the white sub-pixel W can be omitted. In this case, the area occupied by the black matrix BM in a unit pixel P can be significantly reduced. As a result, the area of ​​the transparent portion TA above the display panel 50 can be relatively increased, and the transparency of the display device can be effectively improved.

[0127] Figure 8 This is a top view that roughly illustrates the structure of a unit pixel according to another embodiment.

[0128] Reference Figure 8 In a pixel arrangement structure based on four sub-pixels, a unit pixel P may include sub-pixels R, G, B, and W that emit red, green, blue, and white light, respectively. Each sub-pixel R, G, B, and W may be arranged at a predetermined or selected position within the pixel portion PA of the unit pixel P. The area where each sub-pixel R, G, B, and W emits light may be defined as a light-emitting portion EA1 or EA2. In the unit pixel P, a transparent portion TA may be formed in an area other than the pixel portion PA.

[0129] The pixel unit PA can have a cross shape. That is, the pixel unit PA is provided with first extensions EXT1 to fourth extensions EXT4 extending in different directions from each other. Each of the first circuit units CA1 to fourth circuit units CA4 is disposed between each of the extensions EXT1 to EXT4 extending in different directions from each other. Light-emitting units EA1 and EA2 can be disposed in the pixel unit PA. Each light-emitting unit EA1 and EA2 is disposed by overlapping a portion of the extensions EXT1 to EXT4 with its corresponding circuit units CA1 to CA4. A sub-pixel R, G, B, or W can be disposed between two adjacent extensions among the extensions EXT1 to EXT4 and in a circuit unit disposed between them.

[0130] A wire is disposed in the first extension EXT1 to the fourth extension EXT4 so as to apply a signal to a circuit element disposed in each of the circuit sections CA1 to CA4. For example, the wire may include a reference wire. Figure 2 The description includes the gate lines GL1 and GL2, the data line DL, the sensing line SL, and the power lines PL1 and PL2.

[0131] The circuit elements constituting each sub-pixel R, G, B, and W are disposed in the first circuit section CA1 to the fourth circuit section CA4. For example, the circuit elements may include reference... Figure 2 The driving transistor DT, the switching transistor ST, the sensing transistor SST, and the storage capacitor Cst are described.

[0132] Each sub-pixel R, G, B, and W emits light through a light-emitting element LD arranged in a light-emitting portion EA1 or EA2. In embodiments of this disclosure, each sub-pixel R, G, B, and W may include two light-emitting portions EA1 and EA2. The light-emitting portions EA1 or EA2 of the sub-pixel are configured by overlapping a portion of each of the circuit portions CA1 to CA4 with each of the extension portions EXT1 to EXT4 of the sub-pixel. When each sub-pixel R, G, B, and W has multiple light-emitting portions EA1 and EA2, each of the multiple light-emitting portions EA1 and EA2 may overlap with a portion of the circuit portion CA and the conductive portion.

[0133] Specifically, in embodiments of this disclosure, each light-emitting portion EA1 and EA2 has a curved edge and is generally triangular in shape. One of the curved edges can contact the transparent portion TA. The curved edge of each light-emitting portion EA1 and EA2 protrudes further toward the transparent portion TA than each of the circuit portions CA1 to CA4 that overlap with a portion of the light-emitting portion. Therefore, the transparent portion TA can have an edge defined by the curved edge of each light-emitting portion EA1 and EA2. For example, the transparent portion TA can be surrounded by four adjacent sub-pixels arranged in each distinct unit pixel. Furthermore, the transparent portion TA can have an edge defined by the curved edge of the light-emitting portion in each of the four sub-pixels. In such embodiments, the transparent portion TA can generally have a circular or elliptical shape.

[0134] Therefore, when each transparent part TA has an overall circular shape, the diffraction of light at the edge of each transparent part TA can be greater than that at the edge of the transparent part TA. Figure 4 The embodiment shown further reduces this.

[0135] In embodiments of this disclosure, sub-pixels R, G, B, and W have shapes and structures that are symmetrical with respect to the first axis AXIS1 and the second axis AXIS2 with respect to adjacent different sub-pixels R, G, B, and W, respectively. Since sub-pixels R, G, B, and W have substantially similar shapes and structures to each other, they can be designed identically in the same manner, and deviations between them can be minimized. Furthermore, when changing the circuitry (e.g., changing the transistor size), all sub-pixels R, G, B, and W can be easily modified, thus improving the design freedom of the display panel 50.

[0136] In the following, the planar structure of the pixel portion PA according to the embodiment will be described in more detail with reference to the accompanying drawings.

[0137] Figure 9 It provides a detailed example. Figure 8 The top view of the structure of a unit pixel is shown.

[0138] exist Figure 9 The diagram illustrates two adjacent unit pixels, P1 and P2. Each unit pixel P1 and P2 may include sub-pixels R, G, B, and W that emit red, green, blue, and white light, respectively. Each sub-pixel R, G, B, and W may be located at a predetermined or selected position within the pixel portion PA of each unit pixel P1 and P2. The area where each sub-pixel R, G, B, and W emits light may be defined as a light-emitting portion EA1 or EA2. A transparent portion TA may be formed in the area of ​​each unit pixel P1 and P2 other than the pixel portion PA.

[0139] The pixel part PA can have a cross shape. As shown in the figure, the pixel part PA includes a second extension EXT2 and a fourth extension EXT4 extending in opposite directions along the first axis AXIS1, and a first extension EXT1 and a third extension EXT3 extending in opposite directions along the second axis AXIS2 intersecting the first axis AXIS1.

[0140] In embodiments of this disclosure, each of the extensions EXT1 to EXT4 has a substantially similar shape and area to each other. That is, each of the extensions EXT1 to EXT4 has the same length and width in its extending direction. In such an embodiment, the extensions EXT1 to EXT4 have a shape that is symmetrical with respect to the first axis AXIS1 and the second axis AXIS2 with respect to the adjacent different extensions EXT1 to EXT4.

[0141] The wires are provided in the extensions EXT1 to EXT4. For example, the data line DL and the sensing line SL are provided in the first extension EXT1 and the third extension EXT3, such that the data line DL and the sensing line SL extend along the second axis AXIS2, and the first gate line GL1 and the second gate line GL2 are provided in the second extension EXT2 and the fourth extension EXT4, such that the first gate line GL1 and the second gate line GL2 extend along the first axis AXIS1.

[0142] In one implementation, the data line DL may include a first sub-data line DL-1, configured to apply data signals to white sub-pixels W and green sub-pixels G that are adjacent to each other along the extension direction of the data line DL (i.e., the second axis AXIS2). Additionally, the data line DL may include a second sub-data line DL-2, configured to apply data signals to red sub-pixels R and blue sub-pixels B that are adjacent to each other along the extension direction of the data line DL.

[0143] Power lines PL1 and PL2 are provided in each of the extensions EXT1 to EXT4. Power lines PL1 and PL2 may include a first power line PL1 configured to apply a high-potential drive voltage ELVDD to each sub-pixel R, G, B, and W, and a second power line PL2 configured to apply a low-potential drive voltage ELVSS to each sub-pixel R, G, B, and W.

[0144] Each of the first power line PL1 and the second power line PL2 may extend along the first axis AXIS1 and the second axis AXIS2 to have a mesh structure. In such an embodiment, each of the first power line PL1 and the second power line PL2 has a first pattern extending along the first axis AXIS1 from each of the first extension EXT1 and the third extension EXT3, and a second pattern extending along the second axis AXIS2 from each of the second extension EXT2 and the fourth extension EXT4. The first pattern and the second pattern may be electrically connected to each other.

[0145] In an implementation, the first pattern of either the first power line PL1 or the second power line PL2 may be provided in each of the first extension EXT1 and the third extension EXT3. For example, the first pattern of the first power line PL1 may be provided in each of the first extension EXT1 and the third extension EXT3 of either of the two adjacent unit pixels P1 and P2, and the first pattern of the second power line PL2 may be provided in each of the first extension EXT1 and the third extension EXT3 of the other of the two adjacent unit pixels P1 and P2.

[0146] Each of the first circuit section CA1 to the fourth circuit section CA4 is disposed between each of the adjacent extensions EXT1 to EXT4 extending in different directions. The circuit sections CA1 to CA4 have shapes that are symmetrical with respect to the first axis AXIS1 and the second axis AXIS2, respectively, with respect to the adjacent different circuit sections CA1 to CA4. Furthermore, each of the first circuit sections CA1 to the fourth circuit section CA4 has a shape and area that are substantially similar to each other.

[0147] Circuit elements are disposed in each of the circuit sections CA1 to CA4. For example, the active layer constituting a transistor and its source, drain, and gate, as well as the electrodes constituting a capacitor, can be disposed in each of the circuit sections CA1 to CA4.

[0148] Light-emitting units EA1 and EA2 are disposed in pixel unit PA. Each light-emitting unit EA1 and EA2 is disposed by overlapping a portion of each of the extensions EXT1 to EXT4 with each of the circuit units CA1 to CA4 corresponding to the light-emitting unit.

[0149] In an implementation, each sub-pixel R, G, B, and W may include two light-emitting portions EA1 and EA2. When each sub-pixel R, G, B, and W is provided with multiple light-emitting portions EA1 and EA2, each light-emitting portion EA1 and EA2 can be provided by overlapping a portion of each of the extensions EXT1 to EXT4 with each of the circuit portions CA1 to CA4 of the associated sub-pixel R, G, B, or W.

[0150] The light-emitting element LD is disposed in the light-emitting section EA1 or EA2. The light-emitting element LD disposed in the light-emitting section EA1 and EA2 is electrically connected to the driving transistor DT and receives the driving voltage through the driving transistor DT.

[0151] The connection relationships of the circuit elements set in the circuit section CA will be briefly described below.

[0152] The first electrode of the driving transistor DT can be connected to the first power supply line PL1, and the second electrode of the driving transistor DT can be connected to the anode electrode AE ​​via the first electrode of the storage capacitor Cst. The gate of the driving transistor DT can be connected to the second electrode of the storage capacitor Cst.

[0153] The first electrode of the switching transistor ST can be connected to the data line DL-1, and the second electrode of the switching transistor ST can be connected to the gate of the driving transistor DT via the second electrode of the storage capacitor Cst. The gate of the switching transistor ST can be connected to the first gate line GL1.

[0154] The first electrode of the sensing transistor SST can be connected to the sensing line SL, and the second electrode of the sensing transistor SST can be connected to the first electrode of the storage capacitor Cst. The gate of the sensing transistor SST can be connected to the second gate line GL2.

[0155] Reference Figure 9 and Figure 10 The anode electrode AE ​​has an extension extending toward the transparent portion TA. When the anode electrode AE ​​includes multiple anode electrodes, each of the multiple anode electrodes has an extension extending toward the transparent portion TA, and these extensions can be connected to each other.

[0156] Additionally, the first electrode (e.g., the lower electrode) of the capacitor Cst has an extension extending toward the transparent portion TA. The extension of the anode electrode AE ​​is arranged to overlap with a portion of the extension of the capacitor Cst.

[0157] A contact hole CH is formed in the region where the extensions of the anode electrode AE ​​and the capacitor Cst overlap. The contact hole CH forms a region that exposes the first electrode of the capacitor Cst. The anode electrode AE ​​can be connected to the first electrode of the capacitor Cst through the contact hole CH.

[0158] The first extension EXT1 and the second extension EXT2 can be connected to the first extension line SEL1 and the second extension line SEL2 respectively through the first contact hole CH1 and the second contact hole CH2.

[0159] This structure can be used to repair pixels (PX). In this embodiment, when one of the light-emitting portions EA1 and EA2 fails, the driving transistor DT is electrically disconnected from the associated anode electrode. For example, the disconnection can be performed by laser cutting. For instance, a laser is emitted towards the extension of the defective anode electrode to perform laser cutting. In the light-emitting portions EA1 and EA2, the anode electrode operates independently. Therefore, even if one anode electrode is disconnected from the storage capacitor Cst, the other anode electrode can still function normally.

[0160] While embodiments of the present disclosure have been described above with reference to the accompanying drawings, it should be understood that the technical configuration of the display device of the present disclosure can be embodied in other specific forms by those skilled in the art without altering the technical spirit or characteristics of the present disclosure. Therefore, it should be understood that the above embodiments are exemplary and not restrictive in all respects. Furthermore, the scope of the present disclosure is indicated by the claims described later, rather than by the detailed description above. Additionally, all variations or modifications derived from the meaning and scope of the claims and their equivalents should be understood to be included within the scope of this disclosure.

[0161] Cross-reference to related applications

[0162] This application claims priority to Korean Patent Application No. 10-2020-0181013, filed on December 22, 2020, the entire contents of which are incorporated herein by reference for all purposes.

Claims

1. A display device, the display device comprising: A pixel section, wherein sub-pixels are provided in the pixel section; as well as At least one transparent portion is disposed in a region adjacent to the pixel portion and allows external light to pass through it. The pixel portion includes: A first extension, a second extension, a third extension, and a fourth extension, wherein the first extension, the second extension, the third extension, and the fourth extension extend in different directions from each other and include conductive wires; and A first circuit section, a second circuit section, a third circuit section, and a fourth circuit section, each of which is disposed between a corresponding adjacent pair of extensions in the first extension, the second extension, the third extension, and the fourth extension, and includes circuit elements for each of the sub-pixels. Each of the first circuit section, the second circuit section, the third circuit section, and the fourth circuit section has a triangular shape, which includes: The first side is in contact with one of the following extensions that is adjacent to the first side: the first extension, the second extension, the third extension, and the fourth extension. The second side contacts another extension adjacent to the first extension, the second extension, the third extension, and the fourth extension; and The third side is in contact with the transparent part.

2. The display device according to claim 1, wherein, Each of the first extension, the second extension, the third extension, and the fourth extension has a shape symmetrical with respect to the first axis and the second axis intersecting the first axis, and to the other extensions of the first, second, third, and fourth extensions adjacent to it. Each of the first circuit section, the second circuit section, the third circuit section, and the fourth circuit section has a shape that is symmetrical with respect to the first axis and the second axis and to the other circuit sections of the first circuit section, the second circuit section, the third circuit section, and the fourth circuit section adjacent to it.

3. The display device according to claim 1, wherein, The length of the third side of each of the first, second, third, and fourth circuit portions is longer than the length of the fourth side located at the corresponding extension of the first, second, third, and fourth extension portions and in contact with the at least one transparent portion.

4. The display device according to claim 1, wherein, The distance between the center of each of the first extension, the second extension, the third extension, and the fourth extension and the center of its adjacent corresponding transparent portion is the same.

5. The display device according to claim 1, wherein, The at least one transparent portion is partially surrounded by the third side of the circuit portion and the first extension portion, the second extension portion, the third extension portion, and the fourth extension portion adjacent to the circuit portion.

6. The display device according to claim 1, wherein, The wire includes: At least one first power line, the at least one first power line being configured to apply a first potential driving voltage to the sub-pixel; and At least one second power line is configured to apply a second potential driving voltage to the sub-pixel. Wherein, the first potential driving voltage is greater than the second potential driving voltage. Each of the at least one first power line and the at least one second power line includes a first pattern, which extends along a first axis via each of the first extension and the third extension. At least one of the at least one first power line and the at least one second power line includes a second pattern that extends along a second axis via each of the second extension and the fourth extension, the second axis intersecting the first axis.

7. The display device according to claim 1, wherein, The wire includes: A first power line, configured to apply a first potential driving voltage to the sub-pixel, and A second power line is configured to apply a second potential driving voltage to the sub-pixel. Wherein, the first potential driving voltage is greater than the second potential driving voltage. Each of the first power line and the second power line includes a second pattern, the second pattern extending along a second axis via each of the second extension and the fourth extension. At least one of the first power line and the second power line includes a first pattern that extends along a first axis via the first extension and each of the third extensions, the first axis intersecting the second axis.

8. The display device according to claim 1, wherein, Each of the sub-pixels includes a light-emitting portion containing a light-emitting element, and each light-emitting portion is disposed in the overlapping area between a corresponding circuit portion of the first circuit portion, the second circuit portion, the third circuit portion, and the fourth circuit portion and a corresponding adjacent pair of extension portions of the first extension portion, the second extension portion, the third extension portion, and the fourth extension portion.

9. The display device according to claim 8, wherein, The light-emitting part has a triangular shape, which has a curved edge that contacts the at least one transparent part.

10. The display device according to claim 9, wherein, The at least one transparent portion is partially surrounded by the curved edge of the light-emitting portion.

11. The display device according to claim 8, wherein, The light-emitting part includes: A first light-emitting portion, wherein the first light-emitting portion overlaps with a first portion of a corresponding circuit portion and overlaps with one of a pair of adjacent extensions, the one extension being adjacent to a first side of the corresponding circuit portion; and The second light-emitting part overlaps with the second part of the corresponding circuit part and overlaps with another extension of a corresponding adjacent pair of extensions, the other extension being adjacent to the second side of the corresponding circuit part.

12. The display device according to claim 1, wherein, The pixel portion includes: A substrate having red sub-pixels, green sub-pixels, blue sub-pixels, and white sub-pixels; A color filter, which is disposed corresponding to the corresponding light-emitting portion of each of the red sub-pixel, the green sub-pixel, and the blue sub-pixel; and A black matrix, which is disposed between adjacent color filters in the color filter array. The black matrix is ​​not set on the white sub-pixels.

13. A display device comprising: A display panel having units of pixels. Each of the unit pixels includes: A pixel portion having sub-pixels; and At least one transparent portion is disposed in a region adjacent to the pixel portion, and the at least one transparent portion is configured to allow external light to pass through it. The pixel portion includes: A first extension, a second extension, a third extension, and a fourth extension, wherein the first extension, the second extension, the third extension, and the fourth extension extend in different directions from each other, and each of the first extension, the second extension, the third extension, and the fourth extension includes a conductor; and A first circuit section, a second circuit section, a third circuit section, and a fourth circuit section are provided, each of which is disposed between a corresponding adjacent pair of extensions in the first extension, the second extension, the third extension, and the fourth extension. Each of the first circuit section, the second circuit section, the third circuit section, and the fourth circuit section includes a corresponding circuit element for each of the sub-pixels. Each of the first circuit section, the second circuit section, the third circuit section, and the fourth circuit section has a triangular shape, which includes: The first side is in contact with one of the following extensions that is adjacent to the first side: the first extension, the second extension, the third extension, and the fourth extension. The second side contacts another extension adjacent to the first extension, the second extension, the third extension, and the fourth extension; and The third side is in contact with the transparent part.

14. The display device according to claim 13, in, The length of the third side is longer than the length of the fourth side located at each of the first extension, the second extension, the third extension, and the fourth extension and in contact with the corresponding transparent portion of the at least one transparent portion.

15. The display device according to claim 14, wherein, The distance between the center of each of the first extension, the second extension, the third extension, and the fourth extension and the center of the corresponding adjacent transparent portion is substantially the same.

16. The display device according to claim 15, wherein, The at least one transparent portion is surrounded by four sub-pixels, each of which belongs to a different unit pixel, and the edge of the at least one transparent portion corresponds to the following: The third side of the corresponding circuit portion in the four sub-pixels; and A corresponding extension adjacent to the circuit section.

17. The display device according to claim 16, wherein, The at least one transparent portion has a regular octagonal shape.

18. The display device according to claim 14, wherein, Each of the sub-pixels includes at least one light-emitting portion, the at least one light-emitting portion being disposed in a region that is an overlapping region between the circuit portion and the extension portion, the at least one light-emitting portion including a light-emitting element.

19. The display device according to claim 18, wherein, The at least one transparent portion is surrounded by four sub-pixels, each of which belongs to a different unit pixel, the edge of the at least one transparent portion corresponds to the third side of the corresponding light-emitting portion among the four sub-pixels, and the at least one transparent portion has a circular shape.

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