A charging detection circuit and a charging device
Patent Information
- Application Number
- CN202210243079.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-03-11
- Publication Date
- 2026-10-27
- Estimated Expiration
- 2042-03-11
AI Technical Summary
[0003]为解决现有技术中,由于专有芯片成本较高,工程经济性较差的技术问题,本发明提供一种充电检测电路及充电装置,具体的技术方案如下:
[0025](1)提出了一种专有芯片的替代方案,减少了在充电检测方面的成本,提高了产品的经济可行性;
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Figure CN114678922B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of charging, and in particular to a charging detection circuit and a charging device. Background Technology
[0002] Current spring-loaded wireless charging technologies include 2-pin and 3-pin types. Their charging insertion detection mostly relies on detecting the charging current during charging, which requires proprietary chips. However, due to current supply chain issues, chip prices have skyrocketed, making the use of proprietary chips costly and unable to meet current engineering economic requirements. Summary of the Invention
[0003] To address the technical problems of high cost and poor engineering economics of proprietary chips in existing technologies, this invention provides a charging detection circuit and a charging device, the specific technical solution of which is as follows:
[0004] A charging detection circuit, comprising:
[0005] The circuit being charged includes three charging pins for charging the charger.
[0006] The charging circuit, used to power the circuit being charged, specifically includes an insertion detection pin, a charging positive terminal, a charging negative terminal, a detector DET, a PNP transistor Q2, and a PMOS transistor Q1; the detector DET is connected to the positive power supply VCC.
[0007] The base of the PNP transistor Q2 is connected to the detector DET, and the collector of the PNP transistor Q2 is connected to the negative terminal of the power supply GND.
[0008] The gate of the PMOS transistor Q1 is connected to the emitter of the PNP transistor Q2, and the drain of the PMOS transistor Q1 is connected to the positive power supply VCC.
[0009] The base of the PNP transistor Q2 is connected to the insertion detection pin; the source of the PMOS transistor Q1 is connected to the charging positive terminal; and the charging negative terminal is connected to the power supply negative terminal GND.
[0010] When in the charging state, the insertion detection pin, the charging positive terminal, and the charging negative terminal are respectively connected to the three charging pins of the circuit being charged.
[0011] This technical solution proposes an alternative to a proprietary chip through circuit design, reducing costs in charging detection and improving the economic feasibility of the product.
[0012] Preferably, the positive terminal VCC of the power supply is connected to the base of the PNP transistor Q2 through a second resistor;
[0013] The source of the PMOS transistor Q1 is connected to the base of the PNP transistor Q2 through the second resistor.
[0014] More preferably, the emitter of the PNP transistor Q2 is also connected to the source of the PMOS transistor Q1 through a first resistor.
[0015] More preferably, the resistance of the first resistor is 100,000 ohms; the resistance of the second resistor is 100,000 ohms.
[0016] Preferably, when only the positive terminal of the charging circuit is connected, the gate and source of the PMOS transistor Q1 are both at a high level.
[0017] More preferably, when the insertion detection pin, the charging positive terminal, and the charging negative terminal are all connected to the charging circuit, the emitter voltage of the PNP transistor Q2 is greater than the base voltage of the PNP transistor Q2, causing the PNP transistor Q2 to conduct; the gate voltage of the PMOS transistor Q1 is less than the source voltage of the PMOS transistor Q1, causing the PMOS transistor Q1 to conduct.
[0018] Preferably, the detector DET is also connected to an LED control circuit.
[0019] In this technical solution, by using a series LED control circuit, it is possible to simply and effectively inform the outside world whether the device to be charged has been inserted, without the need for an additional MCU module, thereby further reducing costs.
[0020] A charging device and a charging detection circuit, wherein the insertion detection pin, the charging positive electrode, and the charging negative electrode protrude from the plane at the bottom of the charging compartment; the height of the charging positive electrode is higher than that of the insertion detection pin and the charging negative electrode.
[0021] Preferably, the insertion detection pin, the charging positive terminal, and the charging negative terminal are spring pins.
[0022] More preferably, the positive charging electrode is located between the negative charging electrode and the insertion detection pin in terms of spatial layout.
[0023] In this technical solution, the spatial arrangement of the three spring pins, combined with a resistor, avoids and reduces the possibility of system short circuits, effectively improving the reliability of the equipment.
[0024] This invention includes at least one of the following technical effects:
[0025] (1) An alternative to a proprietary chip is proposed, which reduces the cost of charging detection and improves the economic feasibility of the product.
[0026] (2) By connecting the LED control circuit in series, it is easy and effective to inform the outside whether the device to be charged has been inserted, without the need for an additional MCU module, thereby further reducing costs;
[0027] (3) The design of the spatial arrangement between the three spring pins, combined with the resistor, avoids and reduces the possibility of system short circuits, effectively improving the reliability of the equipment. Attached Figure Description
[0028] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0029] Figure 1 This is a schematic diagram of the charging circuit of the present invention;
[0030] Figure 2 This is a schematic diagram of the charging state of the present invention.
[0031] Insert detection pin 1;
[0032] Charging positive terminal 2;
[0033] Charging negative terminal 3;
[0034] Charging pin 4, charging pin 5, and charging pin 6; Detailed Implementation
[0035] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods have been omitted so as not to obscure the description of this application with unnecessary detail.
[0036] It should be understood that, when used in this specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or sets.
[0037] To keep the drawings concise, only the parts relevant to the invention are shown schematically in each figure, and they do not represent the actual structure of the product. Furthermore, for ease of understanding, in some figures, components with the same structure or function are shown only schematically, or only one is labeled. In this document, "a" not only means "only one," but can also mean "more than one."
[0038] It should also be further understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.
[0039] Furthermore, in the description of this application, the terms "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.
[0040] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the specific implementation methods of the present invention will be described below with reference to the accompanying drawings. Obviously, the drawings described below are merely some embodiments of the present invention. For those skilled in the art, other drawings and other implementation methods can be obtained based on these drawings without any creative effort.
[0041] Example 1:
[0042] like Figure 1 As shown, this embodiment provides a charging detection circuit, including:
[0043] The circuit being charged includes three charging pins for charging the charger.
[0044] The charging circuit, used to power the circuit being charged, specifically includes a detection pin 1, a charging positive terminal 2, a charging negative terminal 3, a detector DET, a PNP transistor Q2, and a PMOS transistor Q1; the detector DET is connected to the positive power supply VCC.
[0045] The base of the PNP transistor Q2 is connected to the detector DET, and the collector of the PNP transistor Q2 is connected to the negative terminal of the power supply GND.
[0046] The gate of the PMOS transistor Q1 is connected to the emitter of the PNP transistor Q2, and the drain of the PMOS transistor Q1 is connected to the positive power supply VCC.
[0047] The base of the PNP transistor Q2 is connected to the insertion detection pin 1; the source of the PMOS transistor Q1 is connected to the charging positive terminal 2; and the charging negative terminal 3 is connected to the power supply negative terminal GND.
[0048] When in charging mode, the insertion detection pin 1, the positive charging terminal 2, and the negative charging terminal 3 are respectively connected to the three charging pins of the circuit being charged. Generally, the insertion detection pin 1 corresponds to the charging pin 4, the positive charging terminal 2 corresponds to the charging pin 5, and the negative charging terminal 3 corresponds to the charging pin 6.
[0049] Current spring-loaded wireless charging technologies include 2-pin and 3-pin types. Their charging insertion detection mostly relies on detecting the charging current during charging, which requires proprietary chips. However, due to current supply chain issues, chip prices have skyrocketed, making the use of proprietary chips costly and unable to meet current engineering economic requirements.
[0050] Therefore, in this embodiment, a detection circuit is used instead of the original proprietary chip. When the circuit being charged is not connected to the charging circuit, since the gate and source of PMOS transistor Q1 are at the same level, and the base and emitter of PNP transistor Q2 are at the same level, neither PMOS transistor Q1 nor PNP transistor Q2 is turned on, and no loop is formed. Therefore, in the charging circuit, there is only a loop from the power supply to the detector DET. At this time, the detector DET detects a high-level signal.
[0051] This embodiment proposes an alternative to a proprietary chip through circuit design, reducing costs in charging detection and improving the economic feasibility of the product.
[0052] Preferably, when only the positive charging terminal 2 is connected to the charging circuit, both the gate and source of the PMOS transistor Q1 are at a high level.
[0053] When only the positive terminal 2 is connected to the charging circuit, the gate and source of the PMOS transistor Q1 are at the same level, so no corresponding circuit can be formed and charging cannot be performed.
[0054] More preferably, when the insertion detection pin 1, the charging positive terminal 2, and the charging negative terminal 3 are all connected to the charging circuit, the emitter voltage of the PNP transistor Q2 is greater than the base voltage of the PNP transistor Q2, causing the PNP transistor Q2 to conduct; the gate voltage of the PMOS transistor Q1 is less than the source voltage of the PMOS transistor Q1, causing the PMOS transistor Q1 to conduct.
[0055] When the insertion detection pin 1, charging positive terminal 2, and charging negative terminal 3 are simultaneously connected to the charging circuit, the gate level of PMOS transistor Q1 is lower than the source level, causing PMOS transistor Q1 to conduct, forming a loop from the power supply positive terminal VCC to the charging positive terminal 2, to the charger, then to the charging negative terminal 3, and finally to the power supply negative terminal GND. At the same time, since the insertion detection pin 1 is connected to the charging negative terminal 3, the emitter voltage of PNP transistor Q2 is greater than the base voltage of PNP transistor Q2, thus forming a path from the power supply positive terminal VCC to the insertion detection pin 1 and then to the power supply negative terminal GND.
[0056] At this time, because the detector DET is connected in parallel with multiple devices, its voltage drops and it is in a low-level state. By checking whether the detector DET is in a low-level or high-level state, it is easy to determine whether the device is in a normal connection state. When it is in a normal connection state, the power supply voltage can be increased to enter the formal charging state.
[0057] Preferably, the detector DET is also connected to an LED control circuit. Using the LED control circuit, the presence or absence of a device to be charged is determined by the on / off state of the LED, thus eliminating the need for an MCU module.
[0058] By using a series LED control circuit, it is easy and effective to inform the outside world whether the device to be charged has been plugged in, without the need for an additional MCU module, thereby further reducing costs.
[0059] Preferably, the positive terminal VCC of the power supply is connected to the base of the PNP transistor Q2 through a second resistor; the source of the PMOS transistor Q1 is connected to the base of the PNP transistor Q2 through the second resistor.
[0060] If only the detection pin 1 and the charging positive terminal 2 are short-circuited, an electrical circuit cannot be formed. When the charging negative terminal 3 and the charging positive terminal 2 are short-circuited, the charging positive terminal 2 will not be short-circuited because it often has no output. When only the detection pin 1 and the charging negative terminal 3 are inserted, the short circuit will not affect it because of the second resistor connected in series. The resistance of the second resistor is 100,000 ohms.
[0061] This embodiment effectively avoids damage to the circuit board caused by short circuits between the spring pins when a metal foreign object enters the charging compartment by setting a second resistor.
[0062] Preferably, the emitter of the PNP transistor Q2 is also connected to the source of the PMOS transistor Q1 through a first resistor; the resistance of the first resistor is 100,000 ohms.
[0063] By setting a first resistor, the positive terminal VCC of the power supply is prevented from being directly connected to the negative terminal GND of the power supply when the PNP transistor Q2 is turned on, thus avoiding further short circuit.
[0064] Example 2:
[0065] like Figure 2 As shown, this embodiment provides a charging device, including a charging detection circuit as described in Embodiment 1. The insertion detection pin 1, the positive charging electrode 2, and the negative charging electrode 3 protrude from the plane at the bottom of the charging compartment. The height of the positive charging electrode 2 is higher than that of the insertion detection pin 1 and the negative charging electrode 3. The insertion detection pin 1, the positive charging electrode 2, and the negative charging electrode 3 are spring pins. In terms of spatial arrangement, the positive charging electrode 2 is located between the negative charging electrode 3 and the insertion detection pin 1.
[0066] When the device to be charged is inserted into the charging compartment, it first contacts the positive charging terminal 2. At this time, since both the gate and source terminals of the PMOS transistor Q1 are at a high level, the positive charging terminal 2 will not output voltage. As the device continues to contact the bottom insertion detection pin 1 and the negative charging terminal 3, an electrical connection is established between them, grounding the insertion detection pin 1. Then, because the emitter voltage is greater than the base voltage, the PNP transistor Q2 conducts, causing the gate voltage to be lower than the source voltage, thus entering the conduction state. The positive charging terminal 2 then outputs voltage to charge the device.
[0067] When a foreign object enters the charging compartment, due to the characteristic that the three spring pins are arranged at a certain interval and are higher in the middle and lower on both sides, it is difficult to cause the three spring pins to short-circuit at the same time. The charging circuit will only short-circuit when the three spring pins are short-circuited at the same time.
[0068] In this embodiment, the spatial arrangement of the three spring pins avoids and reduces the possibility of system short circuits, effectively improving the reliability of the device.
[0069] Through the above embodiments, the present invention achieves the following:
[0070] (1) An alternative to a proprietary chip is proposed, which reduces the cost of charging detection and improves the economic feasibility of the product.
[0071] (2) By connecting the LED control circuit in series, it is easy and effective to inform the outside whether the device to be charged has been inserted, without the need for an additional MCU module, thereby further reducing costs;
[0072] (3) The design of the spatial arrangement between the three spring pins, combined with the resistor, avoids and reduces the possibility of system short circuits, effectively improving the reliability of the equipment.
[0073] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention.
[0074] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.
Claims
1. A charging detection circuit, characterized in that, include: The circuit being charged includes three charging pins for charging the charger. The charging circuit is used to supply power to the circuit being charged, and specifically includes an insertion detection pin, a charging positive terminal, a charging negative terminal, a detector DET, a PNP transistor Q2, and a PMOS transistor Q1; the detector DET is connected to the positive power supply VCC. The base of the PNP transistor Q2 is connected to the detector DET, and the collector of the PNP transistor Q2 is connected to the negative terminal of the power supply GND. The gate of the PMOS transistor Q1 is connected to the emitter of the PNP transistor Q2, and the drain of the PMOS transistor Q1 is connected to the positive power supply VCC. The base of the PNP transistor Q2 is connected to the insertion detection pin; the source of the PMOS transistor Q1 is connected to the charging positive terminal; and the charging negative terminal is connected to the power supply negative terminal GND. When in the charging state, the insertion detection pin, the charging positive terminal, and the charging negative terminal are respectively connected to the three charging pins of the circuit being charged; When only the positive terminal of the charging circuit is connected, both the gate and source of the PMOS transistor Q1 are at a high level. When the insertion detection pin, the charging positive terminal, and the charging negative terminal are all connected to the charging circuit, the emitter voltage of the PNP transistor Q2 is greater than the base voltage of the PNP transistor Q2, causing the PNP transistor Q2 to conduct; the gate voltage of the PMOS transistor Q1 is less than the source voltage of the PMOS transistor Q1, causing the PMOS transistor Q1 to conduct.
2. The charging detection circuit according to claim 1, characterized in that, The positive terminal VCC of the power supply is connected to the base of the PNP transistor Q2 through a second resistor; The source of the PMOS transistor Q1 is connected to the base of the PNP transistor Q2 through the second resistor.
3. The charging detection circuit according to claim 2, characterized in that, The emitter of the PNP transistor Q2 is also connected to the source of the PMOS transistor Q1 through a first resistor.
4. The charging detection circuit according to claim 3, characterized in that, The resistance of the first resistor is 100,000 ohms; The resistance of the second resistor is 100,000 ohms.
5. A charging detection circuit according to claim 1, characterized in that, The detector DET is also connected to an LED control circuit.
6. A charging device, comprising a charging detection circuit as described in any one of claims 1-5, characterized in that, The insertion detection pin, the positive charging electrode, and the negative charging electrode protrude from the plane at the bottom of the charging compartment; the height of the positive charging electrode is higher than that of the insertion detection pin and the negative charging electrode.
7. A charging device according to claim 6, characterized in that, The insertion detection pin, the charging positive terminal, and the charging negative terminal are spring pins.
8. A charging device according to claim 7, characterized in that, The positive charging electrode is located between the negative charging electrode and the insertion detection pin in terms of spatial layout.
Citation Information
Patent Citations
Charging detection circuit and charging device
CN217692695U