Multilayer electronic component

Abstract

A multilayer electronic component is provided. The multilayer electronic component includes a main body including a capacitor forming part in which dielectric layers and internal electrodes are alternately disposed in a first direction, and cover parts disposed on upper and lower surfaces of the capacitor forming part in the first direction, respectively, and an external electrode disposed on the main body, wherein the cover parts include a plurality of dielectric grains and a plurality of holes, and Gn / Pn is greater than 10 and less than 30, where Gn is the number of dielectric grains included in the cover parts, and Pn is the number of holes included in the cover parts.

Description

[0001] This application claims the benefit of priority to Korean Patent Application No. 10-2020-0189099, filed on December 31, 2020, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0002] This disclosure relates to a multilayer electronic component. Background Technology

[0003] Multilayer ceramic capacitors (MLCCs, a type of multilayer electronic component) are chip capacitors mounted on printed circuit boards of various types of electronic products, such as image display devices (e.g., liquid crystal displays (LCDs), plasma display panels (PDPs)), computers, smartphones, mobile phones, etc.), for charging or discharging within or from them.

[0004] Multilayer ceramic capacitors are used as components in a variety of electronic devices due to their small size, high capacitance, and ease of mounting. Recently, with the miniaturization of electronic device components, the demand for miniaturization and increased capacitance of multilayer ceramic capacitors has increased.

[0005] Typically, in the manufacturing process of such multilayer ceramic capacitors, ceramic green sheets are fabricated, and conductive paste is printed onto them to form an internal electrode film. Dozens to hundreds of ceramic green sheets with their internal electrode films formed are stacked on top of each other to form a ceramic green sheet laminate. The ceramic green sheet laminate is then compressed under high temperature and pressure to form a hard ceramic green sheet laminate, and a cutting process is performed on the hard green sheet ceramic laminate to create a green body. The green body is then burn-out, sintered, and polished to form a ceramic laminate, and an external electrode is formed on the ceramic laminate to complete the multilayer ceramic capacitor.

[0006] Generally, internal electrodes made of metal are more prone to shrinkage and expansion than those made of ceramic materials, and the stress caused by the difference in thermal expansion coefficients can lead to cracks in the ceramic laminate.

[0007] Multilayer ceramic capacitors are used when mounted on a wiring board. The external electrodes of the multilayer ceramic capacitor are soldered and electrically connected to conductive pads formed on the wiring board. When mounting the multilayer ceramic capacitor on the wiring board by soldering, or when cutting the wiring board on which the multilayer ceramic capacitor is mounted, thermal shock and shear stress are applied to the multilayer ceramic capacitor. This thermal shock and shear stress can cause cracks in the multilayer ceramic capacitor.

[0008] Recently, with the miniaturization and increased capacitance of multilayer ceramic capacitors, attempts have been made to make the ceramic laminates thinner and increase the number of layers. As the ceramic laminates have become thinner and the number of layers has increased, the frequency of crack occurrence has increased. Therefore, the necessity to solve this problem has increased. Summary of the Invention

[0009] One aspect of this disclosure is to provide a multilayer electronic component that suppresses crack initiation.

[0010] Another aspect of this disclosure provides a multilayer electronic component with improved waterproof reliability.

[0011] According to one aspect of this disclosure, a multilayer electronic component may include: a body comprising a capacitor forming portion and a cover portion, wherein a dielectric layer and an inner electrode are alternately disposed in the capacitor forming portion in a first direction, and the cover portion is disposed on an upper surface and a lower surface of the capacitor forming portion in the first direction; and an outer electrode disposed on the body, wherein the cover portion comprises a plurality of dielectric grains and a plurality of holes, and Gn / Pn is greater than 10 and less than 30, wherein Gn is the number of dielectric grains included in the cover portion, and Pn is the number of holes included in the cover portion.

[0012] According to another aspect of this disclosure, a multilayer electronic component may include: a body comprising a capacitor forming portion and a cover portion, wherein a dielectric layer and an inner electrode are alternately disposed in the capacitor forming portion in a first direction, and the cover portion is disposed on an upper surface and a lower surface of the capacitor forming portion in the first direction; and an outer electrode disposed on the body, wherein the cover portion comprises a plurality of dielectric grains and a plurality of holes, and Ps / Gs is less than 3, wherein Gs is the average size of the dielectric grains contained in the cover portion, and Ps is the average size of the holes contained in the cover portion.

[0013] According to another aspect of this disclosure, a multilayer electronic component may include: a capacitor forming portion including an inner electrode and a dielectric layer between the inner electrodes; an upper cover portion and a lower cover portion respectively disposed on an upper surface and a lower surface opposite to each other in the thickness direction of the capacitor forming portion, the upper cover portion and the lower cover portion including a first dielectric die and a first hole; and a side edge portion disposed on an opposite side surface of the capacitor forming portion in the width direction, the side edge portion including a second dielectric die and a second hole, wherein the ratio of the number of second dielectric dies Gn1 to the number of second holes Pn1, Gn1 / Pn1, is greater than 10 and less than 30. Attached Figure Description

[0014] The above and other aspects, features and advantages of this disclosure will be more clearly understood from the following description, taken in conjunction with the accompanying drawings and specific embodiments, in which:

[0015] Figure 1 This is a perspective view schematically illustrating a multilayer electronic assembly according to exemplary embodiments of the present disclosure.

[0016] Figure 2 It is along Figure 1 A cross-sectional view taken from line I-I';

[0017] Figure 3 It is along Figure 1 A cross-sectional view taken from line II-II′;

[0018] Figure 4 It is shown Figure 2 A magnified view of the K region;

[0019] Figure 5 It shows the corresponding to along Figure 1 A cross-sectional view taken from line II-II' is shown in a variation of this disclosure.

[0020] Figure 6 This is a diagram illustrating the materials used to prepare ceramic green sheets for forming pores;

[0021] Figure 7 It is a diagram used to describe the formation of pores through a process of burning off and sintering ceramic green sheets used to form pores;

[0022] Figure 8A The photograph was obtained by imaging a cross-section of the cover of the comparative example using a scanning electron microscope (SEM).

[0023] Figure 8B and Figure 8C These are photographs obtained by analyzing and comparing the dielectric grains and pores of the examples;

[0024] Figure 9A The photographs were obtained by using SEM to image a cross-section of the cover of the invention example; and

[0025] Figure 9B and Figure 9C These are photographs obtained by analyzing the dielectric grains and pores of an example of the present invention. Detailed Implementation

[0026] In the following, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0027] Here, terms like "lower side," "lower portion," and "lower surface," in relation to the cross-section of the accompanying drawings, refer to the direction toward the mounting surface of the multilayer electronic assembly, while "upper side," "upper portion," and "upper surface," etc., refer to the direction opposite to that direction. However, these directions are defined for ease of explanation, and the claims are not specifically limited by the directions defined as described above.

[0028] In this specification, the term "connection" between one component and another means both indirect connection via a bonding layer and direct connection between the two components. Additionally, "electrical connection" implies both physical connection and physical disconnection. It is understood that when an element is referred to using terms such as "first" and "second," the element is not thereby limited. The terms "first" and "second" may be used only for the purpose of distinguishing that element from other elements and do not limit the order or importance of the elements. In some cases, without departing from the scope of the claims set forth herein, a first element may be referred to as a second element. Similarly, a second element may also be referred to as a first element.

[0029] The term "exemplary embodiment" as used herein does not refer to the same exemplary embodiment, but is provided to emphasize a particular feature or characteristic that differs from that of another exemplary embodiment. However, the exemplary embodiments provided herein are considered to be achievable through combinations of all or part of each other. For example, unless a contrary or contradictory description is provided herein, an element described in a particular exemplary embodiment may be understood as a description relating to another exemplary embodiment, even if it is not described in another exemplary embodiment.

[0030] The terminology used herein is for describing exemplary embodiments only and is not intended to limit this disclosure. In this context, unless the context otherwise implies, the singular form includes the plural form.

[0031] In the accompanying drawings, the first direction can be defined as the stacking direction or the thickness (T) direction, the second direction can be defined as the length (L) direction, and the third direction can be defined as the width (W) direction.

[0032] Multilayer electronic components

[0033] Figure 1 This is a perspective view schematically illustrating a multilayer electronic assembly according to exemplary embodiments of the present disclosure.

[0034] Figure 2 It is along Figure 1 The cross-sectional view taken from line I-I'.

[0035] Figure 3 It is along Figure 1 A cross-sectional view taken from line II-II′;

[0036] Figure 4 It is shown Figure 2 A magnified view of the K region.

[0037] Figure 5 It shows the corresponding to along Figure 1 A cross-sectional view taken from line II-II' is shown in the variant of this disclosure.

[0038] In the following text, reference will be made to Figures 1 to 5 A detailed description of a multilayer electronic assembly according to exemplary embodiments of the present disclosure is provided.

[0039] A multilayer electronic assembly 100 according to exemplary embodiments of the present disclosure may include: a body 110 including a capacitor forming portion A and cover portions 112 and 113, wherein a dielectric layer 111 and inner electrodes 121 and 122 are alternately disposed in a first direction in the capacitor forming portion A, and cover portions 112 and 113 are respectively disposed on an upper surface and a lower surface of the capacitor forming portion in the first direction; and outer electrodes 131 and 132 disposed on the body, wherein the cover portions include a plurality of dielectric grains G and a plurality of holes P, and Gn / Pn is greater than 10 and less than 30, wherein Gn is the number of dielectric grains included in the cover portions, and Pn is the number of holes included in the cover portions.

[0040] The dielectric layer 111 and the internal electrodes 121 and 122 may be stacked alternately in the body 110.

[0041] The specific shape of the main body 110 is not particularly limited, but it can be as follows: Figure 1 The hexahedral shape or a shape similar to a hexahedron shown is illustrated. Although the body 110 does not have a hexahedral shape with perfectly straight lines due to the shrinkage of the ceramic powder contained in the body 110 during the sintering process, the body 110 may have a generally hexahedral shape.

[0042] The main body 110 may have a first surface 1 and a second surface 2 that are opposite to each other in a first direction, a third surface 3 and a fourth surface 4 that are connected to the first surface 1 and the second surface 2 and are opposite to each other in a second direction, and a fifth surface 5 and a sixth surface 6 that are connected to the first surface 1 and the second surface 2, connected to the third surface 3 and the fourth surface 4 and are opposite to each other in a third direction.

[0043] The multiple dielectric layers 111 forming the body 110 can be in a sintered state, and adjacent dielectric layers 111 can be integrated with each other, making it difficult to distinguish their boundaries without using a scanning electron microscope (SEM).

[0044] According to exemplary embodiments of this disclosure, the raw materials for dielectric layer 111 are not particularly limited, as long as sufficient capacitance can be obtained. For example, barium titanate-based materials, lead-based perovskite composite materials, strontium titanate-based materials, etc., can be used. Examples of barium titanate-based materials may include BaTiO3-based ceramic powder. Examples of ceramic powders may include BaTiO3 and (BaTiO3-based) ceramic powders obtained by partially dissolving calcium (Ca), zirconium (Zr), etc., in BaTiO3. 1-x Ca x TiO3, Ba(Ti 1-y Cay O3、(Ba 1-x Ca x (Ti) 1-y Zr y )O3 and Ba(Ti 1-y Zr y )O3.

[0045] According to the purpose of this disclosure, the material of dielectric layer 111 can be prepared by adding various ceramic additives, organic solvents, binders, dispersants, etc. to a powder such as barium titanate (BaTiO3) powder.

[0046] The main body 110 may include a capacitor forming portion A and cover portions 112 and 113. The capacitor forming portion A is disposed inside the main body 110 and includes a first inner electrode 121 and a second inner electrode 122. The first inner electrode 121 and the second inner electrode 122 are arranged to face each other, and each of the dielectric layers 111 is located between the first inner electrode 121 and the second inner electrode 122 to form a capacitor. The cover portions 112 and 113 are respectively formed on the upper surface and the lower surface of the capacitor forming portion A in a first direction.

[0047] In addition, the capacitor forming part A (as the part that helps to form the capacitor) can be formed by repeatedly stacking a plurality of first inner electrodes 121 and a plurality of second inner electrodes 122 and placing each of the dielectric layers 111 between the first inner electrodes 121 and the second inner electrodes 122.

[0048] Additionally, the dielectric layer 111 included in the capacitor forming portion A may include pores, and the porosity of the dielectric layer 111 is preferably 1% or less to ensure capacitance. Here, the porosity can be measured by observing the dielectric layer with SEM in a cross-section taken at the center of the multilayer electronic assembly along the first and second directions in the third direction, wherein the dielectric layer is located at the center of the multilayer electronic assembly in the first and second directions.

[0049] The cover portions 112 and 113 may include an upper cover portion 112 disposed on the upper surface of the capacitor forming portion A in the first direction and a lower cover portion 113 disposed on the lower surface of the capacitor forming portion A in the first direction.

[0050] The upper cover portion 112 and the lower cover portion 113 can be formed by stacking a single dielectric layer or two or more dielectric layers on the upper and lower surfaces of the capacitor forming portion A in the thickness direction, respectively, and can be used to prevent damage to the internal electrode due to physical stress or chemical stress.

[0051] Furthermore, according to exemplary embodiments of this disclosure, each of the cover portions 112 and 113 may include a plurality of dielectric grains G and a plurality of holes P. The plurality of holes P are included in the cover portion, thereby suppressing the initiation and propagation of cracks caused by external forces.

[0052] Additionally, Gn / Pn can be greater than 10 and less than 30, where Gn is the number of dielectric grains G included in the cap portions 112 and 113, and Pn is the number of holes P included in the cap portions 112 and 113.

[0053] When Gn / Pn is 10 or less, the ratio of the number of pores (P) is too large, making the pores usable as pathways for water penetration. Therefore, waterproofing reliability may deteriorate. Thus, Gn / Pn is preferably greater than 10, and more preferably 12 or greater.

[0054] On the other hand, when Gn / Pn is 30 or greater, the ratio of the number of pores P is too small, making it impossible to sufficiently suppress the occurrence and propagation of cracks caused by pores P. Therefore, Gn / Pn is preferably less than 30, and more preferably 29 or less.

[0055] In an exemplary embodiment, Ps / Gs may be less than 3, where Gs is the average size of the dielectric grain G and Ps is the average size of the hole P.

[0056] When Ps / Gs is 3 or greater, the size of the pore P becomes too large, making it susceptible to moisture penetration. Therefore, the reliability of waterproofing may deteriorate. Thus, Ps / Gs is preferably less than 3, and more preferably 2.9 or less.

[0057] There is no particular limitation on the lower limit of Ps / Gs. However, in order to more effectively suppress the occurrence and propagation of cracks caused by pores P, Ps / Gs can be 2.1 or greater.

[0058] When Gn / Pn and Ps / Gs are within the numerical ranges presented in this disclosure, crack initiation and propagation can be suppressed, and waterproof reliability can be improved. Therefore, the thickness of each of the upper cover portion 112 and the lower cover portion 113 is not particularly limited. However, when the thickness of each of the cover portions 112 and 113 is too small, crack propagation may not be sufficiently suppressed, and when the thickness of each of the cover portions 112 and 113 is too large, the capacitance per unit volume may decrease. Therefore, the thickness of each of the upper cover portion and the lower cover portion can be in the range of 15 μm to 30 μm.

[0059] Furthermore, neither the average size of the dielectric grains Gs nor the average size of the pores Ps is subject to any particular restrictions.

[0060] However, as a non-limiting example, the average size of the dielectric grains Gs can range from 150 nm to 390 nm. Furthermore, the average size of the pores Ps can range from 110 nm to 310 nm.

[0061] Each of the caps 112 and 113 may not include an internal electrode, but may include a ceramic material. For example, each of the caps 112 and 113 may include a barium titanate (BaTiO3) based ceramic material.

[0062] Furthermore, there are no particular limitations on the method for adjusting the number and size of dielectric grains and the number and size of holes in the caps 112 and 113. As a preferred example, the caps 112 and 113 can be formed using ceramic green sheets containing volatile substances for forming holes.

[0063] Figure 6 This is a diagram illustrating the materials used to prepare ceramic green sheets for forming pores. Figure 7 It is a diagram used to describe the formation of pores by burning and sintering ceramic green sheets used to form pores.

[0064] Reference Figure 6 and Figure 7 Detailed description provided. The material for forming the pores in the ceramic green sheet can be prepared by mixing BaTiO3 11 and then adding metal nitrate 12 to mix BaTiO3 11 with metal nitrate 12. Thus, metal nitrate 12 can surround BaTiO3 11. Then, barium source 13 can be added and mixed. Barium source 13 can react with metal nitrate 12 to form barium nitrate 14. Sintering can be performed by adjusting the amounts of metal nitrate 12 and barium source 13, and the number and size of the pores can then be adjusted.

[0065] In this case, metal nitrate 12 may include one or more of Mg, Mn, Al, Dy, Tb, V, Zr and Y, and barium source 13 may include one or more of Ba(OH)2, BaCO3 and BaCl2.

[0066] When the ceramic green sheet used to form pores undergoes a burn-off process, metallic nitrate 12 volatilizes, while barium nitrate (pore-forming material) 14 and BaTiO3 11 are retained. Then, when the ceramic green sheet used to form pores undergoes a sintering process, BaTiO3 11 can be sintered to form dielectric grains G, and pores P can be formed as barium nitrate 14 volatilizes.

[0067] As another method for adjusting the number and size of dielectric grains and the number and size of pores, a ceramic green sheet for forming pores can be used, comprising a material obtained by mixing BaTiO311 and a polymer (e.g., a polymer blend) (the pore-forming material). In this case, the polymer blend may refer to a mixture of different organic materials. Sintering can be performed by adjusting the amount and mixing ratio of the polymer blend, and then the number and size of dielectric grains and the number and size of pores can be adjusted.

[0068] In addition, polymer blends may contain polyvinyl butyral (PVB) and polyacrylate organic materials.

[0069] In an exemplary embodiment, side edge portions 114 and 115 may be provided on the fifth and sixth surfaces of the body 110, respectively.

[0070] To miniaturize multilayer electronic components and increase their capacitance, it is necessary to significantly increase the effective area of ​​the internal electrodes (increasing the effective volume fraction required to achieve capacitance). For this purpose, internal electrodes 121 and 122 can contact the opposing end surfaces of the capacitor forming portion A in the third direction, allowing for a significant increase in the area of ​​the internal electrodes in the width direction through a borderless design. Side edge portions 114 and 115 can be provided on the fifth and sixth surfaces, respectively, thereby increasing the capacitance per unit volume and suppressing steps in the width direction caused by the internal electrodes. To suppress steps caused by the internal electrodes 121 and 122, the side edge portions 114 and 115 can be formed by cutting a laminate (in which internal electrodes and dielectric layers are stacked) to obtain the capacitor forming portion A, such that the internal electrodes 121 and 122 contact the opposing end surfaces of the capacitor forming portion A in the third direction, and then stacking a single dielectric layer or two or more dielectric layers on each of the opposing end surfaces of the capacitor forming portion A in the third direction.

[0071] The side edge portions 114 and 115 may include a first side edge portion 114 provided on the sixth surface 6 of the main body 110 and a second side edge portion 115 provided on the fifth surface 5 of the main body 110. That is, the side edge portions 114 and 115 may be provided on opposite end surfaces of the capacitor forming portion A in the third direction.

[0072] Side edges 114 and 115 can be used to prevent damage to the inner electrode due to physical or chemical stress.

[0073] The inner electrodes 121 and 122 may include a first inner electrode 121 and a second inner electrode 122. The first inner electrode 121 is in contact with the third surface and the capacitor forming part A at opposite ends in the third direction, and the second inner electrode 122 is in contact with the fourth surface and the capacitor forming part A at opposite ends in the third direction.

[0074] In this case, Gn1 / Pn1 can be greater than 10 and less than 30, where Gn1 is the number of dielectric grains included in the side edge portions 114 and 115, and Pn1 is the number of holes included in the side edge portions 114 and 115.

[0075] When Gn1 / Pn1 is 10 or less, the ratio of the number of pores is too large, causing the pores to act as pathways for water penetration. Therefore, the reliability of waterproofing may deteriorate. Thus, Gn1 / Pn1 is preferably greater than 10, and more preferably 12 or greater.

[0076] On the other hand, when Gn1 / Pn1 is 30 or greater, the ratio of the number of pores is too small, making it impossible to sufficiently suppress the occurrence and propagation of cracks caused by pores P. Therefore, Gn1 / Pn1 is preferably less than 30, and more preferably 29 or less.

[0077] Additionally, Ps1 / Gs1 may be less than 3, where Gs1 is the average size of the dielectric grains included in the side edge portions 114 and 115, and Ps1 is the average size of the holes included in the side edge portions 114 and 115.

[0078] When Ps1 / Gs1 is 3 or greater, the pore size becomes too large, making it susceptible to moisture penetration. Therefore, waterproofing reliability may deteriorate. Thus, Ps1 / Gs1 is preferably less than 3, and more preferably 2.9 or less.

[0079] There is no particular limitation on the lower limit of Ps1 / Gs1. However, in order to more effectively suppress the occurrence and propagation of cracks caused by pores, Ps1 / Gs1 can be 2.1 or greater.

[0080] The internal electrodes 121 and 122 and the dielectric layer 111 can be alternately arranged.

[0081] The inner electrodes 121 and 122 may include a first inner electrode 121 and a second inner electrode 122. The first inner electrode 121 and the second inner electrode 122 may be alternately arranged to face each other, and each of the dielectric layers 111 is located between the first inner electrode 121 and the second inner electrode 122, and the first inner electrode 121 may contact the third surface 3 and the fourth surface 4 of the body 110, and the second inner electrode 122 may contact the third surface 3 and the fourth surface 4 of the body 110.

[0082] Reference Figure 2 and 3 The first inner electrode 121 may be spaced apart from the fourth surface 4 and in contact with the third surface 3, and the second inner electrode 122 may be spaced apart from the third surface 3 and in contact with the fourth surface 4. In addition, the first inner electrode 121 may be in contact with the third surface 3, the fifth surface 5 and the sixth surface 6, and the second inner electrode 122 may be in contact with the fourth surface 4, the fifth surface 5 and the sixth surface 6.

[0083] In this case, the first inner electrode 121 and the second inner electrode 122 can be electrically isolated from each other by each of the dielectric layer 111 disposed between them.

[0084] The internal electrodes 121 and 122 may include one or more of nickel (Ni), copper (Cu), palladium (Pd), silver (Ag), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), and alloys thereof.

[0085] External electrodes 131 and 132 can be disposed on the third surface 3 and the fourth surface 4 of the main body 110, respectively.

[0086] The outer electrodes 131 and 132 may be disposed on the third surface 3 and the fourth surface 4 of the main body 110, respectively, and may include a first outer electrode 131 connected to the first inner electrode 121 and a second outer electrode 132 connected to the second inner electrode 122. The inner electrodes 121 and 122 may include a first inner electrode 121 in contact with the first outer electrode 131 and a second inner electrode 122 in contact with the second outer electrode 132, and the opposite ends of the first inner electrode 121 and the second inner electrode 122 in the third direction may contact the side edges 114 and 115.

[0087] Reference Figure 1 The external electrodes 131 and 132 can be configured to cover the opposite end surfaces of the side edges 114 and 115 in the second direction.

[0088] This exemplary embodiment describes a structure in which a multilayer electronic component 100 includes two external electrodes 131 and 132, but the number, shape, etc. of the external electrodes 131 and 132 may be changed depending on the shape of the internal electrodes 121 and 122 or for other purposes.

[0089] In addition, the outer electrodes 131 and 132 can be formed using any conductive material (such as metal), and the specific material of each of the outer electrodes 131 and 132 can be determined taking into account electrical properties, structural stability, etc., and each of the outer electrodes 131 and 132 can have a multilayer structure.

[0090] For example, the first external electrode 131 may include an electrode layer 131a disposed on the body 110 and a plating layer 131b formed on the electrode layer 131a, and the second external electrode 132 may include an electrode layer 132a disposed on the body 110 and a plating layer 132b formed on the electrode layer 132a.

[0091] As a more specific example, each of the electrode layers 131a and 132a may be a sintered electrode comprising a conductive metal and glass, or a resin-based electrode comprising a conductive metal and resin.

[0092] Furthermore, each of electrode layers 131a and 132a can be formed by sequentially forming a sintered electrode and a resin-based electrode on the body. Alternatively, each of electrode layers 131a and 132a can be formed by transferring a sheet containing a conductive metal onto the body, or by transferring a sheet containing a conductive metal onto the sintered electrode.

[0093] Materials with excellent electrical conductivity can be used as the conductive metals included in electrode layers 131a and 132a. However, there are no particular limitations on the material of the conductive metal. For example, the conductive metal can be one or more of nickel (Ni), copper (Cu), and their alloys.

[0094] Platings 131b and 132b can be used to improve mounting characteristics. There are no particular restrictions on the type of platings 131b and 132b. Each of platings 131b and 132b can be a plating of one or more of Ni, Sn, Pd and their alloys, or platings 131b and 132b can comprise multiple layers.

[0095] As a more specific example, each of the plating layers 131b and 132b can be a Ni plating layer or a Sn plating layer, which can be formed by sequentially forming a Ni plating layer and a Sn plating layer on each of the electrode layers 131a and 132a, or by sequentially forming a Sn plating layer, a Ni plating layer, and a Sn plating layer on each of the electrode layers 131a and 132a. Additionally, each of the plating layers 131b and 132b may include multiple Ni plating layers and / or multiple Sn plating layers.

[0096] Example

[0097] Samples were prepared with the ratio of the number of dielectric grains to the number of holes (Gn / Pn) and the ratio of the average hole size to the average size of the dielectric grains (Ps / Gs) as shown in Table 1.

[0098] The crack suppression effect and waterproof reliability of the samples were evaluated. The results are shown in Table 1.

[0099] In crack evaluation, the sintered sample is embedded in an epoxy resin mold and observed under an optical microscope, with the sample being polished. Cracks appearing at or around the boundary between the capacitor forming part and the cap are classified as NG (Not Good).

[0100] In the waterproof reliability test, after applying an electric field of 1.5Vr relative to the guaranteed voltage (i.e., 1.5 times the guaranteed voltage of the multilayer electronic component sample) to the sample for 12 hours at 85°C and 85% relative humidity, the test is NG when the insulation resistance decreases by 4 orders of magnitude or more from the initial insulation resistance.

[0101] The number and size of holes and dielectric grains in the cap were measured by analyzing the following images: Images were obtained by scanning the cap in a cross-section of the sample taken along the first and second directions at the center of the sample in a third-direction orientation using a SEM manufactured by Carl Zeiss AG at 50,000 magnification. The Ferrette diameters of the holes and dielectric grains in the scanned images were measured using Zootos as the particle size measurement software and used as the dimensions of the holes and dielectric grains.

[0102] Figure 8A The photograph was obtained by imaging a cross-section of the cover of test number 3, and Figure 8B and Figure 8C These are photographs obtained by analyzing dielectric grains and pores using Zootos, respectively. Figure 9A The photograph was obtained by imaging a cross-section of the cover of test number 7, and Figure 9B and Figure 9C These are photographs obtained by analyzing dielectric grains and pores using Zootos, respectively.

[0103] [Table 1]

[0104] 1* 100 NG 0.06 OK 2* 45 NG 0.3 OK 3* 32 NG 0.9 OK 4* 32 NG 1.5 OK 5 29 OK 2.1 OK 6 15 OK 2.5 OK 7 12 OK 2.9 OK 8* 10 OK 3.1 NG

[0105] In tests 1 through 4, the Gn / Pn ratio was 32 or greater, indicating insufficient crack suppression.

[0106] In tests 5 to 7, as described in this disclosure, Gn / Pn is greater than 10 and less than 30, exhibiting excellent crack suppression effect and excellent waterproof reliability.

[0107] In test number 8, the crack suppression effect was excellent, but the Gn / Pn ratio was 10, indicating poor waterproof reliability.

[0108] As described above, according to exemplary embodiments of the present disclosure, cracks occurring in multilayer electronic components can be suppressed by adjusting the ratio of the number of dielectric grains to the number of holes in the cover portion.

[0109] According to exemplary embodiments in this disclosure, waterproof reliability can be improved.

[0110] While exemplary embodiments have been shown and described above, it will be readily understood by those skilled in the art that modifications and variations may be made without departing from the scope of the invention as defined by the appended claims.

Claims

1. A multilayer electronic component, comprising: The main body includes a capacitor forming portion and a cover portion, wherein a dielectric layer and an internal electrode are alternately disposed in the capacitor forming portion in a first direction, and the cover portion is respectively disposed on the upper and lower surfaces of the capacitor forming portion in the first direction; and External electrodes are disposed on the main body. The cover portion includes multiple dielectric grains and multiple holes, and Gn / Pn is in the range of 12 to 29, where Gn is the number of dielectric grains included in the cover portion and Pn is the number of holes included in the cover portion.

2. The multilayer electronic component according to claim 1, wherein, The cover is made of barium titanate-based ceramic material.

3. The multilayer electronic component according to claim 1, wherein, Ps / Gs is less than 3, where Gs is the average size of the dielectric grains included in the cover portion, and Ps is the average size of the holes included in the cover portion.

4. The multilayer electronic component according to claim 3, wherein, Gn / Pn is in the range of 12 to 29, and Ps / Gs is in the range of 2.1 to 2.

9.

5. The multilayer electronic assembly according to any one of claims 1 to 4, wherein, The body has a first surface and a second surface opposite to each other in the first direction, a third surface and a fourth surface connected to the first surface and the second surface and opposite to each other in the second direction, and a fifth surface and a sixth surface connected to the first surface and the fourth surface and opposite to each other in the third direction. The side edges are respectively disposed on the fifth surface and the sixth surface of the main body, and Gn1 / Pn1 is greater than 10 and less than 30, where Gn1 is the number of dielectric grains included in the side edge portion and Pn1 is the number of holes included in the side edge portion.

6. The multilayer electronic assembly of claim 5, wherein, Ps1 / Gs1 is less than 3, where Gs1 is the average size of the dielectric grains included in the side edge portion, and Ps1 is the average size of the holes included in the side edge portion.

7. The multilayer electronic component according to claim 6, wherein, Each of Gn / Pn and Gn1 / Pn1 is in the range of 12 to 29, and each of Ps / Gs and Ps1 / Gs1 is in the range of 2.1 to 2.9, where Gs is the average size of the dielectric grains included in the cover portion, and Ps is the average size of the holes included in the cover portion.

8. The multilayer electronic assembly of claim 5, wherein, The external electrode includes a first external electrode disposed on the third surface and a second external electrode disposed on the fourth surface. The inner electrode includes a first inner electrode that contacts the first outer electrode and a second inner electrode that contacts the second outer electrode. The first inner electrode and the second inner electrode are in contact with the side edge at their opposite ends in the third direction.

9. The multilayer electronic assembly of claim 1, wherein, The cover portion includes an upper cover portion and a lower cover portion. The upper cover portion is disposed on the upper surface of the capacitor forming portion in the first direction, and the lower cover portion is disposed on the lower surface of the capacitor forming portion in the first direction. The thickness of each of the upper cover and the lower cover is in the range of 15 μm to 30 μm.

10. The multilayer electronic component according to claim 3, wherein, Gs is in the range of 150nm to 390nm.

11. The multilayer electronic component according to claim 3, wherein, Ps is in the range of 110nm to 310nm.

12. The multilayer electronic assembly according to claim 1, wherein, The cover includes sintered ceramic green sheets, wherein the ceramic green sheets include barium nitrate or polymer blends.

13. The multilayer electronic assembly of claim 1, wherein, The porosity of the dielectric layer included in the capacitor forming portion is 1% or less.

14. A multilayer electronic component, comprising: The main body includes a capacitor forming portion and a cover portion, wherein a dielectric layer and an internal electrode are alternately disposed in the capacitor forming portion in a first direction, and the cover portion is respectively disposed on the upper and lower surfaces of the capacitor forming portion in the first direction; and External electrodes are disposed on the main body. The cover portion includes multiple dielectric grains and multiple holes, and Ps / Gs is in the range of 2.1 to 2.9, where Gs is the average size of the dielectric grains contained in the cover portion, and Ps is the average size of the holes contained in the cover portion.

15. The multilayer electronic assembly according to claim 14, wherein, The cover is made of barium titanate-based ceramic material.

16. The multilayer electronic assembly according to claim 14 or 15, wherein, Gn / Pn is greater than 10 and less than 30, where Gn is the number of dielectric grains included in the cover portion and Pn is the number of holes included in the cover portion.

17. A multilayer electronic component, comprising: A capacitor forming section includes an inner electrode and a dielectric layer between the inner electrodes; The upper cover and the lower cover are respectively disposed on the upper and lower surfaces opposite to each other in the thickness direction of the capacitor forming portion, and the upper cover and the lower cover include a first dielectric grain and a first hole; as well as A side edge portion is disposed on the opposite side surface of the capacitor forming portion in the width direction, the side edge portion including a second dielectric grain and a second hole. The ratio of the number of the second dielectric grains Gn1 to the number of the second holes Pn1, Gn1 / Pn1, is in the range of 12 to 29.

18. The multilayer electronic assembly of claim 17, wherein, The ratio of the number of the first dielectric grains Gn to the number of the first holes Pn, Gn / Pn, is greater than 10 and less than 30.

19. The multilayer electronic assembly according to claim 17, wherein, The ratio of the average size Gs of the first dielectric grain to the average size Ps of the first hole, Gs / Ps, is less than 3.

20. The multilayer electronic assembly of claim 17, wherein, The ratio of the average size Gs1 of the second dielectric grain to the average size Ps1 of the second hole, Gs1 / Ps1, is less than 3.

21. The multilayer electronic assembly according to claim 17, wherein, The material of the upper cover and the lower cover is the same as the material of the side edge portion.

22. The multilayer electronic assembly of claim 17, wherein, The dielectric layer of the capacitor forming portion comprises a material having a porosity of less than 1%.

23. The multilayer electronic assembly of any of claims 17-22, wherein, The upper cover and the lower cover include sintered ceramic green sheets, which include ceramic material and pore-forming material.

24. The multilayer electronic assembly of claim 23, wherein, The pore-forming material includes barium nitrate or a polymer.

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