Display panel and display device
By setting up repeated arrangements of signal traces with the same attributes in the display panel, the problem of increased power consumption caused by lateral capacitance between traces is solved, achieving a display effect with lower power consumption and higher refresh rate.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- WUHAN CHINA STAR OPTOELECTRONICS TECH CO LTD
- Filing Date
- 2022-03-18
- Publication Date
- 2026-04-21
AI Technical Summary
There are lateral capacitances between the traces in the existing display panel, which increases power consumption and affects the display effect.
In the display panel, repeat the arrangement of signal traces with the same attribute to ensure that another signal trace is set on one side of the same signal trace to transmit the same signal, thereby reducing the generation of lateral capacitance.
It reduces the power consumption of the display panel, improves signal transmission speed and refresh rate, and enhances the stability of the displayed image.
Smart Images

Figure CN114695388B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of display devices, and in particular to a display panel and display apparatus. Background Technology
[0002] In existing display panels, the non-display area of the array substrate is provided with multiple fan-out lines to connect a control chip located in the non-display area and a metal trace located in the display area, so as to transmit the signal emitted by the control chip to the metal trace, so that the display panel including the array substrate can display an image.
[0003] like Figure 1 As shown, in the existing wiring method, taking wiring S3 as an example, the signal transmitted by it is positive, while the signals transmitted by wirings S2 and S4 on both sides of wiring S3 are negative. Therefore, there are lateral capacitances between wiring S3 and its surrounding wirings S2 and S4, which will increase the power consumption of the display panel and affect the display effect of the display panel. Summary of the Invention
[0004] The purpose of this invention is to provide a display panel and display device to solve the technical problems in the prior art, such as increased power consumption of the display panel and affected display effect due to lateral capacitance between the traces.
[0005] To achieve the above objectives, the present invention provides a display panel comprising at least one metal layer, wherein a plurality of signal traces are provided in the metal layer, the signal traces including at least two first signal lines and at least two second signal lines. The first signal lines are used to transmit positive signals, and the second signal lines are used to transmit negative signals. At least one side of a first signal line is provided with another first signal line, and at least one side of a second signal line is provided with another second signal line.
[0006] Furthermore, the display panel has a fan-out area and a display area connected to the fan-out area, and the first signal line and the second signal line extend from the fan-out area into the display area and are connected to the circuit in the display area.
[0007] Furthermore, the display panel also includes a plurality of light-emitting units, each of which includes at least one sub-pixel located in the display area. The first signal line and the second signal line are respectively electrically connected to one of the light-emitting units.
[0008] Furthermore, when each of the light-emitting units has at least two sub-pixels, the display panel also includes a plurality of multiplexing units, each multiplexing unit having at least two thin-film transistors located in the display area. One of the source or drain of the thin-film transistor is electrically connected to the sub-pixel. The other of the source or drain of the thin-film transistor is electrically connected to the signal trace.
[0009] Furthermore, the display panel also includes several output traces, one end of which is electrically connected to the thin-film transistor and the other end of which is electrically connected to the sub-pixel.
[0010] Further, the multiplexing unit includes a first multiplexing group and a second multiplexing group. Each thin-film transistor in the first multiplexing group is electrically connected to the same first signal line. Each thin-film transistor in the second multiplexing group is electrically connected to the same second signal line. In the same light-emitting unit, at least one sub-pixel is electrically connected to the thin-film transistor in the first multiplexing group, and the remaining sub-pixels are electrically connected to the thin-film transistor in the second multiplexing group.
[0011] Furthermore, the display panel also includes at least two drive lines and a multiplexer. The thin-film transistors in the same multiplexing unit are each electrically connected to one of the drive lines. The multiplexer is connected to the drive lines.
[0012] Furthermore, the sub-pixel includes a red sub-pixel, a green sub-pixel, and a blue sub-pixel, and each light-emitting unit includes at least two of the red sub-pixel, the green sub-pixel, and the blue sub-pixel.
[0013] Furthermore, when the display panel includes two or more metal layers, an insulating layer is provided between two adjacent metal layers.
[0014] The present invention also provides a display device, which includes a display panel as described above.
[0015] The advantages of the present invention are: the display panel and display device of the present invention provide another signal line that transmits the same signal on at least one side of the signal line, thereby reducing the generation of lateral capacitance, thereby reducing the power consumption of the display panel, reducing the impact of lateral capacitance on the refresh rate of the display panel, and improving the stability of the display screen. Attached Figure Description
[0016] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0017] Figure 1 This is a schematic diagram of a display panel structure in the prior art;
[0018] Figure 2 This is a schematic diagram of the signal trace arrangement in Embodiments 1-3 of the present invention;
[0019] Figure 3 This is a schematic diagram of the circuit structure of the display panel in Embodiment 1 of the present invention;
[0020] Figure 4 This is a schematic diagram of the circuit structure of the display panel in Embodiment 2 of the present invention;
[0021] Figure 5 This is a schematic diagram of the circuit structure of the display panel in Embodiment 3 of the present invention;
[0022] Figure 6 This is a schematic diagram of the partition structure of the display panel in embodiments 1-3 of the present invention;
[0023] Figure 7 This is a schematic diagram of the signal trace arrangement of the double metal layer in other embodiments of the present invention.
[0024] The components in the diagram are shown below:
[0025] Display panel 100; Display area 101;
[0026] Fan-out area 102; Metal layer 1;
[0027] Signal traces 10, S1, S3, S5, S7, S9, S11;
[0028] First signal lines 11, S2, S4, S6, S8, S10, S12;
[0029] Second signal line 12; Light-emitting units 20, 21, 22;
[0030] Sub-pixel 23; Red sub-pixel R;
[0031] Green sub-pixel G; Blue sub-pixel B;
[0032] Multiplexing unit 30; First multiplexing group 31;
[0033] Second multiplexing group 32; Thin film transistor 33;
[0034] Output trace 40; Driver trace 50.
[0035] First metal layer M1; Second metal layer M2. Detailed Implementation
[0036] The following description, with reference to the accompanying drawings, illustrates preferred embodiments of the present invention, demonstrating its implementability. These embodiments provide a complete overview of the invention for those skilled in the art, making its technical content clearer and easier to understand. The present invention can be embodied in many different forms of embodiments, and the scope of protection of the present invention is not limited to the embodiments mentioned herein.
[0037] In the accompanying drawings, components with the same structure are indicated by the same numerical designation, and components with similar structures or functions are indicated by similar numerical designations. The dimensions and thicknesses of each component shown in the drawings are arbitrary, and the present invention does not limit the dimensions and thicknesses of each component. To make the illustrations clearer, the thickness of components is appropriately exaggerated in some places in the drawings.
[0038] Furthermore, the following descriptions of the embodiments of the invention are made with reference to the accompanying illustrations, illustrating specific embodiments in which the invention can be implemented. Directional terms used in this invention, such as "upper," "lower," "front," "rear," "left," "right," "inner," "outer," and "side," are merely directional references to the accompanying drawings. Therefore, the use of directional terms is for better and clearer explanation and understanding of the invention, and does not indicate or imply that the referred device or element must have a specific orientation, or be constructed and operated in a specific orientation; therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first," "second," and "third," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0039] When a component is described as being "on" another component, the component may be placed directly on the other component; alternatively, an intermediate component may exist on which the component is placed, and the intermediate component is placed on the other component. When a component is described as being "installed to" or "connected to" another component, both can be understood as being directly "installed" or "connected" to, or indirectly "installed to" or "connected to" another component via an intermediate component.
[0040] Example 1
[0041] This invention provides a display device including a display panel 100 for displaying a screen. The display device can be any display device with display functionality, such as a mobile phone, laptop computer, or tablet computer.
[0042] like Figure 6 As shown, the display panel 100 has a display area 101 and a fan-out area 102 connected to the display area 101. The display area 101 contains a plurality of display devices, and the images displayed are generally presented in the display area 101. The fan-out area 102 generally contains a plurality of signal lines 10 and a driver chip. The driver chip is electrically connected to the display devices in the display area 101 through the signal lines 10 and transmits display signals, thereby controlling the displayed image.
[0043] Among them, such as Figure 2 As shown, the signal trace 10 includes a first signal line 11 and a second signal line 12. Both the first signal line 11 and the second signal line 12 are arranged in the same metal layer 1. The first signal line 11 is used to transmit positive signals, and the second signal line 12 is used to transmit negative signals. In the fan-out area 102, each first signal line 11 is flanked by another first signal line 11 and a second signal line 12, and each second signal line 12 is flanked by a first signal line 11 and another second signal line 12, thus forming a pairwise repeating arrangement of "first signal line 11 - first signal line 11 - second signal line 12 - second signal line 12". This ensures that one side of the signal trace 10 transmitting a positive signal is also arranged with another signal trace 10 transmitting a positive signal, and vice versa, forming a "positive-positive-negative-negative" trace arrangement. Since no lateral capacitance is generated between signal traces 10 of the same attribute, each signal trace 10 in this embodiment only generates lateral capacitance on one side. Compared with the wiring method in the prior art where lateral capacitance is generated on both sides, this greatly reduces the power consumption of the display panel 100. At the same time, it can also reduce the impact of lateral capacitance on the signal transmission of the signal trace 10, improve the signal transmission speed, thereby improving the refresh rate of the display panel 100, improving the stability of the image displayed by the display panel 100, and achieving a better display effect.
[0044] like Figure 3 As shown, the display panel 100 is provided with a plurality of light-emitting units 20. The light-emitting units 20 are disposed within the display area 101, and each light-emitting unit 20 is provided with a sub-pixel 23. The sub-pixel 23 is one of a red sub-pixel R for emitting red light, a green sub-pixel G for emitting green light, or a blue sub-pixel B for emitting blue light. In the display panel 100, the sub-pixel 23 can employ liquid crystal display technology, OLED (organic light-emitting semiconductor) display technology, Mini-LED (miniature light-emitting diode) display technology, or Micro-LED (micro-light-emitting diode) display technology.
[0045] One end of the signal trace 10 is electrically connected to the driver chip of the fan-out area 102, and the other end extends from the fan-out area 102 into the display area 101 and is electrically connected to the sub-pixel 23 in the light-emitting unit 20. The signal trace 10 is used to transmit the control signal issued by the driver chip to each sub-pixel 23, thereby controlling the light emission of each sub-pixel 23.
[0046] Specifically, such as Figure 3 As shown, the first signal line 11 is divided into S1, S3, S5, S7, S9, and S11, and the second signal line 12 is divided into S2, S4, S6, S8, S10, and S12. In the fan-out area 102, the signal lines 10 are sequentially unfolded in the order of S1-S7-S2-S8-S3-S9-S4-S10-S5-S11-S6-S12, forming a "positive-positive-negative-negative" routing arrangement, thereby reducing the power consumption of the display panel 100 and improving the display effect of the display panel 100.
[0047] In the display panel provided in the embodiments of the present invention, the number of times that signal traces of the same attribute are repeatedly arranged is increased, so that at least one side of the signal trace is provided with another signal trace that transmits the same signal. Since there is no lateral capacitance between signal traces that transmit the same signal, the lateral capacitance can be reduced by at least half compared with the positive and negative signal traces arranged alternately in the prior art. This greatly reduces the power consumption of the display panel and reduces the impact of lateral capacitance on the refresh rate of the display panel, thereby improving the stability of the display screen.
[0048] Example 2
[0049] This invention provides a display device including a display panel 100 for displaying a screen. The display device can be any display device with display functionality, such as a mobile phone, laptop computer, or tablet computer.
[0050] like Figure 6 As shown, the display panel 100 has a display area 101 and a fan-out area 102 connected to the display area 101. The display area 101 contains a plurality of display devices, and the images displayed are generally presented in the display area 101. The fan-out area 102 generally contains a plurality of signal lines 10 and a driver chip. The driver chip is electrically connected to the display devices in the display area 101 through the signal lines 10 and transmits display signals, thereby controlling the displayed image.
[0051] Among them, such as Figure 2As shown, the signal trace 10 includes a first signal line 11 and a second signal line 12. Both the first signal line 11 and the second signal line 12 are arranged in the same metal layer 1. The first signal line 11 is used to transmit positive signals, and the second signal line 12 is used to transmit negative signals. In the fan-out area 102, each first signal line 11 is flanked by another first signal line 11 and a second signal line 12, and each second signal line 12 is flanked by a first signal line 11 and another second signal line 12, thus forming a pairwise repeating arrangement of "first signal line 11 - first signal line 11 - second signal line 12 - second signal line 12". This ensures that one side of the signal trace 10 transmitting a positive signal is also arranged with another signal trace 10 transmitting a positive signal, and vice versa, forming a "positive-positive-negative-negative" trace arrangement. Since no lateral capacitance is generated between signal traces 10 of the same attribute, each signal trace 10 in this embodiment only generates lateral capacitance on one side. Compared with the wiring method in the prior art where lateral capacitance is generated on both sides, this greatly reduces the power consumption of the display panel 100. At the same time, it can also reduce the impact of lateral capacitance on the signal transmission of the signal trace 10, improve the signal transmission speed, thereby improving the refresh rate of the display panel 100, improving the stability of the image displayed by the display panel 100, and achieving a better display effect.
[0052] like Figure 4 As shown, the display panel 100 includes a plurality of light-emitting units 20 and a plurality of multiplexing units 30. One end of the signal line 10 is electrically connected to the driver chip of the fan-out area 102, and the other end extends from the fan-out area 102 into the display area 101 and is electrically connected to the thin-film transistor 33 in the multiplexing unit 30. The signal line 10 is used to transmit control signals from the driver chip to each thin-film transistor 33, thereby controlling the light emission of each sub-pixel 23 through each thin-film transistor 33.
[0053] Specifically, such as Figure 4 As shown, the first signal line 11 is divided into S1, S3, S5, S7, S9, and S11, and the second signal line 12 is divided into S2, S4, S6, S8, S10, and S12. In the fan-out area 102, the signal lines 10 are sequentially unfolded in the order of S1-S7-S2-S8-S3-S9-S4-S10-S5-S11-S6-S12, forming a "positive-positive-negative-negative" routing arrangement, thereby reducing the power consumption of the display panel 100 and improving the display effect of the display panel 100.
[0054] The light-emitting unit 20 is disposed within the display area 101, and each light-emitting unit 20 has two sub-pixels 23. Within the same light-emitting unit 20, different sub-pixels 23 emit different types of light. Specifically, the sub-pixels 23 are divided into red sub-pixels R for emitting red light, green sub-pixels G for emitting green light, or blue sub-pixels B for emitting blue light. One light-emitting unit 20 includes two of these different colored sub-pixels 23. The sub-pixels 23 in the light-emitting unit 20 are electrically connected to a thin-film transistor 33 in the multiplexing unit 30 via an output trace 40. In the display panel 100, the sub-pixels 23 can employ liquid crystal display technology, OLED (organic light-emitting semiconductor) display technology, Mini-LED (miniature light-emitting diode) display technology, or Micro-LED (micro-light-emitting diode) display technology.
[0055] The multiplexing unit 30 is also located in the display area 101, and each multiplexing unit 30 contains two thin-film transistors 33. In the same multiplexing unit 30, one of the sources or drains of the two thin-film transistors 33 is electrically connected to the same signal line 10, and the other of the sources or drains of the two thin-film transistors 33 is electrically connected to a sub-pixel 23 in the two light-emitting units 20 through an output line 40. The two sub-pixels 23 in the light-emitting unit 20 are each electrically connected to a thin-film transistor 33 in the two multiplexing units 30, and the two multiplexing units 30 are respectively electrically connected to a first signal line 11 and a second signal line 12. That is, the two sub-pixels 23 in the same light-emitting unit 20 receive different signals; one of the sub-pixels 23 receives the positive signal transmitted by the first signal line 11, and the other sub-pixel 23 receives the negative signal transmitted by the second signal line 12.
[0056] Specifically, such as Figure 4 As shown, the multiplexing unit 30 includes a first multiplexing group 31 and a second multiplexing group 32. Each thin-film transistor 33 in the first multiplexing group 31 is electrically connected to the first signal line S1, and each thin-film transistor 33 in the second multiplexing group 32 is electrically connected to the second signal line S2. The red sub-pixel R in the light-emitting unit 21 is electrically connected to one thin-film transistor 33 in the first multiplexing group 31, and the green sub-pixel G in the light-emitting unit 21 is electrically connected to one thin-film transistor 33 in the second multiplexing group 32. The red sub-pixel R in the light-emitting unit 22 is electrically connected to another thin-film transistor 33 in the second multiplexing group 32, and the blue sub-pixel B in the light-emitting unit 22 is electrically connected to another thin-film transistor 33 in the first multiplexing group 31.
[0057] The display panel 100 has at least two driving lines 50, which are electrically connected to the gates of the thin-film transistors 33. Furthermore, two thin-film transistors 33 in the same multiplexing unit 30 are each electrically connected to a driving line 50. A multiplexer (MUX) is connected to each driving line 50. Only when the multiplexer is open can the signal on the signal line 10 be transmitted to the display area 101. The timing sequence of the driving lines 50 is different for different display screens, and this timing sequence can be controlled by a chip or other driving device.
[0058] In the display panel provided in this embodiment of the invention, the number of times signal traces with the same attribute are repeatedly arranged is increased, so that at least one side of a signal trace is provided with another signal trace that transmits the same signal. Since signal traces transmitting the same signal do not generate lateral capacitance, this reduces lateral capacitance by at least half compared to the existing technology of spaced positive and negative signal traces. This significantly reduces the power consumption of the display panel and the impact of lateral capacitance on the refresh rate of the display panel, improving the stability of the displayed image. Simultaneously, this embodiment of the invention adds a multiplexing unit and sets up a drive trace for a multiplexer, allowing one signal trace to connect two sub-pixels simultaneously, thereby reducing the number of signal traces, lowering production costs, and simplifying the trace structure.
[0059] Example 3
[0060] This invention provides a display device including a display panel 100 for displaying a screen. The display device can be any display device with display functionality, such as a mobile phone, laptop computer, or tablet computer.
[0061] like Figure 6 As shown, the display panel 100 has a display area 101 and a fan-out area 102 connected to the display area 101. The display area 101 contains a plurality of display devices, and the images displayed are generally presented in the display area 101. The fan-out area 102 generally contains a plurality of signal lines 10 and a driver chip. The driver chip is electrically connected to the display devices in the display area 101 through the signal lines 10 and transmits display signals, thereby controlling the displayed image.
[0062] Among them, such as Figure 2As shown, the signal trace 10 includes a first signal line 11 and a second signal line 12. Both the first signal line 11 and the second signal line 12 are arranged in the same metal layer 1. The first signal line 11 is used to transmit positive signals, and the second signal line 12 is used to transmit negative signals. In the fan-out area 102, each first signal line 11 is flanked by another first signal line 11 and a second signal line 12, and each second signal line 12 is flanked by a first signal line 11 and another second signal line 12, thus forming a pairwise repeating arrangement of "first signal line 11 - first signal line 11 - second signal line 12 - second signal line 12". This ensures that one side of the signal trace 10 transmitting positive signals is also arranged with signal traces transmitting positive signals, and vice versa, forming a "positive-positive-negative-negative" trace arrangement. Since no lateral capacitance is generated between signal traces 10 of the same attribute, each signal trace 10 in this embodiment only generates lateral capacitance on one side. Compared with the wiring method in the prior art where lateral capacitance is generated on both sides, this greatly reduces the power consumption of the display panel 100. At the same time, it can also reduce the impact of lateral capacitance on the signal transmission of the signal trace 10, improve the signal transmission speed, thereby improving the refresh rate of the display panel 100, improving the stability of the image displayed by the display panel 100, and achieving a better display effect.
[0063] like Figure 5 As shown, the display panel 100 includes a plurality of light-emitting units 20 and a plurality of multiplexing units 30. One end of the signal line 10 is electrically connected to the driver chip of the fan-out area 102, and the other end extends from the fan-out area 102 into the display area 101 and is electrically connected to the thin-film transistor 33 in the multiplexing unit 30. The signal line 10 is used to transmit control signals from the driver chip to each thin-film transistor 33, thereby controlling the light emission of each sub-pixel 23 through each thin-film transistor 33.
[0064] Specifically, such as Figure 5 As shown, the first signal line 11 is divided into S1 and S3, and the second signal line 12 is divided into S2 and S4. In the fan-out area 102, the signal lines 10 are unfolded sequentially in the order of S1-S3-S2-S4, forming a "positive positive negative negative" routing arrangement, thereby reducing the power consumption of the display panel 100 and improving the display effect of the display panel 100.
[0065] The light-emitting unit 20 is disposed within the display area 101, and each light-emitting unit 20 has three sub-pixels 23. Different sub-pixels 23 within the same light-emitting unit 20 emit different types of light. Specifically, the three sub-pixels 23 in the same light-emitting unit 20 are a red sub-pixel R for emitting red light, a green sub-pixel G for emitting green light, and a blue sub-pixel B for emitting blue light. The sub-pixels 23 in the light-emitting unit 20 are electrically connected to a thin-film transistor 33 in the multiplexing unit 30 via an output trace 40. In the display panel 100, the sub-pixels 23 can employ liquid crystal display technology, OLED (organic light-emitting semiconductor) display technology, Mini-LED (miniature light-emitting diode) display technology, or Micro-LED (micro-light-emitting diode) display technology.
[0066] The multiplexing unit 30 is also located in the display area 101, and each multiplexing unit 30 contains three thin-film transistors 33. In the same multiplexing unit 30, one of the sources or drains of the three thin-film transistors 33 is electrically connected to the same signal line 10, and the other of the sources or drains of the three thin-film transistors 33 is electrically connected to a sub-pixel 23 in the light-emitting unit 20 through an output line 40. The three sub-pixels 23 in the light-emitting unit 20 are each electrically connected to a thin-film transistor 33 in two multiplexing units 30, and these two multiplexing units 30 are respectively electrically connected to a first signal line 11 and a second signal line 12. That is, the signal received by one sub-pixel 23 in the same light-emitting unit 20 is different from the signals received by the other two sub-pixels 23; two of the three sub-pixels 23 receive the positive signal transmitted by the first signal line 11, and the remaining sub-pixel 23 receives the negative signal transmitted by the second signal line 12.
[0067] Specifically, such as Figure 5 As shown, the multiplexing unit 30 includes a first multiplexing group 31 and a second multiplexing group 32. Each thin-film transistor 33 in the first multiplexing group 31 is electrically connected to the first signal line S1, and each thin-film transistor 33 in the second multiplexing group 32 is electrically connected to the second signal line S2. The red sub-pixel R and blue sub-pixel B in the light-emitting unit 21 are electrically connected to two thin-film transistors 33 in the first multiplexing group 31, respectively. The green sub-pixel G in the light-emitting unit 21 is electrically connected to one thin-film transistor 33 in the second multiplexing group 32. The red sub-pixel R and blue sub-pixel B in the light-emitting unit 22 are electrically connected to two other thin-film transistors 33 in the second multiplexing group 32, respectively. The green sub-pixel G in the light-emitting unit 22 is electrically connected to another thin-film transistor 33 in the first multiplexing group 31.
[0068] The display panel 100 has at least three driving lines 50, which are electrically connected to the gates of the thin-film transistors 33. Furthermore, the three thin-film transistors 33 in the same multiplexing unit 30 are each electrically connected to a driving line 50. A multiplexer (MUX) is connected to each driving line 50; only when the multiplexer is open can the signal on the signal line 10 be transmitted to the display area 101. The timing sequence of the driving lines 50 is different for different display screens, and this timing sequence can be controlled by a chip or other driving device.
[0069] In the display panel provided in this embodiment of the invention, the number of times signal traces with the same attribute are repeatedly arranged is increased, so that at least one side of the signal trace is provided with another signal trace that transmits the same signal. Since signal traces transmitting the same signal do not generate lateral capacitance, this reduces lateral capacitance by at least half compared to the existing technology of spaced positive and negative signal traces. This significantly reduces the power consumption of the display panel and the impact of lateral capacitance on the display panel refresh rate, improving the stability of the displayed image. Furthermore, this embodiment of the invention further adds a drive trace with a multiplexer, allowing one signal trace to connect three sub-pixels simultaneously, thereby further reducing the number of signal traces, lowering production costs, and further simplifying the trace structure.
[0070] In other embodiments of the present invention, a double-layer metal layer or a multi-layer metal layer (two or more layers) is also provided, as well as a display panel and display device including the double-layer metal layer or the multi-layer metal layer. Taking a double-layer metal layer as an example, adjacent metal layers are separated by an insulating layer, that is, an insulating layer is provided between the first metal layer M1 and the second metal layer M2. Furthermore, as... Figure 7 As shown, the signal traces 10 in the first metal layer M1 and the signal traces 10 in the second metal layer M2 are staggered, meaning that the orthographic projection of the signal traces 10 in the first metal layer M1 onto the display panel 100 does not coincide with the orthographic projection of the signal traces 10 in the second metal layer M2 onto the display panel 100. In the first metal layer M1 and the second metal layer M2, the lateral capacitance is mainly generated between the signal traces in the same layer. Therefore, the signal traces 10 in the first metal layer M1 and the signal traces 10 in the second metal layer M2 can each adopt the same routing arrangement as the signal traces in the single-layer metal layer provided in Embodiments 1-3. Their routing structure and connection structure are similar to any one of Embodiments 1-3 of the present invention, and therefore will not be described in detail here. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0071] While the invention has been described herein with reference to specific embodiments, it should be understood that these embodiments are merely examples of the principles and applications of the invention. Therefore, it should be understood that many modifications can be made to the exemplary embodiments, and other arrangements can be designed without departing from the spirit and scope of the invention as defined by the appended claims. It should be understood that different dependent claims and features described herein can be combined in ways different from those described in the original claims. It is also understood that features described in conjunction with individual embodiments can be used in other described embodiments.
Claims
1. A display panel, characterized in that, It includes at least one metal layer, wherein a plurality of signal traces are provided in the metal layer, and the signal traces include: At least two first signal lines are used to transmit positive signals; At least two second signal lines are used to transmit negative signals; the first signal line and the second signal line are both arranged in the same metal layer; At least one side of a first signal line is provided with another first signal line, and at least one side of a second signal line is provided with another second signal line; The display panel has a fan-out area and a display area connected to the fan-out area; in the fan-out area, each first signal line has another first signal line and a second signal line on both sides, and each second signal line also has a first signal line and another second signal line on both sides, so that each signal line generates lateral capacitance on only one side.
2. The display panel as described in claim 1, characterized in that, The first signal line and the second signal line extend from the fan-out area into the display area and are connected to the components in the display area.
3. The display panel as described in claim 2, characterized in that, Also includes: A plurality of light-emitting units, each of the light-emitting units including at least one sub-pixel, the sub-pixel being located in the display area; The first signal line and the second signal line are respectively electrically connected to one of the light-emitting units.
4. The display panel as described in claim 3, characterized in that, When each of the light-emitting units has at least two sub-pixels, the display panel further includes: A plurality of multiplexing units, each multiplexing unit having at least two thin-film transistors located in the display area; One of the source or drain of the thin-film transistor is electrically connected to the sub-pixel; The other of the source or drain of the thin-film transistor is electrically connected to the signal trace.
5. The display panel as described in claim 4, characterized in that, It also includes several output traces, one end of which is electrically connected to the thin-film transistor and the other end of which is electrically connected to the sub-pixel.
6. The display panel as described in claim 4, characterized in that, The multiplexing unit includes: In the first multiplexing group, each of the thin-film transistors is electrically connected to the same first signal line; The second multiplexing group, in which each of the thin-film transistors is electrically connected to the same second signal line; In the same light-emitting unit, at least one of the sub-pixels is electrically connected to the thin-film transistor in the first multiplexing group, and the remaining sub-pixels are electrically connected to the thin-film transistor in the second multiplexing group.
7. The display panel as described in claim 4, characterized in that, Also includes: At least two drive lines, with each thin-film transistor in the same multiplexing unit electrically connected to one of the drive lines; A multiplexer is connected to the drive wiring.
8. The display panel as described in claim 4, characterized in that, The sub-pixels include red sub-pixels, green sub-pixels, and blue sub-pixels, and each light-emitting unit includes at least two of the red sub-pixels, green sub-pixels, and blue sub-pixels.
9. The display panel as claimed in claim 1, characterized in that, When the display panel includes two or more metal layers, an insulating layer is provided between two adjacent metal layers.
10. A display device, characterized in that, Includes the display panel as described in any one of claims 1-9.
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