Data acquisition method, device, system, apparatus and storage medium

Abstract

The application discloses a data acquisition method, device, system, equipment and storage medium, and the method comprises the following steps: a controller sends a driving instruction to N communication chips; wherein the types of the N communication chips are different, N is greater than or equal to 2, and N is an integer; each communication chip sends a confirmation signal to a collection board group based on the driving instruction; wherein the collection board group comprises a plurality of collection boards; each collection board is provided with a plurality of analog front-end chips; if the communication chip receives a reply signal sent by the collection board group, the communication chip is determined as a target communication chip; the target communication chip establishes a connection with a plurality of analog front-end chips of each collection board to form a plurality of data transmission channels, and state data of an electric core is collected based on the plurality of data transmission channels. The technical scheme of the application solves the problem that the mainboard needs to be replaced due to the type mismatch of the communication chip of the mainboard.

Description

Technical Field

[0001] This invention belongs to the field of battery pack technology, and particularly relates to a data acquisition method, device, system, equipment and storage medium. Background Technology

[0002] Currently, due to the different parameter configurations of Battery Management Systems (BMS) produced by different manufacturers, it is necessary to match the same type of communication chip and analog front end (AFE) chip during use before the battery pack status data can be collected normally. In other words, BMS produced by different manufacturers are not interchangeable.

[0003] However, in practical applications, different users may choose different types of acquisition boards according to their own needs, corresponding to different types of AFEs. In order to match the communication chip and AFE, the BMU needs to be replaced. Replacing the motherboard is time-consuming, laborious and costly for users.

[0004] In addition, for BMS manufacturers, the communication chips of a well-configured motherboard have fixed parameter configurations. Different motherboards will produce different communication chip models, resulting in a large amount of data, complex management, and significant development costs. Summary of the Invention

[0005] This invention aims to at least partially solve one of the technical problems in related technologies. Therefore, one object of this invention is to provide a data acquisition method, apparatus, system, device, and storage medium.

[0006] To address the aforementioned technical problems, embodiments of the present invention provide the following technical solutions:

[0007] A data acquisition method, comprising:

[0008] The controller sends drive commands to N communication chips; wherein the N communication chips are of different types, N≥2, and N is an integer;

[0009] Each of the communication chips sends an acknowledgment signal to the acquisition board group based on the driving instruction; wherein, the acquisition board group includes multiple acquisition boards; each acquisition board is provided with multiple analog front-end chips;

[0010] If the communication chip receives a reply signal sent by the acquisition board group, then the communication chip is identified as the target communication chip;

[0011] The target communication chip establishes connections with multiple analog front-end chips on each acquisition board to form multiple data transmission channels, and acquires the status data of the battery cell based on the multiple data transmission channels.

[0012] Optionally, the controller sends drive commands to multiple communication chips, including:

[0013] The controller identifies the N communication chips and determines the first communication chip;

[0014] The controller sends a first drive command to the first communication chip;

[0015] The first communication chip sends a first feedback result to the controller;

[0016] The controller controls the N-1 communication chips that have not received the first drive command based on the first feedback result.

[0017] Optionally, the controller controls the N-1 communication chips that have not received the first drive command based on the first feedback result, including:

[0018] If the Mth feedback result is a matching failure; where M≤N, and M is an integer;

[0019] The controller then identifies the NM communication chips that have not received any of the drive commands, and determines the (M+1)th communication chip.

[0020] The controller sends a second drive command to the (M+1)th communication chip;

[0021] The (M+1)th communication chip sends the (M+1)th feedback result to the controller;

[0022] The controller controls the NM communication chips that have not received any of the drive commands based on the (M+1)th feedback result.

[0023] Optionally, the controller controls the NM communication chips that have not received any of the drive commands based on the (M+1)th feedback result, including:

[0024] If the (M+1)th feedback result is a matching failure;

[0025] Then compare M+1 with N;

[0026] If M+1 is less than N, then the controller controls the NM communication chips that have not received any of the drive commands based on the M+1th feedback result;

[0027] If M+1 equals N, then the process terminates.

[0028] Optionally, each of the communication chips sends an acknowledgment signal to the acquisition board group based on the driving instruction, including:

[0029] Upon receiving the driving command, each of the communication chips generates an acknowledgment signal and sends the acknowledgment signal to the acquisition board group.

[0030] If the acquisition board group receives the confirmation signal, the acquisition board group generates a reply signal and sends the reply signal to the communication chip;

[0031] If the acquisition board group does not receive the confirmation signal, then the acquisition board group and the communication chip are incompatible.

[0032] Optionally, if the acquisition board group does not receive the confirmation signal, and the acquisition board group and the communication chip are incompatible, the method further includes:

[0033] If the communication chip does not receive the reply signal after waiting for a preset period of time, it generates a matching failure feedback result.

[0034] Embodiments of the present invention also provide a data acquisition device, comprising:

[0035] A driver module is used by the controller to send driver commands to N communication chips; wherein the N communication chips are of different types, N≥2, and N is an integer;

[0036] A confirmation module is used for each of the communication chips to send a confirmation signal to the acquisition board group based on the driving instruction; wherein, the acquisition board group includes multiple acquisition boards; each acquisition board is provided with multiple analog front-end chips;

[0037] The response module is used to identify the communication chip as the target communication chip if the communication chip receives a response signal sent by the acquisition board group.

[0038] The acquisition module is used to establish connections between the target communication chip and multiple analog front-end chips of each acquisition board to form multiple data transmission channels, and to acquire the status data of the battery cell based on the multiple data transmission channels.

[0039] Embodiments of the present invention also provide a data acquisition system, comprising:

[0040] The motherboard includes a controller and N communication chips; wherein the N communication chips are of different types, N≥2, and N is an integer;

[0041] A data acquisition board assembly, comprising multiple data acquisition boards; each data acquisition board is equipped with multiple analog front-end chips; the analog front-end chips are connected to the battery cells.

[0042] The controller is used to control the target communication chip to establish connections with multiple analog front-end chips of each acquisition board to form multiple data transmission channels, and to acquire the status data of the battery cell based on the multiple data transmission channels.

[0043] Embodiments of the present invention also provide an electronic device, including a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, wherein the processor executes the computer program to implement the method described above.

[0044] Embodiments of the present invention also provide a computer-readable storage medium comprising a stored computer program, wherein the computer program, when executed, controls the device containing the computer-readable storage medium to perform the method described above.

[0045] The embodiments of the present invention have the following technical effects:

[0046] The above-mentioned technical solution of the present invention 1) integrates multiple types of communication chips on the motherboard, realizing matching with different types of acquisition board groups, solving the problem that users or staff need to replace the motherboard after changing the acquisition board group because the communication chips on the motherboard are incompatible; at the same time, it solves the problem of inconvenient system management caused by frequent motherboard replacement.

[0047] 2) Integrating the VCU onto the motherboard saves the space required for separate VCU settings in existing technologies, which helps to streamline the vehicle management architecture and improve the efficiency of resource allocation.

[0048] 3) Integrating OTA on the motherboard allows for the updating of algorithms and programs in the controller at any time, extending the controller's lifespan and expanding its applicability.

[0049] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0050] Figure 1 This is a schematic diagram of the data acquisition system provided in an embodiment of the present invention;

[0051] Figure 2 This is a flowchart illustrating the data acquisition method provided in an embodiment of the present invention;

[0052] Figure 3This is a schematic diagram of the data acquisition device provided in an embodiment of the present invention. Detailed Implementation

[0053] Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present invention, and should not be construed as limiting the present invention.

[0054] First, to facilitate understanding of the embodiments by those skilled in the art, some terms are explained:

[0055] (1)VCU: Vehicle Control Unit; vehicle controller.

[0056] (2) OTA: Over-the-Air Technology.

[0057] (3) MCU: Microcontroller Unit.

[0058] (4) BMU: Battery Management Unit.

[0059] (5) SPI: Serial Peripheral Interface.

[0060] like Figure 1 As shown, embodiments of the present invention also provide a data acquisition system, including:

[0061] The motherboard includes a controller and N communication chips; wherein the N communication chips are of different types, N≥2, and N is an integer;

[0062] For example, the motherboard can be a BMU, which means that the BMU has N types of communication chips.

[0063] A data acquisition board assembly, comprising multiple data acquisition boards; each data acquisition board is equipped with multiple analog front-end chips; the analog front-end chips are connected to the battery cells.

[0064] In practical applications, different acquisition board groups may correspond to different types. In order to ensure that no matter which acquisition board group a user or staff selects, a matching communication chip can be found based on the BMU without replacing the BMU, the embodiments of the present invention provide N types of communication chips that can cover all types of communication chips.

[0065] Furthermore, such as Figure 2 As shown, the acquisition board can be a BIC, and each acquisition board group can have E BICs; where E is a positive integer; the E acquisition boards are integrated in a ring daisy chain manner.

[0066] Specifically, the controller interacts with the communication chip via the SPI communication interface. Each communication chip is matched with an SPI interface. The controller controls the communication chip to convert the signal into a differential signal through the SPI communication interface, thereby enabling the motherboard to communicate with the first acquisition board in the acquisition board group in the form of a differential signal. After the differential signal comes out from the first acquisition board, it enters the subsequent acquisition boards in sequence. When the differential signal enters the Eth acquisition board, it returns to the controller through the same communication chip, ultimately enabling the motherboard to communicate with all the acquisition boards.

[0067] In order to quickly identify the first acquisition board, multiple acquisition boards can be numbered so that the communication chip can quickly identify the first acquisition board based on the number and then send an acknowledgment signal to the first acquisition board.

[0068] Furthermore, each AFE is connected to one or more battery cells to collect status data of the connected battery cells.

[0069] For example, suppose each acquisition board has K AFEs, where K is a positive integer; the K AFEs are integrated based on a ring daisy chain.

[0070] Specifically, after receiving the differential signal, each acquisition board transmits the differential signal to the first AFE, thereby enabling the motherboard to communicate with the first AFE on the acquisition board in the form of a differential signal. After the differential signal comes out from the first AFE, it enters the subsequent AFEs in sequence. When the differential signal enters the Kth AFE on the acquisition board, it is output from the Kth AFE back to the acquisition board. Finally, the motherboard communicates with all the AFEs on the acquisition board group, thereby enabling the motherboard to obtain the status data of the battery cells connected to each AFE.

[0071] In order to quickly identify the first AFE, multiple AFEs can be numbered so that the communication chip can quickly identify the first AFE based on the number and then send an acknowledgment signal to the first AFE.

[0072] In practical applications, a BMS can include a BMU and a BIC. Each BMS can be configured with multiple BICs to collect status data from multiple battery cells.

[0073] Furthermore, the controller is used to control the target communication chip to establish connections with multiple analog front-end chips of each acquisition board to form multiple data transmission channels, and to acquire the status data of the battery cell based on the multiple data transmission channels.

[0074] For example, the controller can be an MCU.

[0075] In practical applications, once the system is powered on, if one of the communication chips successfully establishes a connection with the acquisition board, it can collect status data from all the battery cells.

[0076] In an optional embodiment of the present invention, the VCU can be integrated on the motherboard, saving the space occupied by the existing VCU, while expanding the functions of the motherboard, broadening the applicability of the system, which is conducive to simplifying the vehicle management architecture and improving the efficiency of resource allocation.

[0077] In an optional embodiment of the present invention, OTA can be integrated on the motherboard. Based on OTA, the algorithm in the controller can be upgraded to improve the applicability of the controller and extend its service life.

[0078] For example, if a user needs to modify a certain algorithm or parameter of the MCU, there is no need to replace the entire motherboard or the MCU. Only the corresponding algorithm or parameter of the MCU needs to be adapted, updated or upgraded via OTA, which saves time and effort and reduces maintenance costs.

[0079] like Figure 2 As shown, embodiments of the present invention also provide a data acquisition method applied to the above-mentioned system, comprising:

[0080] Step S1: The controller sends drive commands to N communication chips; wherein the N communication chips are of different types, N≥2, and N is an integer;

[0081] Specifically, the controller sends drive commands to multiple communication chips, including:

[0082] The controller identifies the N communication chips and determines the first communication chip;

[0083] The controller sends a first drive command to the first communication chip;

[0084] The first communication chip sends a first feedback result to the controller;

[0085] The controller controls the N-1 communication chips that have not received the first drive command based on the first feedback result.

[0086] In practical application scenarios, after the system is powered on and the controller recognizes the power-on status, the controller sends the first drive command to the first communication chip.

[0087] The first communication chip sends a first feedback result to the controller; wherein the first feedback result includes whether the matching is successful or the matching is unsuccessful.

[0088] Specifically, if the first communication chip and the acquisition board group fail to match, the first communication chip generates a first feedback result of matching and sends the first feedback result to the controller. Then, after the controller recognizes that the first feedback result is a matching failure, the controller continues to identify the remaining N-1 communication chips, determines the second communication chip, and repeats the above steps until a communication chip matches the acquisition board group successfully or all communication chips fail to match the acquisition board group, at which point the process terminates.

[0089] If the first communication chip and the acquisition board are successfully matched, a matching success signal is generated and sent to the controller. Then, the controller controls multiple analog front-end chips in the acquisition board to acquire the status data of the battery cell.

[0090] Furthermore, the controller controls the N-1 communication chips that have not received the first drive command based on the first feedback result, including:

[0091] If the Mth feedback result is a matching failure; where M≤N, and M is an integer;

[0092] The controller then identifies the NM communication chips that have not received any of the drive commands, and determines the (M+1)th communication chip.

[0093] The controller sends a second drive command to the (M+1)th communication chip;

[0094] The (M+1)th communication chip sends the (M+1)th feedback result to the controller;

[0095] The controller controls the NM communication chips that have not received any of the drive commands based on the (M+1)th feedback result.

[0096] In practical applications, if the Mth communication chip still cannot be matched with the acquisition board group, the controller will identify the remaining NM communication chips. When the controller identifies the M+1th communication chip, it will send the M+1th drive command to the M+1th communication chip. Then the above steps will be repeated until a communication chip is successfully matched with the acquisition board group or all communication chips fail to match with the acquisition board group, at which point the process will terminate.

[0097] Furthermore, the controller controls the NM communication chips that have not received any of the drive commands based on the (M+1)th feedback result, including:

[0098] If the (M+1)th feedback result is a matching failure;

[0099] Then compare M+1 with N;

[0100] If M+1 is less than N, then the controller controls the NM communication chips that have not received any of the drive commands based on the M+1th feedback result;

[0101] If M+1 equals N, then the process terminates.

[0102] In an embodiment of the present invention, each time the controller receives a feedback result, the total number M of feedback results is incremented by 1 to obtain M+1 feedback results;

[0103] If the M+1th feedback result is a successful match (i.e. a successful handshake), the controller controls each analog front-end chip of the acquisition board to acquire the status data of multiple (usually 1 to 18) cells connected to it.

[0104] If the (M+1)th feedback result is a matching failure (i.e., a handshake failure), the controller compares the current total number of feedback results M+1 with the total number of communication chips N. If the current total number of feedback results is less than the total number of communication chips, the above steps are repeated to find the (M+2)th communication chip from the remaining NM-1 communication chips and send the (M+2)th drive command to the (M+2)th communication chip until a communication chip is found to be successfully matched with the acquisition board group or the current total number of feedback results is equal to the total number of communication chips N, at which point the process terminates.

[0105] In an optional embodiment of the present invention, if the current feedback result is still a matching failure, and the total number of current feedback results is equal to the total number of communication chips N, the controller can issue an alarm to provide fault notification to the user or staff, so that the user or staff can promptly repair the fault and reduce unnecessary losses.

[0106] Step S2: Each of the communication chips sends an acknowledgment signal to the acquisition board group based on the driving instruction; wherein, the acquisition board group includes multiple acquisition boards; each acquisition board is provided with multiple analog front-end chips;

[0107] Specifically, after receiving the drive command, each communication chip generates an acknowledgment signal and sends the acknowledgment signal to the acquisition board group to attempt to establish a connection with the acquisition board group.

[0108] Step S3: If the communication chip receives a reply signal sent by the acquisition board group, then the communication chip is identified as the target communication chip;

[0109] Specifically, each of the communication chips sends an acknowledgment signal to the acquisition board group based on the driving instruction, including:

[0110] Upon receiving the driving command, each of the communication chips generates an acknowledgment signal and sends the acknowledgment signal to the acquisition board group.

[0111] If the acquisition board group receives the confirmation signal, the acquisition board group generates a reply signal and sends the reply signal to the communication chip;

[0112] If the acquisition board group does not receive the confirmation signal, then the acquisition board group and the communication chip are incompatible.

[0113] When a communication chip sends an acknowledgment signal to the acquisition board:

[0114] If the acquisition board and the communication chip are matched, the acquisition board will receive the confirmation signal, generate a reply signal, and then send the reply signal to the communication chip, thus the match is successful.

[0115] If the acquisition board and the communication chip are incompatible, the acquisition board will not receive the confirmation signal and will then return to standby mode, waiting for the next confirmation signal until it receives a confirmation signal from the matching communication chip or the process terminates.

[0116] Furthermore, if the acquisition board group does not receive the confirmation signal, and the acquisition board group and the communication chip are incompatible, the following steps are also included:

[0117] If the communication chip does not receive the reply signal after waiting for a preset period of time, it generates a matching failure feedback result.

[0118] In practical applications, the preset time period can be 100-400ms, for example, 150ms. That is, after any communication chip sends an acknowledgment signal to the acquisition board, it waits for 150ms. If the communication chip still does not receive a reply signal from the acquisition board after 150ms, it is confirmed that the communication chip and the acquisition board have failed to match, and then the communication chip generates a feedback result of matching failure.

[0119] Step S4: The target communication chip establishes a connection with multiple analog front-end chips of each acquisition board to form multiple data transmission channels, and acquires the status data of the battery cell based on the multiple data transmission channels.

[0120] Specifically, after the target communication chip is determined, the controller controls each analog front-end chip to collect the status data of the battery cell connected to it based on the multiple data transmission channels between the target communication chip and multiple analog front-end chips. Then, the controller controls the multiple analog front-end chips to send the collected status data of the battery cell to the controller through multiple data transmission channels.

[0121] The cell status data includes cell voltage and temperature, among other things.

[0122] In embodiments of the present invention, multiple types of communication chips are integrated on the motherboard, enabling compatibility with different types of acquisition boards. This solves the problem that users or staff need to replace the motherboard after changing the acquisition board because the communication chips on the motherboard are incompatible. At the same time, it also solves the problem of inconvenient system management caused by frequent motherboard replacements.

[0123] The above embodiments of the present invention can be implemented based on the following methods:

[0124] Specifically, to facilitate the identification of the next communication chip, N communication chips can be numbered;

[0125] For example: N communication chips can correspond to P1, P2, P3...P N .

[0126] After the system is powered on, the controller sends the first drive command to P1. After receiving the first drive command, P1 generates an acknowledgment signal. Upon identifying the first acquisition board in the acquisition board group, P1 sends the acknowledgment signal to the first acquisition board. If the first acquisition board receives the acknowledgment signal, the first acquisition board generates a reply signal and sends it to P1. After receiving the reply signal, P1 generates a first feedback result indicating successful matching and sends the first feedback result to the controller. After the controller identifies the first feedback result as a successful match, it controls multiple analog front-end chips to acquire the status data of the battery cells connected to them.

[0127] If the first acquisition board does not receive an acknowledgment signal, it remains in standby mode. After waiting for 160ms, P1 generates a first feedback result indicating a matching failure and sends it to the controller. Once the controller recognizes the first feedback result as a matching failure, it searches the remaining N-1 communication chips to determine P2 and repeats the above steps until a communication chip successfully matches the acquisition board group. Then, that communication chip is identified as the target communication chip; for example, P3 is the target communication chip.

[0128] Multiple data transmission channels are established between P3 and the acquisition board, and then the controller receives the status data of the battery cell through P3.

[0129] If N=4 and P4 fails to match the acquisition board group, the process will terminate, and the controller will issue an alarm signal to alert staff or users about the fault.

[0130] like Figure 3 As shown, embodiments of the present invention also provide a data acquisition device 300, comprising:

[0131] The drive module 301 sends drive commands to N communication chips; wherein the N communication chips are of different types, N≥2, and N is an integer;

[0132] The confirmation module 302 is used for each of the communication chips to send a confirmation signal to the acquisition board group based on the driving instruction; wherein, the acquisition board group includes multiple acquisition boards; each acquisition board is provided with multiple analog front-end chips;

[0133] The response module 303 is used to identify the communication chip as the target communication chip if the communication chip receives a response signal sent by the acquisition board group.

[0134] The acquisition module 304 is used to establish connections between the target communication chip and multiple analog front-end chips of each acquisition board to form multiple data transmission channels, and to acquire the status data of the battery cell based on the multiple data transmission channels.

[0135] Optionally, the controller sends drive commands to multiple communication chips, including:

[0136] The controller identifies the N communication chips and determines the first communication chip;

[0137] The controller sends a first drive command to the first communication chip;

[0138] The first communication chip sends a first feedback result to the controller;

[0139] The controller controls the N-1 communication chips that have not received the first drive command based on the first feedback result.

[0140] Optionally, the controller controls the N-1 communication chips that have not received the first drive command based on the first feedback result, including:

[0141] If the Mth feedback result is a matching failure; where M≤N, and M is an integer;

[0142] The controller then identifies the NM communication chips that have not received any of the drive commands, and determines the (M+1)th communication chip.

[0143] The controller sends a second drive command to the (M+1)th communication chip;

[0144] The (M+1)th communication chip sends the (M+1)th feedback result to the controller;

[0145] The controller controls the NM communication chips that have not received any of the drive commands based on the (M+1)th feedback result.

[0146] Optionally, the controller controls the NM communication chips that have not received any of the drive commands based on the (M+1)th feedback result, including:

[0147] If the (M+1)th feedback result is a matching failure;

[0148] Then compare M+1 with N;

[0149] If M+1 is less than N, then the controller controls the NM communication chips that have not received any of the drive commands based on the M+1th feedback result;

[0150] If M+1 equals N, then the process terminates.

[0151] Optionally, each of the communication chips sends an acknowledgment signal to the acquisition board group based on the driving instruction, including:

[0152] Upon receiving the driving command, each of the communication chips generates an acknowledgment signal and sends the acknowledgment signal to the acquisition board group.

[0153] If the acquisition board group receives the confirmation signal, the acquisition board group generates a reply signal and sends the reply signal to the communication chip;

[0154] If the acquisition board group does not receive the confirmation signal, then the acquisition board group and the communication chip are incompatible.

[0155] Optionally, if the acquisition board group does not receive the confirmation signal, and the acquisition board group and the communication chip are incompatible, the method further includes:

[0156] If the communication chip does not receive the reply signal after waiting for a preset period of time, it generates a matching failure feedback result.

[0157] Embodiments of the present invention also provide an electronic device, including a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, wherein the processor executes the computer program to implement the method described above.

[0158] Embodiments of the present invention also provide a computer-readable storage medium comprising a stored computer program, wherein the computer program, when executed, controls the device containing the computer-readable storage medium to perform the method described above.

[0159] Furthermore, other configurations and functions of the apparatus in the embodiments of the present invention are known to those skilled in the art, and will not be described in detail here to reduce redundancy.

[0160] It should be noted that the logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer-readable media include: an electrical connection having one or more wires (electronic device), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Alternatively, the computer-readable medium may be paper or other suitable media on which the program can be printed, since the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in a computer memory.

[0161] It should be understood that various parts of the present invention can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0162] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0163] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this invention and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0164] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0165] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise explicitly limited. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0166] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "over," and "on top" of the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "beneath" of the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0167] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A data acquisition method, characterized in that, An application is made in a battery management system, the system comprising a motherboard and a data acquisition board assembly. The motherboard includes a controller and N communication chips of different types, where N ≥ 2 and is an integer. The data acquisition board assembly includes multiple data acquisition boards, each of which is equipped with multiple analog front-end chips for connecting to battery cells. The method includes: The controller sends drive commands to N communication chips; Each of the communication chips sends an acknowledgment signal to the acquisition board group based on the driving instruction; wherein, the acquisition board group includes multiple acquisition boards; each acquisition board is provided with multiple analog front-end chips; If the communication chip receives a reply signal sent by the acquisition board group, then the communication chip is identified as the target communication chip; The target communication chip establishes connections with multiple analog front-end chips on each acquisition board to form multiple data transmission channels, and acquires the status data of the battery cell based on the multiple data transmission channels.

2. The method according to claim 1, characterized in that, The controller sends drive commands to multiple communication chips, including: The controller identifies the N communication chips and determines the first communication chip; The controller sends a first drive command to the first communication chip; The first communication chip sends a first feedback result to the controller; the first feedback result includes whether the first communication chip and the acquisition board group are successfully matched or whether the first communication chip and the acquisition board group are unmatched. The controller controls the N-1 communication chips that have not received the first drive command based on the first feedback result.

3. The method according to claim 2, characterized in that, The controller controls the N-1 communication chips that have not received the first drive command based on the first feedback result, including: If the Mth feedback result is a matching failure; where M≤N, and M is an integer; The controller then identifies the NM communication chips that have not received any of the drive commands, and determines the (M+1)th communication chip. The controller sends a second drive command to the (M+1)th communication chip; The (M+1)th communication chip sends the (M+1)th feedback result to the controller; The controller controls the NM communication chips that have not received any of the drive commands based on the (M+1)th feedback result.

4. The method according to claim 3, characterized in that, The controller controls the NM communication chips that have not received any of the drive commands based on the (M+1)th feedback result, including: If the (M+1)th feedback result is a matching failure; Then compare M+1 with N; If M+1 is less than N, then the controller controls the NM communication chips that have not received any of the drive commands based on the M+1th feedback result; If M+1 equals N, then the process terminates.

5. The method according to claim 1, characterized in that, Each of the communication chips sends an acknowledgment signal to the acquisition board group based on the driving command, including: Upon receiving the driving command, each of the communication chips generates an acknowledgment signal and sends the acknowledgment signal to the acquisition board group. If the acquisition board group receives the confirmation signal, the acquisition board group generates a reply signal and sends the reply signal to the communication chip; If the acquisition board group does not receive the confirmation signal, then the acquisition board group and the communication chip are incompatible.

6. The method according to claim 5, characterized in that, If the acquisition board group does not receive the confirmation signal, and the acquisition board group and the communication chip are incompatible, the method further includes: If the communication chip does not receive the reply signal after waiting for a preset period of time, it generates a matching failure feedback result.

7. A data acquisition device, characterized in that, An application is made in a battery management system. The system includes a motherboard and a data acquisition board assembly. The motherboard includes a controller and N communication chips of different types, where N ≥ 2 and is an integer. The data acquisition board assembly includes multiple data acquisition boards, each of which is equipped with multiple analog front-end chips for connecting to battery cells. The device includes: The driver module is used by the controller to send driver commands to N communication chips; A confirmation module is used for each of the communication chips to send a confirmation signal to the acquisition board group based on the driving instruction; wherein, the acquisition board group includes multiple acquisition boards; each acquisition board is provided with multiple analog front-end chips; The response module is used to identify the communication chip as the target communication chip if the communication chip receives a response signal sent by the acquisition board group. The acquisition module is used to establish connections between the target communication chip and multiple analog front-end chips of each acquisition board to form multiple data transmission channels, and to acquire the status data of the battery cell based on the multiple data transmission channels.

8. A data acquisition system, characterized in that, include: The motherboard includes a controller and N communication chips; wherein the N communication chips are of different types, N≥2, and N is an integer; A data acquisition board assembly, comprising multiple data acquisition boards; each data acquisition board is equipped with multiple analog front-end chips; the analog front-end chips are connected to the battery cells. The controller is used to send drive commands to N communication chips; each communication chip sends an acknowledgment signal to the acquisition board group based on the drive command; if the communication chip receives a reply signal sent by the acquisition board group, the communication chip is identified as the target communication chip. The controller is also used to control the target communication chip to establish a connection with multiple analog front-end chips of each acquisition board to form multiple data transmission channels, and to collect the status data of the battery cell based on the multiple data transmission channels.

9. An electronic device, characterized in that, The method includes a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, wherein the processor, when executing the computer program, implements the method as claimed in any one of claims 1 to 6.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium includes a stored computer program, wherein, when the computer program is executed, it controls the device on which the computer-readable storage medium is located to perform the method as described in any one of claims 1 to 6.

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