Organic light emitting diode display device and method of operating the same
Patent Information
- Application Number
- CN202111260439.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2021-01-04
- Filing Date
- 2021-10-28
- Publication Date
- 2026-10-27
- Estimated Expiration
- 2041-10-28
AI Technical Summary
具体地,当主机处理器向OLED显示装置提供针对复杂渲染通常期望被处理的帧数据(例如,游戏图像数据)时,这种帧频率失配可加剧,并且可发生在OLED显示装置的图像中因帧频率失配导致边界线的撕裂现象
[0027]在根据本发明的OLED显示装置和操作OLED显示装置的方法的实施方式中,如本文中所描述的,可基于面板负载和第一代表性灰度级来确定电源电压的初始电平,可基于面板负载和第二代表性灰度级来确定电源电压的阶跃电平,并且电源电压的电压电平可在可变消隐时段中基于阶跃电平从初始电平逐渐地增加。相应地,在OLED显示装置的这种实施方式中,可防止或减少可变消隐时段中的亮度降低。
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Figure CN114724507B_ABST
Abstract
Description
Technical Field
[0001] Embodiments of the present invention relate to display devices, and more specifically, to organic light-emitting diode (“OLED”) display devices and methods of operating OLED display devices. Background Technology
[0002] Typically, OLED displays can display images at frame rates (or constant frame rates) of approximately 60 Hz, approximately 120 Hz, approximately 240 Hz, etc. However, host processors (e.g., graphics processing units (“GPUs”), application processors (“APs”), or graphics cards) can provide frame data to the OLED display at a rendering frame rate different from that of the OLED display. Specifically, this frame rate mismatch can be exacerbated when the host processor provides the OLED display with frame data that is typically expected to be processed for complex rendering (e.g., game image data), and can result in tearing of boundary lines in the images of the OLED display due to frame rate mismatch.
[0003] To prevent or reduce this tearing phenomenon, variable frame modes (e.g., Free-Sync mode, G-Sync mode, etc.) have been developed. In variable frame modes, the host processor provides frame data to the OLED display device at a variable input frame frequency by changing the length (or duration) of the blanking period in each frame segment. OLED display devices supporting variable frame modes can display images synchronously with the variable input frame frequency, or can drive the display panel with a variable input frame frequency (or variable drive frequency), thereby reducing or preventing tearing. Summary of the Invention
[0004] In an organic light-emitting diode ("OLED") display device operating in variable frame mode, as the duration of the variable blanking period increases, the data voltage stored therein for each pixel can be distorted due to leakage current in the pixel, and the brightness of the display panel can decrease. Furthermore, as the grayscale level of the image data increases, the brightness of the display panel can be further reduced during the variable blanking period.
[0005] The implementation provides an OLED display device capable of preventing or reducing brightness reduction during variable blanking periods.
[0006] The embodiments provide a method for operating an OLED display device capable of preventing or reducing brightness reduction during variable blanking periods.
[0007] Embodiments of the present invention provide an OLED display device that operates in a variable frame mode, where the frame period includes a variable blanking period. In this embodiment, the OLED display device includes a display panel comprising a plurality of pixels, a power management circuit supplying a power supply voltage to the plurality of pixels, and a controller. The controller determines a panel load, a first representative gray level, and a second representative gray level by analyzing input image data. Based on the panel load and the first representative gray level, it determines an initial level of the power supply voltage, and based on the panel load and the second representative gray level, it determines a step level of the power supply voltage. In this embodiment, the power management circuit generates a power supply voltage with an initial level during an active period of the frame period, and gradually increases the voltage level of the power supply voltage from the initial level based on the step level during the variable blanking period of the frame period.
[0008] In this implementation, the voltage level of the power supply voltage during the variable blanking period can increase as the duration of the variable blanking period increases.
[0009] In this implementation, the voltage level of the power supply voltage during the variable blanking period can be periodically increased by a step level.
[0010] In this implementation, the initial level of the power supply voltage may increase with the increase of the panel load, and may also increase with the increase of the first representative gray level.
[0011] In this implementation, the step level of the power supply voltage can increase with the increase of panel load, and can also increase with the increase of the second representative gray level.
[0012] In one implementation, the controller can generate an initial voltage code representing an initial level of the power supply voltage and a step code representing a step level of the power supply voltage, and can also generate an additional voltage code that has an initial value during the active period and is periodically incremented by the step code during a variable blanking period. In this implementation, the power management circuitry can receive the initial voltage code and the additional voltage code from the controller and can generate a power supply voltage having a voltage level corresponding to the sum of the initial voltage code and the additional voltage code.
[0013] In this implementation, the first representative gray level can be the maximum gray level of the input image data, and the second representative gray level can be the average gray level of the input image data.
[0014] In this implementation, the controller may include a load calculation block, a maximum grayscale detection block, an average grayscale calculation block, a voltage code generation block, a step code generation block, and a blanking counter block. The load calculation block calculates the panel load by calculating the ratio of the sum of grayscale levels of the input image data to the sum of the maximum grayscale levels. The maximum grayscale detection block determines the maximum grayscale level among the grayscale levels of the input image data. The average grayscale calculation block calculates the average grayscale level of the grayscale levels of the input image data. The voltage code generation block generates an initial voltage code representing the initial level corresponding to the panel load and the maximum grayscale level. The step code generation block generates a step code representing the step level corresponding to the panel load and the average grayscale level. The blanking counter block counts clock pulses and generates additional voltage codes during a variable blanking period. Each time the number of counted clock pulses increases to a predetermined number, the additional voltage code is incremented by a step code.
[0015] In an implementation, the controller may further include an initial voltage code lookup table storing multiple initial voltage codes corresponding to multiple first combinations of multiple panel loads and multiple maximum gray levels, and a step code lookup table storing multiple step codes corresponding to multiple second combinations of multiple panel loads and multiple average gray levels. The voltage code generation block may output the initial voltage code stored in the initial voltage code lookup table that corresponds to the panel load calculated by the load calculation block and the maximum gray level determined by the maximum gray level detection block, and the step code generation block may output the step code stored in the step code lookup table that corresponds to the panel load calculated by the load calculation block and the average gray level calculated by the average gray level calculation block.
[0016] In an implementation, the power management circuit may include a power supply voltage digital-to-analog converter (“DAC”) block that calculates the sum of an initial voltage code and an additional voltage code and generates an analog voltage corresponding to the sum of the initial voltage code and the additional voltage code, and a power supply voltage generation block that generates a power supply voltage based on the analog voltage received from the power supply voltage DAC block.
[0017] In this implementation, each of the first representative gray level and the second representative gray level can be the maximum gray level of the input image data.
[0018] In this implementation, the controller may include a load calculation block, a maximum grayscale detection block, a voltage code generation block, a step code generation block, and a blanking counter block. The load calculation block calculates the panel load by calculating the ratio of the sum of grayscale levels of the input image data to the sum of the maximum grayscale levels. The maximum grayscale detection block determines the maximum grayscale level among the grayscale levels of the input image data. The voltage code generation block generates an initial voltage code representing the initial level corresponding to the panel load and the maximum grayscale level. The step code generation block generates a step code representing the step level corresponding to the panel load and the maximum grayscale level. The blanking counter block counts clock pulses and generates additional voltage codes during a variable blanking period. Each time the number of counted clock pulses increases to a predetermined number, the additional voltage code is incremented by a step code.
[0019] In an embodiment, the controller may further include an initial voltage code lookup table storing multiple initial voltage codes corresponding to multiple first combinations of multiple panel loads and multiple maximum gray levels, and a step code lookup table storing multiple step codes corresponding to multiple second combinations of multiple panel loads and multiple maximum gray levels. The voltage code generation block may output the initial voltage code stored in the initial voltage code lookup table that corresponds to the panel load calculated by the load calculation block and the maximum gray level determined by the maximum gray level detection block, and the step code generation block may output the step code stored in the step code lookup table that corresponds to the panel load calculated by the load calculation block and the maximum gray level determined by the maximum gray level detection block.
[0020] Embodiments of the present invention provide a method for operating an OLED display device, the OLED display device operating in a variable frame mode including a variable blanking period within a frame period. In this embodiment, the method includes determining a panel load, a first representative gray level, and a second representative gray level by analyzing input image data; determining an initial level of a power supply voltage supplied to a plurality of pixels of the display panel based on the panel load and the first representative gray level; determining a step level of the power supply voltage based on the panel load and the second representative gray level; generating a power supply voltage having the initial level during an active period of the frame period; and gradually increasing the voltage level of the power supply voltage from the initial level based on the step level during a variable blanking period of the frame period.
[0021] In this implementation, the voltage level of the power supply voltage during the variable blanking period can increase as the duration of the variable blanking period increases.
[0022] In this implementation, the voltage level of the power supply voltage during the variable blanking period can be periodically increased by a step level.
[0023] In one implementation, gradually increasing the voltage level of the power supply voltage may include: counting clock pulses during a variable blanking period, and increasing the voltage level of the power supply voltage by a step level each time the number of counted clock pulses increases to a predetermined number.
[0024] In this implementation, the initial level of the power supply voltage may increase with the increase of the panel load, and may also increase with the increase of the first representative gray level.
[0025] In this implementation, the step level of the power supply voltage can increase with the increase of panel load, and can also increase with the increase of the second representative gray level.
[0026] In this implementation, the first representative gray level can be the maximum gray level of the input image data, and the second representative gray level can be the average gray level of the input image data.
[0027] In embodiments of the OLED display device and method of operating the OLED display device according to the present invention, as described herein, the initial level of the power supply voltage can be determined based on the panel load and a first representative gray level, the step level of the power supply voltage can be determined based on the panel load and a second representative gray level, and the voltage level of the power supply voltage can be gradually increased from the initial level based on the step level during a variable blanking period. Accordingly, in this embodiment of the OLED display device, brightness reduction during the variable blanking period can be prevented or reduced. Attached Figure Description
[0028] The above and other features of the present invention will become more apparent from a further detailed description of embodiments of the invention with reference to the accompanying drawings, in which:
[0029] Figure 1 This is a block diagram illustrating an organic light-emitting diode (“OLED”) display device according to an embodiment;
[0030] Figure 2 This is a timing diagram illustrating an implementation of input image data input to an OLED display device at a variable input frame frequency;
[0031] Figure 3 This is a block diagram illustrating a controller and power management circuitry included in an OLED display device according to an embodiment;
[0032] Figure 4 It is a graph used to describe the initial level of the power supply voltage determined based on the panel load and the maximum gray level;
[0033] Figure 5This is a diagram illustrating an implementation of an initial voltage code lookup table that stores multiple initial voltage codes corresponding to multiple combinations of panel load and maximum grayscale level;
[0034] Figure 6 This is a diagram illustrating an implementation of a step code lookup table that stores multiple step codes corresponding to multiple combinations of panel load and average gray level.
[0035] Figure 7 It is a diagram used to describe an implementation of the voltage level of the power supply voltage in a frame period corresponding to different driving frequencies;
[0036] Figure 8 This is a diagram illustrating an implementation of the voltage levels of the power supply voltage during a frame period for displaying images with different gray levels;
[0037] Figure 9 This is a block diagram illustrating a controller and power management circuitry included in an OLED display device according to an alternative embodiment;
[0038] Figure 10 This is a diagram illustrating an implementation of a step code lookup table that stores multiple step codes corresponding to multiple combinations of panel load and maximum grayscale level.
[0039] Figure 11 This is a flowchart illustrating a method for operating an OLED display device according to an embodiment; and
[0040] Figure 12 This is a block diagram illustrating an electronic device including an OLED display device according to an embodiment. Detailed Implementation
[0041] The invention will now be described more fully below with reference to the accompanying drawings, which illustrate various embodiments. However, the invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Throughout this specification, similar reference numerals refer to similar elements.
[0042] It will be understood that when an element is referred to as being "on" another element, the element can be directly on the other element, or there can be an intermediary element between them. Conversely, when an element is referred to as being "directly" on another element, there is no intermediary element.
[0043] It will be understood that although the terms “first,” “second,” “third,” etc., may be used herein to describe various elements, components, areas, layers, and / or parts, these elements, components, areas, layers, and / or parts should not be limited by these terms. These terms are used only to distinguish one element, component, area, layer, or part from another. Therefore, the first “element,” “component,” “area,” “layer,” or “part” discussed below can be referred to as a second element, component, area, layer, or part without departing from the teachings of this document.
[0044] The technical terms used herein are for the purpose of describing particular embodiments only and are not intended to be limiting. Unless the context clearly indicates otherwise, the terms “a,” “an,” “the,” and “at least one,” as used herein, do not indicate a limitation of quantity and are intended to include both singular and plural forms. For example, unless the context clearly indicates otherwise, “element” has the same meaning as “at least one element.” “At least one” will not be construed as limiting “a” or “an.” “Or” means “and / or.” As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. It will also be understood that the terms “comprises” and / or “comprising” or “includes” and / or “including”, when used in this specification, indicate the presence of the stated features, areas, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, areas, integers, steps, operations, elements, components and / or clusters thereof.
[0045] Additionally, relative terms such as “below” or “bottom” and “above” or “top” may be used herein to describe the relationship between one element and another as shown in the figures. It will be understood that, in addition to the orientations depicted in the figures, the relative terms are also intended to include different orientations of the device. For example, if a device in one of the figures is flipped, an element described as being “below” the other elements will subsequently be oriented to be “above” the other elements. Thus, depending on the specific orientation of the figures, the term “below” can encompass both “below” and “above” orientations. Similarly, if a device in one of the figures is flipped, an element described as being “below” or “below” the other elements will subsequently be oriented to be “above” the other elements. Thus, the term “below” or “below” can encompass both “above” and “below” orientations.
[0046] Taking into account the errors associated with measurements and a particular number of measurements (i.e., limitations of the measurement system), the terms “about” or “approximately” as used herein include the stated values and mean within an acceptable range of deviation for a particular value as determined by one of ordinary skill in the art. For example, “about” can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, or ±5% of the stated value.
[0047] Unless otherwise specified, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will also be understood that, unless expressly defined herein, terms, such as those defined in common dictionaries, shall be interpreted as having the same meaning as they have in the relevant field and in the context of this disclosure, and shall not be interpreted in an idealized or overly formal sense.
[0048] The embodiments described herein should not be construed as limited to the specific shapes of the regions shown herein, but will include deviations in shape caused, for example, by manufacturing processes. For instance, regions shown or described as flat may generally have rough and / or non-linear characteristics. Additionally, sharp corners shown may be rounded. Therefore, the regions shown in the figures are schematic in nature, and their shapes are not intended to show the precise shapes of the regions, nor are they intended to limit the scope of the claims.
[0049] In the following, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
[0050] Figure 1 This is a block diagram illustrating an organic light-emitting diode (“OLED”) display device according to an embodiment. Figure 2 This is a timing diagram illustrating an implementation of input image data input to an OLED display device at a variable input frame frequency. Figure 3 This is a block diagram illustrating a controller and power management circuitry included in an OLED display device according to an embodiment. Figure 4 It is a graph used to describe the initial level of the power supply voltage determined based on the panel load and the maximum grayscale level. Figure 5 This is a diagram illustrating an implementation of an initial voltage code lookup table that stores multiple initial voltage codes corresponding to multiple combinations of panel load and maximum grayscale level. Figure 6 This is a diagram illustrating an implementation of a step code lookup table that stores multiple step codes corresponding to multiple combinations of panel load and average grayscale level. Figure 7 This is a diagram illustrating an implementation of power supply voltage levels during frame periods corresponding to different drive frequencies, and Figure 8This is a diagram illustrating an implementation of the voltage levels of the power supply voltage during a frame period displaying images with different gray levels.
[0051] Reference Figure 1 An embodiment of the OLED display device 100 may include a display panel 110 comprising a plurality of pixels PX, a power management circuit 140 for providing a power supply voltage ELVDD (e.g., a high power supply voltage) to the plurality of pixels PX, and a controller 150 for controlling the operation of the OLED display device 100. In an embodiment, the OLED display device 100 may further include a data driver 120 for providing data signals DS to the plurality of pixels PX, and a scan driver 130 for providing scan signals SS to the plurality of pixels PX.
[0052] The display panel 110 may include a plurality of data lines, a plurality of scan lines, and a plurality of pixels PX connected to the plurality of data lines and the plurality of scan lines. In an embodiment, each pixel PX may include at least two transistors, at least one capacitor, and a light-emitting diode such as an OLED. Each pixel PX may receive a power supply voltage ELVDD, and the light-emitting diode may emit light based on a drive current supplied from the line of power supply voltage ELVDD through the driving transistor of the pixel PX.
[0053] Data driver 120 can generate a data signal DS based on output image data ODAT received from controller 150 and a data control signal DCTRL, and can provide the data signal DS to multiple pixels PX via multiple data lines. In one embodiment, the data control signal DCTRL may include, but is not limited to, an output data enable signal, a level start signal, and a load signal. In another embodiment, data driver 120 and controller 150 may be implemented as a single integrated circuit, and this single integrated circuit may be referred to as a timing controller embedded data driver (“TED”). In yet another embodiment, data driver 120 and controller 150 may each be implemented using separate integrated circuits.
[0054] The scan driver 130 can generate a scan signal SS based on a scan control signal SCTRL received from the controller 150, and can sequentially provide the scan signal SS to multiple pixels PX on a pixel-row basis via multiple scan lines. In embodiments, the scan control signal SCTRL may include, but is not limited to, a scan start signal and a scan clock signal. In embodiments, the scan driver 130 may be integrated or formed in a peripheral portion of the display panel 110. In alternative embodiments, the scan driver 130 may be implemented using one or more integrated circuits.
[0055] Power management circuit 140 can generate a power supply voltage ELVDD and provide the power supply voltage ELVDD to multiple pixels PX. In some embodiments, power management circuit 140 can also generate a low power supply voltage supplied to the multiple pixels PX, an analog power supply voltage supplied to data driver 120, a high gate voltage and a low gate voltage supplied to scan driver 130, etc. In embodiments, power management circuit 140 can receive an initial voltage code IVCODE representing an initial level of power supply voltage ELVDD and an additional voltage code AVCODE that gradually increases during a variable blanking period. It can generate a power supply voltage ELVDD having an initial level represented by the initial voltage code IVCODE during an active period, and during the variable blanking period, the voltage level of power supply voltage ELVDD can be gradually increased from the initial voltage based on the sum of the initial voltage code IVCODE and the additional voltage code AVCODE. In embodiments, power management circuit 140 can be implemented using an integrated circuit, and the integrated circuit can be referred to as a power management integrated circuit (“PMIC”). In alternative embodiments, power management circuit 140 can be included in controller 150.
[0056] Controller 150 (e.g., a timing controller (“TCON”)) may receive input image data IDAT and control signals CTRL from an external host processor (e.g., a graphics processing unit (“GPU”), application processor (“AP”), or graphics card). In one embodiment, the input image data IDAT may be RGB image data including red image data, green image data, and blue image data. In another embodiment, the control signal CTRL may include, but is not limited to, a vertical synchronization signal, a horizontal synchronization signal, an input data enable signal, a master clock signal, etc. Controller 150 may generate a data control signal DCTRL, a scan control signal SCTRL, and output image data ODAT based on the control signal CTRL and the input image data IDAT. Controller 150 may control the operation of data driver 120 by providing the data control signal DCTRL and the output image data ODAT to data driver 120, and may control the operation of scan driver 130 by providing the scan control signal SCTRL to scan driver 130.
[0057] In this implementation, the OLED display device 100 may support a variable frame mode (e.g., Free-Sync mode, G-Sync mode, etc.) or operate in a variable frame mode, where the frame period includes a variable blanking period. In the variable frame mode, the host processor can provide input image data IDAT to the OLED display device 100 at a variable input frame frequency (VIFF) (or variable frame rate) by changing the length (or duration) of the variable blanking period in each frame period, and the controller 150 of the OLED display device 100 can receive the input image data IDAT from the host processor at the variable input frame frequency (VIFF). In this implementation, the controller 150 can control the data driver 120 and the scan driver 130 to drive the display panel 110 at the variable input frame frequency (VIFF) or a variable drive frequency.
[0058] For example, in one implementation, such as Figure 2 As shown, a host processor (e.g., GPU, AP, or graphics card) can perform renderings 210, 220, and 230, and the OLED display device 100 can display the rendered images in frame periods FP1, FP2, and FP3. For example, in the case where the host processor renders game image data, the renderings 210, 220, and 230 performed by the host processor may not be constant or regular. The host processor can provide input image data IDAT or frame data FD1, FD2, FD3, and FD4 to the OLED display device 100 in a variable frame mode, synchronized with the irregular rendering periods 210, 220, and 230. In the variable frame mode, each of the active periods AP1, AP2, and AP3 of frame periods FP1, FP2, and FP3 may have a constant duration, but each of the variable blanking periods VBP1, VBP2, and VBP3 of frame periods FP1, FP2, and FP3 may have a variable duration. In this implementation, the host processor can provide frame data FD1, FD2, and FD3 to the OLED display device 100 at a variable input frame frequency VIFF by changing the time length (or duration) of the variable blanking periods VBP1, VBP2, and VBP3.
[0059] exist Figure 2In this implementation, if rendering 210 for the second frame data FD2 is performed at a frequency of approximately 144Hz during the first frame period FP1 (hereinafter referred to as frame period FP1, and other frame periods are similar), the host processor can provide the first frame data FD1 (hereinafter referred to as frame data FD1, and other frame data are similar) to the OLED display device 100 at a variable input frame frequency (VIFF) of approximately 144Hz during the first frame period FP1. In this implementation, the host processor can output the second frame data FD2 during the active period AP2 of the second frame period FP2, and can continue the variable blanking period VBP2 of the second frame period FP2 until the rendering 220 for the third frame data FD3 is completed. Therefore, if rendering 220 for the third frame data FD3 is performed at a frequency of approximately 44Hz during the second frame period FP2, the host processor can provide the second frame data FD2 to the OLED display device 100 at a variable input frame frequency (VIFF) of approximately 44Hz by increasing the duration of the variable blanking period VBP2 of the second frame period FP2. In the third frame period FP3, if rendering 230 for the fourth frame data FD4 is performed again at a frequency of approximately 144Hz, the host processor can again provide the third frame data FD3 to the OLED display device 100 at a variable input frame frequency VIFF of approximately 144Hz.
[0060] In this implementation, as described above, in variable frame mode, frame periods FP1, FP2, and FP3 may each include active periods AP1, AP2, and AP3 with constant durations independent of the variable input frame frequency VIFF, and may each include variable blanking periods VBP1, VBP2, and VBP3 with variable durations corresponding to the variable input frame frequency VIFF. In one implementation, for example, in variable frame mode, the durations of the variable blanking periods VBP1, VBP2, and VBP3 may increase as the variable input frame frequency VIFF decreases. In variable frame mode, controller 150 can receive input image data IDAT at the variable input frame frequency VIFF, and can output output image data ODAT to data driver 120 at a drive frequency substantially the same as the variable input frame frequency VIFF. Accordingly, embodiments of the OLED display device 100 operating in or supporting variable frame mode can display images synchronously with the variable input frame frequency VIFF, thereby reducing or preventing tearing that may be caused by frame frequency mismatch.
[0061] In this implementation, since the length of the variable blanking period is changed in the variable frame mode, the length of the variable blanking period can become longer than the length of the blanking period in the normal mode where the image is displayed at a constant frame rate or constant drive frequency. Therefore, the brightness of the display panel 110 can decrease during the variable blanking period due to leakage current in each pixel PX, and the image quality can be degraded in the variable frame mode. In this implementation, the brightness reduction during the variable blanking period can increase as the variable input frame frequency (VIFF) decreases or as the length of the variable blanking period increases. In this implementation, the leakage current in each pixel PX can increase as the gray levels of the input image data (IDAT) and output image data (ODAT) increase, and therefore the brightness reduction during the variable blanking period can be further increased.
[0062] In embodiments of the present invention, to prevent or reduce brightness reduction during the variable blanking period, the OLED display device 100 can determine the panel load, a first representative gray level, and a second representative gray level by analyzing input image data IDAT. It can determine the initial level of the power supply voltage ELVDD based on the panel load and the first representative gray level, and the step level of the power supply voltage ELVDD based on the panel load and the second representative gray level. The power supply voltage ELVDD with the initial level can be generated during the active period of each frame period, and during the variable blanking period of the frame period, the voltage level of the power supply voltage ELVDD can be gradually increased from the initial level based on the step level. Therefore, in this embodiment of the OLED display device 100, the voltage level of the power supply voltage ELVDD during the variable blanking period can increase with the increase in the duration of the variable blanking period. If the voltage level of the power supply voltage ELVDD increases, channel length modulation can be induced in the driving transistor of each pixel PX due to the increased power supply voltage ELVDD. The driving current generated by the driving transistor can increase due to the channel length modulation, and the brightness of the light-emitting diode in each pixel PX can increase. Accordingly, in this embodiment of the OLED display device 100, even if the duration of the variable blanking period is increased, the brightness reduction during the variable blanking period can be prevented or reduced because the voltage level of the power supply voltage ELVDD is increased.
[0063] In one implementation, to gradually or periodically increase the voltage level of the power supply voltage ELVDD during a variable blanking period, the controller 150 may generate an initial voltage code IVCODE representing the initial level of the power supply voltage ELVDD based on the panel load and a first representative gray level, generate a step code representing the step level of the power supply voltage ELVDD based on the panel load and a second representative gray level, and generate an additional voltage code AVCODE, which has an initial value (e.g., value 0) during the active period and is periodically (at substantially constant intervals) increased by the step code during the variable blanking period. In this implementation, the power management circuit 140 may receive the initial voltage code IVCODE and the additional voltage code AVCODE from the controller 150 and may generate a power supply voltage ELVDD having a voltage level corresponding to the sum of the initial voltage code IVCODE and the additional voltage code AVCODE. In another implementation, the first representative gray level may be the maximum gray level of the input image data IDAT for one frame, and the second representative gray level may be the average gray level of the input image data IDAT for one frame. In the implementation method, such as Figure 3 As shown, the controller 150 may include a load calculation block 151, a maximum grayscale detection block 152, an average grayscale calculation block 153, a voltage code generation block 154, a step code generation block 155, and a blanking counter block 156, and the power management circuit 140 may include a power supply voltage digital-to-analog converter (“DAC”) block 142 and a power supply voltage generation block 144 to perform the operations described above.
[0064] The load calculation block 151 can calculate the panel load PLOAD by calculating the ratio of the sum of gray levels of the input image data IDAT in the current frame period to the maximum sum of gray levels. In one embodiment, for example, the maximum sum of gray levels may be the sum of 255 gray levels for all pixels PX of the display panel 110. In one embodiment, for example, the load calculation block 151 may determine the panel load PLOAD to be approximately 100% when the input image data IDAT represents 255 gray levels relative to all pixels PX, and may determine the panel load PLOAD to be approximately 0% when the input image data IDAT represents 0 gray levels relative to all pixels PX.
[0065] The maximum gray level detection block 152 can determine the maximum gray level MGRAY among the gray levels of the input image data IDAT in the current frame period as the first representative gray level. In one embodiment, for example, when the input image data IDAT represents gray levels from 0 to 100, the maximum gray level detection block 152 can determine the maximum gray level MGRAY as 100.
[0066] The average gray level calculation block 153 can calculate the average gray level AGRAY of the gray levels of the input image data IDAT as a second representative gray level. In one embodiment, for example, when the input image data IDAT represents gray levels from 0 to 100 and the number of each gray level is substantially the same, the average gray level calculation block 153 can determine the average gray level AGRAY to be approximately 50 gray levels.
[0067] The voltage code generation block 154 can determine the initial level of the power supply voltage ELVDD based on the panel load PLOAD and the maximum gray level MGRAY, and can generate an initial voltage code IVCODE representing the initial level corresponding to the panel load PLOAD and the maximum gray level MGRAY. In one embodiment, the initial level of the power supply voltage ELVDD can increase with the increase of the panel load PLOAD, and can increase with the increase of the first representative gray level or the maximum gray level MGRAY. In one embodiment, for example, as... Figure 4 As shown, when the panel load PLOAD is at its minimum load (e.g., approximately 0%), the initial level of the power supply voltage ELVDD can be determined based on a first voltage level line 240 (hereinafter referred to as voltage level line 240, and other voltage level lines are similarly defined). When the panel load PLOAD is at a medium load (e.g., approximately 50%), the initial level of the power supply voltage ELVDD can be determined based on a second voltage level line 250, which is higher than the first voltage level line 240. And when the panel load PLOAD is at its maximum load (e.g., approximately 100%), the initial level of the power supply voltage ELVDD can be determined based on a third voltage level line 260, which is higher than the second voltage level line 250. In this implementation, each of the voltage level lines 240, 250, and 260 can have a higher voltage level as the maximum grayscale level MGRAY increases.
[0068] In the implementation method, Figure 3 In this embodiment, controller 150 may further include an initial voltage code lookup table (LUT) 157 storing multiple initial voltage codes corresponding to multiple first combinations of panel load and maximum grayscale level, and voltage code generation block 154 may output the initial voltage code IVCODE among the multiple initial voltage codes stored in the initial voltage code LUT 157, which corresponds to the panel load PLOAD calculated by load calculation block 151 and the maximum grayscale level MGRAY determined by maximum grayscale detection block 152. In one embodiment, for example, as Figure 5As shown, the initial voltage code LUT 157 can store multiple initial voltage codes IVCODE11, IVCODE12, ..., IVCODE1M, IVCODE21, IVCODE22, ..., IVCODE2M, ..., IVCODEN1, IVCODEN2, ..., and IVCODENM corresponding to multiple combinations of multiple panel loads PLOAD1, PLOAD2, ..., and PLOADEN and multiple maximum gray levels MGRAY1, MGRAY2, ..., and MGRAYM, respectively. The voltage code generation block 154 can read the initial voltage code IVCODE corresponding to a combination of panel load PLOAD and maximum gray level MGRAY from the initial voltage code LUT 157.
[0069] The step code generation block 155 can determine the step level of the power supply voltage ELVDD based on the panel load PLOAD and the average gray level AGRAY, and can generate a step code SCODE representing the step level corresponding to the panel load PLOAD and the average gray level AGRAY. In an embodiment, the step level of the power supply voltage ELVDD can increase with the increase of the panel load PLOAD, and can also increase with the increase of the second representative gray level or the average gray level AGRAY.
[0070] In the implementation method, Figure 3 In this embodiment, controller 150 may further include a step code lookup table (LUT) 158 storing multiple step codes corresponding to multiple second combinations of panel load and average gray level, and step code generation block 155 may output the step code SCODE among the multiple step codes stored in step code LUT 158, which corresponds to the panel load PLOAD calculated by load calculation block 151 and the average gray level AGRAY calculated by average gray level calculation block 153. In one embodiment, for example, as Figure 6 As shown, the step code LUT 158 can store multiple step codes SCODE11, SCODE12, ..., SCODE1M, SCODE21, SCODE22, ..., SCODE2M, ..., SCODEN1, SCODEN2, ..., SCODENM corresponding to multiple combinations of multiple panel loads PLOAD1, PLOAD2, ..., and PLOADN, and multiple average gray levels AGRAY1, AGRAY2, ..., and AGRAYM, respectively. The step code generation block 155 can read the step code SCODE corresponding to a combination of panel load PLOAD and average gray level AGRAY from the step code LUT 158.
[0071] The blanking counter block 156 can count clock pulses of the clock signal CLK generated internally or externally to the controller 150 during a variable blanking period, and can generate an additional voltage code AVCODE, which is incremented by a step code SCODE each time the number of counted clock pulses increases to a predetermined number. In one embodiment, for example, when the number of counted clock pulses becomes a predetermined number, the blanking counter block 156 can increment the additional voltage code AVCODE by the step code SCODE and can reset the count to 0. In this embodiment, the blanking counter block 156 can repeat these operations. Therefore, during a variable blanking period, the additional voltage code AVCODE generated by the blanking counter block 156 can be incremented by the step code SCODE periodically (or at substantially constant intervals) from an initial value (e.g., value 0). In an embodiment, the blanking counter block 156 can initiate the counting operation in response to a blanking start signal PRC indicating the start of a variable blanking period, and can complete the counting operation in response to a frame start signal STV indicating the start of a frame period or active period.
[0072] The power supply voltage DAC block 142 of the power management circuit 140 can calculate the sum of the initial voltage code IVCODE and the additional voltage code AVCODE, and can generate an analog voltage AVOLT corresponding to the sum of the initial voltage code IVCODE and the additional voltage code AVCODE. The power supply voltage generation block 144 of the power management circuit 140 can generate a power supply voltage ELVDD corresponding to the analog voltage AVOLT received from the power supply voltage DAC block 142. Therefore, since the additional voltage code AVCODE has an initial value (e.g., value 0) during the active period, the power management circuit 140 can generate a power supply voltage ELVDD with an initial level represented by the initial voltage code IVCODE during the active period. In this embodiment, since the additional voltage code AVCODE is periodically increased by a step code SCODE during the variable blanking period, the voltage level of the power supply voltage ELVDD generated by the power management circuit 140 can be periodically increased by a step level corresponding to the step code SCODE during the variable blanking period. Accordingly, in the embodiment of the OLED display device 100, even if the length of the variable blanking period changes, or even if the gray level of the input image data IDAT changes, the brightness reduction during the variable blanking period can be prevented or reduced.
[0073] Figure 7The following embodiment is illustrated: the display panel 110 is driven at a drive frequency of approximately 144 Hz in the first frame period FP1 and at a drive frequency of approximately 44 Hz in the second frame period FP2. In this embodiment, the first frame period FP1 and the second frame period FP2 may have active periods AP1 and AP2, which have substantially the same duration, but the duration of the variable blanking period VBP2 of the second frame period FP2 may be greater than the duration of the variable blanking period VBP1 of the first frame period FP1. Accordingly, the brightness reduction 330 of the display panel 110 caused by the leakage current in the variable blanking period VBP2 of the second frame period FP2 may be greater than the brightness reduction 310 of the display panel 110 caused by the leakage current in the variable blanking period VBP1 of the first frame period FP1. Accordingly, in this embodiment, the OLED display device 100 can generate a power supply voltage ELVDD with an initial level IL determined by the panel load PLOAD and the maximum gray level MGRAY in each of the activation periods AP1 and AP2, and can increase the voltage level of the power supply voltage ELVDD at substantially constant intervals in each of the variable blanking periods VBP1 and VBP2 by a step level SL determined by the panel load PLOAD and the average gray level AGRAY. Accordingly, in this embodiment, even if the duration of the variable blanking period VBP2 of the second frame period FP2 increases from the duration of the variable blanking period VBP1 of the first frame period FP1, the brightness reduction 310 and brightness reduction 330 of the display panel 110 can be prevented or reduced because the voltage level of the power supply voltage ELVDD can be gradually increased based on the increased duration of the variable blanking period VBP2. Therefore, in this embodiment of the OLED display device 100, the display panel 110 may have a substantially constant brightness 350, regardless of the variable input frame frequency (VIFF) or variable drive frequency of the display panel 110.
[0074] Figure 8The following embodiment is illustrated: Display panel 110 displays a full-pattern image with 255 gray levels (255G) in a first frame period FP1, and a full-pattern image with 64 gray levels (64G) in a second frame period FP2. In this embodiment, the brightness reduction 410 of display panel 110 caused by leakage current in the variable blanking period VBP1 of the first frame period FP1 can be greater than the brightness reduction 450 of display panel 110 caused by leakage current in the variable blanking period VBP2 of the second frame period FP2. In this implementation, the OLED display device 100 can generate a power supply voltage ELVDD with an initial level IL1 or IL2 in each of the activation periods AP1 and AP2. The initial level IL1 or IL2 corresponds to the panel load PLOAD and the maximum gray level MGRAY of the input image data IDAT in the corresponding current frame period FP1 or FP2. Furthermore, the OLED display device 100 can increase the voltage level of the power supply voltage ELVDD by a step level SL1 or SL2 at substantially constant intervals in each of the variable blanking periods VBP1 and VBP2. The step level SL1 or SL2 is determined by the panel load PLOAD and the average gray level AGRAY of the input image data IDAT in the corresponding current frame period FP1 or FP2. Therefore, the step level SL1 in the variable blanking period VBP1 of the first frame period FP1 displaying a full-pattern image with 255 gray levels (255G) can be greater than the step level SL2 in the variable blanking period VBP2 of the second frame period FP2 displaying a full-pattern image with 64 gray levels (64G). Accordingly, in this embodiment, even if the gray level of the image displayed in the first frame period FP1 is higher than the gray level of the image displayed in the second frame period FP2, because the step level SL1 in the first frame period FP1 can be greater than the step level SL2 in the second frame period FP2, the brightness reduction 410 and brightness reduction 450 of the display panel 110 in frame periods FP1 and FP2 displaying images with different gray levels 255G and 64G can be prevented or reduced. Therefore, in this embodiment of the OLED display device 100, when the display panel 110 displays an image with any gray level, the display panel 110 can effectively display an image with the desired brightness 430 and brightness 470 corresponding to the gray level.
[0075] As described above, in the embodiment of the OLED display device 100, the initial level IL of the power supply voltage ELVDD can be determined based on the panel load PLOAD and the maximum gray level MGRAY, the step level SL of the power supply voltage ELVDD can be determined based on the panel load PLOAD and the average gray level AGRAY, and during the variable blanking periods VBP1 and VBP2, the voltage level of the power supply voltage ELVDD can be gradually increased from the initial level IL based on the step level SL. Accordingly, in this embodiment of the OLED display device 100, brightness reduction during the variable blanking periods VBP1 and VBP2 can be prevented or reduced.
[0076] Figure 9 This is a block diagram illustrating a controller and power management circuitry included in an OLED display device according to an alternative embodiment, and Figure 10 This is a diagram illustrating an implementation of a step code lookup table that stores multiple step codes corresponding to multiple combinations of panel load and maximum grayscale level.
[0077] Reference Figure 9 In an embodiment of the OLED display device, the controller 550 may include a load calculation block 151, a maximum grayscale detection block 152, a voltage code generation block 154, a step code generation block 555, a blanking counter block 156, an initial voltage code LUT 157, and a step code LUT 558. Figure 9 The controller 550 may have the same characteristics as... Figure 3 The controller 150 has the same or similar configuration and operation, except that the controller 550 may not include... Figure 3 The average grayscale calculation block 153 and the step code generation block 555 shown can generate step codes SCODE based on panel load PLOAD and maximum grayscale level MGRAY.
[0078] The load calculation block 151 can calculate the panel load PLOAD by calculating the ratio of the sum of gray levels of the input image data IDAT to the maximum sum of gray levels. The maximum gray level detection block 152 can determine the maximum gray level MGRAY among the gray levels of the input image data IDAT. The voltage code generation block 154 can generate an initial voltage code IVCODE that represents the initial level of the power supply voltage ELVDD corresponding to the panel load PLOAD and the maximum gray level MGRAY.
[0079] Step code generation block 555 can determine the step level of power supply voltage ELVDD based on panel load PLOAD and maximum gray level MGRAY, and can generate step code SCODE representing the step level corresponding to panel load PLOAD and maximum gray level MGRAY. Step code LUT 558 can store multiple step codes corresponding to multiple combinations of panel load and maximum gray level, and step code generation block 555 can output the step code SCODE among the multiple step codes stored in step code LUT 558 that corresponds to panel load PLOAD calculated by load calculation block 151 and maximum gray level MGRAY determined by maximum gray level detection block 152. In one embodiment, for example, as Figure 10 As shown, the step code LUT 558 can store multiple step codes SCODE11, SCODE12, ..., SCODE1M, SCODE21, SCODE22, ..., SCODE2M, ..., SCODEN1, SCODEN2, ..., SCODENM corresponding to multiple combinations of multiple panel loads PLOAD1, PLOAD2, ..., and PLOADN, and multiple maximum gray levels MGRAY1, MGRAY2, ..., and MGRAYM, respectively. The step code generation block 555 can read the step code SCODE corresponding to a combination of panel load PLOAD and maximum gray level MGRAY from the step code LUT 558.
[0080] The blanking counter block 156 can count the clock pulses of the clock signal CLK during the variable blanking period and generate an additional voltage code AVCODE. Each time the number of counted clock pulses increases to a predetermined number, the additional voltage code AVCODE is incremented by a step code SCODE.
[0081] In this implementation, the power supply voltage DAC block 142 of the power management circuit 140 can calculate the sum of the initial voltage code IVCODE and the additional voltage code AVCODE, and can generate an analog voltage AVOLT corresponding to the sum of the initial voltage code IVCODE and the additional voltage code AVCODE. The power supply voltage generation block 144 of the power management circuit 140 can generate a power supply voltage ELVDD corresponding to the analog voltage AVOLT received from the power supply voltage DAC block 142.
[0082] As described above, in including Figure 9In this embodiment of the OLED display device with controller 550, the initial level of the power supply voltage ELVDD can be determined based on the panel load PLOAD and the maximum gray level MGRAY. The step level of the power supply voltage ELVDD can also be determined based on the panel load PLOAD and the maximum gray level MGRAY. Furthermore, during the variable blanking period, the voltage level of the power supply voltage ELVDD can be gradually increased from the initial level based on the step level. Accordingly, in this embodiment of the OLED display device, brightness reduction during the variable blanking period can be prevented or reduced.
[0083] Figure 11 This is a flowchart illustrating a method for operating an OLED display device according to an embodiment.
[0084] Reference Figure 1 and Figure 11 In an embodiment of the method for operating an OLED display device 100 that supports a variable frame mode including a variable blanking period or operates in such a variable frame mode, the controller 150 can determine the panel load, a first representative gray level, and a second representative gray level by analyzing the input image data IDAT (S610). In an embodiment, the first representative gray level may be the maximum gray level of the input image data IDAT, and the second representative gray level may be the average gray level of the input image data IDAT. In one embodiment, for example, the OLED display device 100 can calculate the panel load by calculating the ratio of the sum of the gray levels of the input image data IDAT to the maximum sum of the gray levels, determine the maximum gray level among the gray levels of the input image data IDAT, and calculate the average gray level of the gray levels of the input image data IDAT. In an alternative embodiment, each of the first representative gray level and the second representative gray level may be the maximum gray level of the input image data IDAT.
[0085] In one embodiment, the OLED display device 100 may determine the initial level of the power supply voltage ELVDD supplied to the plurality of pixels PX of the display panel 110 based on the panel load and the first representative gray level (S630). In one embodiment, the initial level of the power supply voltage ELVDD may increase with the increase of the panel load and may increase with the increase of the first representative gray level.
[0086] In one embodiment, the OLED display device 100 can determine the step level of the power supply voltage ELVDD based on the panel load and the second representative gray level (S650). In another embodiment, the step level of the power supply voltage ELVDD can increase with the increase of the panel load and can also increase with the increase of the second representative gray level.
[0087] In one embodiment, the OLED display device 100 can generate a power supply voltage ELVDD with an initial level during the active period of a frame period (S670), and can gradually increase the voltage level of the power supply voltage ELVDD from the initial level based on a step level during the variable blanking period of the frame period (S690). Therefore, the voltage level of the power supply voltage ELVDD in the variable blanking period can increase with the increase of the duration of the variable blanking period. In another embodiment, the voltage level of the power supply voltage ELVDD in the variable blanking period can be increased by a step level periodically. In order to increase the voltage level of the power supply voltage ELVDD periodically, the OLED display device 100 can count clock pulses during the variable blanking period, and can increase the voltage level of the power supply voltage ELVDD by a step level each time the number of counted clock pulses increases to a predetermined number.
[0088] As described above, in an embodiment of the method for operating the OLED display device 100, the initial level of the power supply voltage ELVDD can be determined based on the panel load and a first representative gray level, the step level of the power supply voltage ELVDD can be determined based on the panel load PLOAD and a second representative gray level, and during the variable blanking period, the voltage level of the power supply voltage ELVDD can be gradually increased from the initial level based on the step level. Accordingly, in this embodiment of the OLED display device 100, brightness reduction during the variable blanking period can be prevented or reduced.
[0089] Figure 12 This is a block diagram illustrating an electronic device including an OLED display device according to an embodiment.
[0090] Reference Figure 12 Implementations of electronic device 1100 may include a processor 1110, a memory device 1120, a storage device 1130, an input / output (“I / O”) device 1140, a power supply 1150, and an OLED display device 1160. Electronic device 1100 may also include multiple ports for communicating with video cards, sound cards, memory cards, universal serial bus (“USB”) devices, other electrical devices, etc.
[0091] Processor 1110 can perform various computing functions or tasks. Processor 1110 may be an AP, a microprocessor, a central processing unit (“CPU”), etc. Processor 1110 may be connected to other components via address bus, control bus, data bus, etc. In embodiments, processor 1110 may also be connected to an expansion bus, such as a peripheral component interconnect (“PCI”) bus.
[0092] The memory device 1120 may store data for the operation of the electronic device 1100. In one embodiment, for example, the memory device 1120 may include at least one non-volatile memory device such as an erasable programmable read-only memory (“EPROM”) device, an electrically erasable programmable read-only memory (“EEPROM”) device, a flash memory device, a phase-change random access memory (“PRAM”) device, a resistive random access memory (“RRAM”) device, a nano-floating gate memory (“NFGM”) device, a polymer random access memory (“PoRAM”) device, a magnetic random access memory (“MRAM”) device, a ferroelectric random access memory (“FRAM”) device, and / or at least one volatile memory device such as a dynamic random access memory (“DRAM”) device, a static random access memory (“SRAM”) device, a mobile DRAM device, and the like.
[0093] Storage device 1130 may be a solid-state drive (“SSD”) device, a hard disk drive (“HDD”) device, a CD-ROM device, etc. I / O device 1140 may be an input device such as a keyboard, keypad, mouse, touchscreen, etc., and an output device such as a printer, speaker, etc. Power supply 1150 provides power for the operation of electronic device 1100. In this embodiment, OLED display device 1160 may be connected to other components via a bus or other communication link.
[0094] In an embodiment of the OLED display device 1160, as described herein, the initial level of the power supply voltage supplied to the pixel can be determined based on the panel load and a first representative gray level, the step level of the power supply voltage can be determined based on the panel load and a second representative gray level, and during the variable blanking period, the voltage level of the power supply voltage can be gradually increased from the initial level based on the step level. Accordingly, in this embodiment of the OLED display device 1160, brightness reduction during the variable blanking period can be prevented or reduced.
[0095] Embodiments of the present invention can be applied to any display device 1160 that supports or operates in a variable frame mode, and to any electronic device 1100 that includes an OLED display device 1160. In one embodiment, for example, the OLED display device 1160 can be applied to smartphones, wearable electronic devices, tablet computers, mobile phones, televisions (“TV”), digital TVs, three-dimensional (“3D”) TVs, personal computers (“PC”), home appliances, laptop computers, personal digital assistants (“PDAs”), portable multimedia players (“PMPs”), digital cameras, music players, portable game consoles, navigation devices, etc.
[0096] This invention should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the invention to those skilled in the art.
[0097] Although the invention has been specifically shown and described with reference to embodiments thereof, those skilled in the art will understand that various changes in form and detail may be made without departing from the spirit or scope of the invention as defined by the appended claims.
Claims
1. An organic light-emitting diode (OLED) display device, wherein the OLED display device operates in a variable frame mode where the frame period includes a variable blanking period, the OLED display device comprising: The display panel includes a plurality of pixels; A power management circuit that supplies power voltage to the plurality of pixels; as well as The controller determines the panel load, a first representative gray level, and a second representative gray level by analyzing input image data. Based on the panel load and the first representative gray level, the controller determines the initial level of the power supply voltage, and based on the panel load and the second representative gray level, the controller determines the step level of the power supply voltage. The power management circuit generates the power supply voltage with the initial level during the active period of the frame period, and gradually increases the voltage level of the power supply voltage from the initial level based on the step level as the duration of the variable blanking period increases during the variable blanking period of the frame period. Wherein, the first representative gray level is the maximum gray level of the input image data, and Wherein, the second representative gray level is the average gray level of the input image data or the maximum gray level.
2. The organic light-emitting diode display device according to claim 1, wherein, The voltage level of the power supply voltage during the variable blanking period is periodically increased by the step level.
3. The organic light-emitting diode display device according to claim 1, wherein, The initial level of the power supply voltage increases with the increase of the panel load and with the increase of the first representative gray level.
4. The organic light-emitting diode display device according to claim 1, wherein, The step level of the power supply voltage increases with the increase of the panel load and with the increase of the second representative gray level.
5. The organic light-emitting diode display device according to claim 1, in, The controller generates an initial voltage code representing the initial level of the power supply voltage and a step code representing the step level of the power supply voltage, and generates an additional voltage code that has an initial value during the activation period and is periodically incremented by the step code during the variable blanking period. The power management circuit receives the initial voltage code and the additional voltage code from the controller, and generates the power supply voltage having the voltage level corresponding to the sum of the initial voltage code and the additional voltage code.
6. The organic light-emitting diode display device according to claim 1, wherein, The controller includes: A load calculation block calculates the panel load by calculating the ratio of the sum of gray levels of the input image data to the maximum sum of gray levels. A maximum gray level detection block, wherein the maximum gray level is determined among the gray levels of the input image data; An average gray level calculation block calculates the average gray level of the gray levels in the input image data; A voltage code generation block generates an initial voltage code representing the initial level corresponding to the panel load and the maximum grayscale level; A step code generation block that generates step codes representing the step level corresponding to the panel load and the average gray level; and A blanking counter block counts clock pulses and generates an additional voltage code during the variable blanking period. Each time the number of counted clock pulses increases to a predetermined number, the additional voltage code is incremented by the step code.
7. The organic light-emitting diode display device according to claim 6, wherein, The controller also includes: An initial voltage code lookup table, which stores multiple initial voltage codes corresponding to multiple first combinations of multiple panel loads and multiple maximum grayscale levels; and A step code lookup table stores multiple step codes corresponding to multiple second combinations of the multiple panel loads and multiple average gray levels. Specifically, the voltage code generation block outputs the initial voltage code stored in the initial voltage code lookup table that corresponds to the panel load calculated by the load calculation block and the maximum gray level determined by the maximum gray level detection block. The step code generation block outputs the step code that corresponds to the panel load calculated by the load calculation block and the average gray level calculated by the average gray level calculated by the average gray level calculation block, which is stored in the step code lookup table among the plurality of step codes.
8. The organic light-emitting diode display device according to claim 1, wherein, The controller includes: A load calculation block calculates the panel load by calculating the ratio of the sum of gray levels of the input image data to the maximum sum of gray levels. A maximum gray level detection block, wherein the maximum gray level is determined among the gray levels of the input image data; A voltage code generation block generates an initial voltage code representing the initial level corresponding to the panel load and the maximum grayscale level; A step code generation block that generates step codes representing the step level corresponding to the panel load and the maximum grayscale level; and A blanking counter block counts clock pulses and generates an additional voltage code during the variable blanking period. Each time the number of counted clock pulses increases to a predetermined number, the additional voltage code is incremented by the step code.
9. The organic light-emitting diode display device according to claim 8, wherein, The controller also includes: An initial voltage code lookup table, which stores multiple initial voltage codes corresponding to multiple first combinations of multiple panel loads and multiple maximum grayscale levels; and A step code lookup table stores multiple step codes corresponding to multiple second combinations of the multiple panel loads and the multiple maximum grayscale levels. The voltage code generation block outputs the initial voltage code stored in the initial voltage code lookup table that corresponds to the panel load calculated by the load calculation block and the maximum gray level determined by the maximum gray level. The step code generation block outputs the step code among the plurality of step codes stored in the step code lookup table, which corresponds to the panel load calculated by the load calculation block and the maximum gray level determined by the maximum gray level detection block.
10. A method of operating an organic light-emitting diode (OLED) display device, the OLED display device operating in a variable frame mode where the frame period includes a variable blanking period, the method comprising: Panel load, first representative gray level, and second representative gray level are determined by analyzing input image data; The initial level of the power supply voltage supplied to the multiple pixels of the display panel is determined based on the panel load and the first representative gray level. The step level of the power supply voltage is determined based on the panel load and the second representative gray level; During the active period of the frame period, the power supply voltage having the initial level is generated; as well as During the variable blanking period of the frame time period, the voltage level of the power supply voltage is gradually increased from the initial level based on the step level as the duration of the variable blanking period increases. Wherein, the first representative gray level is the maximum gray level of the input image data, and Wherein, the second representative gray level is the average gray level of the input image data or the maximum gray level.
Citation Information
Patent Citations
Display apparatus and control method thereof
CN103985349A
Organic light emitting display device and driving method thereof
US20140240305A1