Electronic device

Abstract

The present disclosure provides an electronic device, including a substrate, a first electrode, a second electrode, a modulation element, a first soldering member, and a switching element. The first electrode is disposed on the substrate. The second electrode is disposed on the substrate. The modulation element is disposed on the substrate and includes at least two contact pads. The first soldering member is disposed between the first electrode and one contact pad of the modulation element. The switching element is disposed on the substrate. The one contact pad of the modulation element is electrically connected to the switching element in sequence via the first soldering member, the first electrode, and the second electrode.

Description

Technical Field

[0001] This disclosure relates to an electronic device. Background Technology

[0002] Radio frequency (RF) devices in electronic devices are used to transmit or receive electromagnetic waves, and are therefore an indispensable part of wireless communication technology. Improving the directivity of RF devices, enabling electromagnetic waves to propagate in a specific direction, is one of the key research focuses for researchers in this field. Summary of the Invention

[0003] This disclosure provides an electronic device that helps improve the directivity of a radio frequency device.

[0004] According to embodiments disclosed herein, an electronic device includes a substrate, a first electrode, a second electrode, a modulation element, a first solder joint, and a switching element. The first electrode is disposed on the substrate. The second electrode is disposed on the substrate. The modulation element is disposed on the substrate and includes at least two pads. The first solder joint is disposed between the first electrode and one pad of the modulation element. The switching element is disposed on the substrate. The one pad of the modulation element is sequentially electrically connected to the switching element via the first solder joint, the first electrode, and the second electrode.

[0005] To make the above-mentioned features and advantages disclosed herein more apparent and understandable, specific embodiments are described below in conjunction with the accompanying drawings. Attached Figure Description

[0006] Figure 1A and Figure 1B These are a partial cross-sectional view and a partial top view of an electronic device according to the first embodiment of this disclosure;

[0007] Figure 2A and Figure 2B These are, respectively, a partial cross-sectional view and a partial top view of the electronic device according to the second embodiment of this disclosure;

[0008] Figure 3A and Figure 3B These are a partial cross-sectional view and a partial top view of an electronic device according to the third embodiment of this disclosure;

[0009] Figure 4A and Figure 4B These are, respectively, a partial cross-sectional view and a partial top view of the electronic device according to the fourth embodiment of this disclosure;

[0010] Figure 5A and Figure 5B These are a partial cross-sectional view and a partial top view of an electronic device according to the fifth embodiment of this disclosure;

[0011] Figure 6A and Figure 6B These are a partial cross-sectional view and a partial top view of an electronic device according to the sixth embodiment of this disclosure;

[0012] Figures 7 to 9 This is a partial cross-sectional schematic diagram of the manufacturing process of an electronic device according to the first embodiment of the present disclosure;

[0013] Figures 10 to 13 This is a partial cross-sectional schematic diagram of the manufacturing process of an electronic device according to a second embodiment of the present disclosure;

[0014] Figure 14 and Figure 15 These are partial cross-sectional schematic diagrams of electronic devices according to the seventh and eighth embodiments of this disclosure, respectively;

[0015] Figures 16A to 16D This is a partial schematic diagram of the manufacturing process of an electronic device according to the ninth embodiment of the present disclosure. Detailed Implementation

[0016] This disclosure can be understood by referring to the following detailed description in conjunction with the accompanying drawings. It should be noted that, for ease of understanding and for the sake of brevity, many of the drawings in this disclosure depict only a portion of the electronic device / display device, and specific elements in the drawings are not drawn to scale. Furthermore, the number and dimensions of the elements in the drawings are for illustrative purposes only and are not intended to limit the scope of this disclosure. For example, for clarity, the relative dimensions, thicknesses, and positions of various films, regions, or structures may be reduced or enlarged.

[0017] Throughout this specification and the appended claims, certain terms are used to refer to specific elements. Those skilled in the art will understand that electronic device manufacturers may use different names to refer to the same elements. This document is not intended to distinguish between elements that have the same function but different names. In the following specification and claims, words such as "having" and "comprising" are open-ended terms and should therefore be interpreted as "including but not limited to...".

[0018] The directional terms used herein, such as "up," "down," "front," "back," "left," and "right," are for reference only when referring to the accompanying drawings. Therefore, the directional terms used are for illustrative purposes and not for limiting this disclosure. It should be understood that when an element or membrane is described as being "on" or "connected" to another element or membrane, the element or membrane may be directly on or directly connected to the other element or membrane, or there may be an inserted element or membrane between them (not a direct connection). Conversely, when an element or membrane is described as being "directly" on or "directly connected" to another element or membrane, there is no inserted element or membrane between them.

[0019] The terms “approximately,” “equal to,” “equivalent to,” “same,” “substantially,” or “roughly” used in this document generally mean falling within 10% of a given value, or within 5%, 3%, 2%, 1%, or 0.5% of a given value. Furthermore, unless otherwise specified, the phrases “given range from the first value to the second value” or “given value falls within the range from the first value to the second value” indicate that the given range includes the first value, the second value, and any other values ​​in between.

[0020] In some embodiments disclosed herein, terms such as "connection" and "interconnection," unless specifically defined, may refer to two structures in direct contact, or to two structures not in direct contact, with other structures disposed between them. The terms "connection" and "interconnection" may also include cases where both structures are movable or both structures are fixed. Furthermore, the term "electrical connection" refers to two elements connected in series by a direct or indirect connection; for example, two elements may be directly connected, or two elements may be connected in series through one or more conductive elements. Additionally, the term "electrical coupling" refers to two elements that are separate from each other, and there are no other conductive elements connecting them in series.

[0021] In the following embodiments, the same or similar elements will be referred to by the same or similar reference numerals, and their detailed descriptions will be omitted. Furthermore, features in different embodiments may be freely combined and used as long as they do not violate the spirit of the invention or conflict with it, and simple equivalent changes and modifications made in accordance with this specification or claims are still within the scope of this disclosure. In addition, the terms "first," "second," etc., mentioned in this specification or claims are only used to name different elements or distinguish different embodiments or scopes, and are not used to limit the upper or lower limit of the number of elements, nor are they used to limit the manufacturing order or arrangement order of the elements.

[0022] The electronic devices disclosed herein may include, but are not limited to, radio frequency (RF) devices or electronic devices having RF components. The electronic devices may include bendable or flexible electronic devices. RF components may include frequency selective surfaces (FSS), RF filters, polarizers, resonators, or antennas, etc. The following description uses RF devices as examples of electronic devices to illustrate the content of this disclosure, but this disclosure is not limited thereto.

[0023] Figure 1A and Figure 1B These are partial cross-sectional views and partial top views of an electronic device according to the first embodiment of this disclosure. These views are provided to clearly show the relative arrangement of certain components and / or film layers. Figure 1B Some components and / or films of the electronic device are omitted. Additionally, Figure 1B Please refer to the section along the midline A-A'. Figure 1A .

[0024] Please refer to Figure 1A and Figure 1B The electronic device 1 may include a substrate 10, a first electrode 11, a second electrode 12, a modulation element 13, a first solder joint 14, and a switching element 15. The first electrode 11 is disposed on the substrate 10. The second electrode 12 is disposed on the substrate 10. The modulation element 13 is disposed on the substrate 10 and includes at least two pads, such as pad P1 and pad P2. The first solder joint 14 is disposed between the first electrode 11 and one pad (such as pad P1) of the modulation element 13. The switching element 15 is disposed on the substrate 10. The one pad (such as pad P1) of the modulation element 13 is sequentially electrically connected to the switching element 15 via the first solder joint 14, the first electrode 11, and the second electrode 12.

[0025] In detail, substrate 10 is used to support components. Substrate 10 may be a rigid substrate, a bendable substrate, or a flexible substrate. For example, substrate 10 may include a glass substrate, a polymer film, a printed circuit board, a base layer formed of ceramic, or a combination thereof, but is not limited thereto.

[0026] Viewed from the cross-sectional view of electronic device 1, as follows Figure 1A As shown, a first electrode 11 is disposed between a substrate 10 and a second electrode 12, and a second electrode 12 is disposed between the first electrode 11 and a switching element 15. The first electrode 11 and the second electrode 12 serve as intermediate media for electrically connecting the switching element 15 and the modulation element 13. For example, the materials of the first electrode 11 and the second electrode 12 may include copper, aluminum, any material with high conductivity, or combinations thereof, but are not limited thereto.

[0027] The modulation element 13 is disposed corresponding to the first electrode 11. For example, the modulation element 13 at least partially overlaps with the first electrode 11 in the normal direction (e.g., third direction D3) of the substrate 10. Viewed from a top view of the electronic device 1, as shown... Figure 1B As shown, the modulation element 13 has a width W1 and a width W2 in the first direction D1 and the second direction D2, respectively. The widths W1 and W2 can be greater than or equal to 20 micrometers and less than or equal to 1000 micrometers (20μm≤W1≤1000μm; 20μm≤W12≤1000μm), but are not limited thereto.

[0028] In some embodiments, the modulation element 13 includes a variable capacitor. For example, the variable capacitor may be formed by a liquid crystal device, a variable capacitor diode, or a microelectromechanical system (MEMS), but is not limited thereto.

[0029] By changing the voltage applied to a variable capacitor, the equivalent capacitance in a radio frequency (RF) circuit can be controlled, causing corresponding changes in the phase and amplitude of the electromagnetic wave, thereby controlling the direction of the electromagnetic wave or improving the directivity of the RF device. The transmission medium for electromagnetic waves can include, but is not limited to, transmission lines, waveguide structures, or free space. Electromagnetic waves can include, but are not limited to, plane waves, cylindrical waves, or spherical waves. The frequency range of electromagnetic waves can be radio frequency, millimeter wave, megahertz (THz), infrared light, or visible light, but is not limited to these.

[0030] The first solder joint 14 solders the pad P1 of the modulation element 13 to the first electrode 11. For example, the first solder joint 14 may include solder balls, copper pillars, other suitable metals or metal alloys, but is not limited thereto.

[0031] Switching element 15 is used to drive modulation element 13. For example, switching element 15 may include a thin-film transistor (TFT). The material of the channel layer (not shown) of the thin-film transistor may include, but is not limited to, low-temperature polycrystalline silicon, amorphous silicon, oxide semiconductor, organic semiconductor or III-V compound semiconductor.

[0032] Depending on the specific requirements, the electronic device 1 may also include other components or films. For example, the electronic device 1 may also include a third electrode 16 and a second solder joint 17, but is not limited thereto.

[0033] The third electrode 16 is disposed on the substrate 10. In some embodiments, the third electrode 16 and the first electrode 11 may be fabricated in the same layer. For example, the third electrode 16 and the first electrode 11 may both be the first conductive layer C1, that is, the third electrode 16 and the first electrode 11 may have the same material and may be formed by the same patterning process.

[0034] The second solder joint 17 is disposed between the third electrode 16 and another pad (such as pad P2) of the modulation element 13, wherein the other pad (such as pad P2) of the modulation element 13 is electrically connected to the third electrode 16 via the second solder joint 17. Specifically, the second solder joint 17 solders pad P2 of the modulation element 13 to the third electrode 16. The second solder joint 17 may include, for example, solder balls, copper pillars, other suitable metals or metal alloys, but is not limited thereto.

[0035] In some embodiments, the electronic device 1 may further include a fourth electrode 18. The fourth electrode 18 is disposed on the substrate 10, and as viewed in a cross-sectional view of the electronic device 1, as shown... Figure 1A As shown, the third electrode 16 is disposed between the fourth electrode 18 and the substrate 10. In some embodiments, the fourth electrode 18 and the second electrode 12 can be fabricated in the same layer. For example, the fourth electrode 18 and the second electrode 12 can both be the second conductive layer C2, that is, the fourth electrode 18 and the second electrode 12 can have the same material and can be formed by the same patterning process.

[0036] In some embodiments, the first conductive layer C1 may include conductive patterns PT1 and PT2 in addition to the first electrode 11 and the third electrode 16. The first electrode 11 is disposed between the conductive pattern PT1 and the third electrode 16, and the first electrode 11, conductive pattern PT1, and third electrode 16 are separated from each other. For example, a gap G1 exists between the first electrode 11 and the conductive pattern PT1, and a gap G2 exists between the first electrode 11 and the third electrode 16. The third electrode 16 is disposed between the first electrode 11 and the conductive pattern PT2, and the third electrode 16, first electrode 11, and conductive pattern PT2 are separated from each other. For example, a gap G3 exists between the third electrode 16 and the conductive pattern PT2.

[0037] Viewed from the cross-sectional view of electronic device 1, as follows Figure 1AAs shown, a conductive pattern PT1 is disposed between the second electrode 12 and the substrate 10, and the second electrode 12 is disposed between the switching element 15 and the conductive pattern PT1, wherein the gap G1 between the conductive pattern PT1 and the first electrode 11 can be covered by the second electrode 12. Furthermore, a conductive pattern PT2 is disposed between the fourth electrode 18 and the substrate 10, wherein the gap G3 between the conductive pattern PT2 and the third electrode 16 can be covered by the fourth electrode 18. Additionally, a modulation element 13 is disposed corresponding to the gap G2 between the first electrode 11 and the third electrode 16. For example, the modulation element 13 at least partially overlaps with the gap G2 in the third direction D3.

[0038] In some embodiments, the first conductive layer C1 and the second conductive layer C2 may both be metal layers. The electromagnetic wave transmitted under the first conductive layer C1 may be transmitted to the modulation element 13 through the area not covered by the first conductive layer C1 and the second conductive layer C2 (such as the gap G2), and then output from the electronic device 1 after being modulated by the modulation element 13 (such as adjusting the phase, amplitude or transmission direction of the electromagnetic wave).

[0039] In some embodiments, the electronic device 1 may further include an isolation layer 19, and the first conductive layer C1 and the second conductive layer C2 may be separated from each other through the isolation layer 19. For example, the conductive pattern PT1 may be separated from the second electrode 12 and the switching element 15 through the isolation layer 19, and the conductive pattern PT2 may be separated from the fourth electrode 18 through the isolation layer 19. The isolation layer 19 may have openings A1 and A2. Openings A1 and A2 expose the first electrode 11 and the third electrode 16, respectively. The second electrode 12 is electrically connected to the first electrode 11 through opening A1. The fourth electrode 18 is electrically connected to the third electrode 16 through opening A2. The material of the isolation layer 19 may include silicon nitride (SiNx), silicon oxide (SiOx), epoxy resin, acrylic, solder resist, silicon material, bismaleimide, polyimide, or combinations thereof, but is not limited thereto.

[0040] In some embodiments, the electronic device 1 may further include a passivation layer 20. The passivation layer 20 covers the switching element 15, the second electrode 12, and the isolation layer 19. The material of the passivation layer 20 may include, but is not limited to, silicon nitride, silicon oxide, epoxy resin, acrylic, solder resist, silicon material, bismaleimide, polyimide, or combinations thereof.

[0041] Electronic device 1 may have a via TH1-1 and a via TH1-2. The via TH1-1 may be located between the opening A1 and the via TH1-2, wherein the via TH1-1 penetrates the passivation layer 20 and the isolation layer 19 and exposes the first electrode 11. The via TH1-2 may be located between the via TH1-1 and the opening A2, wherein the via TH1-2 penetrates the passivation layer 20 and the isolation layer 19 and exposes the third electrode 16.

[0042] Electronic device 1 may further include pads P3 and P4. Pad P3 is disposed in through hole TH1-1 and on the first electrode 11. First solder joint 14 is also disposed in through hole TH1-1 and electrically connected between pads P1 and P3. Pad P4 is disposed in through hole TH1-2 and on the third electrode 16. Second solder joint 17 is also disposed in through hole TH1-2 and electrically connected between pads P2 and P4. Pad P1 of modulation element 13 may be electrically connected to switching element 15, for example, sequentially via first solder joint 14, pad P3, first electrode 11, and second electrode 12. Pad P2 of modulation element 13 may be electrically connected to ground, for example, sequentially via second solder joint 17, pad P4, third electrode 16, and fourth electrode 18. The voltage (e.g., DC voltage) received by pad P1 is different from the voltage (e.g., ground voltage) received by pad P2. The materials of pads P3 and P4 may include, but are not limited to, nickel-gold, nickel-palladium-gold, silver, gold, nickel, tin, organic solderability preservative (OSP), other conductive materials, or combinations thereof. In some embodiments, the dimensions of pads P3 and P4 may range from 10 μm x 10 μm to 160 μm x 160 μm (10 μm x 10 μm ≤ size ≤ 160 μm x 160 μm), but are not limited thereto.

[0043] In some embodiments, the electronic device 1 may further include a protective layer 21. The protective layer 21 is disposed on the passivation layer 20, and may cover the modulation element 13 and encapsulate pads P1, P2, the first solder joint 14, and the second solder joint 17, but is not limited thereto. The cross-sectional shape of the protective layer 21 may include a hemispherical shape, but is not limited thereto. It should be noted that the hemisphere is not limited to half a sphere. The material of the protective layer 21 may include epoxy resin, acrylic, solder resist, silicon material, bismaleimide, polyimide, parylene, or combinations thereof, but is not limited thereto.

[0044] Figure 2A and Figure 2B These are partial cross-sectional views and partial top views of an electronic device according to a second embodiment of this disclosure. To clearly show the relative arrangement of some components and / or film layers, Figure 2BSome components and / or films of the electronic device are omitted. Additionally, Figure 2B Please refer to the section along the center section line B-B'. Figure 2A .

[0045] Please refer to Figure 2A and Figure 2B Electronic device 1A and Figure 1A and Figure 1B The main differences of the electronic device 1 are described below. The electronic device 1A includes a substrate 10, a first electrode 11, a second electrode 12, a modulation element 13, a first solder joint 14, a switching element 15, a third electrode 16, a second solder joint 17, a fourth electrode 18, a dielectric film 19A, a passivation layer 20, a protective layer 21, a dielectric layer 22, conductive patterns PT1 and PT2, pads P3, P4, P5, and P6.

[0046] The dielectric film 19A is used to carry the second conductive layer C2 (including the second electrode 12 and the fourth electrode 18), the switching element 15, and the passivation layer 20. For example, the material of the dielectric film 19A may include epoxy resin, acrylic, solder resist, silicon material, bismaleimide, polyimide, or combinations thereof, but is not limited thereto. In some embodiments, the maximum thickness T19A of the dielectric film 19A in the third direction D3 is greater than or equal to 5 μm and less than or equal to 500 μm, but is not limited thereto.

[0047] The dielectric film 19A can be attached to the first conductive layer C1 (including the first electrode 11, the third electrode 16, the conductive pattern PT1, and the conductive pattern PT2) via the dielectric layer 22. For example, the material of the dielectric layer 22 may include epoxy resin, acrylic, solder resist, silicon material, bismaleimide, polyimide, any adhesive material, or a combination thereof, but is not limited thereto. The maximum thickness T22 of the dielectric layer 22 in the third direction D3 may be greater than 1 / 10000 times the wavelength of the electromagnetic wave and less than 100 times the wavelength of the electromagnetic wave. In some embodiments, the maximum thickness T22 of the dielectric layer 22 in the third direction D3 is greater than or equal to 5 μm and less than or equal to 50 μm, but is not limited thereto.

[0048] Viewed from the cross-sectional view of electronic device 1A, as... Figure 2A As shown, dielectric layer 22 is disposed between the first conductive layer C1 and dielectric film 19A, and dielectric film 19A is disposed between the second conductive layer C2 and dielectric layer 22. Passivation layer 20 may have openings A3 and A4. Openings A3 and A4 expose the second electrode 12 and the fourth electrode 18, respectively. Pads P5 and P6 are disposed in openings A5 and A6, respectively. The materials of pads P5 and P6 may include nickel-gold, nickel-palladium-gold, silver, gold, nickel, tin, organic solder mask, other conductive materials, or combinations thereof, but are not limited thereto.

[0049] Electronic device 1A may have vias TH1 and TH2. Via TH1 penetrates the passivation layer 20, the dielectric film 19A, and the dielectric layer 22, exposing the first electrode 11. Via TH2 penetrates the passivation layer 20, the dielectric film 19A, and the dielectric layer 22, exposing the third electrode 16. A pad P3 is disposed in via TH1 and on the first electrode 11. A pad P4 is disposed in via TH2 and on the third electrode 16.

[0050] The first solder joint 14 is disposed on the pad P5, and the first solder joint 14 is connected to the pad P3 disposed on the first electrode 11 through the through hole TH1. Specifically, the first solder joint 14 electrically connects the pads P1, P3, and P5. In some embodiments, the first solder joint 14 may directly contact the sidewall surface of the second electrode 12, so that the first electrode 11 can be electrically connected to the switching element 15 sequentially via the first solder joint 14 and the second electrode 12. For example, the first electrode 11 may be electrically connected to the switching element 15 sequentially via the pad P3, the first solder joint 14, and the second electrode 12, but this is not a limitation.

[0051] The second weldment 17 is disposed on the pad P6, and the second weldment 17 is connected to the pad P4 disposed on the third electrode 16 through the through hole TH2. Specifically, the second weldment 17 electrically connects the pads P2, P4, and P6. In some embodiments, the second weldment 17 may be in direct contact with the sidewall surface of the fourth electrode 18, so that the third electrode 16 can be electrically connected to the ground potential sequentially via the second weldment 17 and the fourth electrode 18. For example, the third electrode 16 may be electrically connected to the ground potential sequentially via the pad P4, the second weldment 17, and the fourth electrode 18, but this is not a limitation.

[0052] By placing the switching element 15 and the first conductive layer C1 on different substrates (such as substrate 10 and dielectric film 19A), and then attaching the dielectric film 19A to the first conductive layer C1 through the dielectric layer 22, it helps to improve the warping problem of the first conductive layer C1 caused by the mismatch of the thermal expansion coefficients of the first conductive layer C1 and substrate 10 in high-temperature processes (such as manufacturing the switching element 15).

[0053] Figure 3A and Figure 3B These are partial cross-sectional views and partial top views of an electronic device according to the third embodiment of this disclosure. To clearly show the relative arrangement of some components and / or film layers, Figure 3B Some components and / or films of the electronic device are omitted. Additionally, Figure 3B Please refer to the section along the center section line C-C'. Figure 3A .

[0054] Please refer to Figure 3A and Figure 3B Electronic device 1B and Figure 2A and Figure 2B The main differences of the electronic device 1A are described below. The electronic device 1B includes a substrate 10, a first electrode 11, a second electrode 12, a modulation element 13, a first solder joint 14, a switching element 15, a third electrode 16, a second solder joint 17, a fourth electrode 18, a dielectric film 19A, a passivation layer 20, a protective layer 21, a dielectric layer 22, a third solder joint 23, a fourth solder joint 24, a conductive pattern PT1, a conductive pattern PT2, a pad P3, a pad P4, a pad P5, a pad P6, a pad P7, and a pad P8.

[0055] In addition to vias TH1 and TH2, electronic device 1B may also have vias TH3 and TH4. Via TH3 penetrates the passivation layer 20, the dielectric film 19A, and the dielectric layer 22, exposing the first electrode 11. Via TH4 penetrates the passivation layer 20, the dielectric film 19A, and the dielectric layer 22, exposing the third electrode 16. Via TH4, TH2, TH1, and TH3 are arranged, for example, in the second direction D2, wherein via TH3 is located between opening A3 and via TH1, and via TH4 is located between opening A4 and via TH2.

[0056] Pad P7 is disposed in via TH3 and on the first electrode 11. Pad P8 is disposed in via TH4 and on the third electrode 16. The materials of pads P7 and P8 may include, but are not limited to, nickel-gold, nickel-palladium-gold, silver, gold, nickel, tin, organic solder mask, other conductive materials, or combinations thereof.

[0057] The first solder joint 14 electrically connects pads P1 and P3, and is separate from the second electrode 12 and pad P5. A third solder joint 23 is disposed on pad P5, and is connected to pad P7 disposed on the first electrode 11 through a through-hole TH3. In some embodiments, the third solder joint 23 may directly contact the sidewall of the second electrode 12, such that pad P1 of the modulation element 13 can be electrically connected to the switching element 15 sequentially via the first solder joint 14 and the second electrode 12. For example, pad P1 can be electrically connected to the switching element 15 sequentially via the first solder joint 14, pad P3, first electrode 11, pad P7, third solder joint 23, and second electrode 12.

[0058] The second solder joint 17 electrically connects pads P2 and P4, and is separate from the fourth electrode 18 and pad P6. The fourth solder joint 24 is disposed on pad P6 and is connected to pad P8 disposed on the third electrode 16 through a through-hole TH4. In some embodiments, the fourth solder joint 24 may directly contact the sidewall surface of the fourth electrode 18, such that pad P2 of the modulation element 13 can be electrically connected to ground sequentially via the second solder joint 17 and the fourth electrode 18. For example, pad P2 can be electrically connected to ground sequentially via the second solder joint 17, pad P4, third electrode 16, pad P8, fourth solder joint 24, and fourth electrode 18.

[0059] The third solder joint 23 and the fourth solder joint 24 may include, for example, solder balls, copper pillars, other suitable metals or metal alloys, but are not limited thereto. Furthermore, the protective layer 21 may further cover the third solder joint 23 and the fourth solder joint 24.

[0060] By connecting each weldment between two pads, the process yield can be improved or production capacity can be increased.

[0061] Figure 4A and Figure 4B These are partial cross-sectional views and partial top views of the electronic device according to the fourth embodiment of this disclosure. To clearly show the relative arrangement of some components and / or film layers, Figure 4B Some components and / or films of the electronic device are omitted. Additionally, Figure 4B Please refer to the section along the central section line D-D'. Figure 4A .

[0062] Please refer to Figure 4A and Figure 4B Electronic device 1C and Figure 3A and Figure 3B The main differences of electronic device 1B are explained below. In electronic device 1C, Figure 3A and Figure 3B The vias TH1 and TH2 are replaced by via TH5. TH5 penetrates the passivation layer 20, the dielectric film 19A, and the dielectric layer 22, exposing the first electrode 11, the third electrode 16, and the substrate 10 exposed by the first electrode 11 and the third electrode 16. A modulation element 13 is disposed in the via TH5, wherein the pad P1 of the modulation element 13 is bonded to the pad P3 disposed on the first electrode 11 via a first solder joint 14, and the pad P2 of the modulation element 13 is bonded to the pad P4 disposed on the third electrode 16 via a second solder joint 17.

[0063] By forming a through hole with a larger diameter (such as through hole TH5), the modulation element 13 can be easily set or the adjustable range of the modulation element 13 can be increased.

[0064] Figure 5A and Figure 5B These are partial cross-sectional views and partial top views of an electronic device according to the fifth embodiment of this disclosure. To clearly show the relative arrangement of some components and / or film layers, Figure 5B Some components and / or films of the electronic device are omitted from the diagram. Additionally, Figure 5B Please refer to the section along the center section line E-E'. Figure 5A .

[0065] Please refer to Figure 5A and Figure 5B Electronic device 1D and Figure 2A and Figure 2B The main differences of the electronic device 1A are explained below. In the electronic device 1D, the first conductive layer C1' may not include conductive patterns PT1 and PT2. In addition, the electronic device 1D may not include vias TH1 and TH2, pads P3 and P4. Furthermore, the modulation element 13 is electrically coupled to the first electrode 11, and one pad of the modulation element 13 (such as pad P1) is electrically connected to the switching element 15.

[0066] In detail, the first solder joint 14 is electrically connected to pads P1 and P5, for example, and the pad P1 of the modulation element 13 is electrically connected to the switching element 15, for example, sequentially through the first solder joint 14, pad P5, and the second electrode 12. On the other hand, the modulation element 13 is also electrically coupled to the third electrode 16, for example, the third electrode 16 is electrically coupled to the pad P2 of the modulation element 13. The second solder joint 17 is electrically connected to pads P2 and P6, for example, and the pad P2 of the modulation element 13 is electrically connected to ground, for example, sequentially through the second solder joint 17, pad P6, and the fourth electrode 18.

[0067] In some embodiments, both the first conductive layer C1' and the second conductive layer C2' may be metal layers. Electromagnetic waves transmitted below the first conductive layer C1' can sequentially pass through the gap G2 of the first conductive layer C1' and the gap G4 of the second conductive layer C2' to the modulation element 13. The electromagnetic waves can be output from the electronic device 1D after being modulated by the modulation element 13 (e.g., adjusting the phase, amplitude, or transmission direction of the electromagnetic waves). The size of the gap G2 may be less than, equal to, or greater than the gap G4, and there are no restrictions on this.

[0068] The design of overlapping the first conductive layer C1' and the second conductive layer C2' on the third-direction D3 helps to increase the adjustable capacitance.

[0069] Figure 6A and Figure 6B These are partial cross-sectional views and partial top views of the electronic device according to the sixth embodiment of this disclosure. To clearly show the relative arrangement of some components and / or film layers, Figure 6BSome components and / or films of the electronic device are omitted. Additionally, Figure 6B Please refer to the section along the central section line F-F'. Figure 6A .

[0070] Please refer to Figure 6A and Figure 6B Electronic device 1E and Figure 5A and Figure 5B The main differences of the electronic device 1D are explained below. The electronic device 1E includes a through-hole TH2 and a pad P4. In addition, the third electrode 16 is electrically connected to the pad P2 of the modulation element 13. For example, the second solder joint 17 may be disposed on the pad P6 and electrically connected between the pad P2 and the pad P4 through the through-hole TH2.

[0071] In other embodiments, although not shown, the first weldment 14 may be disposed on the pad P5 and electrically connected between the pad P1 and the pad P3 through the through hole TH1 (see [link to documentation]). Figure 2A The second weldment 17 can be electrically connected between pad P2 and pad P6 (see [link]). Figure 5A ).

[0072] In this embodiment, the third electrode 16 may be electrically connected to ground, but this is not a limitation. In other embodiments, the third electrode 16 may receive a first DC voltage, and the fourth electrode 18 may receive a second DC voltage, but this is not a limitation. In other embodiments, the third electrode 16 may be omitted.

[0073] Figures 7 to 9 This is a partial cross-sectional schematic diagram of the manufacturing process of an electronic device according to the first embodiment of this disclosure. Please refer to [the diagram first]. Figure 7 A first conductive layer C1 is formed on the substrate 10. The first conductive layer C1 is a patterned conductive layer and may include a first electrode 11, a third electrode 16, a conductive pattern PT1 and a conductive pattern PT2, but is not limited thereto.

[0074] Please refer to Figure 8 After the first conductive layer C1 is formed, an isolation layer 19, a second conductive layer C2, a switching element 15, and a passivation layer 20 are sequentially formed on the substrate 10. The second conductive layer C2 is a patterned conductive layer and may include a second electrode 12 and a fourth electrode 18, but is not limited thereto.

[0075] In some embodiments, the switching element 15 can be directly formed on the substrate 10 via a photolithography process for ease of manufacturing. In other embodiments, the switching element 15 can be bonded to the substrate 10 via conductive bumps (not shown) to reduce manufacturing costs.

[0076] Next, vias TH1-1 and TH1-2 are formed through the passivation layer 20 and the isolation layer 19. For example, vias TH1-1 and TH1-2 can be formed by photolithography, but are not limited thereto.

[0077] Then, pads P3 and P4 are formed in through holes TH1-1 and TH1-2, respectively. For example, pads P3 and P4 can be formed by chemical plating, immersion, or electrolysis, but are not limited thereto.

[0078] Please refer to Figure 9 First solder joint 14 and second solder joint 17 are formed on pads P3 and P4 respectively by printing or other methods. Next, pads P1 and P2 of the modulation element 13 are respectively placed on the first solder joint 14 and the second solder joint 17. Then, reflow soldering is used to fix the pads P1 and P2 of the modulation element 13 onto the first solder joint 14 and the second solder joint 17. Next, a protective layer 21 is formed. Thus, the initial manufacturing of the electronic device 1 is completed.

[0079] Figures 10 to 13 This is a partial cross-sectional schematic diagram of the manufacturing process of an electronic device according to the second embodiment of this disclosure. Please refer to [the diagram first]. Figure 10 A first conductive layer C1 and a dielectric layer 22 are sequentially formed on the substrate 10.

[0080] Please refer to Figure 11 A dielectric film 19A, a second conductive layer C2 (including a second electrode 12 and a fourth electrode 18), and a passivation layer 20 are sequentially formed on a carrier plate CR. The carrier plate CR may include a rigid carrier plate, such as a glass substrate, but is not limited thereto.

[0081] In some embodiments, Figure 11 The steps shown can be performed at the following locations: Figure 10 The steps shown are performed afterward. In other embodiments, Figure 10 The steps shown can be performed at the following locations: Figure 11 Perform the steps shown below.

[0082] Please refer to Figure 12 Remove the carrier plate CR and attach the dielectric film 19A to the dielectric layer 22. The method for removing the carrier plate CR may include laser peeling, that is, irradiating the release layer (not shown) disposed between the carrier plate CR and the dielectric film 19A with a laser to separate the carrier plate CR from the dielectric film 19A, but is not limited thereto.

[0083] Next, through-holes TH1 and TH2 are formed through the passivation layer 20, the dielectric film 19A, and the dielectric layer 22 to expose the first electrode 11 and the third electrode 16. For example, through-holes TH1 and TH2 can be formed by laser drilling, but this is not a limitation. In other embodiments, at least one of through-holes TH1 and TH2 can also be formed by photolithography, laser drilling, or a combination thereof. The aperture R1 (e.g., diameter) of through-hole TH1 and the aperture R2 (e.g., diameter) of through-hole TH2 can be greater than or equal to 40 μm to facilitate subsequent soldering in through-holes TH1 and TH2, but this is not a limitation.

[0084] Please refer to Figure 13 Pads P5, P3, P4, and P6 are formed in opening A3, through hole TH1, through hole TH2, and opening A4, respectively. For example, pads P5, P3, P4, and P6 can be formed by chemical plating, immersion, or electrolysis, but are not limited thereto.

[0085] Next, a first solder joint 14 is formed on pads P3 and P6 by printing or other methods, and a second solder joint 17 is formed on pads P4 and P6. Then, pads P1 and P2 of the modulation element 13 are respectively placed on the first solder joint 14 and the second solder joint 17. Next, the pads P1 and P2 of the modulation element 13 are fixed on the first solder joint 14 and the second solder joint 17 by reflow soldering. Then, a protective layer 21 is formed. Thus, the initial manufacturing of the electronic device 1A is completed.

[0086] The manufacturing methods of the electronic devices 1B to 1E are generally similar to those of the electronic device 1A, and will not be described in detail below.

[0087] Furthermore, although not shown, electronic devices 1A to 1E may also be based on Figure 1A Instead, multiple conductive layers, switching elements, modulation elements, solder joints, isolation layers, passivation layers, multiple pads, and protective layers are placed on the same substrate (such as substrate 10).

[0088] Furthermore, although the switching element and other components / films in the above embodiments are all disposed on the same side of the substrate, this is not a limitation. In other embodiments not shown, the switching element may also be disposed under the substrate, such that the switching element and other components / films are disposed on opposite sides of the substrate. In this architecture, the switching element can be electrically connected to the second electrode via lines not shown (such as vias or other lines).

[0089] Figure 14 and Figure 15 These are partial cross-sectional schematic diagrams of electronic devices according to the seventh and eighth embodiments of this disclosure, respectively. Figure 14 and Figure 15 A partial top-view diagram of the electronic device can be referred to Figure 1B .

[0090] Please refer to Figure 14 Electronic device 1F and Figure 2A The main differences of the electronic device 1A are explained below. In the electronic device 1F, after the dielectric film 19A is disposed on the substrate 10, a through-hole TH6 is formed through the dielectric film 19A and the dielectric layer 22, exposing the first electrode 11 and the third electrode 16. Next, a second conductive layer C2 is formed on the substrate 10, wherein the second electrode 12 of the second conductive layer C2 is disposed on the dielectric film 19A and extends into the through-hole TH6 and contacts the first electrode 11, and the fourth electrode 18 of the second conductive layer C2 is disposed on the dielectric film 19A and extends into the through-hole TH6 and contacts the third electrode 16. Then, a switching element 15 and a passivation layer 20 are formed. Next, pads P3 and P4 are formed in the openings A3 and A4 of the passivation layer 20, respectively, and the pads P1 and P2 of the modulation element 13 are fixed to the pads P3 and P4 by the first solder joint 14 and the second solder joint 17. Then, a protective layer 21 is formed. Thus, the initial manufacturing of electronic device 1F was completed.

[0091] During the fabrication of electronic device 1F, the dielectric film 19A and dielectric layer 22 at gap G2 are removed when forming via TH6. Therefore, in electronic device 1F, there is no dielectric film 19A and dielectric layer 22 below the modulation element 13. Furthermore, the second electrode 12 is in contact with the first electrode 11, and the second electrode 12 is separated from the pad P3 by the passivation layer 20; the fourth electrode 18 is in contact with the third electrode 16, and the fourth electrode 18 is separated from the pad P4 by the passivation layer 20.

[0092] Please refer to Figure 15 1G electronic devices and Figure 14 The main differences of the electronic device 1F are explained below. In the electronic device 1G, opening A3 exposes a portion of the second electrode 12, and pad P3 is disposed on the first electrode 11 and covers the portion of the second electrode 12 exposed by opening A3. Furthermore, opening A4 exposes a portion of the fourth electrode 18, and pad P4 is disposed on the third electrode 16 and covers the portion of the fourth electrode 18 exposed by opening A4.

[0093] Figures 16A to 16D This is a partial schematic diagram of the manufacturing process of an electronic device according to the ninth embodiment of the present disclosure, wherein... Figure 16A and Figure 16B This is a partial top-down view, and Figure 16C and Figure 16D This is a partial cross-sectional schematic diagram.

[0094] Please refer to Figure 16AMultiple switches SW are formed on a substrate SUB. For example, the substrate SUB may include a glass substrate, a polymer film, a printed circuit board, a substrate formed of ceramic, or a combination thereof, but is not limited thereto. The switches SW may include thin-film transistors (TFTs). The material of the channel layer (not shown) of the thin-film transistor may include, but is not limited to, low-temperature polycrystalline silicon, amorphous silicon, oxide semiconductors, organic semiconductors, or III-V compound semiconductors, etc. The multiple switches SW may be arranged in a first direction D1 and a second direction D2.

[0095] Please refer to Figure 16B Multiple pads P15 are formed on multiple switches SW. The material of the pads P15 may include nickel-gold, nickel-palladium-gold, silver, gold, nickel, tin, organic solderability preservative (OSP), other conductive materials, or combinations thereof, but is not limited thereto. Then, a dicing process is performed on the substrate SUB to form multiple switch elements 15 separated from each other. Figure 16C and Figure 16D Only one switching element 15 is shown. For example, a laser (not shown) can be used along a cutting line (see reference). Figure 16B (The dashed line) is used to cut the substrate SUB.

[0096] Please refer to Figure 16C The switching element 15 and the modulation element 13 are then bonded to the substrate SUB via solder joints CT. For example, the pad P15 of the switching element 15 is bonded to the pad P15' on the substrate SUB via solder joints CT. The solder joint CT may include solder balls, copper pillars, other suitable metals or metal alloys, but is not limited thereto. The material of the pad P15 may include nickel-gold, nickel-palladium-gold, silver, gold, nickel, tin, organic solderability preservative (OSP), other conductive materials, or combinations thereof, but is not limited thereto. The manner in which the modulation element 13 is bonded to the substrate SUB is described above and will not be repeated here.

[0097] Please refer to Figure 16DAfter forming protective layers 21 and 21' on the passivation layer 20, the electronic device 1H is formed. Protective layer 21 may cover the modulation element 13 and encapsulate pads P1 and P2, the first solder joint 14, and the second solder joint 17. Protective layer 21' may cover the switching element 15 and encapsulate pad P15' and solder joint CT. In some embodiments, the material of protective layer 21' may include epoxy resin, acrylic, solder resist, silicon material, bismaleimide, polyimide, parylene, or combinations thereof, but is not limited thereto. The materials of protective layer 21 and protective layer 21' may be the same or different. For example, protective layer 21 may have a dielectric constant (Dk) and a loss factor (Df) smaller than those of protective layer 21', respectively. In some embodiments, the loss factor of protective layer 21 may be less than 0.01, but is not limited thereto.

[0098] In summary, in the embodiments disclosed herein, by changing the voltage applied to the variable capacitor, the equivalent capacitance in the radio frequency circuit can be controlled, causing corresponding changes in the phase and amplitude of the electromagnetic wave, thereby controlling the direction of the electromagnetic wave or improving the directivity of the radio frequency device.

[0099] The above embodiments are only used to illustrate the technical solutions disclosed herein, and are not intended to limit them. Although the present disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still combine or modify the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some or all of the technical features therein. Such combinations, modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments disclosed herein.

[0100] While the embodiments and advantages of this disclosure have been described above, it should be understood that anyone skilled in the art can make changes, substitutions, and modifications without departing from the spirit and scope of this disclosure, and features between the embodiments can be arbitrarily mixed and substituted to form other new embodiments. Furthermore, the scope of protection of this disclosure is not limited to the processes, machines, manufacturing, material composition, apparatus, methods, and steps described in the specific embodiments of the specification. Anyone skilled in the art can understand from the content of this disclosure that current or future developed processes, machines, manufacturing, material composition, apparatus, methods, and steps can be used according to this disclosure, as long as they can perform substantially the same function or obtain substantially the same results in the embodiments described herein. Therefore, the scope of protection of this disclosure includes the aforementioned processes, machines, manufacturing, material composition, apparatus, methods, and steps. In addition, each claim constitutes an individual embodiment, and the scope of protection of this disclosure also includes combinations of various claims and embodiments. The scope of protection of this disclosure shall be determined by the appended claims.

Claims

1. An electronic device, characterized in that, include: substrate; A first electrode is disposed on the substrate; A second electrode is disposed on the substrate; A modulation element is disposed on the substrate and includes at least two pads; The first weldment is disposed between the first electrode and a pad of the modulation element; as well as Switching elements are disposed on the substrate. The one pad of the modulation element is electrically connected to the switching element sequentially via the first solder joint, the first electrode, and the second electrode; In the normal direction of the substrate, the first electrode is disposed between the substrate and the second electrode.

2. The electronic device according to claim 1, characterized in that, Also includes: The third electrode is disposed on the substrate; as well as A second solder joint is disposed between the third electrode and another pad of the modulation element, wherein the other pad of the modulation element is electrically connected to the third electrode via the second solder joint.

3. The electronic device according to claim 2, characterized in that, The third electrode is fabricated in the same layer as the first electrode.

4. The electronic device according to claim 2, characterized in that, The third electrode and the first electrode are separated from each other.

5. The electronic device according to claim 1, characterized in that, Also includes: A third electrode is disposed on the substrate, wherein another pad of the modulation element is electrically coupled to the third electrode.

6. The electronic device according to claim 5, characterized in that, The third electrode is fabricated in the same layer as the first electrode.

7. The electronic device according to claim 5, characterized in that, The third electrode and the first electrode are separated from each other.

8. The electronic device according to claim 1, characterized in that, The first electrode is disposed between the substrate and the second electrode, and the second electrode is disposed between the first electrode and the switching element.

9. An electronic device, characterized in that, include: substrate; A first electrode is disposed on the substrate; A switching element is disposed on the substrate; A modulation element is disposed on the substrate and includes at least two pads. The modulation element is electrically coupled to the first electrode, and one pad of the modulation element is electrically connected to the switching element; as well as The second electrode is disposed on the substrate and electrically connected to one of the pads of the switching element and the modulation element; In the normal direction of the substrate, the first electrode is disposed between the substrate and the second electrode.

10. The electronic device according to claim 9, characterized in that, Also includes: The third electrode is disposed on the substrate and electrically coupled to another pad of the modulation element.

11. The electronic device according to claim 10, characterized in that, The third electrode is fabricated in the same layer as the first electrode.

12. The electronic device according to claim 10, characterized in that, The third electrode and the first electrode are separated from each other.

13. The electronic device according to claim 9, characterized in that, Also includes: The third electrode is disposed on the substrate and electrically connected to another pad of the modulation element.

14. The electronic device according to claim 13, characterized in that, The third electrode is fabricated in the same layer as the first electrode.

15. The electronic device according to claim 13, characterized in that, The third electrode and the first electrode are separated from each other.

16. The electronic device according to claim 13, characterized in that, The first electrode is disposed between the substrate and the second electrode, and the second electrode is disposed between the first electrode and the switching element.

17. An electronic device, characterized in that, include: substrate; A first electrode is disposed on the substrate; A second electrode is disposed on the substrate; A modulation element is disposed on the substrate and includes at least two pads; A first solder joint is disposed between the first electrode and a pad of the modulation element and electrically connected to the first electrode and the pad of the modulation element; as well as Switching elements are disposed on the substrate. The first electrode is electrically connected to the switching element sequentially via the first solder joint and the second electrode; In the normal direction of the substrate, the first electrode is disposed between the substrate and the second electrode.

18. The electronic device according to claim 17, characterized in that, Also includes: The third electrode is disposed on the substrate and electrically connected to another pad of the modulation element.

19. The electronic device according to claim 18, characterized in that, The third electrode is fabricated in the same layer as the first electrode.

20. The electronic device according to claim 18, characterized in that, The third electrode and the first electrode are separated from each other.

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