Electrode layer, capacitor and method for manufacturing the same

Abstract

The present application relates to an electrode layer, a capacitor and a preparation method thereof, comprising the following steps: forming a first electrode layer, wherein the first electrode layer comprises a doped titanium nitride layer; forming a second electrode layer on the surface of the first electrode layer, wherein the second electrode layer comprises a titanium nitride layer or a work function layer. The preparation method of the electrode layer uses a stacked structure comprising a doped titanium nitride layer as an electrode layer instead of a single material electrode layer. Since the doped titanium nitride layer has more than twice the mechanical strength of the titanium nitride layer, and the electrode layer is a stacked structure comprising at least two material layers, the mechanical strength of the electrode layer can be significantly enhanced, and the collapse caused by stress can be avoided when the electrode layer is used as the lower electrode layer of the capacitor.

Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, and in particular to an electrode layer, a capacitor, and a method for fabricating the same. Background Technology

[0002] Dynamic Random Access Memory (DRAM) is a commonly used semiconductor memory device in computers, composed of many repeating memory cells. Each memory cell typically includes a capacitor and a transistor. The transistor's gate is connected to the word line, its drain to the bit line, and its source to the capacitor. The voltage signal on the word line controls the transistor's on or off state, thereby allowing data to be read from the capacitor via the bit line or written to the capacitor via the bit line for storage. In current DRAM capacitor manufacturing processes, titanium nitride (TiN) is used as the material for memory nodes (SNs) due to its excellent thermal stability, good compatibility with high-k dielectric layers, and good mechanical strength.

[0003] As DRAM technology continues to shrink towards advanced nodes, the aspect ratio of capacitor structures will be greatly improved. In particular, as capacitor structures evolve from cylindrical to columnar structures, the capacitor structure is prone to collapse due to stress because titanium nitride does not have sufficient mechanical strength. Summary of the Invention

[0004] Therefore, it is necessary to address the problem that the capacitor structure is prone to collapse due to stress when using titanium nitride as an electrode layer in the prior art, and to provide an electrode layer, a capacitor and its preparation method.

[0005] To achieve the above objectives, the present invention provides a method for preparing an electrode layer, comprising the following steps:

[0006] A first electrode layer is formed, the first electrode layer comprising a doped titanium nitride layer;

[0007] A second electrode layer is formed on the surface of the first electrode layer, the second electrode layer comprising a titanium nitride layer or a work function layer.

[0008] In one embodiment, the first electrode layer is formed using an atomic layer deposition process. The process of forming the first electrode layer using atomic layer deposition includes at least one titanium nitride doping growth cycle, wherein the titanium nitride doping growth cycle includes:

[0009] Provide titanium precursors to form titanium precursor layers;

[0010] A dopant precursor is provided to the surface of the titanium precursor layer to adsorb dopants onto the surface of the titanium precursor layer;

[0011] A first reactive gas is provided to the surface of the titanium precursor layer on which the dopant is adsorbed to form a sub-doped titanium nitride layer.

[0012] In one embodiment, the process of forming the first electrode layer using atomic layer deposition includes multiple titanium nitride doping growth cycles. Before the first titanium nitride doping growth cycle, before the last titanium nitride doping growth cycle, and / or between at least two adjacent titanium nitride doping growth cycles, the process further includes a step of forming at least one titanium nitride layer using atomic layer deposition. Forming the titanium nitride layer using atomic layer deposition includes:

[0013] A titanium precursor is provided to the surface of the sub-doped titanium nitride layer to form a titanium precursor layer on the surface of the sub-doped titanium nitride layer;

[0014] A first reactive gas is provided to the surface of the titanium precursor layer to form the titanium nitride layer.

[0015] In one embodiment, the dopant in the doped titanium nitride layer includes at least one of silicon, boron, aluminum, zirconium, hafnium, phosphorus, carbon, gallium, germanium, antimony, tellurium, arsenic and tungsten.

[0016] In one embodiment, when the second electrode layer is a titanium nitride layer, the second electrode layer is formed using an atomic layer deposition process. The process of forming the second electrode layer using atomic layer deposition includes at least one titanium nitride growth cycle, wherein the titanium nitride growth cycle includes:

[0017] A titanium precursor is provided to the surface of the first electrode layer to form a titanium precursor layer;

[0018] A first reactive gas is provided to the surface of the titanium precursor layer to form a sub-titanium nitride layer.

[0019] In one embodiment, when the second electrode layer is a work function layer, the work function layer includes a ruthenium layer or a ruthenium oxide layer; the second electrode layer is formed using an atomic layer deposition process, and the process of forming the second electrode layer using an atomic layer deposition process includes at least one work function layer growth cycle, the work function layer growth cycle including:

[0020] A ruthenium precursor is provided to the surface of the first electrode layer to form a ruthenium precursor layer;

[0021] A second reactive gas is provided to the surface of the ruthenium precursor layer to form a subwork function layer.

[0022] In one embodiment, after forming the second electrode layer, the method further includes: repeating the above steps at least once to form a stacked structure comprising multiple layers of the first electrode layer and multiple layers of the second electrode layer, wherein the first electrode layer and the second electrode layer are stacked alternately in the stacked structure.

[0023] The present invention also provides an electrode layer comprising:

[0024] A first electrode layer, the first electrode layer comprising a doped titanium nitride layer;

[0025] A second electrode layer is located on the surface of the first electrode layer, and the second electrode layer includes a titanium nitride layer or a work function layer.

[0026] In one embodiment, the first electrode layer comprises multiple layers of sub-doped titanium nitride stacked sequentially.

[0027] In one embodiment, a titanium nitride layer is further provided below the bottom sub-doped titanium nitride layer, above the top sub-doped titanium nitride layer, and / or between at least two adjacent sub-doped titanium nitride layers.

[0028] In one embodiment, the second electrode layer comprises multiple layers of titanium nitride stacked sequentially or multiple layers of work function stacked sequentially.

[0029] In one embodiment, the work function layer includes a ruthenium layer or a ruthenium oxide layer.

[0030] In one embodiment, the dopant in the doped titanium nitride layer includes at least one of silicon, boron, aluminum, zirconium, hafnium, phosphorus, carbon, gallium, germanium, antimony, tellurium, arsenic and tungsten.

[0031] In one embodiment, the electrode layer is a stacked structure, comprising multiple first electrode layers and multiple second electrode layers, wherein the first electrode layers and the second electrode layers are alternately stacked.

[0032] The present invention also provides a method for manufacturing a capacitor, comprising the following steps:

[0033] A lower electrode layer is formed on the sidewall and bottom of the capacitor hole, and the lower electrode layer is prepared by the electrode layer preparation method described in any of the above embodiments;

[0034] A capacitor dielectric layer is formed on the inner and outer surfaces of the lower electrode layer;

[0035] An upper electrode layer is formed on the surface of the capacitor dielectric layer.

[0036] This application also provides a capacitor, comprising:

[0037] A lower electrode layer, wherein the lower electrode layer includes the electrode layer as described in any of the above embodiments;

[0038] A capacitor dielectric layer is located on the inner and outer surfaces of the lower electrode layer;

[0039] The upper electrode layer is located on the surface of the capacitor dielectric layer.

[0040] This application also provides a method for manufacturing a capacitor, comprising the following steps:

[0041] A lower electrode layer is formed inside the capacitor hole, the lower electrode layer filling the capacitor hole, and the lower electrode layer is prepared by the electrode layer preparation method described in any of the above embodiments;

[0042] A capacitor dielectric layer is formed on the outer surface of the lower electrode layer;

[0043] An upper electrode layer is formed on the outer surface of the capacitor dielectric layer.

[0044] This application also provides a capacitor, comprising:

[0045] A lower electrode layer, the lower electrode layer comprising a solid columnar structure; the lower electrode layer comprising an electrode layer as described in any of the above embodiments;

[0046] A capacitor dielectric layer is located on the outer surface of the lower electrode layer;

[0047] The upper electrode layer is located on the outer surface of the capacitor dielectric layer.

[0048] The electrode layer, capacitor, and preparation method of the present invention have at least the following beneficial effects:

[0049] The electrode layer preparation method provided by this invention uses a stacked structure including a doped titanium nitride layer as the electrode layer to replace a single-material electrode layer. Since the doped titanium nitride layer has more than twice the mechanical strength of a single titanium nitride layer, and the electrode layer is a stacked structure including at least two material layers, the mechanical strength of the electrode layer can be significantly enhanced. When the electrode layer is used as the lower electrode layer of a capacitor, it can avoid collapse due to stress. At the same time, the electrode layer prepared by this invention may include a work function layer in addition to the doped titanium nitride layer. Combining materials with different functional properties and advantages to form an electrode layer can reduce the resistivity of the electrode layer and improve its conductivity while enhancing its mechanical strength. It can also meet the requirements of the electrode layer in terms of effective work function and interface compatibility with the dielectric layer, reduce leakage current and increase capacitance.

[0050] The electrode layer provided by this invention includes a stacked structure of doped titanium nitride layers. Since the doped titanium nitride layers have more than twice the mechanical strength of a single titanium nitride layer, and the electrode layer is a stacked structure comprising at least two material layers, the mechanical strength of the electrode layer can be significantly enhanced. When the electrode layer is used as the lower electrode layer of a capacitor, it can prevent collapse due to stress. Furthermore, the electrode layer prepared by this invention may include a work function layer in addition to the doped titanium nitride layer. Combining materials with different functional properties and advantages to form the electrode layer not only enhances the mechanical strength of the electrode layer but also reduces its resistivity and improves its conductivity. It can also meet the requirements of the electrode layer in terms of effective work function and interface compatibility with the dielectric layer, reducing leakage current and increasing capacitance. Attached Figure Description

[0051] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0052] Figure 1 This is a flowchart of a method for preparing an electrode layer according to an embodiment of this application;

[0053] Figure 2 This is a schematic diagram of the cross-sectional structure of the electrode layer provided in one embodiment of this application;

[0054] Figure 3 This is a flowchart of a titanium nitride doping growth cycle in a method for preparing an electrode layer provided in one embodiment of this application;

[0055] Figures 4 to 6 This is a schematic diagram of the structure of the first electrode layer formed by atomic layer deposition in the electrode layer preparation methods provided in different embodiments of this application;

[0056] Figure 7 This is a flowchart of a titanium nitride growth cycle in the electrode layer preparation method provided in one embodiment of this application;

[0057] Figure 8 This is a flowchart of a method for preparing a capacitor according to an embodiment of this application;

[0058] Figure 9 for Figure 8 A top view schematic diagram of the capacitor fabricated using the method described in the image.

[0059] Figure 10 This is a flowchart of a method for manufacturing a capacitor provided in another embodiment of this application;

[0060] Figure 11 for Figure 10 The diagram shows a top view of the capacitor fabricated using the method described in the image.

[0061] Explanation of reference numerals in the attached figures:

[0062] 1-Electrode layer, 11-First electrode layer, 12-Second electrode layer, 2-Lower electrode layer, 3-Capacitor dielectric layer, 4-Upper electrode layer. Detailed Implementation

[0063] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate preferred embodiments of the application. However, this application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0064] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0065] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, etc., may be used to describe various elements, parts, regions, layers, doping types, and / or portions, these elements, parts, regions, layers, doping types, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, part, region, layer, doping type, or portion from another element, part, region, layer, doping type, or portion. Therefore, without departing from the teachings of this invention, the first element, component, region, layer, doping type, or portion discussed below may be represented as a second element, component, region, layer, or portion; for example, the first electrode layer may be referred to as the second electrode layer, and similarly, the second electrode layer may be referred to as the first electrode layer; the first electrode layer and the second electrode layer are different electrode layers.

[0066] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein to describe the relationship between one element or feature shown in the figures and other elements or features. It should be understood that, in addition to the orientation shown in the figures, spatial relation terms also include different orientations of the device in use and operation. For example, if the device in the figures is flipped, the element or feature described as “below,” “under,” or “below” will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both upper and lower orientations. Furthermore, the device may also include other orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptive terms used herein will be interpreted accordingly.

[0067] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that when the terms “comprise” and / or “comprising” are used in this specification, the presence of the stated feature, integer, step, operation, element, and / or part is established, but the presence or addition of one or more other features, integers, steps, operations, elements, parts, and / or groups is not excluded. Meanwhile, when used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0068] Embodiments of the invention are described herein with reference to cross-sectional views that serve as schematic diagrams of ideal embodiments (and intermediate structures), thus allowing for the anticipation of variations in the illustrated shapes due to, for example, manufacturing techniques and / or tolerances. Therefore, embodiments of the invention should not be limited to the specific shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing techniques. Consequently, the regions shown in the figures are substantially schematic, and their shapes do not represent the actual shapes of regions of the device, nor do they limit the scope of the invention.

[0069] Please see Figure 1 and Figure 2 The present invention provides a method for preparing an electrode layer, wherein the method for preparing electrode layer 1 includes the following steps:

[0070] S11: Forming a first electrode layer 11, the first electrode layer 11 including a doped titanium nitride layer;

[0071] S12: A second electrode layer 12 is formed on the surface of the first electrode layer 11. The second electrode layer 12 includes a titanium nitride layer or a work function layer.

[0072] In one embodiment, the prepared second electrode layer 12 can be a titanium nitride layer. In this case, the electrode layer 1 is a stacked structure comprising a doped titanium nitride layer and a titanium nitride layer. Since the doped titanium nitride layer has more than twice the mechanical strength of a single titanium nitride layer, and the electrode layer 1 is a stacked structure comprising a first electrode layer 11 and a second electrode layer 12, the mechanical strength of the electrode layer 1 can be significantly increased, preventing collapse due to stress when the electrode layer 1 is used as the lower electrode layer of a capacitor. However, the introduction of the doped titanium nitride layer leads to a significant increase in the resistivity of the electrode layer 1 compared to a single titanium nitride layer, thereby affecting the conductivity of the electrode layer.

[0073] In another embodiment, the prepared second electrode layer 12 can be a work function layer. In this case, the electrode layer 1 is a stacked structure including a doped titanium nitride layer and a work function layer. Since the doped titanium nitride layer has more than twice the mechanical strength of the titanium nitride layer, and the electrode layer 1 is a stacked structure including a first electrode layer 11 and a second electrode layer 12, the mechanical strength of the electrode layer 1 can be significantly increased. When the electrode layer 1 is used as the lower electrode layer of a capacitor, it can prevent collapse due to stress. At the same time, since the electrode layer 1 includes a work function layer, the presence of the work function layer can reduce the resistivity of the electrode layer, improve the conductivity of the electrode layer, and meet the requirements of the electrode layer 1 in terms of effective work function and interface compatibility with the dielectric layer, thereby reducing leakage current and increasing capacitance.

[0074] For step S11, in one embodiment, step S11 employs an atomic layer deposition process to form the first electrode layer 11. The process of forming the first electrode layer 11 using atomic layer deposition includes at least one titanium nitride doped growth cycle; please refer to [link to relevant documentation]. Figure 3 The growth cycle of the doped titanium nitride includes:

[0075] S111: Provide a titanium precursor to form a titanium precursor layer; specifically, the first electrode layer 11 can be formed on the inner wall of the capacitor hole. At this time, a titanium precursor can be provided into the capacitor hole to form a titanium precursor on the inner wall of the capacitor hole.

[0076] S112: Provide a dopant precursor to the surface of the titanium precursor layer to adsorb dopants on the surface of the titanium precursor layer;

[0077] S113: Provide a first reaction gas to the surface of the titanium precursor layer on which the dopant is adsorbed to form a sub-doped titanium nitride layer.

[0078] In the electrode layer preparation method provided in the above embodiments, after forming the titanium precursor layer, a dopant precursor is introduced to adsorb the dopant onto the surface of the titanium precursor layer; then, a first reaction gas is introduced. Since the dopant precursor can only adhere to the surface in small quantities by filling the gaps between the atoms of the titanium precursor atomic capping layer, each titanium precursor layer can generate a sub-doped titanium nitride layer with a small amount of dopant. In this process, the dopant is more uniformly distributed throughout the entire sub-doped titanium nitride layer, achieving the purpose of uniform doping.

[0079] In one embodiment, a cleaning step is included between steps S111 and S112, between steps S112 and S113, and after step S113. Specifically, a cleaning gas can be introduced into the capacitor hole to remove excess titanium precursor, excess dopant precursor, and excess first reaction gas to achieve cleaning. The cleaning gas may include, but is not limited to, nitrogen or inert gas.

[0080] In one embodiment, the titanium precursor may include, but is not limited to, titanium tetrachloride (TiCl4). This embodiment does not limit the type of titanium precursor.

[0081] In one embodiment, the dopant precursor may include, but is not limited to, dichlorosilane (DCS), silane (SiH4), tetra-dimethylaminosilane (SiH(NMe2)3, TDMAS) or combinations thereof. This embodiment does not limit the type of dopant precursor.

[0082] In one embodiment, the first reacting gas may be at least one of ammonia (NH3), nitric oxide (NO), nitrous oxide (N2O), and nitrogen (N2). This embodiment does not limit the specific type of the first reacting gas.

[0083] In one embodiment, see Figure 4 The formation of the first electrode layer 11 using atomic layer deposition (ALD) involves multiple titanium nitride doping growth cycles. That is, the formed first electrode layer 11 can include multiple sequentially stacked sub-titanium nitride doped layers. The specific number of titanium nitride doping growth cycles can be set as needed and is not limited here. For example, the formation of the first electrode layer 11 can include 2 to 100 titanium nitride doping growth cycles. Specifically, it can include 2, 10, 20, 30, 40, 50, 60, 70, 80, 90, 100, or even more titanium nitride doping growth cycles.

[0084] In another embodiment, please refer to Figure 5 and Figure 6The process further includes a step of forming at least one titanium nitride layer using atomic layer deposition before the first titanium nitride growth cycle, before the last titanium nitride growth cycle, and / or between at least two adjacent titanium nitride growth cycles; that is, the first electrode layer 11 is a stacked structure comprising multiple sub-doped titanium nitride layers and at least one titanium nitride layer; wherein... Figure 5 In the first electrode layer 11, there are multiple layers of titanium nitride arranged at intervals, and multiple sub-doped titanium nitride layers are provided between adjacent titanium nitride layers; Figure 6 In the first electrode layer 11, there are multiple sub-doped titanium nitride layer stacked structures formed by sequentially stacking multiple sub-doped titanium nitride layers, and multiple titanium nitride layer stacked structures formed by sequentially stacking multiple titanium nitride layers, with the titanium nitride layer stacked structures and the sub-doped titanium nitride layer stacked structures being stacked alternately; the titanium nitride layer is formed using an atomic deposition process including:

[0085] A titanium precursor is provided to the surface of the sub-doped titanium nitride layer to form a titanium precursor layer on the surface of the sub-doped titanium nitride layer;

[0086] A first reactive gas is provided to the surface of the titanium precursor layer to form the titanium nitride layer.

[0087] In the electrode layer preparation method provided in the above embodiments, a first electrode layer 11 of the required thickness is generated by repeatedly depositing sub-doped titanium nitride layers, so that the dopant can be more uniformly distributed throughout the first electrode layer 11 during the deposition process, thereby achieving the purpose of uniform doping.

[0088] In one embodiment, a cleaning step is included both after forming the titanium precursor layer and before providing the first reactant gas, and after forming the titanium nitride layer. Specifically, a cleaning gas can be introduced into the surface of the sub-doped titanium nitride layer to remove excess titanium precursor and excess first reactant gas, thereby achieving cleaning. The cleaning gas may include, but is not limited to, nitrogen or an inert gas.

[0089] In one embodiment, the dopant content can be appropriately controlled within the desired low doping range by adjusting the ratio and sequence of the doped titanium nitride growth cycle and titanium nitride layers. This embodiment does not limit the ratio and sequence of the doped titanium nitride growth cycle and titanium nitride layers. The low doping range is 1%-10%, specifically 3%, 5%, 7%, etc. This embodiment does not limit the doping content of the dopant.

[0090] Specifically, in one embodiment, the dopant in the doped titanium nitride layer may include at least one of silicon, boron, aluminum, zirconium, hafnium, phosphorus, carbon, gallium, germanium, antimony, tellurium, arsenic and tungsten. In this embodiment, the dopant is silicon.

[0091] For step S12, in one embodiment, step S12 employs atomic layer deposition (ALD) to form the second electrode layer 12. When the second electrode layer 12 is a titanium nitride layer, the process of forming the second electrode layer 12 using ALD includes at least one titanium nitride growth cycle. Please refer to [link to relevant documentation]. Figure 7 The titanium nitride growth cycle includes:

[0092] A titanium precursor is provided to the surface of the first electrode layer 11 to form a titanium precursor layer;

[0093] A first reactive gas is provided to the surface of the titanium precursor layer to form a sub-titanium nitride layer.

[0094] In one embodiment, a cleaning step is included both after forming the titanium precursor layer and before providing the first reactant gas, and after forming the titanium nitride layer. Specifically, a cleaning gas can be introduced into the surface of the sub-doped titanium nitride layer to remove excess titanium precursor and excess first reactant gas, thereby achieving cleaning. The cleaning gas may include, but is not limited to, nitrogen or an inert gas.

[0095] For step S12, in one embodiment, step S12 uses atomic layer deposition to form a second electrode layer 12. When the second electrode layer 12 is a work function layer, the work function layer includes a ruthenium layer or a ruthenium oxide layer. The process of forming the second electrode layer 12 using atomic layer deposition includes at least one work function layer growth cycle, the work function layer growth cycle including:

[0096] A ruthenium precursor is provided to the surface of the first electrode layer 11 to form a ruthenium precursor layer;

[0097] A second reactive gas is provided to the surface of the ruthenium precursor layer to form a subwork function layer.

[0098] In one embodiment, a cleaning step is included both after forming the ruthenium precursor layer and before providing the second reactant gas, and after forming the sub-power function layer. Specifically, a cleaning gas can be introduced into the surface of the first electrode layer 11 to remove excess ruthenium precursor and excess second reactant gas, thereby achieving cleaning. The cleaning gas may include, but is not limited to, nitrogen or an inert gas.

[0099] In one embodiment, the ruthenium precursor may include, but is not limited to, ruthenium trichloride (RuCl3). This embodiment does not limit the type of ruthenium precursor.

[0100] Specifically, the number of first electrode layers 11 and second electrode layers 12 in electrode layer 1 can be set according to actual needs and is not limited here. For example, the number of first electrode layers 11 and second electrode layers 12 in electrode layer 1 can both be one layer, such as... Figure 2As shown; of course, in other embodiments, after step S12, the method further includes: repeating steps S11 and S12 at least once, so that at least one of the number of layers of the first electrode layer 11 and the number of layers of the second electrode layer 12 in the formed electrode layer 1 can be multiple layers, in which case the first electrode layer 11 and the second electrode layer 12 are stacked alternately in sequence.

[0101] It should be further noted that in other embodiments, the order of steps S11 and S12 can be interchanged. That is, in other embodiments, the second electrode layer can be formed on the inner wall of the capacitor hole first, and then the first electrode layer can be formed on the surface of the second electrode layer.

[0102] Please continue reading. Figures 2 to 6 This application also provides an electrode layer 1, which includes:

[0103] First electrode layer 11, the first electrode layer 11 includes a doped titanium nitride layer;

[0104] The second electrode layer 12 is located on the surface of the first electrode layer 11, and the second electrode layer 12 includes a titanium nitride layer or a work function layer.

[0105] In one embodiment, the second electrode layer 12 can be a titanium nitride layer. In this case, the electrode layer 1 is a stacked structure comprising a doped titanium nitride layer and a titanium nitride layer. Since the doped titanium nitride layer has more than twice the mechanical strength of a single titanium nitride layer, and the electrode layer 1 is a stacked structure comprising a first electrode layer 11 and a second electrode layer 12, the mechanical strength of the electrode layer 1 can be significantly increased, preventing collapse due to stress when the electrode layer 1 is used as the lower electrode layer of a capacitor. However, the introduction of the doped titanium nitride layer causes the resistivity of the electrode layer 1 to increase significantly compared to the resistivity of a single titanium nitride layer, thereby affecting the conductivity of the electrode layer.

[0106] In another embodiment, the second electrode layer 12 can be a work function layer. In this case, the electrode layer 1 is a stacked structure including a doped titanium nitride layer and a work function layer. Since the doped titanium nitride layer has more than twice the mechanical strength of a standard titanium nitride layer, and the electrode layer 1 is a stacked structure including a first electrode layer 11 and a second electrode layer 12, the mechanical strength of the electrode layer 1 can be significantly increased. When the electrode layer 1 is used as the lower electrode layer of a capacitor, it can prevent collapse due to stress. At the same time, since the electrode layer 1 includes a work function layer, the presence of the work function layer can reduce the resistivity of the electrode layer, improve the conductivity of the electrode layer, and meet the requirements of the electrode layer 1 in terms of effective work function and interface compatibility with the dielectric layer, thereby reducing leakage current and increasing capacitance.

[0107] Specifically, in one embodiment, please refer to Figure 4 The first electrode layer 11 includes multiple layers of sub-doped titanium nitride stacked sequentially.

[0108] In another embodiment, such as Figure 5 As shown, the first electrode layer 11 includes multiple layers of titanium nitride arranged at intervals, and multiple sub-doped titanium nitride layers are provided between adjacent titanium nitride layers.

[0109] In yet another embodiment, such as Figure 6 As shown, the first electrode layer 11 includes multiple sub-doped titanium nitride layer stacked structures formed by sequentially stacking multiple sub-doped titanium nitride layers and multiple titanium nitride layer stacked structures formed by sequentially stacking multiple titanium nitride layers, with the titanium nitride layer stacked structures and the sub-doped titanium nitride layer stacked structures being stacked alternately in sequence.

[0110] The content of dopant can be appropriately controlled within the required low doping range by adjusting the ratio and sequence of the growth cycle and the titanium nitride layers of the doped titanium nitride. In this embodiment, the growth cycle and the ratio and sequence of the titanium nitride layers of the doped titanium nitride are not limited.

[0111] Specifically, in one embodiment, the dopant in the titanium nitride layer includes at least one of silicon, boron, aluminum, zirconium, hafnium, phosphorus, carbon, gallium, germanium, antimony, tellurium, arsenic and tungsten.

[0112] In one embodiment, the second electrode layer 12 includes multiple layers of titanium nitride stacked sequentially or multiple layers of work function stacked sequentially.

[0113] Specifically, in one embodiment, the work function layer includes a ruthenium layer or a ruthenium oxide layer.

[0114] In one embodiment, the electrode layer has a stacked structure. Specifically, the number of first electrode layers 11 and second electrode layers 12 in electrode layer 1 can be set according to actual needs and is not limited here. For example, the number of first electrode layers 11 and second electrode layers 12 in electrode layer 1 can both be a single layer, such as... Figure 2 As shown; of course, in other embodiments, at least one of the number of layers of the first electrode layer 11 and the number of layers of the second electrode layer 12 in the electrode layer 1 can be multiple layers, in which case the first electrode layer 11 and the second electrode layer 12 are stacked alternately in sequence.

[0115] Please see Figure 8 and Figure 9 This application also provides a method for manufacturing a capacitor, comprising the following steps:

[0116] S21: A lower electrode layer 2 is formed on the sidewall and bottom of the capacitor hole. The lower electrode layer 2 is prepared by the electrode layer preparation method described in any of the above embodiments; that is, the lower electrode layer 2 in this embodiment includes the first electrode layer 11 and the second electrode layer 12 in the above embodiments.

[0117] S22: A capacitor dielectric layer 3 is formed on the inner and outer surfaces of the lower electrode layer 2;

[0118] S23: An upper electrode layer 4 is formed on the surface of the capacitor dielectric layer 3.

[0119] Specifically, the methods for forming capacitor holes, forming capacitor dielectric layer 3 on the inner and outer surfaces of the lower electrode layer 2, and forming upper electrode layer 4 on the surface of capacitor dielectric layer 3 are known to those skilled in the art and will not be described in detail here.

[0120] Please continue reading Figure 9 This application also provides a capacitor, comprising:

[0121] The lower electrode layer 2 includes the electrode layer described in any of the above embodiments; that is, the lower electrode layer 2 in this embodiment includes the first electrode layer 11 and the second electrode layer 12 in the above embodiments.

[0122] The capacitor dielectric layer 3 is located on the inner and outer surfaces of the lower electrode layer 2;

[0123] The upper electrode layer 4 is located on the surface of the capacitor dielectric layer 3.

[0124] Please see Figure 10 This application also provides a method for manufacturing a capacitor, comprising the following steps:

[0125] S31: A lower electrode layer 2 is formed in the capacitor hole, and the lower electrode layer 2 fills the capacitor hole. The lower electrode layer 2 is prepared by the electrode layer preparation method described in any of the above embodiments; that is, the lower electrode layer 2 in this embodiment includes the first electrode layer 11 and the second electrode layer 12 in the above embodiments.

[0126] S32: A capacitor dielectric layer 3 is formed on the outer surface of the lower electrode layer 2;

[0127] S33: An upper electrode layer 4 is formed on the outer surface of the capacitor dielectric layer 3.

[0128] Specifically, the methods for forming capacitor holes, forming capacitor dielectric layer 3 on the inner and outer surfaces of the lower electrode layer 2, and forming upper electrode layer 4 on the surface of capacitor dielectric layer 3 are known to those skilled in the art and will not be described in detail here.

[0129] Please see Figure 11 This application also provides a capacitor, comprising:

[0130] The lower electrode layer 2 includes a solid columnar structure; the lower electrode layer 2 includes the electrode layer described in any of the above embodiments; that is, the lower electrode layer 2 in this embodiment includes the first electrode layer 11 and the second electrode layer 12 in the above embodiments.

[0131] The capacitor dielectric layer 3 is located on the outer surface of the lower electrode layer 2;

[0132] The upper electrode layer 4 is located on the outer surface of the capacitor dielectric layer 3.

[0133] It should be understood that, although Figure 1 , Figure 3 , Figure 7 , Figure 8 and Figure 10 The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order in which these steps are executed, and they can be performed in other orders. Figure 1 , Figure 3 , Figure 7 , Figure 8 and Figure 10 At least some of the steps in the process may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but may be executed at different times. The execution order of these steps or stages is not necessarily sequential, but may be executed in turn or alternately with other steps or at least some of the steps or stages in other steps.

[0134] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0135] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A method for preparing an electrode layer, characterized in that, Includes the following steps: A first electrode layer is formed, the first electrode layer comprising a doped titanium nitride layer; A second electrode layer is formed on the surface of the first electrode layer, the second electrode layer including a work function layer; when the second electrode layer is a work function layer, the work function layer includes a ruthenium layer or a ruthenium oxide layer; the second electrode layer is formed using an atomic layer deposition process, the process of forming the second electrode layer using an atomic layer deposition process includes at least one work function layer growth cycle, the work function layer growth cycle including: A ruthenium precursor is provided to the surface of the first electrode layer to form a ruthenium precursor layer; A second reactive gas is provided to the surface of the ruthenium precursor layer to form a sub-work function layer; after forming the second electrode layer, the method further includes: repeating the above steps at least once to form a stacked structure comprising multiple layers of the first electrode layer and multiple layers of the second electrode layer, wherein the first electrode layer and the second electrode layer are stacked alternately in the stacked structure.

2. The method for preparing the electrode layer according to claim 1, characterized in that, The first electrode layer is formed using atomic layer deposition (ALD). The formation of the first electrode layer using ALD includes at least one titanium nitride doping growth cycle, wherein the titanium nitride doping growth cycle includes: Provide titanium precursors to form titanium precursor layers; A dopant precursor is provided to the surface of the titanium precursor layer to adsorb dopants onto the surface of the titanium precursor layer; A first reactive gas is provided to the surface of the titanium precursor layer on which the dopant is adsorbed to form a sub-doped titanium nitride layer.

3. The method for preparing the electrode layer according to claim 2, characterized in that, The process of forming the first electrode layer using atomic layer deposition includes multiple titanium nitride growth cycles. Before the first titanium nitride growth cycle, before the last titanium nitride growth cycle, and / or between at least two adjacent titanium nitride growth cycles, the process also includes the step of forming at least one titanium nitride layer using atomic layer deposition. The titanium nitride layer is formed using an atomic deposition process, including: A titanium precursor is provided to the surface of the sub-doped titanium nitride layer to form a titanium precursor layer on the surface of the sub-doped titanium nitride layer; A first reactive gas is provided to the surface of the titanium precursor layer to form the titanium nitride layer.

4. The method for preparing the electrode layer according to claim 1, characterized in that, The dopant in the doped titanium nitride layer includes at least one of silicon, boron, aluminum, zirconium, hafnium, phosphorus, carbon, gallium, germanium, antimony, tellurium, arsenic and tungsten.

5. The method for preparing the electrode layer according to claim 1, characterized in that, When the second electrode layer is a titanium nitride layer, it is formed using atomic layer deposition (ALD). The formation of the second electrode layer using ALD includes at least one titanium nitride growth cycle, which includes: A titanium precursor is provided to the surface of the first electrode layer to form a titanium precursor layer; A first reactive gas is provided to the surface of the titanium precursor layer to form a sub-titanium nitride layer.

6. An electrode layer, characterized in that, include: A first electrode layer, the first electrode layer comprising a doped titanium nitride layer; The second electrode layer is located on the surface of the first electrode layer. The second electrode layer includes a work function layer. The work function layer includes a ruthenium layer or a ruthenium oxide layer. The electrode layer has a stacked structure, which includes multiple layers of the first electrode layer and multiple layers of the second electrode layer, wherein the first electrode layer and the second electrode layer are alternately stacked.

7. The electrode layer according to claim 6, characterized in that, The first electrode layer comprises multiple layers of sub-doped titanium nitride stacked sequentially.

8. The electrode layer according to claim 7, characterized in that, A titanium nitride layer is further provided below the bottom sub-doped titanium nitride layer, above the top sub-doped titanium nitride layer, and / or between at least two adjacent sub-doped titanium nitride layers.

9. The electrode layer according to claim 6, characterized in that, The second electrode layer comprises multiple layers of titanium nitride stacked sequentially or multiple layers of work function stacked sequentially.

10. The electrode layer according to claim 6, characterized in that, The dopant in the doped titanium nitride layer includes at least one of silicon, boron, aluminum, zirconium, hafnium, phosphorus, carbon, gallium, germanium, antimony, tellurium, arsenic and tungsten.

11. A method for manufacturing a capacitor, characterized in that, include: A lower electrode layer is formed on the sidewall and bottom of the capacitor hole, and the lower electrode layer is prepared by the electrode layer preparation method according to any one of claims 1 to 5; A capacitor dielectric layer is formed on the inner and outer surfaces of the lower electrode layer; An upper electrode layer is formed on the surface of the capacitor dielectric layer.

12. A capacitor, characterized in that, include: A lower electrode layer, wherein the lower electrode layer comprises the electrode layer as described in any one of claims 6 to 10; A capacitor dielectric layer is located on the inner and outer surfaces of the lower electrode layer; The upper electrode layer is located on the surface of the capacitor dielectric layer.

13. A method for manufacturing a capacitor, characterized in that, include: A lower electrode layer is formed inside the capacitor hole, the lower electrode layer filling the capacitor hole, and the lower electrode layer is prepared by the electrode layer preparation method according to any one of claims 1 to 7; A capacitor dielectric layer is formed on the outer surface of the lower electrode layer; An upper electrode layer is formed on the outer surface of the capacitor dielectric layer.

14. A capacitor, characterized in that, include: A lower electrode layer, the lower electrode layer comprising a solid columnar structure; the lower electrode layer comprising an electrode layer as described in any one of claims 6 to 10; A capacitor dielectric layer is located on the outer surface of the lower electrode layer; The upper electrode layer is located on the outer surface of the capacitor dielectric layer.

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