Electronic device

Abstract

This invention provides an electronic device comprising: a first substrate, the first substrate including a first surface and a first side surface adjacent to the first surface; a second substrate, the second substrate including a second surface and a second side surface adjacent to the second surface; a plurality of first conductive lines disposed on the first surface; a plurality of baffles disposed on the first surface and respectively located between any two adjacent first conductive lines; and a plurality of second conductive lines disposed on the first side surface and the second side surface. The plurality of first conductive lines are electrically connected to the plurality of second conductive lines.

Description

Technical Field

[0001] This invention relates to an electronic device, and more particularly to an electronic device having a barrier structure. Background Technology

[0002] In recent years, frameless electronic devices have become a target for next-generation electronic technology. However, during the manufacturing process of frameless electronic devices, problems such as short circuits between wires may occur, leading to a decrease in the quality of the devices. Therefore, improving the manufacturing process of frameless electronic devices is one of the development directions in related fields. Summary of the Invention

[0003] The present invention provides an electronic device, wherein the electronic device includes a barrier structure to reduce short circuits between wires, thereby improving the quality of the electronic device.

[0004] In some embodiments, the present invention provides an electronic device. The electronic device includes a first substrate, the first substrate including a first surface and a first side surface adjacent to the first surface; a second substrate, the second substrate including a second surface and a second side surface adjacent to the second surface; a plurality of first conductive lines disposed on the first surface; a plurality of baffles disposed on the first surface and respectively located between any two adjacent first conductive lines; and a plurality of second conductive lines disposed on the first and second side surfaces. The plurality of first conductive lines are electrically connected to the plurality of second conductive lines. The distance between two adjacent baffles in the plurality of baffles is less than the width of the second conductive lines.

[0005] In some embodiments, the present invention provides an electronic device. The electronic device includes a first substrate, the first substrate including a first surface and a first side surface adjacent to the first surface; a second substrate, the second substrate including a second surface and a second side surface adjacent to the second surface; a plurality of first conductive lines disposed on the first surface; a plurality of first baffles disposed on the first side surface and the second side surface and respectively located between any two adjacent second conductive lines; and a plurality of second conductive lines disposed on the first side surface and the second side surface. The plurality of first conductive lines are electrically connected to the plurality of second conductive lines. Attached Figure Description

[0006] Figure 1 This is a cross-sectional schematic diagram of an electronic device according to the first embodiment of the present invention.

[0007] Figure 2 This is a top view of the first substrate of the electronic device according to the first embodiment of the present invention.

[0008] Figure 3A This is a partial top view of the first substrate of the electronic device according to the first embodiment of the present invention during the side printing process.

[0009] Figure 3B This is a partial side view of the electronic device according to the first embodiment of the present invention during the side printing process.

[0010] Figure 4A This is a partial top view of the first substrate of the electronic device according to the second embodiment of the present invention.

[0011] Figure 4B This is a partial top view of the first substrate of the electronic device according to the second embodiment of the present invention during the side printing process.

[0012] Figure 5 This is a partial top view of the first substrate of the electronic device according to the third embodiment of the present invention during the side printing process.

[0013] Figure 6 This is a partial top view of the first substrate of the electronic device according to the fourth embodiment of the present invention during the side printing process.

[0014] Figure 7A This is a partial top view of the first substrate of the electronic device according to the fifth embodiment of the present invention.

[0015] Figure 7B This is a partial side view of an electronic device according to the fifth embodiment of the present invention.

[0016] Figure 8A This is a partial top view of the first substrate of the electronic device according to the sixth embodiment of the present invention.

[0017] Figure 8B This is a partial side view of an electronic device according to the sixth embodiment of the present invention.

[0018] Figure 9A This is a partial top view of the first substrate of the electronic device according to the seventh embodiment of the present invention during the side printing process.

[0019] Figure 9B This is a partial side view schematic diagram of the electronic device according to the seventh embodiment of the present invention during the side printing process.

[0020] Figure 10A This is a partial top view of the electronic device according to the eighth embodiment of the present invention during the side printing process.

[0021] Figure 10B This is a partial side view of the electronic device according to the eighth embodiment of the present invention during the side printing process.

[0022] Figure 11A This is a partial top view of the electronic device according to the ninth embodiment of the present invention during the side printing process.

[0023] Figure 11BThis is a partial side view schematic diagram of the electronic device according to the ninth embodiment of the present invention during the side printing process.

[0024] Explanation of reference numerals: 100, 200, 300, 400, 500, 600, 700, 800, 900 - Electronic devices; A1, AR - Arrows; CF - Color filter unit; CFL - Color filter layer; CP - Cut section; CTL - Center line; CW1, CW1-1, CW1-2 - First conductor; CW2, CW21, CW22, CW23, CW24 - Second conductor; DB - Barrier fence; DW, DW-1, DW-2, DW-3, DW-4, DW-5, DW-6 - Barrier; DW1 - First barrier; DW2 - Second barrier; DW3 - Third barrier; DWS - Outer surface; F L1 - First functional layer; FL1-1, FL2-1, ES - Surface; FL2 - Second functional layer; GP - Gap; H1, H2, H3, H4 - Thickness; P1, P2, P3, P4, P5 - Part; PA - Pixel area; PDM - Initial barrier; PSB - Initial substrate; R0 - Area; RS - Outer surface; S1, S3 - Space; SB1 - First substrate; SB2 - Second substrate; SF1 - First surface; SF2 - Second surface; SSF1 - First side surface; SSF2 - Second side surface; VA - Through-hole; VE - Vacuum device; W1 - Distance; W2 - Width; WR - Trace; X, Y, Z - Direction. Detailed Implementation

[0025] The present invention can be understood by referring to the following detailed description in conjunction with the accompanying drawings. It should be noted that, for ease of understanding and for the sake of brevity, the various drawings in this invention depict only a portion of the electronic device. Furthermore, the number and dimensions of the components in the drawings are for illustrative purposes only and are not intended to limit the scope of the invention.

[0026] Throughout this specification and claims, certain terms are used to refer to specific elements. Those skilled in the art will understand that electronic device manufacturers may use different names to refer to the same elements. This document is not intended to distinguish between elements that function identically but have different names.

[0027] In the following description and claims, the words "containing" and "including" are open-ended terms, and therefore should be interpreted as "containing but not limited to...".

[0028] It should be understood that when an element or membrane is referred to as being "set on" or "connected to" another element or membrane, it can be directly on or directly connected to that other element or membrane, or there may be an inserted element or membrane between them (in the indirect case). Conversely, when an element is referred to as being "directly on" or "directly connected to" another element or membrane, there may be no inserted element or membrane between them.

[0029] Although the terms "first," "second," "third," etc., can be used to describe multiple components, the components are not limited to these terms. These terms are used only to distinguish a single component from other components in the specification. The same terms may not be used in the claims, but rather replaced by "first," "second," "third," etc., according to the order of the elements declared in the claims. Therefore, in the following description, a first component may be a second component in the claims.

[0030] It should be understood that the technical features of several different embodiments can be replaced, reorganized, or mixed to complete other embodiments without departing from the spirit of the present invention.

[0031] Electronic devices may include, but are not limited to, display devices, backlight devices, antenna devices, sensing devices, or splicing devices. Electronic devices may be bendable or flexible. Display devices may be non-emissive or emissive. Antenna devices may be liquid crystal type or non-liquid crystal type antenna devices. Sensing devices may be sensing devices that sense capacitance, light, heat, or ultrasound, but are not limited to these. Electronic components may include passive and active components, such as capacitors, resistors, inductors, diodes, transistors, etc. Diodes may include light-emitting diodes (LEDs) or photodiodes. Light-emitting diodes may include, for example, organic light-emitting diodes (OLEDs), mini LEDs, micro LEDs, or quantum dot LEDs, but are not limited to these. Splicing devices may be, for example, display splicing devices or antenna splicing devices, but are not limited to these. It should be noted that electronic devices may be any combination of the foregoing, but are not limited to these. The present invention will be described below using display devices as electronic devices or splicing devices, but the present invention is not limited thereto.

[0032] Please refer to Figure 1 and Figure 2 , Figure 1 This is a cross-sectional schematic diagram of the electronic device according to the first embodiment of the present invention.

[0033] Figure 2This is a top view schematic diagram of the first substrate of the electronic device according to the first embodiment of the present invention. It should be noted that...

[0034] Figure 1 The cross-sectional schematic diagram of the electronic device 100 shown can be seen from... Figure 2 The arrow A1 shown is observed, but is not limited to this. In this embodiment, as... Figure 1As shown, the electronic device 100 may include a first substrate SB1, a second substrate SB2, a first functional layer FL1, and a second functional layer FL2, but is not limited thereto. The first substrate SB1 has a first surface SF1, a first side surface SSF1 adjacent to the first surface SF1, and an outer surface RS opposite to the first surface SF1. For example, the first side surface SSF1 is located between the first surface SF1 and the outer surface RS. The second substrate SB2 has a second surface SF2 and a second side surface SSF2 adjacent to the second surface SF2. For example, the second surface SF2 may be connected to the second side surface SSF2. The first substrate SB1 and the second substrate SB2 are disposed opposite to each other. The first substrate SB1 and the second substrate SB2 may include rigid substrates or flexible substrates. The rigid substrate may include glass, quartz, sapphire, ceramic, other suitable materials, or combinations thereof. The flexible substrate may include a polyimide (PI) substrate, a polycarbonate (PC) substrate, a polyethylene terephthalate (PET) substrate, other suitable substrates, or combinations thereof, but is not limited thereto. A first functional layer FL1 may be disposed on the first substrate SB1. Specifically, the first functional layer FL1 may be disposed on the first surface SF1 (i.e., the inner surface) of the first substrate SB1. In this embodiment, the first functional layer FL1 may include a plurality of driving elements and / or driving circuits (e.g., thin film transistor (TFT) elements) electrically connected to the light-emitting elements of the electronic device 100 to drive the plurality of light-emitting elements, but is not limited thereto. For example, when the electronic device 100 is a light-emitting diode (LED) display device, the electronic device 100 may include a plurality of LEDs as light-emitting elements, and the driving elements and / or driving circuits in the first functional layer FL1 may be electrically connected to the plurality of LEDs to drive the plurality of LEDs to emit light, but this is not a limitation. The second functional layer FL2 is disposed on the second substrate SB2. Specifically, the second functional layer FL2 is disposed on the second surface SF2 (i.e., the inner surface) of the second substrate SB2. In this embodiment, the second functional layer FL2 may include a color filter unit, a black matrix layer, and / or a pixel definition layer, but this is not a limitation. In some embodiments, when the electronic device 100 includes a liquid crystal display (LCD), the second functional layer FL2 may also include a common electrode, but this is not a limitation. It should be noted that although the first functional layer FL1 and the second functional layer FL2 are in Figure 1 The images are shown as single film layers, but the invention is not limited thereto. In some embodiments, the first functional layer FL1 and the second functional layer FL2 may comprise a multilayer structure.

[0035] According to this embodiment, as Figure 2 As shown, the electronic device 100 may be, for example, a borderless device, meaning that the electronic device 100 may not include an outer lead bonding area, or the peripheral contact area of ​​the electronic device 100 may be located on the side surface of a substrate (e.g., the first substrate SB), but is not limited thereto. Figure 2 As shown, the electronic device 100 may include multiple pixel regions PA and multiple traces WR, wherein the pixel regions PA and traces WR may be located, for example, on the first substrate SB1, but are not limited thereto. In this embodiment, the pixel region PA may be, for example, an area in the electronic device 100 used to display an image; for example, each pixel region PA may be a pixel or sub-pixel of the electronic device 100, but is not limited thereto. The pixel region PA may include, for example, the electronic components, driving components, and / or driving circuits mentioned above, but is not limited thereto. The electronic components may include light-emitting diodes in different pixel regions PA that emit light of the same color or different colors of light (e.g., red, green, and blue light, but are not limited thereto). The driving components and / or driving circuits may include thin-film transistor elements, such as top-gate thin-film transistors, bottom-gate thin-film transistors, multi-gate thin-film transistors, or combinations of thin-film transistors of the above types, but are not limited thereto. In some embodiments, since the electronic device 100 may be a borderless device, one or more pixel regions PA may further include gate drive circuitry (including displacement buffers and / or buffer layers), electrostatic discharge (ESD) protection elements (e.g., ESD diodes), inspection circuitry, signal monitoring lines, and / or other suitable elements, but are not limited thereto. The traces WR in this embodiment may include any suitable signal lines of the electronic device 100. For example, the traces WR may include power lines for light-emitting elements, gate drive circuitry, electrostatic discharge elements, data lines, scan lines, drive control signals, inspection lines, and / or other suitable signal lines, but are not limited thereto. The material of the traces WR may include, for example, copper, silver, gold, aluminum, other suitable conductive materials, or combinations thereof, but is not limited thereto. In some embodiments, the signal lines in the traces WR may be electrically connected to elements in the pixel region PA to transmit signals. For example, although... Figure 2 The connection scenario is not shown. Data lines or scan lines in the trace WR can be electrically connected to the driving elements in the pixel area PA to transmit driving signals, but this is not a limitation. It should be noted that although... Figure 2 Only traces WR extending in the X direction are shown, but the invention is not limited thereto. Electronic device 100 may include traces WR extending in the Y direction, such as scan lines, and pixel region PA may be defined as the region formed by the intersection of data lines and scan lines, but is not limited thereto. Figure 2The number, placement, and shape of each element or film layer shown (e.g., pixel area PA and trace WR) are merely illustrative and can be adjusted according to design requirements.

[0036] As described above, the electronic device 100 of the present invention can be a borderless device. Therefore, a side printing process is required to form contact between the traces WR and peripheral circuitry or connection pads (not shown in the figure), but this is not a limitation. In this embodiment, the peripheral circuitry and / or connection pads may be disposed on the outer surface RS of the first substrate SB1, but this is not a limitation. Therefore, as... Figure 1 and Figure 2 As shown, the electronic device 100 of the present invention may include a plurality of first conductive lines CW1 disposed on a first surface SF1 and a plurality of barrier walls DW disposed on one side of the electronic device 100. The electronic device 100 may undergo a side-printing process to form contacts between the first conductive lines CW1 and peripheral circuitry or connection pads (e.g., processing units, but not limited thereto), such that the first conductive lines CW1 can be electrically connected to the peripheral circuitry or connection pads at the outer surface RS of the first substrate SB1. In some embodiments, such as Figure 1 As shown, the barrier DW can be disposed between the first functional layer FL1 and the second functional layer FL2. The side-printing process can be performed, for example, by drawing traces on the side of the substrate using metal paste, wherein the metal paste can include any suitable metallic material, such as tin, silver, copper, gold, palladium, platinum, etc., but is not limited thereto. The description of the side-printing process applies to various embodiments of the present invention, and therefore will not be repeated below. Furthermore, it should be noted that although... Figure 2 The first conductor CW1 and the barrier DW shown are disposed on the lower side of the electronic device 100, but the present invention is not limited thereto. In some embodiments, the first conductor CW1 and the barrier DW may be disposed on one side or more sides of the electronic device 100.

[0037] According to this embodiment, the electronic device 100 includes multiple first conductors CW1 and multiple retaining walls DW disposed on one side of the electronic device 100, but is not limited thereto. Specifically, as... Figure 1 and Figure 2 As shown, the first conductor CW1 and the barrier DW are disposed on the first surface SF1 of the first substrate SB1, but are not limited thereto. The first side surface SSF1 and the second side surface SSF2 may be aligned with each other in the Z direction. In some embodiments, a functional layer (e.g., a first functional layer FL1) may be disposed between the first conductor CW1 and the first substrate SB1 and / or between the barrier DW and the first substrate SB1, but are not limited thereto. According to this embodiment, as Figure 1As shown, the retaining wall DW can be located between any two adjacent first conductors CW1, that is, the first conductors CW1 and the retaining wall DW are alternately arranged on the first surface SF1, so that the retaining wall DW can separate any two adjacent first conductors CW1, but is not limited thereto. For example, the first conductor CW1-1 is arranged between retaining walls DW-1 and DW-2, while the first conductor CW1-2 is arranged between retaining walls DW-2 and DW-3. In some embodiments, such as Figure 2 As shown, the barrier wall DW extends along direction X, and the outer surface DWS of the barrier wall DW can be substantially aligned with the first side surface SSF1. The material of the first conductor CW1 can be referenced to the material of the trace WR, and therefore will not be described again. In this embodiment, each barrier wall DW may include any suitable insulating material, for example, the barrier wall DW may include a pixel definition layer (PDL), color filter resin, silicone resin, epoxy resin, acrylic resin, other suitable insulating materials, or combinations of the above materials, but is not limited thereto. The electronic device 100 may include barrier wall DWs located between any two adjacent first conductors CW1, thereby reducing short circuits of the first conductors CW1 caused by abnormalities in the side printing process, thereby improving the quality of the electronic device 100. According to this embodiment, the barrier wall DW may be formed on the first surface SF1 by photolithography, inkjet printing, screen printing, dispenser drawing, or other suitable methods, but is not limited thereto.

[0038] The details of the side printing process will be described below. Furthermore, according to this embodiment, the thickness of the barrier wall DW can be greater than the thickness of the first conductor CW1, but is not limited thereto. Specifically, as... Figure 1 As shown, the first conductor CW1 may have a thickness H1 in the Z direction, while the retaining wall DW may have a thickness H2 in the Z direction, wherein the thickness H2 may be greater than the thickness H1, but is not limited thereto. In some embodiments, such as Figure 1 As shown, the thickness H2 of the barrier wall DW can be, for example, the same as the distance between the first functional layer FL1 disposed on the first substrate SB1 and the second functional layer FL2 disposed on the second substrate SB2, that is, the barrier wall DW can separate the first substrate SB1 and the second substrate SB2, while the thickness H1 of the first conductor CW1 can be less than the thickness H2, but is not limited thereto. It should be noted that... Figure 1The first functional layer FL1 and the second functional layer FL2 shown are not limited to a single-layer structure. For example, in some embodiments, the first functional layer FL1 and the second functional layer FL2 may each include a multi-layer structure, and the distance between the first functional layer FL1 and the second functional layer FL2 may be defined as the distance between the surfaces of the first functional layer FL1 and the second functional layer FL2 that are closest to each other, such as the distance between surface FL1-1 and surface FL2-1, but is not limited thereto. According to this embodiment, making the thickness H2 of the retaining wall DW greater than the thickness H1 of the first conductor CW1 can reduce the short circuit of the first conductor CW1 or reduce other unnecessary damage to the first conductor CW1 or the electronic device 100, but is not limited thereto. The thickness relationship between the first conductor CW1 and the retaining wall DW can be applied to various embodiments of the present invention, and will not be repeated below.

[0039] Please refer to Figure 3A and Figure 3B , Figure 3A This is a partial top view of the first substrate of the electronic device according to the first embodiment of the present invention during the side printing process. Figure 3B This is a partial side view schematic diagram of the electronic device according to the first embodiment of the present invention during the side printing process. For the sake of simplicity, [the accompanying drawings are omitted]. Figure 3A Only a portion of the first substrate SB1 of the electronic device 100 is shown, and other components of the electronic device 100 may be referred to above, but are not limited thereto. Figure 3A The structure shown can be Figure 2 The structures in region R0 shown are examples, but not limited to these. For example... Figure 3A and Figure 3B As shown, when performing a side printing process on the electronic device 100, according to some embodiments, the electronic device 100 may further include multiple second conductive lines CW2, each corresponding to a first conductive line CW1, but this is not a limitation. Specifically, as... Figure 3B As shown, during the side printing process, the second conductor CW2 can be disposed on the first side surface SSF1 of the first substrate SB1 and the second side surface SSF2 of the second substrate SB2, and the second conductor CW2 can be electrically connected to its corresponding first conductor CW1. For example, the first conductor CW1 can be electrically connected to peripheral circuits (e.g., processing units) and / or connection pads through the second conductor CW2, but this is not a limitation. In this embodiment, the peripheral circuits and / or connection pads can be disposed, for example, on the outer surface RS of the first substrate SB1, but this is not a limitation. In some embodiments, such as Figure 3AAs shown, the second conductor CW2 can extend on the first surface SF1 of the first substrate SB1 and cover a portion of the first conductor CW1, thereby improving the electrical connection between the first conductor CW1 and the second conductor CW2. That is, a portion of the second conductor CW2 extending on the first surface SF1 can be disposed on a portion of the first conductor CW1. The material of the second conductor CW2 can be referenced to the material of the first conductor CW1, and will not be described further here.

[0040] As mentioned above, during the side printing process of electronic device 100, some abnormal situations may occur, leading to a short circuit in the first conductive line CW1 of the prior art. Specifically, as... Figure 3A and Figure 3B As shown, Figure 3A The second conductor CW21 shown represents an ideal second conductor CW2 formed under normal process conditions, wherein the second conductor CW21 can be substantially aligned with its corresponding first conductor CW1, and the width of the second conductor CW21 can be substantially the same as the width of the first conductor CW1, but is not limited thereto. In some embodiments, a second conductor CW2 having a width slightly smaller than that of the first conductor CW1 can also be a normal second conductor CW21, i.e., a portion of the first conductor CW1 is... Figure 3B The second conductor CW21 may be exposed in the side view shown, but is not limited thereto. The width described above may be defined, for example, as the length along the Y direction, but is not limited thereto. The normal definition of the second conductor CW21 can be applied to various embodiments of the present invention, and will not be repeated below. Some anomalies that may occur in the side printing process will be described below, but the present invention is not limited thereto.

[0041] In some embodiments, wider second conductors CW2 may be generated during the side printing process, which is one of the aforementioned anomalies. Therefore, when the resolution requirements of the electronic device 100 increase, two adjacent wider second conductors CW2 in the prior art may come into contact with each other, causing a short circuit in the first conductor CW1. Specifically, as... Figure 3A and Figure 3B As shown, during the side printing process, a wider second conductor CW22 may be generated, where the width of the second conductor CW22 is greater than the width of the first conductor CW1. This reduces the distance between adjacent second conductors CW22, thereby increasing the possibility of a short circuit in the first conductor CW1. However, according to this embodiment, since the electronic device 100 includes a barrier DW disposed between any two adjacent first conductors CW1, the possibility of adjacent second conductors CW22 contacting each other can be reduced, thereby reducing the short circuit of the first conductor CW1. For example, from Figure 3AAs can be seen, even if the second conductor CW22 has a large width, two adjacent second conductors CW22 can be separated by a barrier DW (e.g., barrier DW-4) in the top view direction of the electronic device 100, thereby reducing the possibility of short circuits in the conductors (including the first conductor CW1 and the second conductor CW2), but this is not a limitation.

[0042] In some embodiments, the second conductor CW2 may be misaligned during the side printing process, which is one of the aforementioned anomalies. Therefore, when the resolution requirements of the electronic device 100 increase, it may lead to a short circuit in either the first conductor CW1 or the second conductor CW2. Specifically, as... Figure 3A and Figure 3B As shown, when the second conductor CW2 is offset, the second conductor CW2 formed by the side printing process can be represented as the second conductor CW23. The second conductor CW23 may not be aligned with its corresponding first conductor CW1, but may be located to the right (or left) of the center line CTL of its corresponding first conductor CW1, but is not limited thereto. In this case, the possibility of the second conductor CW23 contacting another first conductor CW1 adjacent to its corresponding first conductor CW1 may increase, or the possibility of the second conductor CW23 contacting another second conductor CW2 adjacent to it may increase, potentially increasing the possibility of a short circuit in the first conductor CW1 in a conventional display structure. However, according to the present invention, as... Figure 3A and Figure 3B As shown, since the electronic device 100 includes a barrier wall DW disposed between any two adjacent first conductors CW1, the offset second conductor CW23 can be blocked by the adjacent barrier wall DW (e.g., barrier wall DW-5) in the top view direction of the electronic device 100. Therefore, the contact between the second conductor CW23 and other first conductors CW1 or other second conductors CW2 can be reduced, and the short circuit of the first conductor CW1 can be reduced, but not limited thereto.

[0043] In some embodiments, when a side-printing process is performed on the electronic device 100, wherein the electronic device 100 has a small gap between substrates (e.g., a first substrate SB1 and a second substrate SB2), capillary action may occur in the area between the first substrate SB1 and the second substrate SB2, which is one of the aforementioned abnormalities. Therefore, when the resolution requirement of the electronic device 100 increases, it may cause a short circuit in the first conductive line CW1. Specifically, as... Figure 3A and Figure 3B As shown, when capillary action occurs during the side printing process, the metal paste used to form the second conductive line CW2 can be pulled into the electronic device 100 and fill the space between the first substrate SB1 and the second substrate SB2. Accordingly, the second conductive line CW2 formed in this situation can be represented as... Figure 3A and Figure 3B The second conductor CW24 is shown, but not limited to it. In this case, the distance between two adjacent second conductors CW24 can be reduced, increasing the likelihood of the second conductors CW24 contacting each other, and thus increasing the likelihood of a short circuit in the first conductor CW1. However, according to the present invention, as... Figure 3A and Figure 3B As shown, since the electronic device 100 includes a barrier DW disposed between any two adjacent first conductors CW1, the second conductor CW24 can be separated by the barrier DW (e.g., barrier DW-6) to reduce the possibility of the second conductors CW24 coming into contact with each other, thereby reducing the short circuit of the first conductors CW1, but not limited thereto.

[0044] As mentioned above, in the prior art, some abnormal situations may occur during the side printing process, causing the conductors formed by the side printing process to come into contact with each other, resulting in a decrease in the quality of the electronic device. However, since the electronic device 100 of the present invention includes a barrier wall DW, even if the second conductor CW2 is formed under abnormal conditions, the second conductor CW2 formed by the side printing process can be blocked by the barrier wall DW. Therefore, the possibility of the first conductor CW1 short-circuiting can be reduced by the barrier wall DW of the electronic device 100. It should be noted that... Figure 3A and Figure 3B The shape and width of the retaining wall DW shown are merely exemplary and are not intended to limit this embodiment. In some embodiments, the width of each retaining wall DW may differ from one another, and is not limited to these embodiments. Figure 3A The width of the retaining wall DW shown. For example, the width of each retaining wall DW can be greater than the distance between two adjacent first conductors CW1, such that each retaining wall DW can partially overlap its corresponding first conductor CW1 in the top view direction (direction Z) of the electronic device 100 (e.g., Figure 5 (As shown). Therefore, the distance between two adjacent retaining walls DW can be less than the width of their corresponding first conductor CW1 or less than the width of their corresponding second conductor CW2, but is not limited thereto.

[0045] Other embodiments of the present invention will be described in detail below. For the sake of simplicity, the same film layers or elements will be referred to by the same designations in the following embodiments, and their features will not be repeated. The differences between the embodiments will be described in detail below.

[0046] Please refer to Figure 4A and Figure 4B , Figure 4A This is a partial top view of the first substrate of the electronic device according to the second embodiment of the present invention. Figure 4B This is a partial top view of the first substrate of the electronic device according to a second embodiment of the present invention during the side printing process. (For simplicity, the accompanying drawings are omitted.) Figure 4A and Figure 4B Only a portion of the first substrate SB1 of the electronic device 200 is shown; other components of the electronic device 200 can be referenced from, but are not limited to, the electronic device 100 of the first embodiment. Furthermore, Figure 4A and Figure 4B The structure shown can be referenced. Figure 2 The region R0 is shown, but is not limited to this. Figure 4A and Figure 4B The electronic device 200 shown is Figure 1 One of the main differences in the illustrated electronic device 100 lies in the design of the barrier walls DW. According to this embodiment, the barrier walls DW of the electronic device 200 can, for example, be patterned, and each patterned barrier wall DW can partially overlap its corresponding first conductor CW1 in the top view direction of the electronic device (parallel to direction Z). For example, each patterned barrier wall DW can surround a portion of its corresponding first conductor CW1, but is not limited thereto. Specifically, as... Figure 4A and Figure 4B As shown, the manufacturing method of the barrier wall DW in this embodiment may include, for example, providing an initial substrate PSB including a first substrate SB1 and a cut portion CP, and forming an initial barrier wall PDM, for example, by dispensing adhesive onto the initial substrate PSB, but is not limited thereto. In some embodiments, the initial barrier wall PDM may be formed by inkjet printing, screen printing, lithography, or other suitable methods. After the initial barrier wall PDM is formed on the initial substrate PSB, a cutting process may be performed to remove the cut portion CP of the initial substrate PSB, leaving the first substrate SB1 of the electronic device 200, but is not limited thereto. Therefore, when the cut portion CP of the initial substrate PSB is removed, a portion of the initial barrier wall PDM (e.g., portion P1) may also be removed, thereby forming the barrier wall DW of this embodiment, but is not limited thereto. According to this embodiment, as Figure 4A and Figure 4B As shown, the barrier wall DW can be, for example, an inverted U-shape. Each barrier wall DW can surround and partially overlap a portion of its corresponding first conductor CW1 near the first side surface SSF1, such that the portions of any two adjacent first conductors CW1 near the first side surface SSF1 are separated by the patterned barrier wall DW, but this is not a limitation. In some embodiments, the barrier wall DW can have any suitable shape as long as it can separate the first conductors CW1, and the present invention is not limited thereto. As mentioned above, because the barrier wall DW of this embodiment can separate any two adjacent first conductors CW1, even if an anomaly occurs in the side printing process, the possibility of short circuits in the first conductors CW1 during the side printing process can still be reduced. For example, as Figure 4BAs shown, the second conductor CW22 (wider conductor), the second conductor CW23 (offset conductor), and the second conductor CW24 (affected by capillary action) were formed under abnormal conditions in the side printing process, while the second conductor CW21 was formed under ideal conditions. Details of the different conditions in the side printing process are not repeated here. Figure 4B As can be seen from this embodiment, the barrier wall DW can separate the second conductor CW2 formed under different conditions of the side printing process, thereby preventing the second conductor CW2 from contacting another second conductor CW2. Therefore, the barrier wall DW of this embodiment can reduce the short circuit of the first conductor CW1 caused by the second conductor CW2 contacting each other, thereby improving the quality of the electronic device. The design of the barrier wall DW of this embodiment can be applied to various embodiments of the present invention.

[0047] Please refer to Figure 5 , Figure 5 This is a partial top view of the first substrate of the electronic device according to the third embodiment of the present invention during the side printing process. For the sake of simplicity, Figure 5 Only a portion of the first substrate SB1 of the electronic device 300 is shown; other components of the electronic device 300 can be referenced from, but are not limited to, the electronic device 100 of the first embodiment. Furthermore, Figure 5 The structure shown can be corresponding to Figure 2 The structure of region R0 is shown, but not limited to it. Figure 5 The electronic device 300 shown and Figure 1 One of the main differences in the illustrated electronic device lies in the design of the barrier DW. According to this embodiment, the barrier DW can be designed with a pattern such that the distance between two adjacent barrier DWs is less than the width of the second conductor CW2, but is not limited thereto. Specifically, as... Figure 5 As shown, Figure 5 The retaining wall pattern can be formed by retaining walls DW and retaining wall bars DB extending along the Y direction and crossing the first conductor CW1. In this embodiment, the retaining walls DW can be connected to each other, for example, through retaining wall bars DB, but are not limited thereto. Furthermore, as... Figure 5As shown, in the top view (direction Z) of the electronic device 300 in this embodiment, each barrier DW may partially overlap with its corresponding two first conductors CW1, but is not limited thereto. The aforementioned direction Y may be generally parallel to the extension direction of the scan line (not shown in the figure) of the electronic device 300, but is not limited thereto. In some embodiments, the electronic device 300 may not include a barrier grid DB, and the barrier DWs may be separated from each other. The material of the barrier grid DB can be referenced to the material of the barrier DWs, and will not be described in detail here. The barrier grid DB and the barrier DWs may be formed together. Therefore, the barrier DWs in this embodiment can be regarded as protruding portions that protrude from the barrier grid DB respectively. In other words, the barrier DWs of the present invention are separated, and the first conductors CW1 may be included (or exposed) between any two adjacent barrier DWs. The barrier grid DB in this embodiment can be regarded as a continuous barrier extending along direction Y and spanning the first conductors CW1, while the first conductors CW1 are not exposed by the barrier grid DB, but is not limited thereto. In this embodiment, as Figure 5 As shown, any two adjacent retaining walls DW have a distance W1 between them, and the second conductor CW2 formed in the side printing process can have a width W2. The distance W1 between two adjacent retaining walls DW can be smaller than the width W2 of the second conductor CW2, but is not limited thereto. The feature that the distance W1 between two adjacent retaining walls DW is smaller than the width W2 of each second conductor CW2 can be applied to various embodiments of the present invention, and will not be repeated below.

[0048] According to this embodiment, in order to improve the electrical connection between the first conductor CW1 and the second conductor CW2, the contact area between the first conductor CW1 and the second conductor CW2 can be increased. During the manufacturing process of the electronic device 300, the contact area between the first conductor CW1 and the second conductor CW2 can be increased by stretching the metal paste used to form the second conductor CW2, but this is not a limitation. Furthermore, as described above, in the top view (direction Z) of the electronic device 300, each barrier DW can partially overlap with its corresponding first conductor CW1, thereby reducing the possibility of the second conductor CW2 contacting other adjacent first conductors CW1 during the side printing process, and thus reducing the possibility of a short circuit in the first conductor CW1. Specifically, as... Figure 5 As shown, before performing the side printing process of the electronic device 300, a board heating process can be performed to heat the board (or the first substrate SB1, but not limited thereto). Afterwards, a side printing process can be performed to apply metal paste to the side surfaces (e.g., the first side surface SSF1 and the second side surface SSF2) to form the second conductive line CW2 (e.g., ...). Figure 5(As shown in part P2). Due to the increased temperature of the first substrate SB1, the metal paste can expand due to heat and extend, for example, along the baffle DW (e.g., along direction X), thereby increasing the contact area between the first conductor CW1 and the metal paste (second conductor CW2). Furthermore, the manufacturing method of the second conductor CW2 of the present invention may also include a cooling process after the board heating process and the side printing process. Specifically, from... Figure 5 As can be seen, when the side printing process is performed to apply the metal paste, a space surrounded by the metal paste, the barrier walls (DW), and the barrier grid (DB) can be formed (e.g., space S1 shown in part P2). In this way, when the temperature of the electronic device 300 decreases due to the cooling process, the pressure within the space S1 surrounded by the metal paste, barrier walls (DW), and barrier grid (DB) can decrease, allowing the metal paste to be drawn into the electronic device 300 due to the pressure difference, thereby increasing the contact area between the first conductor CW1 and the metal paste. Furthermore, as mentioned above, since the distance W1 between two adjacent barrier walls (DW) in this embodiment can be smaller than the width W2 of the second conductor CW2, the metal paste used to form the second conductor CW2 can extend further into the electronic device 300, improving the electrical connection between the first conductor CW1 and the second conductor CW2, but this is not a limitation. On the other hand, if the width W2 of the second conductor CW2 is smaller than the distance W1 between the barrier walls (DW), gas in space S1 may leak out, reducing the stretching effect caused by the gas. Therefore, a design where the distance W1 is smaller than the width W2 can improve the stretching effect of the gas, but it is not a limitation. The structure of the stretched metal paste can be referenced. Figure 5 Part P3 shows a structure closer to the electronic device 300 of this embodiment. According to this embodiment, since the first conductor CW1 and / or the second conductor CW2 are separated by the barrier DW, even if the second conductor CW2 is formed under abnormal conditions in the aforementioned side printing process, short circuits in the first conductor CW1 caused by contact between the second conductors CW2 can be reduced. The design of the barrier DW in this embodiment can be applied to various embodiments of the present invention, and will not be described further below.

[0049] Please refer to Figure 6 , Figure 6 This is a partial top view of the first substrate of the electronic device according to the fourth embodiment of the present invention during the side printing process. For the sake of simplicity, Figure 6 Only a portion of the first substrate SB1 of the electronic device 400 is shown; other components of the electronic device 400 can be referenced from, but are not limited to, the electronic device 100 of the first embodiment. Furthermore, Figure 6 The structure shown can be corresponding to Figure 2 The structure of region R0 is shown, but not limited to it. Figure 6 The electronic device shown is Figure 5One of the main differences in the electronic devices shown lies in the design of the retaining wall (DW). According to this embodiment, as... Figure 6 As shown, the barrier grid DB and barrier wall DW in electronic device 400 can be separate, but are not limited thereto. Furthermore, in this embodiment, a gap GP can be formed between the barrier grid DB and barrier wall DW, and two adjacent barrier walls DW can be separated from each other to form a through-hole VA, but are not limited thereto. The material of the barrier grid DB can refer to the material of the barrier wall DW, and will not be described again here. As mentioned above, the electrical connection between the first conductor CW1 and the second conductor CW2 can be improved by increasing the contact area between the first conductor CW1 and the second conductor CW2. According to this embodiment, since a gap GP can be formed between the barrier grid DB and barrier wall DW, metal paste used to form the second conductor CW2 can be stretched, for example, through the gap GP, but is not limited thereto. Specifically, as... Figure 6 As shown, the vacuum device VE can, for example, be connected to both ends of the gap GP and perform a side printing process to apply metal paste to the side surfaces (first side surface SSF1 and second side surface SSF2) of the electronic device 400, such as... Figure 6 Part P4 is shown. It should be noted that the side printing process and the steps of connecting the vacuum device VE to the electronic device 400 can be performed in any suitable order, and the present invention is not limited thereto. Afterwards, the vacuum device VE can be turned on, allowing gas in the space formed by the baffle wall DW and the metal paste (e.g., space S3) to be removed by the vacuum device VE through the gap GP and the perforation VA, but this is not limited thereto. The gas flow direction can be as follows... Figure 6 As indicated by arrow AR. Therefore, the metal paste applied during the side printing process can be drawn into the electronic device 400 due to the pressure difference, thereby increasing the contact area between the first conductor CW1 and the metal paste (second conductor CW2) (as shown by arrow AR). Figure 6 (as shown in part P5), thereby improving the electrical connection between the first conductor CW1 and the second conductor CW2. Figure 6 Part P5 in the diagram can be considered as the structure of the electronic device 400 after the side printing process in this embodiment. It should be noted that since the metal paste stretching process in this embodiment can be performed using gap GP and vacuum equipment VE, a board heating process is unnecessary, thus simplifying the process, but this is not a limitation. Similarly, since the distance W1 between two adjacent baffles DW in this embodiment can be smaller than the width W2 of the second conductor CW2, the metal paste used to form the second conductor CW2 can be further stretched into the electronic device 400, further improving the electrical connection between the first conductor CW1 and the second conductor CW2, but this is not a limitation. Furthermore, designing the distance W1 to be smaller than the width W2 can prevent gas leakage, thereby improving the stretching effect of the metal paste, but this is not a limitation. In this embodiment, as... Figure 6As shown, since the first conductor CW1 and / or the second conductor CW2 are separated by the barrier wall DW, even if the second conductor CW2 is formed under abnormal conditions in the aforementioned side printing process, the short circuit of the first conductor CW1 caused by contact between the second conductors CW2 can be reduced. The design of the barrier wall DW in this embodiment can be applied to various embodiments of the present invention, and will not be described in detail below.

[0050] Please refer to Figure 7A and Figure 7B , Figure 7A This is a partial top view of the first substrate of the electronic device according to the fifth embodiment of the present invention. Figure 7B This is a partial side view of an electronic device according to a fifth embodiment of the present invention. For the sake of simplicity, [the accompanying drawings are omitted]. Figure 7A Only a portion of the first substrate SB1 and the color filter unit CF of the electronic device 500 is shown; other components of the electronic device 500 can be referenced from, but are not limited to, the electronic device 100 of the first embodiment. Furthermore, Figure 7A The structure shown can be corresponding to Figure 2 The region R0 shown is not limited to this. According to this embodiment, as... Figure 7A and Figure 7B As shown, the electronic device 500 may include a color filter layer CFL disposed on the second substrate SB2. The color filter layer CFL may include multiple color filter units CF, wherein the barrier walls DW in this embodiment may be disposed corresponding to the color filter units CF respectively, but are not limited thereto. Furthermore, in this embodiment, the color filter units CF may not overlap with the first conductive line CW1 in the top view direction (e.g., direction Z) of the electronic device 500, but are not limited thereto. It should be noted that although... Figure 1 The electronic device 100 shown does not have a color filter unit, but its color filter unit may be included in the second functional layer FL2 described above. Figure 7A and Figure 7B The color filter unit CF shown may be, for example, a color filter unit of the same color or different colors, and the present invention is not limited thereto. For example, Figure 7A and Figure 7BThe color filter unit CF shown may include, but is not limited to, alternating red, green, and blue color filter units. According to this embodiment, as described above, since the material of the barrier wall DW may include a color filter resin, and the barrier wall DW may be disposed corresponding to the color filter unit CF, the barrier wall DW and the color filter unit CF may be formed, for example, in the same step of the manufacturing process of the electronic device 500, thereby simplifying the process, but not limited thereto. In some embodiments, the barrier wall DW may include other suitable materials in addition to the color filter resin. The design of disposing the barrier wall DW corresponding to the color filter unit CF can be applied to various embodiments of the present invention, which will not be repeated below. According to the present invention, a side-printing process can be performed to form a second conductive line (not shown in the figure, but refer to the reference) on the first side surface SSF1 of the first substrate SB1 and the second side surface SSF2 of the second substrate SB2. Figure 3A , Figure 3B and Figure 4B Each second conductor can be connected to its corresponding first conductor CW1 and can fill the space between its two adjacent retaining walls DW to cover a portion of its corresponding first conductor CW1, details of which are provided here. Figure 8A and Figure 8B The sixth embodiment shown will not be described again. It should be noted that the above-mentioned "the second conductor can fill the space between two adjacent retaining walls DW" may include the case where the second conductor fills the space or at least partially fills the space, and the present invention is not limited thereto.

[0051] Please refer to Figure 8A and Figure 8B , Figure 8A This is a partial top view of the first substrate of the electronic device according to the sixth embodiment of the present invention. Figure 8B This is a partial side view of an electronic device according to a sixth embodiment of the present invention. For the sake of simplicity, [the accompanying drawings are omitted]. Figure 8A Only a portion of the first substrate SB1 and the color filter unit CF of the electronic device 600 are shown; other components of the electronic device 600 can be referenced from, but are not limited to, the electronic device 100 of the first embodiment. Furthermore, Figure 8A The structure shown can be corresponding to Figure 2 The region R0 is shown, but is not limited to this. Figure 8A and Figure 8B The electronic device shown is Figure 7A and Figure 7B One of the main differences in the electronic devices shown lies in the design of the color filter unit (CF). According to this embodiment, as... Figure 8A and Figure 8BAs shown, the electronic device 600 may include a color filter layer, which may include multiple color filter units CF. In this embodiment, the barrier walls DW may be respectively disposed corresponding to the color filter units CF. Furthermore, in this embodiment, the color filter units CF may be connected to each other, that is, the color filter units CF may at least partially overlap the first conductor CW1 in the top view direction (direction Z) of the electronic device 600, and there may be no gap between any two adjacent color filter units CF, but this is not a limitation. Therefore, in this embodiment, the first conductor CW1 may be covered by the color filter units CF, for example, but this is not a limitation. It should be noted that in this invention, "one film layer covering another film layer" can be applied to both cases where no other film layer is disposed between the film layer and the other film layer, and cases where other film layers may be disposed between the film layer and the other film layer. Therefore, the above-mentioned "the first conductor CW1 is covered by the color filter units CF" may include both cases where no other film layer is disposed between the first conductor CW1 and the color filter units CF, and cases where other film layers may be disposed between the first conductor CW1 and the color filter units CF, but this is not a limitation. The types or colors of the color filter units CF can be referred to the above content and will not be repeated here. According to this embodiment, since there are no gaps between the color filter units CF of the electronic device 600, some peripheral components, such as bonding pads or wires (e.g., the first wire CW1, but not limited thereto), can be shielded by the color filter units CF, making the peripheral components less noticeable to the user, thereby improving the performance of the electronic device 600, or forming a borderless electronic device. The design of the color filter units CF in this embodiment can be applied to various embodiments of the present invention, and will not be repeated below.

[0052] Please refer to Figure 9A and Figure 9B , Figure 9A This is a partial top view of the first substrate of the electronic device according to the seventh embodiment of the present invention during the side printing process. Figure 9B This is a partial side view schematic diagram of the electronic device according to the seventh embodiment of the present invention during the side printing process. For the sake of simplicity, [the accompanying drawings are omitted]. Figure 9A Only a portion of the first substrate SB1 of the electronic device 700 is shown; other components of the electronic device 700 can be referenced from, but are not limited to, the electronic device 100 of the first embodiment. Furthermore, Figure 9A A portion of the first substrate SB1 shown can correspond to Figure 2 The area R0 shown is a portion of the first substrate SB1, but is not limited thereto. According to this embodiment, as... Figure 9A and Figure 9B As shown, the electronic device 700 may include a first substrate SB1, a second substrate SB2, a plurality of first conductive lines CW1 disposed on the first substrate SB1, and a plurality of first barrier walls DW1 disposed on the first substrate SB1 and the second substrate SB2, but is not limited thereto. Specifically, as... Figure 9Aand Figure 9B As shown, the first substrate SB1 may include a first surface SF1 and a first side surface SSF1 adjacent to the first surface SF1, and the second substrate SB2 includes a second surface SF2 and a second side surface SSF2 adjacent to the second surface SF2. A first conductor CW1 is disposed on the first surface SF1 of the first substrate SB1, and a first barrier DW1 is disposed on the first side surface SSF1 of the first substrate SB1 and the second side surface SSF2 of the second substrate SB2. Figure 9A In the top view shown, the first retaining wall DW1 can be located between any two adjacent second conductors CW2, but is not limited thereto. According to some embodiments, in... Figure 9A In the top view shown, the first retaining wall DW1 can be located between any two adjacent first conductors CW1, but is not limited thereto. The material of the first retaining wall DW1 can refer to the material of the retaining wall in the above embodiment, but is not limited thereto. The first retaining wall DW1 in this embodiment can be set on the first side surface SSF1 and the second side surface SSF2, for example, by inkjet printing, screen printing, or dispensing, but is not limited thereto. In addition, as Figure 9B As shown, the electronic device 700 of this embodiment may include a first functional layer FL1 disposed on the first surface SF1 and a second functional layer FL2 disposed on the second surface SF2, but is not limited thereto. The first substrate SB1, second substrate SB2, first conductor CW1, first functional layer FL1, and second functional layer FL2 of this embodiment can be referred to the content of the above embodiments, and will not be repeated here. According to this embodiment, since the electronic device 700 includes a first barrier DW1 disposed on the first side surface SSF1 and the second side surface SSF2, the conductors formed by the side printing process can be separated by the first barrier DW1, that is, the first barrier DW1 can reduce the contact between the multiple conductors, thereby reducing the short circuit of the first conductor CW1. Specifically, as... Figure 9A and Figure 9B As shown, in the side-printing process, multiple second conductive lines CW2 can be disposed on the first side surface SSF1 of the first substrate SB1 and the second side surface SSF2 of the second substrate SB2, and electrically connected to the corresponding first conductive lines CW1. Therefore, after the second conductive lines CW2 are electrically connected to the peripheral circuit, the first conductive lines CW1 can be electrically connected to the peripheral circuit (e.g., a processing unit) through the second conductive lines CW2, but this is not a limitation. In this embodiment, the peripheral circuit can be disposed, for example, on the outer surface RS of the first substrate SB1, but this is not a limitation. As mentioned above, some abnormal situations may occur in the side-printing process, increasing the possibility of contact between two adjacent second conductive lines CW2. For example, as Figure 9BAs shown, the conductor formed under abnormal conditions may include, for example, a wider second conductor CW22, an offset second conductor CW23, and a second conductor CW24 affected by capillary action, and may increase the possibility of a short circuit in the first conductor CW1. Details can be found above and will not be repeated here. However, as... Figure 9B As shown, even if the second conductor CW2 is formed under abnormal conditions, the first barrier DW1 in this embodiment can block the second conductor CW2, thus reducing the possibility of contact between the second conductors CW2 and thereby reducing the short circuit of the first conductor CW1, but this is not a limitation. Furthermore, since the second conductor CW2 can be blocked by the first barrier DW1 (in the Y direction, such as...) Figure 9B As shown, the distance W1 between two adjacent first retaining walls DW1 can be greater than the width W2 of one of the second conductors CW2. The design of the first retaining wall DW1 in this embodiment can be applied to various embodiments of the present invention, and will not be described again below.

[0053] Please refer to Figure 10A and Figure 10B , Figure 10A This is a partial top view of the electronic device according to the eighth embodiment of the present invention during the side printing process. Figure 10B This is a partial side view schematic diagram of the electronic device according to the eighth embodiment of the present invention during the side printing process. For the sake of simplicity, [the accompanying drawings are omitted]. Figure 10A Only a portion of the first substrate SB1 of the electronic device 800 is shown; other components of the electronic device 800 can be referenced from, but are not limited to, the electronic device 100 of the first embodiment. Furthermore, Figure 10A A portion of the first substrate SB1 shown can correspond to Figure 2 The area R0 shown is a portion of the first substrate SB1, but is not limited thereto. Figure 10A and Figure 10B The electronic device 800 shown is Figure 9A and Figure 9B One of the main differences in the electronic devices shown lies in the design of the retaining wall (DW). According to this embodiment, as... Figure 10A As shown, the electronic device 800 may include, in addition to the first barrier DW1 described above, a plurality of second barrier DW2 disposed on the first surface SF1 of the first substrate SB1, but is not limited thereto. That is, the electronic device 800 of this embodiment may include a first barrier DW1 disposed on the first side surface SSF1 and the second side surface SSF2, and second barrier DW2 disposed on the first surface SF1. The arrangement and materials of the first barrier DW1 and the second barrier DW2 in this embodiment can be referred to the barrier DW of the above embodiment, and will not be repeated here. In this embodiment, as... Figure 10AAs shown in the top view of the electronic device 800, the first barrier wall DW1 and the second barrier wall DW2 can be disposed between any two adjacent first conductors CW1, and each first barrier wall DW1 can correspond to or contact its corresponding second barrier wall DW2, but is not limited thereto. In this embodiment, the first barrier wall DW1 and the second barrier wall DW2 can be made of the same material or different materials. Similarly, as described above, even if the conductors are formed under abnormal conditions (e.g., a wider second conductor CW22, a deviated second conductor CW23, and a second conductor CW24 affected by capillary action), since the electronic device 800 of this embodiment includes the first barrier wall DW1 and the second barrier wall DW2, the first barrier wall DW1 and the second barrier wall DW2 can separate the conductors (e.g., the second conductor CW2) formed by the side printing process, thereby reducing short circuits of the first conductor CW1 and improving the quality of the electronic device 800. The design of the first barrier wall DW1 and the second barrier wall DW2 can be applied to various embodiments of the present invention.

[0054] Please refer to Figure 11A and Figure 11B , Figure 11A This is a partial top view of the electronic device according to the ninth embodiment of the present invention during the side printing process. Figure 11B This is a partial side view schematic diagram of the electronic device according to the ninth embodiment of the present invention during the side printing process. For the sake of simplicity, [the accompanying drawings are omitted]. Figure 11A Only a portion of the first substrate SB1 of the electronic device 900 is shown; other components of the electronic device 900 can be referenced from, but are not limited to, the electronic device 100 of the first embodiment. Furthermore, Figure 11A A portion of the first substrate SB1 shown can correspond to Figure 2 The area R0 shown is a portion of the first substrate SB1, but is not limited thereto. Figure 11A and Figure 11B The electronic device 900 shown is Figure 9A and Figure 9B One of the main differences in the electronic devices shown is the design of the retaining wall.

[0055] According to this embodiment, as Figure 11A and Figure 11B As shown, the electronic device 900 may further include a third barrier DW3 disposed on the first surface SF1 of the first substrate SB1, wherein the third barrier DW3 may, for example, be filled between the first substrate SB1 and the second substrate SB2, and cover at least a portion of the first conductor CW1 adjacent to the second conductor CW2, but is not limited thereto. Specifically, as... Figure 11A and Figure 11BAs shown, the third barrier DW3 in this embodiment may, for example, be a continuous film layer covering a portion of the first conductor CW1 adjacent to the second conductor CW2, and the surface of the first conductor CW1 (e.g., the surface ES of the first conductor CW1) may be exposed by the third barrier DW3, but is not limited thereto. According to this embodiment, the third barrier DW3 may be disposed between the first functional layer FL1 and the second functional layer FL2. In this embodiment, the material of the third barrier DW3 may refer to the material of the barrier described above, and will not be repeated here. The third barrier DW3 and the first barrier DW1 may include the same material or different materials, and the present invention is not limited thereto. According to this embodiment, as described above, even if the conductor is in abnormal conditions (e.g., such as...), Figure 11B As shown, the wider second conductor CW22, the offset second conductor CW23, and the second conductor CW24 affected by capillary action are formed under these conditions. Since the electronic device 900 of this embodiment includes a first barrier DW1 and a third barrier DW3, the first barrier DW1 and the third barrier DW3 can separate the conductors (e.g., the second conductor CW2) formed by the side printing process, thereby reducing short circuits in the first conductor CW1 and improving the quality of the electronic device 900. It should be noted that in the side printing process of this embodiment, the second conductor CW2 can, for example, pass through the surface of the first conductor CW1 exposed by the second barrier DW2 (e.g., ...). Figure 11A and Figure 11B The surface ES shown is in contact with the first conductor CW1, but is not limited thereto. Furthermore, as... Figure 11A and Figure 11B As shown, since the third barrier wall DW3 in this embodiment can be filled between the first substrate SB1 and the second substrate SB2, water vapor or oxygen can be blocked by the third barrier wall DW3. Therefore, the third barrier wall DW3 can protect the electronic components disposed in the electronic device 900, but this is not a limitation. It should be noted that although the third barrier wall DW3 is filled between the first substrate SB1 and the second substrate SB2 and is in contact with the first substrate SB1 and the second substrate SB2, this embodiment is not limited thereto. In some embodiments, the third barrier wall DW3 can be disposed on the first substrate SB1 and cover the first conductor CW1, without contacting the second substrate SB2, but this is not a limitation. The design of the first barrier wall DW1 and the third barrier wall DW3 can be applied to various embodiments of the present invention.

[0056] In this embodiment, the thickness of the first retaining wall DW1 can be greater than the thickness of the second conductor CW2, but is not limited thereto. Specifically, as... Figure 11A and Figure 11B As shown, the first retaining wall DW1 can have a thickness H3, and the second conductor CW2 can have a thickness H4, wherein the thickness H3 can be greater than the thickness H4. It should be noted that the thickness of the second conductor CW2 can be defined using any single second conductor CW2. Figure 11AThe thickness H4 shown is only one example. Furthermore, when the second conductor CW2 has an irregular shape (e.g., Figure 11A The second conductor CW24 shown is not limited to this. The thickness of the second conductor CW2 can be, for example, the maximum thickness of the second conductor CW2 in direction Z (i.e., the top view direction), but is not limited to this. According to the present invention, electronic devices can be mass-produced, wherein the metal paste used to form the second conductor of one electronic device and the metal paste used to form the second conductor of another electronic device adjacent to that electronic device may come into contact with each other during the manufacturing process, which may reduce the yield of the electronic devices. However, according to this embodiment, since the thickness H3 of the first barrier DW1 can be greater than the thickness H4 of the second conductor CW2, the possibility of the second conductor CW2 coming into contact in different electronic devices can be reduced, thereby improving the yield. The above design can be applied to various embodiments of the present invention.

[0057] In summary, the present invention provides an electronic device comprising a barrier disposed between any two adjacent conductors. Therefore, when performing a side-printing process on the electronic device to form contact between the conductors and surrounding circuitry, the barrier can reduce short-circuit occurrences in the conductors, thereby improving the quality of the electronic device.

[0058] The above description is merely an embodiment of the present invention and is not intended to limit the invention. For those skilled in the art, the present invention can have various modifications and variations. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. An electronic device, characterized by comprising: include: A first substrate has a first surface and a first side surface, wherein the first side surface is adjacent to the first surface; A second substrate having a second surface and a second side surface, the second side surface being adjacent to the second surface; Multiple first wires are disposed on the first surface; Multiple first retaining walls are disposed on the first side surface and the second side surface; as well as Multiple second conductors are disposed on the first side surface and the second side surface, and the multiple first conductors are electrically connected to the multiple second conductors respectively; The plurality of first retaining walls are located between any two adjacent plurality of second conductors. 2.The electronic device of claim 1, wherein, The distance between two adjacent first retaining walls is greater than the width of one of the multiple second conductors. 3.The electronic device of claim 1, wherein, The thickness of each of the plurality of first retaining walls is greater than the thickness of each of the plurality of second conductors. 4.The electronic device of claim 1, wherein, It also includes a plurality of second retaining walls disposed on the first surface, and the plurality of second retaining walls are respectively located between any two adjacent plurality of first conductors. 5.The electronic device of claim 4, wherein, The plurality of first retaining walls and the plurality of second retaining walls are made of different materials. 6.The electronic device of claim 4, wherein, The plurality of first retaining walls and the plurality of second retaining walls are made of the same material.

7. The electronic device as claimed in claim 1, characterized in that, It also includes a third barrier wall disposed on the first surface, wherein the third barrier wall is disposed between the first substrate and the second substrate, and the third barrier wall covers the plurality of first conductors.

8. The electronic device as claimed in claim 7, characterized in that, It also includes a first functional layer and a second functional layer, the first functional layer being disposed on the first surface and the second functional layer being disposed on the second surface, wherein the third retaining wall is disposed between the first functional layer and the second functional layer. 9.The electronic device of claim 8, wherein, The first functional layer includes multiple driving elements, while the second functional layer includes a black matrix layer.

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