Communication control device for subscriber stations of a serial bus system and method for communication in a serial bus system

Abstract

A communication control device for a subscriber station of a serial bus system and a method for communicating in a serial line system are provided. The communication control device is designed to control a communication of a subscriber station of a bus system with at least one other subscriber station and to generate a transmission signal for transmission onto a bus of the bus system and / or to receive a signal from the bus, wherein the communication control device is designed to generate the transmission signal in frames in which bits with a predetermined time length are arranged, wherein the communication control device is designed to shorten at least one bit in a frame compared to other bits of a bit sequence, which at least one bit is arranged in a bit sequence of at least two bits having the same logical value, and wherein the communication control device is designed not to shorten bits which are not arranged in a bit sequence of at least two bits having the same logical value.

Description

Technical Field

[0001] The present invention relates to a communication control device for a user station for a serial bus system, and a method for communication in the serial bus system, the bus system operating with high data transfer rates and high error robustness. Background Technology

[0002] Bus systems used for communication between sensors and controllers, such as in vehicles, should be designed to handle large data volumes, depending on the number of technical devices or vehicle functions. Many applications require the ability to transmit data from transmitter to receiver at the highest possible data transfer rate.

[0003] Currently, bus systems in vehicles are in the introduction phase, where data is transmitted as messages according to the standard ISO 11898-1:2015 in the form of the CAN protocol specification with CAN FD. Messages are transmitted between bus users of the bus system, such as sensors, controllers, transmitters, etc. For this purpose, messages are sent on the bus in frames that switch between two communication phases. In the first communication phase (arbitration), it is agreed which user of the bus system will send its frame onto the bus in the subsequent second communication phase (data phase, or transmission of user data). CAN FD is used by most manufacturers in vehicles in the first step with an arbitration bit rate of 500 kbit / s and a data bit rate of 2 Mbit / s. That is, it switches back and forth between a slow operation mode and a fast operation mode when transmitting to the bus.

[0004] To maintain a high data transfer rate during the second communication phase, a successor bus system, known as CAN XL, is being developed for CAN FD and is currently standardized within the CAN in Automation organization (CiA). In addition to pure data transfer via the CAN bus, CAN XL should support other functions such as functional safety, data security, and Quality of Service (QoS). These are fundamental characteristics required in autonomous vehicles.

[0005] Errors can occur when data is transmitted in frames via the channel (CAN bus). For example, external influences, especially incident or reflected light at bus terminals, can tamper with or shift the edges between bits. Furthermore, non-ideal clock pulse sources can cause phase errors in user stations, which are currently not message transmitters but merely message receivers (receiving nodes) for communication on the bus.

[0006] Such frame conditions help reduce the amount of data that can be effectively transmitted each time, i.e., the net data rate. Summary of the Invention

[0007] Therefore, the objective of this invention is to provide a communication control device for a user station in a serial bus system and a method for communication in a serial bus system, wherein the communication control device solves the problems mentioned above. In particular, it is intended to provide a communication control device for a user station in a serial bus system and a method for communication in a serial bus system, wherein high error robustness of communication can be achieved even at high data transmission rates and, if necessary, increased user data volume per frame.

[0008] This task is accomplished by a communication control device for a user station in a serial bus system. The communication control device is designed to control communication between the user station of the bus system and at least one other user station, and to generate transmit signals for transmission onto the bus of the bus system, and / or to receive signals from the bus. The communication control device is designed to generate transmit signals in frames, each frame containing bits of a predetermined time length. The communication control device is also designed to shorten at least one bit in the frame compared to other bits in the bit sequence, the at least one bit being arranged in a bit sequence of at least two bits having the same logical value. Furthermore, the communication control device is designed not to shorten bits that are not arranged in a bit sequence of at least two bits having the same logical value.

[0009] The design of this communication control device enables the transmission of more data per unit time via the bus than has been done so far, without thereby reducing the error robustness of communication in the bus system.

[0010] The aforementioned communication control device enables robust communication in serial bus systems, particularly in CAN, CAN FD, or CAN XL, despite further increases in data transmission rates.

[0011] Here, what can be achieved using the communication control device in the bus system is to retain the arbitration known from CAN in the first communication phase, and despite this, to significantly improve the transmission rate again compared to CAN or CAN FD or CAN XL.

[0012] If at least one CAN user station and / or at least one CAN FD user station also exist in the bus system, then the methods executed by the communication control device can also be used to send messages according to the CAN protocol and / or CAN FD protocol.

[0013] Advantageous alternative designs for the communication control device are proposed in the specification.

[0014] In a feasible manner, each bit is divided into four segments in time without shortening, wherein a first sampling point is set between the first and second segments, and wherein a second sampling point is set between the third and fourth segments, and wherein the communication control device is designed to use the first and second sampling points to determine the logic value of the bit in the received signal, the communication control device receiving the received signal for a transmit signal transmitted via a bus.

[0015] Two segments can be arranged between the first and second sampling points without shortening the bit.

[0016] According to one embodiment, the communication control device can be designed to shorten the second bit of the bit sequence and each subsequent bit of the bit sequence.

[0017] According to one embodiment, the communication control device can be designed to shorten the segment directly preceding the second sampling point in the second bit of the bit sequence and in each subsequent bit of the bit sequence, wherein the communication control device is designed to shorten the segment directly preceding the second sampling point in the second bit of the bit sequence less drastically compared to the segment directly following the second sampling point in the last bit of the bit sequence.

[0018] The communication control device can be designed to drastically shorten the bits arranged between the first and last bits of the bit sequence compared to the last bit of the bit sequence.

[0019] In one embodiment, the communication control device is designed such that the last bit of the bit sequence is shortened more drastically than the first bit of the bit sequence.

[0020] According to other design schemes, the communication control device can be designed to determine the shortened length of the bit sequence for individual bit-specific purposes.

[0021] It is conceivable that the communication control device has an analysis module for analyzing whether a bit sequence with at least two bits having the same logic value is arranged in the transmitted signal created by the communication control device; and a bit length shortening module for shortening at least one bit in the bit sequence, the bit sequence being determined by the analysis module during analysis.

[0022] The communication control device may include a bit length extension module for extending at least one bit in a bit sequence, the at least one bit being included as a shortened bit in a signal received by the bus. Additionally or alternatively, the communication control device may further include an error frame counting module for counting error frames received by the bus.

[0023] Furthermore, the communication control device can be designed to add at least one predetermined bit to the transmitted signal, the bit indicating to the receiving node in the bus system that the signal currently being received by the bus has at least one bit, the at least one bit being arranged in a bit sequence of at least two bits having the same logic value and being shortened compared to the other bits in the bit sequence.

[0024] The communication control device can be designed to generate transmission signals such that, for messages exchanged between user stations in the bus system, the bit timing of a signal transmitted on the bus in a first communication phase can be distinguished from the bit timing of a signal transmitted in a second communication phase, wherein in the first communication phase it is agreed which user station in the bus system will have at least temporary, exclusive, conflict-free access to the bus in the subsequent second communication phase, and wherein the communication control device is designed to shorten at least one bit of a bit sequence having at least two bits with the same logic value in the first and / or second communication phase.

[0025] The frames used to form messages can be configured to be compatible with CAN FD and / or CAN XL.

[0026] The communication control device described above can be part of a user station for a bus system. The communication control device further includes a transmitting / receiving device for transmitting signals to the bus of the bus system. The transmitting / receiving device is designed to transmit the entire frame to the bus in an operating type for transmitting and receiving frames in the first communication phase.

[0027] The user station described above can be part of a bus system, which further includes a bus and at least two user stations connected to each other via the bus in such a way that the user stations can communicate serially with each other. Here, at least one of the at least two user stations is the user station described above.

[0028] Furthermore, the aforementioned task is solved by a method for communication in a serial bus system. This method is implemented using a communication control device for a user station in the bus system, wherein the method includes the following steps: using the communication control device to control communication between the user station of the bus system and at least one other user station, and for generating a transmit signal for transmission onto the bus of the bus system and / or for receiving a signal from the bus; wherein the communication control device generates the transmit signal according to frames, wherein bits with a predetermined time length are set in the frames; wherein the communication control device shortens at least one bit in the frame compared to other bits in the bit sequence, the at least one bit being arranged in a bit sequence of at least two bits having the same logical value; and wherein the communication control device does not shorten bits that are not arranged in a bit sequence of at least two bits having the same logical value.

[0029] The method provides the same advantages as those mentioned earlier regarding user stations.

[0030] Other possible implementations of the present invention include combinations of features or embodiments not explicitly mentioned above or below in relation to the embodiments. Furthermore, those skilled in the art will add various aspects as improvements or supplements to the corresponding basic form of the present invention. Attached Figure Description

[0031] The invention will be described in more detail below with reference to the accompanying drawings and embodiments. Wherein: Figure 1 A simplified block diagram of the bus system according to the first embodiment is shown; Figure 2 A diagram illustrating the structure of a message that can be sent by a user station of a bus system according to a first embodiment is shown. Figure 3 A simplified schematic block diagram of a user station of a bus system according to a first embodiment is shown; Figure 4 The timing trends of bus signals CAN-XL_H and CAN-XL_L in a user station according to the first embodiment are shown. Figure 5 The time-dependent trend of the voltage difference VDIFF between bus signals CAN-XL_H and CAN-XL_L in a user station according to the first embodiment is shown. Figure 6 The time-varying trend of a portion of the signal is shown, which occurs when a frame is sent to the connector of the user station according to the first embodiment if the bit length adaptation module is not activated. Figure 7The temporal trend of a portion of the signal is shown, which occurs at the junction of the user station according to the first embodiment when the bit length adaptation module is activated. Figure 8 The temporal trend of a portion of the signal is shown, which occurs at the junction of the user station according to the second embodiment when the bit length adaptation module is activated. Figure 9 A diagram illustrating the structure of a message that can be sent by a user station of a bus system according to the fourth embodiment is shown; and Figure 10 A diagram illustrating the structure of a message that can be sent by a user station of a bus system according to the fifth embodiment is shown.

[0032] Components that are identical or have the same function in the figure are given the same reference numerals, unless otherwise specified. Detailed Implementation

[0033] Figure 1 Bus system 1 is shown as an example, which is specifically designed for CAN bus systems, CAN FD bus systems, CAN XL bus systems, and / or variations thereof as described below. Bus system 1 can be used in vehicles, particularly motor vehicles, aircraft, etc., or hospitals, etc.

[0034] exist Figure 1 In this system, bus system 1 has multiple user stations 10, 20, and 30, which are respectively connected to bus 40 having a first bus wire 41 and a second bus wire 42. Bus wires 41 and 42 can also be named CAN_H and CAN_L or CAN-XL_H and CAN-XL_L, and are used for electrical signal transmission after coupling a dominant level or generating a recessive level or other levels, in relation to signals in the transmission state. Messages 45 and 46 can be transmitted serially between individual user stations 10, 20, and 30 in signal form via bus 40. If an error occurs in communication on bus 40, such as in... Figure 1 As shown by the serrated black module arrows, error frame 47 (error flag) can be optionally sent. User stations 10, 20, and 30 are, for example, controllers, sensors, display devices, etc., of motor vehicles.

[0035] As in Figure 1As shown, user station 10 has a communication control device 11, a transmitting / receiving device 12, and a bit length adaptation module 15. User station 20 has a communication control device 21, a transmitting / receiving device 22, and an optional bit length adaptation module 25. User station 30 has a communication control device 31, a transmitting / receiving device 32, and a bit length adaptation module 35. The transmitting / receiving devices 12, 22, and 32 of user stations 10, 20, and 30 are directly connected to bus 40, even when they are in... Figure 1 It is not shown in the text.

[0036] Communication control devices 11, 21, and 31 are respectively used to control the corresponding user stations 10, 20, and 30 to communicate with at least one other user station of user station 10, 20, and 30 through bus 40, wherein the at least one other user station is connected to bus 40.

[0037] Communication control devices 11 and 31 create and read a first message 45, which is, for example, a modified CAN message 45. Here, the modified CAN message 45 is based on a reference... Figure 2 The communication control devices 11 and 31 are configured using the CAN XL format as described in detail, and employ corresponding bit length adaptation modules 15 and 35. Furthermore, the communication control devices 11 and 31 can be implemented to provide CAN XL messages 45 or CAN FD messages 46 to the transmitting / receiving device 32 or to have them received by the transmitting / receiving device, as needed. Here, corresponding bit length adaptation modules 15 and 35 are also used. The communication control devices 11 and 31 then create and read the first message 45 or the second message 46, wherein the first and second messages 45 and 46 are distinguished by their data transmission standard, i.e., in this case, CAN XL or CAN FD.

[0038] The communication control device 21 can be implemented as a conventional CAN controller according to ISO 11898-1:2015, that is, as a conventional CAN controller or CAN FD controller with CAN FD fault tolerance. Additionally, a bit length adaptation module 25 may be optionally present, which has the same function as bit length adaptation modules 15, 35. The communication control device 21 creates and reads a second message 46, such as a CAN FD message 46. The CAN FD message 46 can include data bits from 0 to 64, and therefore has a significantly faster data transmission rate than in the case of conventional CAN message transmission. The communication control device 21 is implemented, in particular, as a conventional CAN FD controller.

[0039] The transmitting / receiving device 22 can be implemented as a conventional CAN transceiver or CAN FD transceiver according to ISO 11898-1:2015. The transmitting / receiving devices 12 and 32 can be implemented to provide messages 45 in CAN XL format or messages 46 in the current CAN FD format to the associated communication control devices 11 and 31, or to have them received by the communication control devices, as needed.

[0040] The construction of message 45 in CAN XL format, its subsequent transmission, and the reception of such message 45 can be achieved using two user stations 10 and 30.

[0041] Figure 2 Frame 450 is shown for message 45, which is in particular a CAN XL frame, as it is provided by communication control unit 11 to transmitting / receiving unit 12 for transmission onto bus 40. Here, communication control unit 11 creates frame 450 as CAN FD compatible in the aforementioned embodiment. The same applies to communication control unit 31 and transmitting / receiving unit 32 of user station 30.

[0042] according to Figure 2 Frame 450 divides CAN communication on bus 40 into different communication phases 451 and 452, namely arbitration phase 451 and data phase 452. After the start bit SOF, frame 450 has an arbitration segment 453, a control segment 454, a data segment 455, a checksum segment 456, and a frame termination segment 457.

[0043] In arbitration phase 451, an agreement is made bit-by-bit among user stations 10, 20, and 30 using identifiers (IDs) with bits ID28 to ID18, as in arbitration phase 453, to determine which user station 10, 20, or 30 wishes to send messages 45 and 46 with the highest priority and thus obtain exclusive access to bus 40 of bus system 1 for transmission in the subsequent data phase 452. The physical layer is used in arbitration phase 451 as in CAN and CAN-FD. The physical layer corresponds to the bit transport layer or layer 1 of the known OSI model (Open Systems Interconnection Model).

[0044] An important point during phase 451 is the use of the known CSMA / CR method, which allows user stations 10, 20, and 30 to simultaneously access bus 40 without disrupting higher-priority messages 45 and 46. This allows for the relatively simple addition of additional bus user stations 10, 20, and 30 to bus system 1, which is highly advantageous.

[0045] The CSMA / CR method necessitates the presence of a so-called recessive state on bus 40, which can be overridden by the dominant states on bus 40 from other user stations 10, 20, and 30. In the recessive state, high impedance exists at individual user stations 10, 20, and 30, which, combined with parasitic conditions in bus wiring, results in a longer time constant. This limits the maximum bit rate of the current CAN-FD physical layer to approximately 2 Mbps in practical vehicle applications.

[0046] In data phase 452, user data from CAN-XL frames, or messages 45, from data phase 455 and checksum phase 456 are transmitted, in addition to a portion of control phase 454. In checksum phase 456, the checksum can be included with padding bits from the data in data phase 452. These padding bits are inserted by the transmitter of message 45 as reversed bits after a predetermined number of identical bits, particularly 10 identical bits. At the end of data phase 452, the system switches back to arbitration phase 451.

[0047] In the end segment, at least one acknowledgment bit can be included in the frame termination phase 457. Additionally, a sequence of 11 identical bits can be present, indicating the end of the CAN XL frame 450. The at least one acknowledgment bit conveys whether the receiver detected any errors in the received CAN XL frame 450, or in message 45.

[0048] The transmitter of message 45 only begins to send bits of data stage 452 onto bus 40 when user station 10 as the transmitter has been arbitrated and user station 10 as the transmitter therefore has exclusive access to bus 40 of bus system 1 for transmission.

[0049] The bus system with CAN XL employs proven characteristics responsible for the robustness and user-friendliness of CAN and CAN FD, particularly the frame structure with identifiers and arbitration according to the CSMA / CR method. Therefore, user station 10 uses, in part, and especially up to the FDF bit (inclusive), the format known to CAN / CAN-FD according to ISO 11898-1:2015 in the arbitration phase 451, which is the first communication phase. However, compared to CAN or CAN FD in the data phase 452, which is the second communication phase, the net data transfer rate can be increased to approximately 10 Mbps. Furthermore, the size of each frame of user data can be increased to approximately 2 kilobytes or any other value.

[0050] Figure 3The basic structure of user station 10 is shown, which includes a communication control device 11, a transmitting / receiving device 12, and a bit length adaptation module 15, which is part of the communication control device 11. User station 20 is constructed in the same manner from its basic structure, except for the differences mentioned above, as shown in... Figure 3 As shown in the diagram. User station 30 is constructed in a similar manner, as in... Figure 3 As shown, however, the bit length adaptation module 35 follows... Figure 1 The communication control device 31 and the transmitting / receiving device 32 are arranged separately. Therefore, the user station 30 is not described separately.

[0051] according to Figure 3 In addition to the communication control unit 11 and the transmitting / receiving unit 12, the user station 10 also includes a microcontroller 13 and a system ASIC 16 (ASIC = Application-Specific Integrated Circuit). The microcontroller is equipped with the communication control unit 11, and the system ASIC 16 can replace the system base chip (SBC), on which multiple functions necessary for the electronic structure components of the user station 10 are integrated. Besides the transmitting / receiving unit 12, the system ASIC 16 also houses a power supply unit 17, which supplies power to the transmitting / receiving unit 12. The power supply unit 17 typically provides a 5V CAN_Supply voltage. However, depending on requirements, the power supply unit 17 can provide other voltages with other values. Alternatively or additionally, the power supply unit 17 can be designed as a power source.

[0052] The bit length adaptation module 15 includes an analysis module 151, a bit length shortening module 152, an optional bit length extension module 153, and an error frame counting module 154. The analysis module analyzes the transmitted signal TxD on a bit sequence with bits having the same logic value and analyzes the received signal RxD. Modules 151, 152, 153, and 154 are described more precisely below.

[0053] The transmitting / receiving device 12 further includes a transmitting module 121 and a receiving module 122. Even though the transmitting / receiving device 12 is consistently referred to below, the receiving module 122 can alternatively be housed in a separate device external to the transmitting module 121. The transmitting module 121 and the receiving module 122 can be constructed as in a conventional transmitting / receiving device 22. The transmitting module 121 can, in particular, have at least one operational amplifier and / or transistor. The receiving module 122 can, in particular, have at least one operational amplifier and / or transistor.

[0054] The transmitting / receiving device 12 is connected to the bus 40. More precisely, the first bus conductor 41 of the bus is used for CAN_H or CAN-XL_H, and the second bus conductor 42 of the bus is used for CAN_L or CAN-XL_L. The power supply device 17 provides voltage supply via at least one connector 43 to supply electrical energy, particularly the CAN-Supply voltage, to the first and second bus conductors 41 and 42. Connection to ground, or CAN_GND, is achieved via connector 44. The first and second bus conductors 41 and 42 are terminated by terminating resistors 49.

[0055] The first and second bus wires 41 and 42 are connected in the transmitting / receiving device 12 not only to the transmitting module 121, also referred to as the transmitter, but also to the receiving module 122, also referred to as the receiver, even though... Figure 3 The connection is not shown for simplicity.

[0056] During the operation of bus system 1, the transmitting module 121 converts the transmitting signal TXD or the TxD of the communication control device 11 into signals CAN-XL_H and CAN-XL_L for the corresponding bus wires 41 and 42, and transmits these signals CAN-XL_H and CAN-XL_L to bus 40 at the connectors for CAN_H and CAN_L, as shown in... Figure 4 As shown in the diagram.

[0057] The receiving module 122 receives data from the bus 40 according to... Figure 4 The signals CAN-XL_H and CAN-XL_L are used to form the received signal RXD or RxD, and then transmitted to the communication control device 11, as shown in... Figure 3 As shown in the diagram, except in idle or standby mode, the transmitter / receiver 12 with receiver module 122 always listens for the transmission of data or messages 45, 46 on bus 40 during normal operation and, more precisely, regardless of whether the transmitter / receiver 12 is the transmitter of message 45.

[0058] according to Figure 4 For example, signals CAN-XL_H and CAN-XL_L have dominant bus levels and recessive bus levels 401 and 402, respectively, at least during arbitration phase 451, as is known from CAN. A differential signal VDIFF = CAN-XL_H - CAN-XL_L is constructed on bus 40, said differential signal for arbitration phase 451. Figure 5As shown in the diagram, each bit of the signal VDIFF with a bit time t_bt1 can be identified in arbitration phase 451 with a reception threshold T_a of, for example, 0.7V. In data phase 452, the bits of signals CAN-XL_H and CAN-XL_L are transmitted faster, that is, with a shorter bit time t_bt2 compared to arbitration phase 451. Therefore, signals CAN-XL_H and CAN-XL_L are distinguishable from the conventional signals CAN_H and CAN_L in data phase 452, at least in terms of their faster bit rate.

[0059] against Figure 4 The order of states 401 and 402 of signals CAN-XL_H and CAN-XL_L in the data and their origin. Figure 5 The resulting trend of voltage VDIFF is only used to illustrate the function of user station 10. The order of data states for bus states 401 and 402 can be selected according to requirements.

[0060] In other words, if switching to the first running type B_451 (SLOW), the sending module 121 will proceed according to... Figure 4 A first data state as bus state 402 and a second data state as bus state 401 are generated, wherein bus state 402 has different bus levels for two bus wires 41 and 42 for the bus line, and bus state 401 has the same bus level for two bus wires 41 and 42 for the bus line of bus 40.

[0061] Furthermore, the transmitting module 121 transmits bits with a higher bit rate to the bus 40 according to the timing of the signals CAN-XL_H and CAN-XL_L in the second operating type B_452_TX (FAST_TX) of the data phase 452. Moreover, the CAN-XL_H and CAN-XL_L signals can be generated in the data phase 452 using a different physical layer than in the case of CAN FD. Therefore, the bit rate in the data phase 452 can be further increased compared to the case of CAN FD. In the data phase 452, the user station, which is not the transmitter of frame 450, sets the third operating type B_452_RX (FAST_RX) in its transmitting / receiving device.

[0062] If user station 10 acts as the transmitter and / or receiver of frame 450, then Figure 3The bit length adaptation module 15 is activated. Before the communication control device 11 forwards the TxD signal as the TXD_TC signal at the TXD connector to the transmitting / receiving device 12 for transmission onto the bus 40, the bit length adaptation module 15, and in particular its analysis module 151, analyzes the bit sequence in the frame 450. Furthermore, if a bit sequence of at least three bits with the same logic value appears in the TxD signal, the bit length adaptation module 15, and in particular its bit length shortening module 152, can shorten the bits of the TxD signal for the TxD_TC signal, as explained more precisely below.

[0063] The method implemented by the bit length adaptation module 15 is particularly suitable for data phase 452, where one of the user stations 10, 20, and 30 has exclusive access to bus 40 in order to send one of messages 45 or 46, specifically as frame 450. However, alternatively or additionally, the bit length adaptation module 15 can use this method in arbitration phase 451.

[0064] Figure 6 An example for the differential signal VDIFF is shown with respect to time t, which is formed by the digital transmit signal TxD on bus 40. The transmit signal TxD can be generated either according to frame 450 or according to the protocol for CAN FD.

[0065] The bit sequence shown has six bits, namely bits B1 to B6. Bits B1 to B6 have, for example, a bit length t_bt2, which is the bit of data phase 452. However, the bit sequence can appear in any part of frame 450. Therefore, the bit sequence can appear in the first and / or second communication phases 451, 452 of frame 450. The transmit signal TxD is generated by the communication control device 11, which is the transmitter of frame 450, modified in the bit length adaptation module 152, as precisely described below, and then serially transmitted to the transmit / receive device 12 as the transmit signal TXD_TC.

[0066] Bits B1 through B6 have the same structure. Each bit of the signal VDIFF, and therefore bits B1 through B6, are also divided into four segments SY, P1, PP, and P2 with respect to time t. A sampling point TP is set between the first and second segments SY and PP. Furthermore, each bit of the signal VDIFF is divided into multiple time quanta TQ of equal length with respect to time t. The number of time quanta TQs is the same in all bits. The time quanta TQs are assigned to individual segments SY, PP, P1, and P2, where segments SY, PP, P1, and P2 are not of equal length with respect to time t; in other words, they have different numbers of time quanta TQs. Figure 6In this embodiment, segments P1 and P2 are of equal length with respect to time t. In other words, segments P1 and P2 have the same number of time quanta TQ.

[0067] A synchronization segment SY, having a length of time quantum TQ, is set at the beginning of bits B1 to B6. This is followed by a propagation segment PP, which has multiple time quantum TQs. A first sampling point TP for bit sampling is arranged between segment SY and segment PP. A first stage P1 exists after segment PP and before the second sampling point TP for bit sampling. A second stage P2 follows the second sampling point TP. If a transition exists between two different logic values ​​in the transmitted signal TxD, i.e., between 1 and 0 or 0 and 1, the receiving node of frame 450, or receiver, can check whether a transition exists at the expected time. If no transition exists at the expected time at the beginning of the bit, the receiver of frame 450 can calculate the time difference and adapt the time length of stage P1 or stage P2 accordingly. Thus, the receiver can continuously synchronize with the timing of the transmitting node of frame 450, or transmitter. This reduces errors (physical layer effects) caused by incident signals on bus 40.

[0068] The communication control device 11 is designed to sample bits B1 to B6 in the signal RxD received by the bus 40 at a first sampling point TP and a second sampling point TP, respectively, between two segments in the SY, PP, P1, P2 segments.

[0069] exist Figure 6 In the example, the differential signal VDIFF changes its level U between approximately +2V and -2V. This change is determined by a digital transmit signal TxD, or TxD_TC, coupled to bus 40, which changes between logic bit values ​​0 and 1. Here, overshoot of the differential signal VDIFF occurs at the transitions between bit values ​​0 and 1 or 1 and 0, respectively. The corresponding values ​​of bits B1 to B6 of the differential signal VDIFF are obtained in the transmit / receive device 12 by comparing them with the threshold voltage U_TH of the receive threshold T_a. The transmit / receive device 12 here forms the receive signal RxD. If the level U of the differential signal VDIFF is lower than the threshold voltage U_TH, the differential signal VDIFF corresponds to the logic value 0 of the digital transmit signal TxD. If the level U of the differential signal VDIFF is higher than the threshold voltage U_TH, the differential signal VDIFF corresponds to the logic value 1 of the digital transmit signal TxD. Ideally, the logic value of the receive signal RxD corresponds to the logic value of the transmit signal TxD. Otherwise, there is an error.

[0070] If user site 10 was created Figure 6 Upon receiving the transmitted signal TxD, the bit length adaptation module 15, and especially its analysis module 151, identifies the bit sequence 111 after the bit value 0 in the signal TxD. The bit sequence 111 consists of three bits B1 to B3. Subsequently, the bit length adaptation module 15, and especially its analysis module 151, identifies the bit sequence 000 in the signal TxD. The bit sequence 000 consists of three bits B4 to B6.

[0071] Therefore, in the two bit sequences of the digital transmission signal TxD, there are three bits with the same logic value in each sequence. Thus, the bit length shortening module 152 can shorten the bit sequence, as in... Figure 7 As shown in the diagram. Here, the bit length adaptation module 15 performs the following measures.

[0072] Analysis module 151 checks which bits (B1 to B6) of the transmitted signal TxD undergo a logic value transition at the beginning or end of the bit sequence. For example, analysis module 151 checks when an edge occurs between two bits. If three or more bits with the same logic value are transmitted, bits not at the edges of the bit sequence can be transmitted in a shortened manner. In other words, bit length shortening module 152 shortens bits based on the analysis results of analysis module 151, where the bits do not have an edge (bit value change) at the beginning or end of the bit sequence.

[0073] Therefore in Figure 7 In this case, the bit length shortening module 152 is in Figure 7 In the first sequence 111, bit B2 has been shortened. Here, bit length shortening module 152 removes segment PP from bit B2. Bits B1 and B3 remain unchanged in length. Furthermore, bit length shortening module 152... Figure 7 In the second bit sequence 000, bit B5 has been shortened. Here, bit length shortening module 152 removes segment PP from bit B2. Bits B4 and B6 remain unchanged in length.

[0074] The bit length shortening module 152 operates in the same manner, for example, in the case of a 5-bit sequence with the same logic value, during the transmission signal TxD. In this case, the second to fourth bits of the five-bit bit sequence are shortened by segments PP, respectively. Conversely, the first and fifth bits of the bit sequence remain unchanged in terms of their length.

[0075] Shorten for in Figure 6 and Figure 7Bits B2 and B4 in the example are highly advantageous because there are no physical layer effects when there is no state transition or edge between the two bits. Therefore, no incident radiation occurs at bus 40, which would cause errors in the signal VDIFF on bus 40. Because segment PP is the dominant portion of bits B1 to B6 with appropriate length or timing, the bit length adaptation module 15 can significantly reduce the bit rate. At a high bit rate of 5 Mbit / s, more than half of the bit time t_bt1 and t_bt2 can be saved. This can mean up to doubling the bit rate.

[0076] More generally, the bit length adaptation module 15 can be configured to shorten the bit sequence if more than one bit with the same logic value can be sent onto the bus 40. In this case, all interference and errors can no longer affect the bit.

[0077] Conversely, if user station 10 is a receiving user station of bus system 1, and this user station is not a transmitter of frame 450 but only a receiver of frame 450 (receiving node), then user station 10 uses its analysis module 151 to identify the shortened bit length by sampling at the sampling point TP of the received signal RxD. The communication control device 11 samples the received signal RxD specifically after each time quantum TQ. Thus, the receiving node can correctly interpret the received signal according to the specified parameters. Figure 7 The received node samples bits of the signal VDIFF, which are received by bus 40 at its CAN_H and CAN_L connectors. Optionally, the bit length extension module 153 can extend any bits identified as shortened in the received signal RxD back to their normal length. Alternatively, the communication control device 11 analyzes the received signal RxD. However, the communication control device 11 samples the received signal RxD with bits of different lengths after each time quantum TQ.

[0078] The design of user stations 10, 20, and 30 in bus system 1 allows more bits to be transmitted via bus 40 in the same amount of time. This increases the data transfer rate in bus system 1.

[0079] If user stations 10, 20, and 30 are present on bus 40, and these user stations do not understand bit-time shortening, then when one of the bit-length adaptation modules 15, 25, and 35 is activated for the transmission signal TxD, the user station 10, 20, or 30 interferes with communication in bus system 1 via error frames 47. In this case, error frame counting module 154 counts the error frames 47 received by bus 40. Starting from a determined number of error frames 47, analysis module 151 analyzes and no longer uses the method of shortening at least one bit of the bit sequence. In other words, communication control device 11 then only uses the conventional protocol, in which bit shortening is not used. Therefore, the bit-length adaptation modules 15, 25, and 35 associated with user stations 10, 20, and 30 are activated.

[0080] This enables robust emergency operation of communication within Bus System 1. This is particularly advantageous when Bus System 1 is used in vehicles, thus ensuring emergency operation, for example, while the vehicle is in motion.

[0081] The communication control device 11, and in particular its analysis module 151, is able to reduce the count value of the error frame counting module 154 when a message 45, having at least one shortened bit of a bit sequence, is successfully transmitted. Thus, occasional errors not caused by inconsistencies in the communication protocols of user stations 10, 20, 30 at bus 40 will not lead to a reduction in the possible transmittable baud rate in bus system 1.

[0082] In contrast, during software updates of vehicles in the workshop, it is expected that the highest possible data transfer rate can be achieved. This is possible if the new software data is only of interest to a single user station at bus 40. In such cases, it is feasible for workshop testers to selectively use the previously described method for shortening bits for such a long period when sending messages 45 and 46 on bus 40, until one or more incompatible user stations prevent the transmission of error frame 47 and enter an error exception state. From this point onward, the communication control unit 11 can proceed according to... Figure 7 The method for shortening the bit sequence, as described above, is used undisturbed when sending messages 45 and 46. Therefore, the software update can be transmitted in a shorter time compared to conventional messages 45 and 46 that utilize bits of normal length, such as in... Figure 6 As shown in the diagram.

[0083] According to one modification of this embodiment, the bit length adaptation module 15 additionally or alternatively shortens the first or last bit of a bit sequence with the same logical value, for example... Figure 6The first bit of the sequence 111 is either bit B1 or bit B3. However, additional shortening of the first or last bit of a bit sequence with the same logic value is generally more advantageous for increasing the net data rate in bus system 1 than alternative shortening.

[0084] Not only the first bit of the bit sequence, but also the last bit has only a single edge at the bit boundary, and the receiving node synchronizes to said edge. The bit length adaptation module 15 can shorten or omit the segment PP in order to shorten the bit length. Here, the bit length adaptation module 15 assumes that the synchronization edge at the beginning or end of the bit is perfect by definition. In such a case, physical layer effects can be disregarded or tolerated, or fewer physical layer effects can occur, in the bit at the beginning or end of the bit sequence. Therefore, the segment PP can also be shortened or omitted in the case of the bit at the beginning or end of the bit sequence.

[0085] The communication control device 11 synchronizes with a rising voltage difference in the CAN-based bus system, the voltage difference occurring when a bit with a logic value of 1 transitions to a bit with a logic value of 0. Therefore, the bit length adaptation module 15, especially its module 152, will be able to shorten the second to fifth bits of the bit sequence 111110. In the case of the bit sequence 1000001, the bit length adaptation module 15, especially its module 152, will be able to shorten the first to fourth bits of the bit sequence 00000.

[0086] Alternatively, the bit length adaptation module 15 may shorten only the first or last bit of a bit sequence with the same logical value.

[0087] The modifications and alternatives described herein can also achieve higher data transfer rates than in the embodiments described above.

[0088] According to another modification of this embodiment, the bit length adaptation module 15 shortens a segment PP of one bit in the previously described bit sequence in a personalized manner. For example, the bit length adaptation module 15 can shorten the segment PP of one bit in the previously described bit sequence based on which transitions occur within the bit. Therefore, the bit length adaptation module 15 can shorten the value of the segment PP in a personalized manner based on whether a transition from 0 to 1 or from 1 to 0 occurs. Furthermore, the shortening of the segment PP of the bit sequence between the start and end bits can have other values. Figure 7 In the bit sequence 111, the bit length adaptation module 15 can, for example, reduce bit B1. Figure 6 The length of segment PP is reduced by 1 / 3, and conversely, bit B2 is reduced. Figure 6 The length of segment PP is 1 / 2.

[0089] Modification schemes for personalized bit shortening are particularly advantageous when applying a voltage difference of 0 volts and 2 volts, and especially when switching between dominant and recessive bits. In this case, edge distortion can be clearly distinguished between bits. The difference lies in whether the voltage difference transitions from 2 volts to or transforms to 0 volts, or from 0 volts to or transforms to 2 volts.

[0090] Therefore, the bit length adaptation module 15 can individually select the segment PP for each of the two transitions (conversions). Alternatively, if no transition occurs, the bit length adaptation module 15 can individually determine the shortening of the segment PP based on which bits are transmitted in the same order.

[0091] Compared to the embodiments described above, the described modifications and alternatives are able to achieve even higher data transfer rates in each additional use case.

[0092] Figure 8 The signal VDIFF on bus 40 is shown, which is constituted by the bit length adaptation module 15 according to the second embodiment. For this purpose, the bit length adaptation module 15 implements a method that differs from the method according to the foregoing embodiment in the following respects.

[0093] As in Figure 8 As shown, the bit length shortening module 152 is designed to additionally shorten segments P1 and P2 of bits B2 and B3 in the bit sequence 111 consisting of bits B1 to B3. Bits B2 and B3 are bits in the bit sequence 111 in which the segment PP is omitted. Furthermore, the bit length shortening module 152 has already shortened segments P1 and P2 of bits B5 and B6 in the bit sequence 000 of bits B4 to B6, where the shortened segment PP is already present.

[0094] Figure 6 It is feasible to shorten at least one bit of the bit sequence B1 to B3 in the signal in terms of segments P1 and P2, thereby generating Figure 8 The signal is better because it accumulates fewer phase errors through shorter bits.

[0095] When shortening segments P1 and P2, the bit length shortening module 152 considers that synchronization errors are unacceptable, potentially leading to the incorrect reception of untransmitted bits or the incorrect failure to receive transmitted bits. The bit length shortening module 152 ensures this by designing segments P1 and P2 to be sufficiently large. Figure 8 In bit sequence 111, segment P2 of bit B3 is chosen to be greater than bit B2. In other words, in the last bit of a bit sequence with bits having the same logical value, segment P2 is larger than in a bit that is neither the first nor the last bit of the bit sequence.

[0096] Because Figure 6 signals and Figure 8 The signal always has a segment SY at the beginning of each bit, so the receiving node can always synchronize at segment SY when needed. However, segment SY is only considered if the signal VDIFF is at an unchanged level, in order to determine the unchanged level.

[0097] Apart from this, the bus system 1 functions in the same way as in the first embodiment.

[0098] According to the third embodiment, the bit length shortening module 152 is designed to maintain segments P1 and P2 within their original length. Furthermore, the bit length shortening module 152 is designed to send padding bits after the same number of time quanta (TQ), but only after a higher number of bits than in other parts of frame 450.

[0099] In this case, a similar shortening of the signal VDIFF as in the second embodiment can be achieved, in which at least one of the segments P1 and P2 of bits B1 to B6 is shortened in the second embodiment.

[0100] Therefore, a net data rate similar to that in the second embodiment can be achieved in the third embodiment.

[0101] Figure 9 A frame 450A according to the fourth embodiment is shown. Frame 450A can be used by the communication control device 11 to create a transmit signal TxD and / or to analyze a receive signal RxD, as described above.

[0102] In frame 450A, control segment 454 includes at least one bit B_V. The fewer bits B_V are included, the less the net data rate that can be transmitted in bus system 1 is reduced.

[0103] At least one bit B_V indicates whether one or more bit sequences with the same logic value have been transmitted in a shortened manner in the received signal RxD, which is then received by bus 40.

[0104] Therefore, the transmitting node can communicate with the receiving node at bus 40, via at least one bit B_V, how the currently received received signal RxD will be analyzed. Thus, the receiving node can correctly account for the shortening of the bit sequence when analyzing the currently received received signal RxD.

[0105] In other words, the method for shortening bit sequences with the same logical value, as described above, is applied according to... Figure 7 or Figure 8It can be notified in advance through the bits reserved in the header of message 45.

[0106] This also ensures backward compatibility with known communication protocols, especially CAN-based protocols.

[0107] Alternatively, data segment 455 contains at least one bit B_V.

[0108] Figure 10 A frame 450B according to the fifth embodiment is shown. Frame 450B can be used by the communication control device 11 to create a transmit signal TxD and / or to analyze a receive signal RxD, as described above.

[0109] In frame 450B, data segment 455 contains at least one bit B_V. At least one bit B_V indicates that in message 45 to be transmitted via bus 40, a bit sequence with the same logical value is transmitted in a shortened manner. Therefore, the receiving node knows whether one or more bit sequences with the same logical value in the following receive signal RxD have been shortened, as shown in... Figure 7 In or in Figure 8 As shown in the diagram.

[0110] If more than one bit B_V is involved, it can be communicated which of the following messages 45 and 46 is modified at bus 40 such that one or more bit sequences of bits having the same logical value are shortened. For example, a special identifier for message 45 or 46 can then be encoded in a bit sequence of at least two bits B_V.

[0111] Therefore, the transmitting node can convey to the receiving node in bit B_V how the received signal RxD of the next message 45, 46 received by bus 40 can be analyzed. Thus, the receiving node can correctly take into account the shortening of the bit sequence when analyzing the currently received received signal RxD.

[0112] In other words, the method for shortening bit sequences with the same logical value, as described above, is applied according to... Figure 7 or Figure 8 They can be notified in advance in previous messages.

[0113] It is feasible to use, at least in part, a shortening of the bit sequence of bits with the same logical value in messages created based on frame 450B.

[0114] This also ensures backward compatibility with known communication protocols, especially CAN-based protocols.

[0115] User stations 10, 20, and 30, bus system 1, and all the foregoing design schemes of the methods implemented herein can be used individually or in all feasible combinations. In particular, all features of the foregoing embodiments and / or modifications thereof can be combined arbitrarily. Additionally or alternatively, the following modifications are particularly conceivable.

[0116] Even though the invention has been described above in the example of a CAN bus system, it can be applied in every communication network and / or communication method that uses two different communication phases in which the bus states differ and are generated for the different communication phases. The invention is particularly applicable in the development of other serial communication networks such as 100 Base-T1 Ethernet, fieldbus systems, etc.

[0117] According to embodiments, bus system 1 can be particularly a communication network in which data can be transmitted serially at two different bit rates. An advantageous, but not necessarily necessary, prerequisite is that bus system 1 ensures, at least for a defined time period, exclusive, conflict-free access for user stations 10, 20, and 30 to a common channel.

[0118] The number and arrangement of user stations 10, 20, and 30 in the bus system 1 of this embodiment are arbitrary. In particular, user station 20 can be omitted from the bus system 1. It is feasible to have one or more user stations, either user station 10 or user station 30, in the bus system 1. It is conceivable that all user stations in the bus system 1 are designed identically, that is, only user station 10 or only user station 30 exists.

Claims

1. A communication control device (11; 21; 31) for a user station (10; 20; 30) for a serial bus system (1). in, The communication control device (11; 21; 31) is designed to control communication between the user stations (10; 20; 30) of the bus system (1) and at least one other user station (10; 20; 30) and to generate a transmit signal (TxD) and / or to receive a signal (VDIFF) from the bus (40), the transmit signal being sent to the bus (40) of the bus system (1). The communication control device (11; 21; 31) is designed to generate the transmission signal (TxD) according to a frame (450), wherein bits with a predetermined time length are set in the frame. The communication control device (11; 21; 31) is designed to shorten by at least one bit in the frame (450) compared to other bits in the bit sequence, the at least one bit being arranged in a bit sequence of at least two bits having the same logic value. Furthermore, the communication control device (11; 21; 31) is designed to not shorten bits that are not arranged in a bit sequence of at least two bits having the same logic value. Each bit is divided into four segments (SY, PP, P1, P2) with respect to time (t) without shortening. Specifically, a first sampling point is set between the first segment (SY) and the second segment (PP), and A second sampling point is set between the third segment (P1) and the fourth segment (P2).

2. The communication control device (11; 21; 31) according to claim 1. in, The communication control device (11; 21; 31) is designed to use the first sampling point and the second sampling point to determine the logic value of the bit in the received signal (RxD), and the communication control device (11; 21; 31) receives the received signal for the transmit signal (TxD_TC) transmitted through the bus (40).

3. The communication control device (11; 21; 31) according to claim 2, wherein, Two segments (PP, P1) are arranged between the first sampling point and the second sampling point without shortening the position.

4. The communication control device (11; 21; 31) according to claim 2 or 3, wherein, The communication control device (11; 21; 31) is designed to shorten the second bit (B2; B5) of the bit sequence and each subsequent bit (B3; B6) of the bit sequence.

5. The communication control device (11; 21; 31) according to any one of claims 1 to 3. in, The communication control device (11; 21; 31) is designed to shorten the segment (P1) directly preceding the second sampling point in the second bit (B2; B5) and each subsequent bit (B3; B6) of the bit sequence. The communication control device (11; 21; 31) is designed to less drastically shorten the segments (P2) in the second bit (B2; B5) of the bit sequence and in each subsequent bit (B3; B6) of the bit sequence that are directly arranged after the second sampling point, compared to the segment (P1) in the last bit (B3; B6) of the bit sequence that is directly arranged before the second sampling point.

6. The communication control device (11; 21; 31) according to any one of claims 1 to 3, wherein, The communication control device (11; 21; 31) is designed to more drastically shorten the bits (B2; B5) arranged between the first (B1; B4) and the last (B3; B6) bits of the bit sequence compared to the last bit (B3; B6).

7. The communication control device (11; 21; 31) according to claim 6, wherein, The communication control device (11; 21; 31) is designed such that the last bit (B3; B6) of the bit sequence is shortened more drastically than the first bit (B1; B4) of the bit sequence.

8. The communication control device (11; 21; 31) according to any one of claims 1 to 3, wherein, The communication control device (11; 21; 31) is designed to determine the shortened length of the bits in the bit sequence for individual bit-specific purposes.

9. The communication control device (11; 21; 31) according to any one of claims 1 to 3, wherein, The communication control device (11; 21; 31) has: Analysis module (151), the analysis module being used to analyze whether a bit sequence of at least two bits having the same logic value is arranged in the transmit signal (TxD) created by the communication control device (11; 21; 31), and Bit length shortening module (152), the bit length shortening module is used to shorten at least one bit in the bit sequence, the bit sequence being determined by the analysis module (151) during analysis.

10. The communication control device (11; 21; 31) according to any one of claims 1 to 3, wherein, The communication control device (11; 21; 31) has: Bit length extension module (153), the bit length extension module being used to extend at least one bit in a bit sequence, the at least one bit being included as a shortened bit in a signal (VDIFF) received by the bus, and / or Error frame counting module (154) is used to count the error frames (47) received by the bus (40).

11. The communication control device (11; 21; 31) according to any one of claims 1 to 3, wherein, The communication control device (11; 21; 31) is designed to add at least one predetermined bit to the transmit signal (TxD), the predetermined bit indicating to the receiving node in the bus system (1) that the signal (VDIFF) currently received by the bus (40) has at least one bit arranged in a bit sequence of at least two bits having the same logic value and shortened compared to the other bits of the bit sequence.

12. The communication control device (11; 21; 31) according to any one of claims 1 to 3. in, The communication control devices (11; 21; 31) are designed to generate a transmission signal (TXD) such that, for the message (45) exchanged between user stations (10, 20, 30) of the bus system (1), the bit time (t_bt1) of the signal transmitted on the bus (40) in the first communication phase (451) can be different from the bit time (t_bt2) of the signal transmitted in the second communication phase (452), and In the first communication phase (451), it is agreed which user station (10, 20, 30) of the bus system (1) will obtain at least temporary, exclusive, conflict-free access to the bus (40) in the subsequent second communication phase (452), and The communication control device (11; 21; 31) is designed to shorten at least one bit of a bit sequence in the first and / or second communication phase (451, 452), the bit sequence having at least two bits with the same logic value.

13. The communication control device (11; 21; 31) according to claim 12, wherein, The frame (450) formed for the message (45) is constructed in a manner compatible with CAN FD and / or CAN XL.

14. A user station (10; 20; 30) for a serial bus system (1), the user station having a communication control device (11; 21; 31) according to any one of claims 1 to 13, and further having a transmitting / receiving device (22) for transmitting a transmit signal (TXD) to a bus (40) of the bus system (1). in, The transmitting / receiving device (22) is designed to transmit the entire frame (450) onto the bus (40) in the first communication phase (451) in an operating type (B_452_TX) for transmitting and receiving the frame (450).

15. A bus system (1) having Bus (40), and At least two user stations (10; 20; 30) are connected to each other via the bus (40) in such a way that the user stations can communicate serially with each other, and at least one of the user stations (10; 20; 30) is the user station (10; 20; 30) according to claim 14.

16. A method for communication in a serial bus system (1), wherein, The method is implemented using a communication control device (11; 21; 31) of a user station (10; 20; 30) for the bus system (1), wherein the method comprises the following steps: The communication control device (11; 21; 31) is used to control the communication between the user station (10; 20; 30) of the bus system (1) and at least one other user station (10; 20; 30), and is used to generate a transmit signal (TxD) for transmission to the bus (40) of the bus system (1) and / or to receive a signal (VDIFF) from the bus (40). The communication control device (11; 21; 31) generates the transmission signal (TxD) according to a frame (450), and sets bits with a predetermined time length in the frame. In this context, the communication control device (11; 21; 31) shortens the frame (450) by at least one bit compared to other bits in the bit sequence, the at least one bit being arranged in a bit sequence of at least two bits having the same logical value, and The communication control device (11; 21; 31) does not shorten bits that are not arranged in a bit sequence of at least two bits with the same logic value. Each bit is divided into four segments (SY, PP, P1, P2) with respect to time (t) without shortening. Specifically, a first sampling point is set between the first segment (SY) and the second segment (PP), and A second sampling point is set between the third segment (P1) and the fourth segment (P2).

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