A digital soft-switch modulator
Patent Information
- Application Number
- CN202210333556.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-03-31
- Publication Date
- 2026-09-25
- Estimated Expiration
- 2042-03-31
AI Technical Summary
[0005]针对现有技术的缺陷,本发明的目的在于提供一种数字软开关调制器,旨在解决现有的LLC谐振变换器由于在频率固定的情况下无法通过改变占空比调节电压且需要功率因数矫正器PFC配合使用,导致LLC谐振变换器无法得到广泛应用的问题
[0027]本发明提供的数字软开关调制器不需要额外的数字处理技术芯片DSP和程序代码,只需要一级的模数转换A/D和数模转换D/A,配合模拟反馈电压就能控制软开关,整体数字软开关调制器的电路简单,容易实现。具体为:A/D转换器用于比较模拟反馈电压和基准电压的大小,输出比较输出信号;逻辑转换器用于接收比较输出信号,当比较输出信号为高电平时,驱动信号G1和G2输出为0,软开关不进行工作;当比较输出信号为低电平时,结合一对互补的激励方波信号和一个直流方波信号,将比较输出信号进行频率和相位的量化,控制驱动信号G1和G2的输出,进而控制软开关。实现对数字软开关调制器的实时调制控制。
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Figure CN114744894B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the fields of digital control, resonant soft-switching power supplies and pulse density modulation, and more specifically, relates to a digital soft-switching modulator. Background Technology
[0002] Existing digital switching power supplies use square wave duty cycle PWM modulation, which requires digital processing technology chips (DSP) and program code for control, making the entire control process relatively complex. Furthermore, the PWM wave controlled by existing numerical control technology is a hard switch, which cannot improve efficiency.
[0003] The initial soft-switching technology proposed was a 100% duty cycle resonant converter, which had high conversion efficiency. However, with a fixed frequency, the voltage could not be adjusted by changing the duty cycle, thus failing to achieve voltage regulation. Therefore, the LLC resonant converter was later proposed. It is an improved series resonant converter that operates under zero-voltage switching conditions across the entire load range, thus exhibiting high efficiency. Furthermore, voltage regulation can be achieved by adjusting the operating frequency. However, its operating frequency variation range is relatively narrow, making it unsuitable for wide voltage input ranges. In practice, the circuit of the LLC resonant converter must be used in conjunction with a power factor correction (PFC) device. Its complexity and limitations have prevented its widespread application.
[0004] In addition, existing pulse density modulation is generally used in open-loop applications, but its working stability is poor in closed-loop scenarios, and the power regulation is in a stepped mode. In the existing improved closed-loop more stable pulse density modulation, a single DC pulse is used, which can be better applied to hard switching. However, pulse density modulation is rarely used in soft switching at present. Summary of the Invention
[0005] To address the shortcomings of existing technologies, the present invention aims to provide a digital soft-switching modulator, which solves the problem that existing LLC resonant converters cannot be widely used because they cannot adjust the voltage by changing the duty cycle when the frequency is fixed and require the use of a power factor correction (PFC).
[0006] To achieve the above objectives, the present invention provides a digital soft-switching modulator, comprising: an A / D converter, a logic converter, a soft switch, and a D / A converter connected in sequence; the output terminal of the D / A converter is connected to the input terminal of the A / D converter;
[0007] The A / D converter is used to compare the magnitudes of the analog feedback voltage FB and the reference voltage VREF, and outputs a comparison output signal VO1 to digitize the analog feedback voltage FB.
[0008] The logic converter receives the comparison output signal VO1. When the comparison output signal VO1 is high, the drive signals G1 and G2 output 0. When the comparison output signal VO1 is low, it combines a pair of complementary excitation square wave signals (H and L) and a DC square wave signal Q1 to quantize the frequency and phase of the comparison output signal VO1, controlling the output of drive signals G1 and G2. The complementary excitation square wave signal and the DC square wave signal have the same frequency, and the phase of the DC square wave signal Q1 leads the complementary excitation square wave signal (H and L).
[0009] The soft-switching resonant converter has a 100% duty cycle and is used to drive the first MOSFET and the second MOSFET respectively with drive signals G1 and G2 to output an AC square wave pulse CD; wherein, the waveform of the AC square wave pulse CD is a pulse density modulated waveform.
[0010] The D / A converter is used to filter the rectified pulsating DC square wave through an LC low-pass filter to obtain the analog output voltage VO; and after the analog output voltage VO is divided, it is output through optocoupler isolation to output the analog feedback voltage FB.
[0011] Specifically, when the reference voltage VREF is regulated, the analog output voltage VO is regulated; when the reference voltage VREF is transformed, the analog output voltage VO is amplified.
[0012] More preferably, the A / D converter is a comparator. The non-inverting input terminal of the comparator receives the analog feedback voltage FB, and the inverting input terminal receives the reference voltage VREF. When the analog feedback voltage FB is greater than the reference voltage VREF, the comparison output signal is high; when the analog feedback voltage FB is less than the reference voltage VREF, the comparison output signal is low.
[0013] More preferably, the logic converter includes a signal generator, a flip-flop, and a trigger driver connected in sequence; the input of the flip-flop is connected to the output of the comparator;
[0014] The signal generator is used to generate complementary excitation square wave signals (H and L) and DC square wave signal Q1; wherein the complementary excitation square wave signals (H and L) and DC square wave signal Q1 have the same frequency, and the phase of DC square wave signal Q1 leads the complementary excitation square wave signals (H and L).
[0015] The trigger is used to prevent the drive from starting when the comparison output signal VO1 is high; when the comparison output signal VO1 is low, it takes the comparison output signal VO1 and the DC square wave signal Q1 as inputs, compares the frequency width of the comparison output signal VO1 with that of the DC square wave signal Q1, expands the frequency width of the comparison output signal to the nearest larger integer multiple of the frequency width of the DC square wave signal, and outputs an intermediate signal Q2; wherein, the frequency of the intermediate signal Q2 is half that of the DC square wave signal Q1, and its phase is equal to that of the DC square wave signal Q1;
[0016] The trigger driver is used to input the intermediate signal Q2 at the control terminal, and combined with complementary excitation square wave signals (H and L), it controls the output drive signals G1 and G2.
[0017] The intermediate signal frequency is half the frequency of G1 and G2, and the phase of the intermediate signal Q2 leads the driving signals G1 and G2. The driving signals G1 and G2 are complementary square waves with a duty cycle of less than 100%. The driving signals G1 and G2 are complementary to form an independent composite pulse, which exhibits pulse density modulation.
[0018] More preferably, the soft switch is a half-bridge resonant converter, including a first capacitor C1, a first MOSFET, a second MOSFET, a second capacitor CS, a first transformer, a first diode D1, and a second diode D2;
[0019] The first capacitor is connected in parallel with the first MOSFET and the second MOSFET; drive signals G1 and G2 drive the first MOSFET and the second MOSFET respectively; the first diode D1 and the second diode D2 are connected to both sides of the secondary side of the first transformer respectively; the second capacitor CS is connected in parallel with the first transformer and the second MOSFET.
[0020] When the intermediate signal is low, the first and second MOSFETs in the half-bridge resonant converter operate in a zero-voltage switching state, and the secondary side of the first transformer outputs an AC square wave pulse CD. The first diode D1 and the second diode D2 are used to perform full-wave rectification of the AC square wave pulse to output a pulsating DC square wave. When the intermediate signal Q2 is high, the AC square wave pulse CD stops being output.
[0021] More preferably, the D / A converter includes an LC low-pass filter, a feedback optocoupler, a first resistor, a second resistor, and a third resistor;
[0022] The first and second resistors are connected in series. The output of the third capacitor in the LC low-pass filter forms a loop with the first and second resistors. The second resistor is connected in parallel with the feedback optocoupler. One end of the third resistor is connected to the output of the feedback optocoupler, and the other end is grounded.
[0023] The LC low-pass filter is used to perform low-pass filtering on the pulsating DC square wave. The output voltage of the third capacitor is the analog output voltage VO. The first resistor and the second resistor are used to divide the analog output voltage VO. The feedback optocoupler is used to isolate the voltage division generated by the second resistor and generates an analog feedback voltage FB on the output side.
[0024] More preferably, the trigger is a D-type trigger.
[0025] More preferably, the DC square wave signal has a phase lead time greater than the soft-switching turn-on time compared to the complementary excitation square wave signal.
[0026] In summary, the technical solutions conceived by this invention have the following beneficial effects compared with the prior art:
[0027] The digital soft-switching modulator provided by this invention does not require additional digital processing technology chips (DSPs) or program code. It only requires a single-stage analog-to-digital converter (A / D) and a digital-to-analog converter (D / A). Combined with analog feedback voltage, it can control soft switching. The overall circuit of the digital soft-switching modulator is simple and easy to implement. Specifically: the A / D converter compares the magnitudes of the analog feedback voltage and the reference voltage, outputting a comparison output signal; the logic converter receives the comparison output signal. When the comparison output signal is high, the drive signals G1 and G2 output 0, and the soft switch does not operate. When the comparison output signal is low, a pair of complementary excitation square wave signals and a DC square wave signal are combined to quantize the frequency and phase of the comparison output signal, controlling the output of drive signals G1 and G2, thereby controlling the soft switch. This achieves real-time modulation control of the digital soft-switching modulator.
[0028] This invention employs a logic converter. When the comparison output signal is low, it combines a pair of complementary square wave signals and a DC square wave signal to quantize the frequency and phase of the comparison output signal, outputting drive signals G1 and G2. Drive signals G1 and G2 drive the first MOSFET and the second MOSFET respectively, outputting AC square wave pulses. The waveform of these AC square wave pulses is a pulse density modulation waveform, which, compared to traditional DC square wave pulses, is a pulse width modulation waveform. This invention does not require PFC other than a digital conversion power supply, and has a wide range of applications. Because it uses digital conversion technology, it can directly convert to a digital control topology.
[0029] This invention, by applying pulse density modulation, enables real-time adjustment of the output voltage of a 100% duty cycle resonant converter, and can better achieve soft switching. Compared with traditional hard switching and LLC soft switching (which requires PFC assistance), the digital soft-switching modulator has higher conversion efficiency. Attached Figure Description
[0030] Figure 1This is a schematic diagram of the structure of the digital soft-switching modulator provided in an embodiment of the present invention;
[0031] Figure 2 This is a schematic diagram of the structure of the A / D converter provided in an embodiment of the present invention;
[0032] Figure 3 This is a schematic diagram of the logic converter structure provided in an embodiment of the present invention;
[0033] Figure 4 This is a schematic diagram of a soft switch provided in an embodiment of the present invention;
[0034] Figure 5 This is a schematic diagram of the structure of the D / A converter provided in an embodiment of the present invention;
[0035] Figure 6 This is the operating waveform of the digital soft-switching modulator during voltage regulation provided in this embodiment of the invention;
[0036] Figure 7 This is the working waveform of the digital soft-switching modulator during amplification provided in the embodiments of the present invention. Detailed Implementation
[0037] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.
[0038] Example
[0039] like Figure 1 As shown, this embodiment of the invention provides a digital soft-switching modulator, including: an A / D converter, a logic converter, a soft switch, and a D / A converter;
[0040] A / D converters are used to digitize analog feedback voltages;
[0041] More specifically, such as Figure 2 As shown, the A / D converter is comparator U1, which receives the analog feedback voltage FB at its non-inverting input and the reference voltage VREF at its inverting input, and outputs the comparison output signal VO1. This comparator U1 is a one-bit A / D converter, and its operating waveform is as follows. Figure 6The diagram shows VREF, FB, and VO1. The reference voltage VREF is compared with the analog feedback voltage FB, and the output comparison signal VO1 controls the stopping and starting of the soft-switching drive. More specifically, when the reference voltage VREF is a stable voltage, and the analog feedback signal FB is greater than the reference voltage VREF, VO1 outputs a high level (1). At this time, the flip-flop U3 in the logic converter stops driving, and the outputs G1 and G2 of the trigger driver are zero. When the analog feedback signal FB is less than the reference voltage VREF, VO1 outputs a low level (0), the flip-flop U3 starts driving, and the trigger driver outputs G1 and G2. Figure 6 For unified timing during voltage regulation; after rectification by D1 and D2, the smoothing effect of inductors and capacitors is used to stabilize the analog output voltage VO; when the voltage at the VREF terminal changes, the operation of the comparator is the same as when VREF is regulated, except that the output VO is amplified, including the amplitude, frequency, phase and waveform of the output VO changing synchronously in real time.
[0042] The logic converter is used to quantize the frequency and phase of the comparison output signal VO1 from the A / D converter, and output drive signals G1 and G2.
[0043] More specifically, such as Figure 3 As shown, the logic converter includes a signal generator U2, a flip-flop U3, and a trigger driver U4;
[0044] Signal generator U2 produces three outputs: output signals H, L, and Q1; where H and L are complementary square wave signals, and Q1 is a DC square wave signal, as shown below. Figure 6 The H, L and Q1 operating waveforms are shown. Their frequencies are determined by the power supply design. All three have the same frequency. Q1's phase leads the complementary square wave signals H and L by an angle Φ. This phase lead enables the digital soft-switching modulator to work stably.
[0045] The control input VO1 of trigger U3 and the clock input DC square wave signal Q1 result in the output Q2. The operating waveform is as follows: Figure 6 As shown in Q1, VO1, and Q2, the frequency of Q2 is half that of Q1, while the phase remains unchanged. Flip-flop U3 is a quantizer, causing the disordered output VO1 of the A / D converter to be quantized in both frequency and phase, resulting in an ordered and undamaged waveform for output Q2. The frequency width of output Q2 is compared with the frequency width of the DC square wave signal Q1, and is determined to be the nearest larger integer multiple of the frequency width of VO1. Here, the nearest larger integer multiple is defined as m times the frequency width of output Q2, where m is a non-integer between n and n+1, and n and n+1 are integers. For example, when the frequency width of output Q2 is 1.2 times the frequency width of VO1, the frequency width of output Q2 is expanded to twice the frequency width of VO1.
[0046] The control terminal SD of the trigger driver U4 is connected to Q2, which controls the output of drive signals G1 and G2 via inputs H and L. The frequency of Q2 is half the frequency of G1 and G2, ensuring that G1 and G2 appear in pairs and preventing saturation distortion of transformer L1. The phase of Q2 leads G1 and G2, reliably turning off G1 and G2. Its operating waveform is as follows: Figure 6 As shown in the diagram, Q2, H, L, G1, and G2 have a frequency that is half that of Q1. Therefore, the duration of a single pulse of Q2 is equal to the sum of the durations of single pulses of G1 and G2. The driving signals G1 and G2 are complementary square waves that can drive MOSFETs. In practical applications, considering the dead time, their duty cycle is slightly less than 100% to ensure that MOSFETs M1 and M2 will not be turned on simultaneously. The complementary waves of G1 and G2 form an independent composite pulse, which exhibits pulse density modulation.
[0047] Figure 4 For soft switching, it uses a resonant converter with a 100% duty cycle. This diagram uses a half-bridge resonant converter as an example. MOSFETs M1 and M2 operate in a zero-voltage switching state, and the waveform of transformer L1 is as follows. Figure 6 When CD is in operation, Q2 is high and CD stops; when Q2 is low, CD outputs an AC square wave pulse. The CD as a whole exhibits a pulse density modulation waveform, and its single pulse is theoretically an AC square wave with a 100% duty cycle.
[0048] Figure 5 The D / A converter includes an LC low-pass filter and a feedback optocoupler U5, used to demodulate the pulse density modulation output analog output voltage and generate an analog feedback signal FB; A and B are connected... Figure 4 In soft switching, the analog output voltage VO is output through low-pass filter L2 and capacitor C0. R1 and R2 divide the voltage, and the voltage generated by R2 is isolated by optocoupler U5. In the figure, FB is the analog feedback voltage. Whether the analog output voltage VO is regulated or amplified depends on whether the input voltage is regulated or transformed.
[0049] Figure 6 The waveform diagram for VREF voltage regulation includes the working waveforms of VREF, FB, VO1, H, L, Q1, Q2, G1, G2 and CD. They have a unified timing sequence, and the output VO remains stable.
[0050] When the VREF input is a changing voltage Figure 6 When the working waveform changes, its output VO changes with VREF, which is an amplification function, such as... Figure 7 As shown.
[0051] In summary, the digital soft-switching modulator provided by this invention does not require additional digital processing technology chips (DSPs) or program code. It only requires a single-stage analog-to-digital converter (A / D) and a digital-to-analog converter (D / A). Combined with analog feedback voltage, it can control soft switching. The overall circuit of the digital soft-switching modulator is simple and easy to implement. Specifically: the A / D converter compares the magnitudes of the analog feedback voltage and the reference voltage, outputting a comparison output signal; the logic converter receives the comparison output signal. When the comparison output signal is high, the drive signals G1 and G2 output 0, and the soft switch does not operate. When the comparison output signal is low, a pair of complementary excitation square wave signals and a DC square wave signal are combined to quantize the frequency and phase of the comparison output signal, controlling the output of drive signals G1 and G2, thereby controlling the soft switch. This achieves real-time modulation control of the digital soft-switching modulator.
[0052] This invention employs a logic converter. When the comparison output signal is low, it combines a pair of complementary square wave signals and a DC square wave signal to quantize the frequency and phase of the comparison output signal, outputting drive signals G1 and G2. Drive signals G1 and G2 drive the first MOSFET and the second MOSFET respectively, outputting AC square wave pulses. The waveform of these AC square wave pulses is a pulse density modulation waveform, which, compared to traditional DC square wave pulses, is a pulse width modulation waveform. This invention does not require PFC other than a digital conversion power supply, and has a wide range of applications. Because it uses digital conversion technology, it can directly convert to a digital control topology.
[0053] This invention, by applying pulse density modulation, enables real-time adjustment of the output voltage of a 100% duty cycle resonant converter, and can better achieve soft switching. Compared with traditional hard switching and LLC soft switching (which requires PFC assistance), the digital soft-switching modulator has higher conversion efficiency.
[0054] Those skilled in the art will readily understand that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.
Claims
1. A digital soft-switching modulator, characterized in that, include: A sequentially connected A / D converter, logic converter, soft switch, and D / A converter; The output terminal of the D / A converter is connected to the input terminal of the A / D converter; The A / D converter is used to compare the magnitudes of the analog feedback voltage and the reference voltage, output a comparison output signal, and digitize the analog feedback voltage. The logic converter is used to receive the comparison output signal. When the comparison output signal is high, the drive signals G1 and G2 output 0. When the comparison output signal is low, the comparison output signal is quantized in terms of frequency and phase by combining a pair of complementary excitation square wave signals and a DC square wave signal, thereby controlling the output of the drive signals G1 and G2 to be 1. The complementary excitation square wave signal and the DC square wave signal have the same frequency, and the phase of the DC square wave signal leads the complementary excitation square wave signal. The soft switch is a 100% resonant converter used to drive the first MOSFET and the second MOSFET respectively with drive signals G1 and G2 to output AC square wave pulses; wherein, the waveform of the AC square wave pulse is a pulse density modulation waveform, which is rectified and converted into a pulsating DC square wave. The D / A converter is used to obtain an analog output voltage by rectifying a pulsating DC square wave through an LC low-pass filter; and after the analog output voltage is divided, it is output through optocoupler isolation to output the analog feedback voltage. Wherein, when the reference voltage is regulated, the analog output voltage is regulated; when the reference voltage is transformed, the analog output voltage is amplified. The logic converter includes: a signal generator, a flip-flop, and a trigger driver connected in sequence; the input of the flip-flop is connected to the output of the comparator. The signal generator is used to generate complementary excitation square wave signals and DC square wave signals; wherein the complementary excitation square wave signals and the DC square wave signals have the same frequency, and the phase of the DC square wave signals leads the complementary excitation square wave signals. The trigger is configured to not start the drive when the comparison output signal is high; when the comparison output signal is low, it compares the frequency width of the comparison output signal with that of the DC square wave signal, using the comparison output signal and the DC square wave signal as inputs, expands the frequency width of the comparison output signal to the nearest larger integer multiple of the frequency width of the DC square wave signal, and outputs an intermediate signal; wherein the frequency of the intermediate signal is half that of the DC square wave signal, and its phase is equal to that of the DC square wave signal; The trigger driver is used to input an intermediate signal at the control terminal, and combined with complementary excitation square wave signals, to control the output drive signals G1 and G2. The intermediate signal frequency is half the frequency of G1 and G2, and the phase of the intermediate signal leads the driving signals G1 and G2; the driving signals G1 and G2 are complementary square waves with a duty cycle of less than 100%, and the driving signals G1 and G2 are complementary to form an independent composite pulse, which exhibits pulse density modulation.
2. The digital soft-switching modulator according to claim 1, characterized in that, The A / D converter is a comparator. The analog feedback voltage is input to the non-inverting input terminal of the comparator, and the reference voltage is input to the inverting input terminal. When the analog feedback voltage is greater than the reference voltage, the comparison output signal is high; when the analog feedback voltage is less than the reference voltage, the comparison output signal is low.
3. The digital soft-switching modulator according to claim 1, characterized in that, The soft-switching circuit is a half-bridge resonant converter, including a first capacitor C1, a first MOSFET, a second MOSFET, a second capacitor CS, a first transformer, a first diode D1, and a second diode D2. The first capacitor is connected in parallel with the first MOSFET and the second MOSFET; drive signals G1 and G2 drive the first MOSFET and the second MOSFET respectively; the second capacitor CS and the first transformer are connected in parallel with the second MOSFET; the first diode D1 and the second diode D2 are connected to both sides of the secondary side of the first transformer respectively; When the intermediate signal is low, the first MOSFET and the second MOSFET in the half-bridge resonant converter operate in a zero-voltage switching state, the secondary side of the first transformer outputs an AC square wave pulse, and the first diode D1 and the second diode D2 are used to perform full-wave rectification of the AC square wave pulse to output a pulsating DC square wave; when the intermediate signal is high, the AC square wave pulse stops being output.
4. The digital soft-switching modulator according to claim 3, characterized in that, The D / A converter includes: an LC low-pass filter, a feedback optocoupler, a first resistor, a second resistor, and a third resistor; The first and second resistors are connected in series. The output of the third capacitor in the LC low-pass filter forms a loop with the first and second resistors. The second resistor is connected in parallel with the feedback optocoupler. One end of the third resistor is connected to the output of the feedback optocoupler, and the other end is grounded. The LC low-pass filter is used to perform low-pass filtering on the pulsating DC square wave, and the output voltage of the third capacitor is the analog output voltage; the first resistor and the second resistor are used to divide the analog output voltage; the feedback optocoupler is used to isolate the voltage division generated by the second resistor, and generates an analog feedback voltage on the output side.
5. The digital soft-switching modulator according to claim 1, characterized in that, The trigger is a D-type trigger.
6. The digital soft-switching modulator according to claim 1, characterized in that, The DC square wave signal has a phase lead time greater than that of the complementary excitation square wave signal, which is longer than the soft-switching turn-on time.
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