Semiconductor chip and method of manufacturing the same

Abstract

The disclosure provides a semiconductor chip, comprising: a base layer chip, and an electrode layer arranged on the base layer chip, wherein the electrode layer forms a plurality of holes; wherein the melting point of the electrode layer is less than 300 DEG C, and the electrode layer is made of one of a tin, indium alloy material and a tin alloy material.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor chips, and more particularly to a semiconductor chip in which an electrode layer forms multiple holes and a method for fabricating the same. Background Technology

[0002] Semiconductor chips are widely used in the electronics industry due to their small size, wide range of applications, and low manufacturing costs. Conductive paste, as a key material for encapsulating semiconductor chip electrodes, suffers from poor adhesion between the paste and the electrodes after encapsulation due to the presence of large-diameter particles. This results in weak bonding between the conductive paste and the chip electrodes, leading to unstable electrical properties in the semiconductor chip. Summary of the Invention

[0003] In view of this, the main objective of this disclosure is to provide a semiconductor chip and a method for fabricating the same, in order to at least partially solve at least one of the aforementioned technical problems.

[0004] According to one aspect of this disclosure, a semiconductor chip is provided, comprising: a base chip and an electrode layer disposed on the base chip, wherein the electrode layer forms a plurality of holes; wherein the electrode layer has a melting point of less than 300°C and is made of one of tin, indium alloy and tin alloy.

[0005] In some embodiments of this disclosure, the size of the plurality of holes ranges from 0.1 μm to 10 μm.

[0006] In some embodiments of this disclosure, the shape of the plurality of holes includes at least one of spherical and ellipsoidal shapes.

[0007] In some embodiments of this disclosure, the base chip includes any one of a silicon-based integrated circuit, a gallium nitride diode, a gallium arsenide diode, an indium phosphide diode, a silicon carbide diode, a transistor integrated circuit, and a light-emitting diode.

[0008] In some embodiments of this disclosure, the base chip is a wafer with a diameter of 50 mm to 400 mm or a cube with a side length of 10 mm to 400 mm.

[0009] According to another aspect of this disclosure, a method for fabricating a semiconductor chip as described above is provided, comprising: step S1: adhering particulate matter to an adhesive film; step S2: attaching the adhesive film containing the particulate matter to a base chip having an initial electrode, wherein the melting point of the initial electrode is lower than the melting point of the adhesive film; step S3: pressing the adhesive film, the particulate matter, the initial electrode, and the base chip together, and melting the initial electrode by heating, so that the particulate matter on the adhesive film is embedded in the melted initial electrode; step S4: solidifying the initial electrode, so that the particulate matter is fixed in the initial electrode; step S5: removing the adhesive film to form a transition chip; and step S6: immersing the transition chip in an etching solution to etch the particulate matter, thereby forming the semiconductor chip.

[0010] In some embodiments of this disclosure, the melting point of the adhesive film is greater than 300°C.

[0011] In some embodiments of this disclosure, the particulate matter is a copper sphere with an outer diameter of 1–5 μm; and / or in step S3, the adhesive film, the particulate matter, the initial electrode, and the base chip are pressed together at a temperature of 230–260°C for 235–245 s; and / or in step S6, the transition chip is immersed in ferric chloride etching solution to etch the particulate matter for 30–60 s.

[0012] In some embodiments of this disclosure, the particulate matter is a resin ball with an outer diameter of 5-10 μm; and / or in step S3, the adhesive film, the particulate matter, the initial electrode, and the base chip are pressed together at a temperature of 170-190°C for 235-245 s; and / or in step S6, the transition chip is immersed in acetone etching solution to etch the particulate matter for 500-650 s.

[0013] According to the above embodiments of the present disclosure, the semiconductor chip increases the contact area between the paste and the chip electrode through a porous surface structure. At the same time, the porous surface structure can capture conductive particles in the conductive paste, becoming a conductive particle trap, thereby enhancing the connection between the conductive paste and the chip electrode and facilitating the connection between the semiconductor chip and printed silver paste or other conductive particle pastes. Attached Figure Description

[0014] Figure 1 A simplified schematic diagram illustrating the process of semiconductor chip fabrication according to an illustrative embodiment of the present disclosure after performing the step of adhering particulate matter to an adhesive film;

[0015] Figure 2 A simplified schematic diagram of a base chip with initial electrodes for a semiconductor chip according to an illustrative embodiment of the present disclosure;

[0016] Figure 3A simplified schematic diagram illustrating the process of semiconductor chip fabrication according to an illustrative embodiment of the present disclosure after performing the step of attaching a film containing particulate matter onto a base chip with initial electrodes.

[0017] Figure 4 A simplified schematic diagram illustrating the process of semiconductor chip fabrication according to an illustrative embodiment of this disclosure, following the steps of embedding particulate matter into a molten initial electrode, electrode solidification, and removal of the adhesive film; and

[0018] Figure 5 A simplified structural diagram of a semiconductor chip formed after etching particulate matter during the semiconductor chip fabrication process according to an illustrative embodiment of this disclosure.

[0019] [Explanation of Labels in the Attached Image]

[0020] 1: Basic chip;

[0021] 2: Electrode layer;

[0022] 21: Hole;

[0023] 3: Particulate matter;

[0024] 4: Adhesive film;

[0025] 5: Initial electrode. Detailed Implementation

[0026] To make the objectives, technical solutions, and advantages of this disclosure clearer, the following detailed description is provided in conjunction with specific embodiments and the accompanying drawings. However, this disclosure can be implemented in various forms and should not be construed as being limited to the embodiments set forth herein. Rather, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of this disclosure to those skilled in the art. In the accompanying drawings, for clarity, the dimensions and relative dimensions of layers and regions may be exaggerated, and the same reference numerals denote the same elements throughout.

[0027] The embodiments of the present disclosure will now be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the disclosure. In the following detailed description, numerous specific details are set forth to provide a thorough understanding of the embodiments of the present disclosure for ease of explanation. However, it will be apparent that one or more embodiments may be practiced without these specific details. Furthermore, descriptions of well-known structures and techniques are omitted in the following description to avoid unnecessarily obscuring the concepts of the present disclosure.

[0028] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. The terms “comprising,” “including,” etc., as used herein indicate the presence of the stated features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.

[0029] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein are to be interpreted in a manner consistent with the context of this specification, and not in an idealized or overly rigid way.

[0030] To facilitate understanding of the technical solutions disclosed herein by those skilled in the art, the following technical terms are explained.

[0031] When using expressions such as "at least one of A, B, and C," the expression should generally be interpreted in accordance with the meaning commonly understood by a person skilled in the art (e.g., "a system having at least one of A, B, and C" should include, but is not limited to, systems having A alone, having B alone, having C alone, having A and B, having A and C, having B and C, and / or having A, B, and C, etc.). When using expressions such as "at least one of A, B, or C," the expression should generally be interpreted in accordance with the meaning commonly understood by a person skilled in the art (e.g., "a system having at least one of A, B, or C" should include, but is not limited to, systems having A alone, having B alone, having C alone, having A and B, having A and C, having B and C, and / or having A, B, and C, etc.).

[0032] Figure 5 This is a simplified three-dimensional schematic diagram of a semiconductor chip according to an illustrative embodiment of the present disclosure.

[0033] Embodiments of this disclosure provide a semiconductor chip, such as Figure 5 As shown, the semiconductor chip includes a base chip 1 and an electrode layer 2 disposed on the base chip 1.

[0034] Specifically, the electrode layer 2 has a melting point of less than 300°C, and the electrode layer 2 can be made of one of tin, indium alloy, and tin alloy. The electrode layer 2 forms a plurality of holes 21, each hole 21 having a size ranging from 0.1 μm to 10 μm, for example, 0.1 μm, 0.5 μm, 1.0 μm, 1.5 μm, 2.0 μm, 2.5 μm, 3.0 μm, 3.5 μm, 4.0 μm, 4.5 μm, 5.0 μm, 5.5 μm, 6.0 μm, 6.5 μm, 7.0 μm, 7.5 μm, 8.0 μm, 8.5 μm, 9.0 μm, 9.5 μm, and 10 μm. The shape of each hole 21 can be at least one of spherical and ellipsoidal shapes; that is, the plurality of holes 21 can be multiple spherical shapes, multiple ellipsoidal shapes, or a combination of spherical and ellipsoidal shapes. Furthermore, the shape of each hole 21 can also be other hole shapes.

[0035] The porous surface structure increases the contact area between the paste and the chip electrode. At the same time, the porous surface structure can capture conductive particles in the conductive paste, becoming a conductive particle trap, which enhances the connection between the conductive paste and the chip electrode, and facilitates the connection between the semiconductor chip and the printed silver paste or other conductive particle paste.

[0036] Furthermore, the base chip 1 can be any one of silicon-based integrated circuits, gallium nitride diodes, gallium arsenide diodes, indium phosphide diodes, silicon carbide diodes, transistor integrated circuits, and light-emitting diodes, and the base chip 1 can be a wafer with a diameter of 50 mm to 400 mm or a crystal cube with a side length of 10 mm to 400 mm.

[0037] According to another aspect of this disclosure, a method for fabricating a semiconductor chip is also provided, the method comprising:

[0038] Step S1: Adhere particulate matter 3 onto adhesive film 4, such as... Figure 1 As shown;

[0039] Step S2: The adhesive film 4 containing particles 3 is attached to the base chip 1 with the initial electrode 5. The melting point of the initial electrode 5 is lower than that of the adhesive film 4. Figure 3 As shown;

[0040] Step S3: Press the adhesive film 4, particles 3, initial electrode 5 and base chip 1 together, and melt the initial electrode 5 by heating, so that the particles 3 on the adhesive film 4 are trapped in the melted initial electrode 5;

[0041] Step S4: Solidify the initial electrode 5 so that the particulate matter 3 is fixed in the initial electrode 5;

[0042] Step S5: Remove the adhesive film 4 to form a transition chip, such as... Figure 4 As shown; and

[0043] Step S6: Immerse the transition chip in the etching solution to etch particulate matter 3, forming a semiconductor chip, such as... Figure 5 As shown.

[0044] In one exemplary embodiment, the adhesive film 4 can be selected as a high-temperature resistant adhesive film 4, such as a material with a melting point greater than 300°C, to ensure that the adhesive film 4 is not melted during the heating process in step 3. Similarly, the particulate matter 3 can also be selected as a material with a melting point greater than 300°C.

[0045] In one exemplary embodiment, the particulate 3 is a copper ball with an outer diameter of 1 to 5 μm; and / or in step S3, the adhesive film 4, the particulate 3, the initial electrode 5 and the base chip 1 are pressed together at a temperature of 230 to 260°C for 235 to 245 s; and / or in step S6, the transition chip is placed in a ferric chloride etching solution to etch the particulate 3 for 30 to 60 s.

[0046] Example 1:

[0047] In a semiconductor chip fabrication method according to an exemplary embodiment, the particulate matter 3 can be selected from copper spheres with a particle size of 1 to 5 μm, and the specific steps are as follows:

[0048] Step S1: Adhere copper balls with a particle size of 1-5 μm onto the high-temperature resistant adhesive film 4;

[0049] Step S2: Apply the high-temperature adhesive film 4 with copper balls to the chip with a low-melting-point initial tin electrode;

[0050] Step S3: Press the high-temperature adhesive film 4, copper balls, initial tin electrode and chip together, and reflow at a temperature of 230-260℃ for 235-245s (preferably 240s) so that the copper balls on the adhesive film 4 are embedded in the molten initial electrode 5;

[0051] Step S4: Solidify the initial electrode 5 so that the copper ball is fixed in the initial electrode 5;

[0052] Step S5: Remove the high-temperature resistant tape to form a transition chip;

[0053] Step S6: Immerse the transition chip in ferric chloride etching solution and etch for 30-60 seconds. Remove and clean it to form a semiconductor chip. The electrodes of the semiconductor chip form multiple micropore structures with a size of about 1-5 μm.

[0054] Example 2: In a semiconductor chip fabrication method of an exemplary embodiment, the particulate 3 is a resin ball with an outer diameter of 5 to 10 μm; and / or in step S3, the adhesive film 4, the particulate 3, the initial electrode 5 and the base chip 1 are pressed together at a temperature of 170 to 190°C for 235 to 245 s; and / or in step S6, the transition chip is immersed in acetone etching solution to etch the particulate 3 for about 500 to 650 s.

[0055] Specifically, the method for preparing a semiconductor chip includes: Step S1: Adheding soluble resin balls with a particle size of 5-10 μm onto a high-temperature resistant adhesive film 4;

[0056] Step S2: Apply the high-temperature adhesive film 4 with soluble resin balls to the chip with a low-melting-point initial tin electrode;

[0057] Step S3: Press the high-temperature adhesive film 4, soluble resin balls, initial tin electrode and chip together, and reflow at a temperature of 170-190℃ (preferably 180℃) for 235-245s (preferably 240s) so that the soluble resin balls on the adhesive film 4 are embedded in the melted initial electrode 5.

[0058] Step S4: Solidify the initial electrode 5 so that the soluble resin ball is fixed in the initial electrode 5;

[0059] Step S5: Remove the high-temperature resistant tape to form a transition chip;

[0060] Step S6: Place the transition chip in acetone etching solution and etch for 500-650s (preferably 600s). Remove and clean it to form a semiconductor chip, wherein the electrodes of the semiconductor chip form multiple micropore structures with a size of about 5-10μm.

[0061] It should also be noted that the directional terms mentioned in the embodiments, such as "up," "down," "front," "back," "left," and "right," are only for reference to the directions in the accompanying drawings and are not intended to limit the scope of protection of this disclosure. Throughout the drawings, the same elements are represented by the same or similar reference numerals. Conventional structures or constructions will be omitted where they may cause confusion in understanding this disclosure, and the shapes and dimensions of the components in the drawings do not reflect actual size and proportion, but are only schematic representations of the embodiments of this disclosure.

[0062] Unless otherwise stated, the numerical parameters in this specification and the appended claims are approximate values ​​and can be varied according to desired characteristics derived from the content of this disclosure. Specifically, all figures used in the specification and claims to indicate composition, reaction conditions, etc., should be understood to be modified by the term "about" in all cases. Generally, this means that a specific amount may vary by ±10% in some embodiments, ±5% in some embodiments, ±1% in some embodiments, and ±0.5% in some embodiments.

[0063] The use of ordinal numbers such as "first," "second," "third," etc., in the specification and claims to modify the corresponding elements does not imply that the element has any ordinal number, nor does it represent the order of one element with another element, or the order of manufacturing methods. The use of these ordinal numbers is only to enable a named element to be clearly distinguished from another element with the same name.

[0064] Furthermore, unless specifically described or required to occur in a specific order, the order of the above steps is not limited to those listed above and can be varied or rearranged according to the desired design. Moreover, the above embodiments can be used in combination with each other or with other embodiments based on design and reliability considerations; that is, technical features from different embodiments can be freely combined to form more embodiments.

[0065] The specific embodiments described above further illustrate the purpose, technical solutions, and beneficial effects of this disclosure. It should be understood that the above descriptions are merely specific embodiments of this disclosure and are not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.

Claims

1. A method for fabricating a semiconductor chip, comprising: Step S1: Adhere the particles onto the adhesive film; Step S2: The adhesive film containing the particles is attached to the base chip with the initial electrode, the melting point of the initial electrode being lower than the melting point of the adhesive film; Step S3: Press the adhesive film, the particles, the initial electrode and the base chip together, and melt the initial electrode by heating, so that the particles on the adhesive film are trapped in the melted initial electrode; Step S4: Solidify the initial electrode to fix the particulate matter in the initial electrode; Step S5: Remove the adhesive film to form a transition chip; as well as Step S6: Place the transition chip into an etching solution to etch the particulate matter, thereby forming the semiconductor chip.

2. The preparation method according to claim 1, wherein, The melting point of the adhesive film is greater than 300°C.

3. The preparation method according to claim 1, wherein, The particles are copper spheres with an outer diameter of 1–5 μm; and / or In step S3, the adhesive film, the particulate matter, the initial electrode, and the base chip are pressed together at a temperature of 230–260°C for 235–245 seconds; and / or In step S6, the transition chip is placed in a ferric chloride etching solution to etch the particulate matter for 30-60 seconds.

4. The preparation method according to claim 1, wherein, The particles are resin spheres with an outer diameter of 5–10 μm; and / or In step S3, the adhesive film, the particulate matter, the initial electrode, and the base chip are pressed together at a temperature of 170–190°C for 235–245 seconds; and / or In step S6, the transition chip is placed in acetone etching solution to etch the particulate matter for 500-650 seconds.

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