Turn-off detection circuit for anti-series switches

Abstract

Various embodiments of this disclosure relate to a cutoff detection circuit for an anti-series switch. In some examples, a circuit is configured to control an anti-series switch including a first transistor and a second transistor coupled in an anti-series configuration. The circuit includes one or more driver circuits configured to control the gates of the first transistor and the second transistor, and a detection circuit configured to detect whether both the first transistor and the second transistor are in a cutoff state. The detection circuit is configured to deliver a signal to the anti-series switch, detect the signal in the anti-series switch, and determine whether both the first transistor and the second transistor are in a cutoff state via the detected signal.

Description

Technical Field

[0001] This disclosure relates to an anti-series switch comprising two transistors arranged in an anti-series configuration, and more specifically to a circuit configured to control the anti-series switch. Background Technology

[0002] Anti-series switches are widely used in various circuits and devices. An anti-series switch comprises two transistors coupled to each other in an anti-series configuration. In some cases, an anti-series switch may include two different transistors, where the source node of each transistor is coupled to the source node of the other transistor. In other cases, an anti-series switch may include two different transistors, where the drain node of each transistor is coupled to the drain node of the other transistor.

[0003] Anti-series switches are typically coupled to two or more power sources to control the power delivery from those sources. Furthermore, anti-series switches are commonly used in environments where electrical safety is a critical consideration. For example, anti-series switches can be used in electric vehicles, autonomous vehicles, or other environments where electrical short circuits or faults could pose safety risks. Summary of the Invention

[0004] In general, this disclosure relates to circuitry for controlling an anti-series switch. The circuitry can be configured to detect and confirm whether the two transistors of the anti-series switch are in the off state. A driver circuit can be configured to control the gates of the two transistors of the anti-series switch to control the on / off switching of the two transistors. The techniques and circuitry of this disclosure can perform additional steps to actively check or confirm whether the two transistors are in the off state, which may be desirable for safety reasons. For example, a detection circuit (which may be part of a gate driver circuit or a separate circuit) can be configured to deliver a signal to the anti-series switch, detect the signal in the anti-series switch, and determine, based on the detected signal, whether both the first and second transistors are in the off state. These circuits and techniques are particularly useful for applications where safety is paramount, such as circuitry in autonomous vehicles or other types of automated machinery.

[0005] In one example, a circuit is configured to control an anti-series switch including a first transistor and a second transistor coupled in an anti-series configuration. The circuit may include one or more driver circuits configured to control the gates of the first and second transistors, and detection circuitry configured to detect whether both the first and second transistors are in a cutoff state. The detection circuitry may be configured to deliver a signal to the anti-series switch, detect the signal in the anti-series switch, and determine whether both the first and second transistors are in a cutoff state based on the detected signal.

[0006] In another example, a method for controlling an anti-series switch is described, the anti-series switch including a first transistor and a second transistor coupled in an anti-series configuration. The method may include detecting whether both the first transistor and the second transistor are in a cutoff state. Furthermore, detecting whether both the first transistor and the second transistor are in a cutoff state may include delivering a signal to the anti-series switch, detecting the signal in the anti-series switch, and determining whether both the first transistor and the second transistor are in a cutoff state based on the detected signal.

[0007] In another example, a device may include an anti-series switch comprising a first transistor and a second transistor coupled in an anti-series configuration. The device may also include one or more driver circuits configured to control the gates of the first transistor and the second transistor, and detection circuitry configured to detect whether both the first transistor and the second transistor are in a cutoff state. The detection circuitry may be configured to deliver a signal to the anti-series switch, detect the signal in the anti-series switch, and determine whether both the first transistor and the second transistor are in a cutoff state based on the detected signal.

[0008] Details of these and other examples are set forth in the accompanying drawings and the following description. Other features, objects, and advantages will become apparent from the specification, the drawings, and the claims. Attached Figure Description

[0009] Figure 1 This is a circuit diagram of an anti-series switch, which functionally illustrates the process of delivering and detecting signals in an anti-series switch.

[0010] Figure 2A and Figure 2B This is a block diagram showing the anti-series switch, driver, and cutoff detection circuit;

[0011] Figure 3 This is a block diagram showing the driver circuit for the two transistors controlling the anti-series switch, and the additional circuit elements that operate together with the components of the driver circuit to form the cutoff detection circuit for the anti-series switch.

[0012] Figure 4 This diagram illustrates the delivery of a signal to an anti-series switch and the detection of two distinct signal responses within the switch. These two distinct signal responses can be used to identify whether both transistors in the anti-series switch are in the off state; and

[0013] Figure 5 It is a flowchart consistent with the technology according to this disclosure. Detailed Implementation

[0014] This disclosure relates to circuitry for controlling anti-series switches. The circuitry and techniques described herein are particularly useful for applications where safety is of utmost concern, such as circuitry within autonomous vehicles or other types of automated machinery. For example, vehicles and other machines are becoming increasingly automated and may be able to perform certain operations without human control. However, faulty switches can cause problems in the operation of automated (and non-automated) equipment. The circuitry and techniques of this disclosure can achieve a higher level of safety than conventional circuitry in the operation of anti-series switches, which can be used in a variety of applications and setups. The circuitry and techniques of this disclosure can implement an active process to check and verify the off state of the two transistors in the anti-series switch, which may be desirable for improving safety.

[0015] The driver circuit can be configured to control the gates of the two transistors in the anti-series switch to control the on / off switching of the two transistors. The techniques and circuits of this disclosure can perform additional steps to actively check or confirm whether the two transistors are in the off state. For example, a detection circuit (which can be part of the gate driver circuitry or a separate circuit) can be configured to deliver a signal to the anti-series switch, detect the signal in the anti-series switch, and determine, based on the detected signal, whether both the first and second transistors are in the off state.

[0016] Figure 1 This is a circuit diagram of an anti-series switch 10 including a first transistor 12 and a second transistor 14 connected in an anti-series configuration. In this example, the drain terminals of the first transistor 12 and the second transistor 14 are connected to a common node. The anti-series switch 10 may also include terminals 16 and 18, which can be configured for connection to different battery power sources (e.g., two different 12V power sources in this case).

[0017] One or more driver circuits ( Figure 1 (Not shown) can be configured to control the on / off states of transistors 12 and 14 by controlling the voltage applied to the gates of the first transistor 12 and the second transistor 14. However, even if the voltage applied to the gates of transistors 12 and 14 corresponds to the off state, gate control may not be able to confirm whether both transistors are in the off state. Therefore, according to this disclosure, the detection circuit ( Figure 1 (Not shown) can be configured to detect or confirm whether both the first transistor 12 and the second transistor 14 are in the off state. For example, the detection circuit can deliver a signal to the anti-series switch (e.g., as shown). Figure 1 One or more “pulses” as shown), and can be in an anti-series switch (e.g., in a Figure 1The detection signal is detected at the measurement point shown. Based on the detected signal, the detection circuit can determine whether both the first transistor 12 and the second transistor 14 are in the off state. In some examples, the detection circuit can provide redundancy in determining or confirming the off state of both the first transistor 12 and the second transistor 14 after one or more driver circuits have applied a voltage to the gate of the transistors 12 and 14 that should correspond to the off state of the transistors 12 and 14.

[0018] Figure 2A and Figure 2B This is a block diagram illustrating two different examples of an anti-series switch, driver, and cutoff detection circuit. Figure 2A In the anti-series switch 25A, there are a first transistor 22A and a second transistor 24A having source terminals connected at node N2. A first terminal 26A of the anti-series switch 25A is connected to the drain terminal of the first transistor 22A, and a second terminal 28A of the anti-series switch 25A is connected to the drain terminal of the second transistor 24A. Different batteries or other power sources can be connected to terminals 26A and 28A. A driver circuit 202A is configured to control the voltage applied to the gates of transistors 22A and 24A to control the on / off switching of transistors 22A and 24A. Furthermore, a cutoff detection circuit 204A can be configured to detect or confirm the cutoff state of transistors 22A and 24A. Specifically, the cutoff detection circuit 204A can be configured to deliver a signal to the anti-series switch 25A, detect the signal in the anti-series switch 25A, and determine, based on the detected signal, whether both the first transistor 22A and the second transistor 24A are in the cutoff state.

[0019] In some examples, the switching between the cutoff detection circuit 204A and the driver circuit 202A can use common circuit elements. In other words, when performing the cutoff detection process, the switching of the cutoff detection circuit 204A can use one or more components of the driver circuit 202A (such as capacitors in a DC / DC converter).

[0020] exist Figure 2B In the example, the anti-series switch 25B includes a first transistor 22B and a second transistor 24B with drain terminals connected at node N2'. The first terminal 26B of the anti-series switch 25B is connected to the source terminal of the first transistor 22B, and the second terminal 28B of the anti-series switch 25B is connected to the source terminal of the second transistor 24B. Similar to... Figure 2A ,exist Figure 2BDifferent batteries or other power sources can be connected to terminals 26B and 28B. Driver circuit 202B is configured to control the voltage applied to the gates of transistors 22B and 24B to control the on / off switching of transistors 22B and 24B. Furthermore, cutoff detection circuit 204B can be configured to deliver a signal to anti-series switch 25B, detect the signal in anti-series switch 25B, and determine (e.g., confirm) whether both the first transistor 22B and the second transistor 24B are in the cutoff state based on the detected signal. In this way, cutoff detection circuit 204B can be configured to detect or confirm the cutoff state of transistors 22B and 24B.

[0021] Now we will describe them together. Figure 2A and Figure 2B The anti-series switch 25 is collectively referred to as anti-series switch 25A or 25B, the driver circuit 202 refers to driver circuit 202A or 202B, and the cutoff detection circuit 204 refers to circuit 204A or 204B. Similarly, terminal 26 refers to terminal 26A or 26B, terminal 28 refers to terminal 28A or 28B, the first transistor 22 refers to the first transistor 22A or 22B, and the second transistor 24 refers to the second transistor 24A or 24B.

[0022] The cutoff detection circuit 204 can be configured to deliver a signal to the anti-series switch 25, detect the signal in the anti-series switch 25, and determine (e.g., confirm) whether both the first transistor 22 and the second transistor 24 are in the cutoff state based on the detected signal. The location for delivering the signal to the anti-series switch 25 and the location for detecting the signal in the anti-series switch 25 can differ in different configurations and can depend on the orientation of the body diodes within the first transistor 22 and the second transistor 24. In some examples, the signal is delivered to node N2 or N2', and the signal is also detected at node N2 or N2'. In this case, if the first transistor 22 and the second transistor 24 are stuck in the on state, the signal delivered to node N2 or N2' can be dissipated by opening the transistors, and the signal detected at node N2 or N2' can indicate this dissipation. Therefore, by delivering a signal to node N2 or N2' and detecting the signal at node N2 or N2', the cutoff detection circuit 204 can confirm whether the first transistor 22 and the second transistor 24 are in the cutoff state.

[0023] However, in other examples, the cutoff detection circuit 204 can deliver a signal to a node (e.g., N1, N2, or N3) (e.g., N1', N2', or N3') and detect the signal at different nodes (e.g., N1, N2, or N3) (e.g., N1', N2', or N3') within the anti-series switch 25. Depending on the configuration of the body diodes within the first transistor 22 and the second transistor 25, this type of delivery and detection can be useful in certain situations.

[0024] The first transistor 22 and the second transistor 25 may comprise metal-oxide-semiconductor field-effect transistors (MOSFETs) or any other type of transistor with charge-injected gate control. The cutoff detection circuit 204 may comprise an RC circuit configured to deliver a signal to the anti-series switch 25, and in some cases, the cutoff detection circuit 204 may comprise a DC / DC power converter configured to deliver a signal to the anti-series switch 25. Furthermore, in some examples, the DC / DC converter is part of the driver circuit 202, wherein the detection circuit 204 is configured to deliver a signal to the anti-series switch 25 based on a supply voltage used to power the driver circuit 202 and based on an additional voltage. Therefore, in some examples, at least some of the cutoff detection circuits 204 are part of the driver circuit 202.

[0025] The detection circuit 204 may include a comparator configured to detect a signal in the anti-series switch 205, or alternatively, the detection circuit 204 may also include an analog-to-digital converter (ADC) configured to detect a signal in the anti-series switch. In some examples, the detection circuit 204 may issue an alarm to the system-level microcontroller or power management controller when it detects that the anti-series switch 25 is not in the off state, which may indicate a problem.

[0026] As described above, in some examples, the cutoff detection circuit 204 includes an RC circuit configured to deliver a signal to the anti-series switch 25. Consistent with this implementation, in some cases, the RC circuit includes the output capacitor of the DC / DC converter associated with the driver circuit 202 and additional resistors. The cutoff detection circuit 204 may also include two additional transistors configured to connect and disconnect the RC circuit from node N2 or N2' located between the first transistor 22 and the second transistor 24.

[0027] Figure 3 A more detailed example of a particular implementation consistent with this disclosure is shown. In particular, Figure 3 This is a block diagram showing a driver circuit (which may include a driver IC 32 and additional components, including an internal or external DC / DC power converter 34). The driver circuit controls two transistors 302 and 304 that are switched in anti-series. Furthermore, Figure 3 Additional circuit elements (e.g., transistors 334, 336, and resistor 348) are shown that operate together with the components of the driver circuit to form the cutoff detection circuit of the anti-series switch. Terminals 312 and 314 can define the terminals of the anti-series switch, which can be coupled to different batteries or power sources.

[0028] Figure 3 The gate driver circuitry within may include a driver IC 32 connected to the gate and source terminals of the first transistor 302. Similarly, the driver IC 32 is connected to the gate and source terminals of the second transistor 304, although separate dedicated drivers may also be used for the first transistor 302 and the second transistor 304. Figure 3 In the example, resistor 324 is located between driver IC 32 and the gate of first transistor 302, and resistor 322 is located between the gate and source of first transistor 302. Similarly, resistor 328 is located between driver IC 32 and the gate of second transistor 304, and resistor 326 is located between the gate and source of second transistor 304.

[0029] The driver circuitry may include a DC / DC converter 34, which may be internal to the driver IC 32 or external to the driver IC 32. Figure 3 In the example shown, input capacitor 332 and output capacitor 334 define a DC / DC power converter in an external configuration, whereby output capacitor 334 is connected to output 364 and input capacitor 332 is connected to input 362. Input capacitor 332 can deliver a controlled input voltage to the driver circuitry, such as... Figure 3 The figure shown is V CC_in .

[0030] During normal driver operation for controlling the gates of transistors 302 and 304, transistor 344 is turned on, while transistor 346 is turned off. In this situation, the voltage V at the node between the transistors is... CC An input power supply voltage is provided to the driver circuit at input terminal 362. According to this disclosure, to perform cutoff detection, transistor 344 is turned off and transistor 346 is turned on, for example, for a short duration. This generates a voltage V at output 364. CC +V DRVThe output 364 delivers current through resistor 348 to define the signal at the node between the first transistor 302 and the second transistor 304. The cutoff detection circuitry may include element 350, which may include one or more comparators and / or one or more analog-to-digital converters capable of detecting the signal at the node between the first transistor 302 and the second transistor 304. In this way, the cutoff detection circuitry may be configured to deliver a signal to the anti-series switch (e.g., to the node between transistors 302 and 304), detect the signal, and determine, based on the detected signal, whether both transistors 302 and 304 of the anti-series switch are in a cutoff state.

[0031] Figure 4 This diagram illustrates the delivery of a signal to an anti-series switch and the detection of two distinct signal responses within the switch. These two different signal responses can be used to identify whether the two transistors in the anti-series switch are in the off state. From... Figure 3 Angular description of the circuit shown Figure 4 .like Figure 4 As shown, at time position 402, the node between transistors 302 and 304 can define a voltage corresponding to approximately 12 volts. At time position 404, a signal is delivered to the node between transistors 302 and 304. In one example, to implement this signal at the node between transistors 302 and 304, transistor 344 is off, while transistor 346 is on. This produces a voltage V at output 364. CC +V DRV The output 364 delivers current through resistor 348 to define the signal at the node between the first transistor 302 and the second transistor 304.

[0032] Component 350 (which may include one or more comparators and / or one or more analog-to-digital converters) is capable of detecting the signal at the node between the first transistor 302 and the second transistor 304. For example... Figure 4 As shown, if the signal measured at the node between the first transistor 302 and the second transistor 304 looks similar to signal 420, this could indicate a faulty operation of the anti-series switch. For example, signal 420 may maintain a voltage similar to the voltage delivered at time position 404, which is significantly higher than the voltage at time position 402, and this signal is delivered by the cutoff detection circuitry for a time period of less than approximately 0.001 milliseconds. For example, signal 420 may be delivered for a time period between approximately 0.001 and 0.0001 milliseconds.

[0033] Alternative locations, such as Figure 4 As shown, if in Figure 3 The signal measured at the node between the first transistor 302 and the second transistor 304 looks similar to Figure 4Signal 430, as shown, indicates the normal operating state of the anti-series switch. Instead of the voltage rise shown in signal 420, there is a relatively fast voltage drop in signal 430. Component 350 ( Figure 3 It can detect signal 420 or signal 430. Figure 4 The difference between (as shown) indicates whether both transistors 302 and 304 of the anti-series switch are in the off state. If not (for example, if signal 420 is detected), then element 350 ( Figure 3 It can send fault signals back to the system-level microcontroller, power management system, or power controller. For example, such a fault may cause system-level corrective or protective actions, such as disabling or limiting automated features within the system. For instance, if used in an autonomous vehicle, a fault condition may cause one or more automated features to be suspended, and may alert the driver that such automated features are unavailable.

[0034] Figure 5 This is a flowchart consistent with the technology according to this disclosure. It will be... Figure 2A or Figure 2B Angular description of the circuit shown Figure 5 .like Figure 5 As shown, the driver circuit 202 controls the first transistor 22 and the second transistor 24 (501) of the anti-series switch 25. In particular, the driver circuit 202 can control the on / off state of the first transistor 22 and the second transistor 24 by controlling the voltage applied to the gates of the transistors 22 and 24.

[0035] The cutoff detection circuit 204 delivers a signal (502) to the anti-series switch 25, detects the signal in the anti-series switch 25 (503), and determines (e.g., confirms) whether both the first transistor 22 and the second transistor 24 are in the cutoff state based on the detected signal (504). The locations for delivering the signal to the anti-series switch 25 and for detecting the signal in the anti-series switch 25 can differ in different configurations and can depend on the orientation of the body diodes within the first transistor 22 and the second transistor 24. In some examples, the signal is delivered to node N2 or N2', and the signal is also detected at node N2 or N2'. In this case, if the first transistor 22 and the second transistor 24 are stuck in the on state, the signal delivered to node N2 or N2' may look similar to... Figure 4 Signal 420. Accordingly, by delivering a signal to node N2 or N2' and detecting the signal at node N2 or N2', the cutoff detection circuit 204 can detect... Figure 4 The signal 430 shown indicates normal operation with both transistors in the off state. Figure 4Signal 420 (indicating a fault in anti-series switch 25) is used to confirm whether the first transistor 22 and the second transistor 24 are in the off state.

[0036] In some examples, the delivery signal (502) may include delivering a signal to an anti-series switch via a DC / DC converter, wherein the DC / DC converter is part of one or more driver circuits 202. Additionally, in some examples, the delivery signal (502) may include delivering a signal to the anti-series switch via an RC circuit. In this example, the capacitor of the RC circuit may include the output capacitor of the DC / DC converter, wherein the DC / DC converter is part of one or more driver circuits 202 configured to control the first transistor 22 and the second transistor 24. Furthermore, the delivery signal (502) may include connecting the RC circuit to a node located between the first transistor 22 and the second transistor 24. Figure 3 The example circuit shown is an example of an RC circuit that uses an output capacitor that includes a DC / DC converter, wherein the DC / DC converter is part of one or more driver circuits configured to control a first transistor 302 and a second transistor 304.

[0037] In some cases, after determining whether the first and second transistors are in a cutoff state (504) based on the detected signal, if one or both of the first and second transistors are not in a cutoff state, the detection circuit device of this disclosure can also be configured to perform additional steps. For example, Figure 3 Element 350 can also be configured to generate a fault signal in response to determining that one or both of the first transistor 302 and the second transistor 304 are not in a cutoff state. Element 350 may be capable of detecting a difference between signal 420 or signal 430 to identify whether both transistors 302 and 304 of the anti-series switch are in a cutoff state. If not (e.g., if signal 420 is detected), element 350 may send a fault signal back to a system-level microcontroller, power management system, or power controller. For example, such a fault may cause system-level corrective or protective actions, such as by disabling or limiting automation features within the system. For example, if used in an autonomous vehicle, the fault condition may cause the suspension of one or more autonomous driving features and may alert the driver that such autonomous driving features are unavailable.

[0038] The following clauses may describe one or more aspects of this disclosure.

[0039] Clause 1: A circuit configured to control an anti-series switch, the anti-series switch including a first transistor and a second transistor coupled in an anti-series configuration, the circuit comprising:

[0040] One or more driver circuits are configured to control the gate of a first transistor and the gate of a second transistor; and

[0041] A detection circuit is configured to detect whether both the first transistor and the second transistor are in a cutoff state, wherein the detection circuit is configured to deliver a signal to an anti-series switch, detect the signal in the anti-series switch, and determine whether both the first transistor and the second transistor are in a cutoff state based on the detected signal.

[0042] Clause 2: The circuit according to Clause 1, wherein the first transistor and the second transistor comprise metal-oxide-semiconductor field-effect transistors.

[0043] Clause 3: The circuit according to Clause 1 or 2, wherein at least some of the detection circuits in the detection circuit are part of one or more driver circuits.

[0044] Clause 4: A circuit according to any one of Clauses 1-3, wherein the detection circuit is configured to deliver a signal to a node located between the first transistor and the second transistor, and the detection circuit is configured to detect the signal at the node.

[0045] Clause 5: A circuit according to any one of Clauses 1-4, wherein the detection circuit includes a comparator configured to detect a signal in an anti-series switch.

[0046] Clause 6: A circuit according to any one of Clauses 1-4, wherein the detection circuit includes an analog-to-digital converter (ADC) configured to detect a signal in an anti-series switch.

[0047] Clause 7: A circuit according to any one of Clauses 1-6, wherein the detection circuit includes a DC / DC converter configured to deliver a signal to an anti-series switch.

[0048] Clause 8: The circuit according to Clause 7, wherein the DC / DC converter is part of one or more driver circuits, wherein the detection circuit is configured to deliver a signal to the anti-series switch based on the power supply voltage and an additional voltage used to power the one or more driver circuits.

[0049] Clause 9: A circuit according to any one of Clauses 1-8, wherein the detection circuit includes an RC circuit configured to deliver a signal to an anti-series switch.

[0050] Clause 10: The circuit according to Clause 9, wherein the capacitor of the RC circuit includes capacitors and resistors, and wherein the capacitor includes the output capacitor of the DC / DC converter.

[0051] Clause 11: Circuits pursuant to Clause 10, wherein the DC / DC converter is part of one or more driver circuits.

[0052] Clause 12: A circuit according to any one of Clauses 9-11, wherein the detection circuit further comprises two transistors configured to connect and disconnect the RC circuit to a node located between the first transistor and the second transistor.

[0053] Clause 13: A method for controlling an anti-series switch, the anti-series switch comprising a first transistor and a second transistor coupled in an anti-series configuration, the method comprising:

[0054] Detecting whether both the first transistor and the second transistor are in the off state, wherein the detection includes:

[0055] Send a signal to the anti-series switch.

[0056] Signal detection in anti-series switches, and

[0057] The detection signal determines whether both the first and second transistors are in the off state.

[0058] Clause 14: The method according to Clause 13 further includes: controlling the state of the first transistor and the state of the second transistor via one or more driver circuits.

[0059] Clause 15: The method according to Clause 14 also includes delivering a signal to an anti-series switch via a DC / DC converter, wherein the DC / DC converter is part of one or more driver circuits.

[0060] Clause 16: The method according to any one of Clauses 13-15 further includes delivering a signal to the anti-series switch via an RC circuit.

[0061] Clause 17: The method according to Clause 16, wherein the capacitor of the RC circuit includes the output capacitor of the DC / DC converter, and wherein the DC / DC converter is part of one or more driver circuits configured to control the first transistor and the second transistor.

[0062] Clause 18: The method according to Clause 16 or 17, wherein delivering a signal to the anti-series switch includes connecting an RC circuit to a node located between the first transistor and the second transistor.

[0063] Clause 19: The method according to any one of Clauses 13-18 further includes generating a fault signal in response to determining that one or both of the first transistor and the second transistor are not in a cut-off state.

[0064] Clause 20: An apparatus comprising:

[0065] An anti-series switch, comprising a first transistor and a second transistor coupled in an anti-series configuration;

[0066] One or more driver circuits are configured to control the gate of a first transistor and the gate of a second transistor; and

[0067] A detection circuit is configured to detect whether both the first transistor and the second transistor are in a cutoff state, wherein the detection circuit is configured to deliver a signal to an anti-series switch, detect the signal in the anti-series switch, and determine whether both the first transistor and the second transistor are in a cutoff state based on the detected signal.

[0068] Various aspects have been described in this disclosure. These and other aspects are within the scope of the appended claims.

Claims

1. A circuit configured to control an anti-series switch, the anti-series switch including a first transistor and a second transistor coupled in an anti-series configuration, the circuit comprising: One or more driver circuits are configured to control the gate of the first transistor and the gate of the second transistor; as well as A detection circuit is configured to detect whether both the first transistor and the second transistor are in a cutoff state, wherein the detection circuit is configured to deliver a signal to the anti-series switch, detect the signal in the anti-series switch, and determine whether both the first transistor and the second transistor are in the cutoff state based on the detected signal, and wherein the detection circuit includes a DC / DC converter configured to deliver the signal to the anti-series switch.

2. The circuit of claim 1, wherein the first transistor and the second transistor comprise metal-oxide-semiconductor field-effect transistors.

3. The circuit of claim 1, wherein at least some of the detection circuits are part of the one or more driver circuits.

4. The circuit of claim 1, wherein the detection circuit is configured to deliver the signal to a node located between the first transistor and the second transistor, and the detection circuit is configured to detect the signal at the node.

5. The circuit of claim 1, wherein the detection circuit includes a comparator configured to detect the signal in the anti-series switch.

6. The circuit of claim 1, wherein the detection circuit includes an analog-to-digital converter (ADC) configured to detect the signal in the anti-series switch.

7. The circuit of claim 1, wherein the DC / DC converter is part of the one or more driver circuits, wherein the detection circuit is configured to deliver the signal to the anti-series switch based on a power supply voltage and an additional voltage used to power the one or more driver circuits.

8. The circuit of claim 1, wherein the detection circuit includes an RC circuit configured to deliver the signal to the anti-series switch.

9. A circuit configured to control an anti-series switch, the anti-series switch including a first transistor and a second transistor coupled in an anti-series configuration, the circuit comprising: One or more driver circuits are configured to control the gate of the first transistor and the gate of the second transistor; as well as A detection circuit is configured to detect whether both the first transistor and the second transistor are in a cutoff state, wherein the detection circuit is configured to deliver a signal to the anti-series switch, detect the signal in the anti-series switch, and determine whether both the first transistor and the second transistor are in the cutoff state based on the detected signal, wherein the detection circuit includes an RC circuit configured to deliver the signal to the anti-series switch, wherein the RC circuit includes a capacitor and a resistor, and wherein the capacitor includes an output capacitor of a DC / DC converter.

10. The circuit of claim 9, wherein the DC / DC converter is part of the one or more driver circuits.

11. The circuit of claim 10, wherein the detection circuit further comprises two transistors configured to connect and disconnect the RC circuit from a node located between the first transistor and the second transistor.

12. A method for controlling an anti-series switch, the anti-series switch comprising a first transistor and a second transistor coupled in an anti-series configuration, the method comprising: Detecting whether both the first transistor and the second transistor are in the off state, wherein the detection includes: A signal is delivered to the anti-series switch via an RC circuit, wherein delivering the signal to the anti-series switch includes connecting the RC circuit to a node located between the first transistor and the second transistor. The signal is detected in the anti-series switch, and Based on the detected signal, it is determined whether both the first transistor and the second transistor are in the off state.

13. The method of claim 12, further comprising: The state of the first transistor and the state of the second transistor are controlled via one or more driver circuits.

14. The method of claim 13, wherein the DC / DC converter is part of the one or more driver circuits and wherein the RC circuit includes the output capacitor of the DC / DC converter and an additional resistor.

15. The method of claim 12, wherein the capacitor of the RC circuit includes the output capacitor of the DC / DC converter, and wherein the DC / DC converter is part of one or more driver circuits configured to control the first transistor and the second transistor.

16. The method of claim 12, further comprising generating a fault signal in response to determining that one or both of the first transistor and the second transistor are not in the off state.

17. An apparatus comprising: An anti-series switch, comprising a first transistor and a second transistor coupled in an anti-series configuration; One or more driver circuits are configured to control the gate of the first transistor and the gate of the second transistor; as well as A detection circuit is configured to detect whether both the first transistor and the second transistor are in a cutoff state, wherein the detection circuit is configured to deliver a signal to the anti-series switch, detect the signal in the anti-series switch, and determine whether both the first transistor and the second transistor are in the cutoff state based on the detected signal. The detection circuit includes a DC / DC converter configured to deliver the signal to the anti-series switch.

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