Power amplifier circuit

Abstract

To achieve improvement of linearity of input power-output power characteristics of an amplification circuit. A power amplification circuit (1) includes an amplification circuit (2), a bias circuit (3), a detection section (4), and a control circuit (5). The amplification circuit (2) includes a first bipolar transistor (Tr2). An emitter follower (30) of the bias circuit (3) includes a second bipolar transistor (Tr3). The emitter follower (30) supplies a bias current to a base of the first bipolar transistor (Tr2). The detection section (4) detects a voltage (Vcc) of a power supply terminal (11) connected to a collector of the first bipolar transistor (Tr2). The control circuit (5) includes a current limiting circuit (54) provided between a battery terminal (12) and a collector of the second bipolar transistor (Tr3). The control circuit (5) changes an upper limit value of a control current (Ice) supplied to the collector of the second bipolar transistor (Tr3) in accordance with the detected voltage of the detection section (4).

Description

Technical Field

[0001] This invention generally relates to power amplifier circuits, and more specifically to power amplifier circuits having amplifier circuitry. Background Technology

[0002] Previously, power amplifier modules with amplification circuits and bias circuits were known (for example, see Patent Document 1).

[0003] An amplifier circuit comprises multiple amplifiers connected in stages. Each amplifier includes a transistor with its emitter grounded. The collector of the transistor is connected to the power supply voltage via an inductor.

[0004] The bias circuit includes a control IC and multiple emitter follower transistors. The control IC has a first current source and a second current source. The first current source supplies a control current to the collector of each emitter follower transistor, which varies in response to changes in the control voltage. The first current source limits the control current to an upper limit value. The second current source supplies a constant current to the base of each emitter follower transistor.

[0005] Existing technical documents

[0006] Patent documents

[0007] Patent Document 1: Japanese Patent Application Publication No. 2018-152714 Summary of the Invention

[0008] The problem the invention aims to solve

[0009] In the power amplifier module described in Patent Document 1, the following situation exists: even when the power supply voltage is at the rated power supply voltage, the linearity of the input power-output power characteristic of the amplifier circuit decreases as the output power approaches the rated output power. In the power amplifier module, when the linearity of the input power-output power characteristic of the amplifier circuit decreases, the Adjacent Channel Leakage Ratio (ACLR) and Error Vector Magnitude (EVM) deteriorate.

[0010] The purpose of this invention is to provide a power amplifier circuit that can improve the linearity of the input power-output power characteristics of the amplifier circuit.

[0011] Solution for solving the problem

[0012] One embodiment of the present invention relates to a power amplifier circuit comprising an amplifier circuit, a bias circuit, a detection unit, and a control circuit. The amplifier circuit has a first bipolar transistor for amplifying and outputting an input signal. The bias circuit has an emitter follower. The emitter follower includes a second bipolar transistor for supplying a bias current to the base of the first bipolar transistor. The detection unit detects the voltage at a power supply terminal connected to the collector of the first bipolar transistor. The control circuit has a current-limiting circuit. The current-limiting circuit is disposed between a battery terminal and the collector of the second bipolar transistor. The control circuit adjusts the upper limit of the control current supplied to the collector of the second bipolar transistor based on the detected voltage from the detection unit.

[0013] The effects of the invention

[0014] The power amplifier circuit described above by the present invention can improve the linearity of the input power-output power characteristics of the amplifier circuit. Attached Figure Description

[0015] Figure 1 It is a circuit diagram of a high-frequency circuit (high-frequency module) having the power amplifier circuit involved in the implementation method.

[0016] Figure 2 This is the circuit diagram of the power amplifier circuit mentioned above.

[0017] Figure 3 This is the circuit diagram of the current limiting circuit in the power amplifier circuit mentioned above.

[0018] Figure 4 This is the operation diagram of the power amplifier circuit mentioned above.

[0019] Figure 5 This is the operation diagram of the power amplifier circuit mentioned above.

[0020] Figure 6 This is a circuit diagram of the current limiting circuit in the power amplifier circuit involved in the modified example 1 of the implementation method.

[0021] Figure 7 This is a circuit diagram of the current limiting circuit in the power amplifier circuit involved in the modified example 2 of the implementation method. Detailed Implementation

[0022] (Implementation Method)

[0023] The following reference Figures 1-5 The power amplifier circuit 1 involved in the implementation method will be described below.

[0024] (1) Power amplifier circuit and high frequency module

[0025] (1.1) Circuit structure of a high-frequency module with power amplifier circuit

[0026] The high-frequency module 100, equipped with power amplifier circuit 1, is used, for example, in a communication device 300. The communication device 300 is, for example, a mobile phone (e.g., a smartphone), but is not limited thereto; it could also be a wearable terminal (e.g., a smartwatch). The high-frequency module 100 is, for example, a module capable of supporting 4G (fourth-generation mobile communication) and 5G (fifth-generation mobile communication) standards. The 4G standard is, for example, the 3GPP LTE (Long Term Evolution) standard. The 5G standard is, for example, 5G NR (New Radio). The high-frequency module 100 can also be a module capable of supporting carrier aggregation and dual connectivity.

[0027] The high-frequency module 100 is configured, for example, to amplify the transmitted signal input from the signal processing circuit 301 and output it to the antenna. The signal processing circuit 301 is a component of the communication device 300 including the high-frequency module 100, but not a component of the high-frequency module 100 itself. The high-frequency module 100 is controlled, for example, by the signal processing circuit 301 included in the communication device 300. The communication device 300 includes the high-frequency module 100 and the signal processing circuit 301. The communication device 300 also includes an antenna 310. The signal processing circuit 301 includes, for example, an RF signal processing circuit 302 and a baseband signal processing circuit 303. The RF signal processing circuit 302 is, for example, an RFIC (Radio Frequency Integrated Circuit) that performs signal processing on the high-frequency signal (transmitted signal) output from the baseband signal processing circuit 303, such as up-conversion, and outputs a processed high-frequency signal. The baseband signal processing circuit 303 is, for example, a BBIC (Baseband Integrated Circuit). The baseband signal processing circuit 303 generates I-phase and Q-phase signals based on the baseband signal. The baseband signal can be, for example, an externally input audio signal or image signal. The baseband signal processing circuit 303 performs IQ modulation processing by combining the I-phase and Q-phase signals and outputs a transmit signal. At this time, the transmit signal is generated as a modulated signal (IQ signal) obtained by amplitude modulation of a carrier signal at a specified frequency with a period longer than the period of that carrier signal. The high-frequency module 100 transmits the high-frequency signal (transmit signal) between the antenna 310 and the RF signal processing circuit 302 of the signal processing circuit 301.

[0028] The high-frequency module 100 includes a power amplifier circuit 1, an output matching circuit 101, a first switch 102, a filter 103, a second switch 104, and an antenna terminal 105.

[0029] The power amplifier circuit 1 includes an amplifier circuit 2. The amplifier circuit 2 amplifies, for example, the input signal from the signal processing circuit 301 and outputs it. The input signal is a high-frequency signal (transmit signal) within a specified frequency band. Here, the specified frequency band includes, for example, multiple communication frequency bands that are different from each other.

[0030] Output matching circuit 101 is disposed in the signal path between amplifier circuit 2 and first switch 102. Output matching circuit 101 is a circuit used to achieve impedance matching between amplifier circuit 2 and filter 103. Output matching circuit 101 is composed of, for example, one inductor, but is not limited to this, and sometimes includes multiple inductors and multiple capacitors.

[0031] A first switch 102 is disposed between the output matching circuit 101 and the filter 103. The first switch 102 has a common terminal and multiple select terminals. The common terminal of the first switch 102 is connected to the amplifier circuit 2 via the output matching circuit 101. One of the multiple select terminals of the first switch 102 is connected to the filter 103. The first switch 102 is, for example, a switch capable of connecting at least one of the multiple select terminals to the common terminal. Here, the first switch 102 is, for example, a switch capable of one-to-one and one-to-many connections. The first switch 102 is a switch capable of switching multiple signal paths for transmitting signals with different communication frequency bands. The first switch 102, for example, supports the MIPI (Mobile Industry Processor Interface) standard. The first switch 102, for example, switches the connection state of the common terminal and the multiple select terminals according to a control signal input from the signal processing circuit 301. The first switch 102 is, for example, a switch IC (Integrated Circuit).

[0032] Filter 103 is a filter that sets the transmission band of at least one of the aforementioned multiple communication frequency bands (e.g., Band 3) as the passband. Filter 103 is, for example, a single-chip elastic wave filter, in which multiple series-arm resonators and multiple parallel-arm resonators are each composed of elastic wave resonators. The elastic wave filter is, for example, a surface acoustic wave (SAW) filter utilizing surface acoustic waves. In the SAW filter, the multiple series-arm resonators and the multiple parallel-arm resonators are, for example, SAW (Surface Acoustic Wave) resonators.

[0033] A second switch 104 is disposed between the filter 103 and the antenna terminal 105. The second switch 104 is a switch connected to the antenna terminal 105. The second switch 104 has a common terminal and multiple selectable terminals. In the second switch 104, the common terminal is connected to the antenna terminal 105. The filter 103 is connected to one of the multiple selectable terminals of the second switch 104. The second switch 104, for example, supports the MIPI standard. The second switch 104, for example, switches the connection state of the common terminal and the multiple selectable terminals according to a control signal input from the signal processing circuit 301. The second switch 104 is, for example, a switch IC.

[0034] Antenna terminal 105 is connected to antenna 310.

[0035] In the high-frequency module 100, the transmission signal output from the amplifier circuit 2 is transmitted from the antenna 310 after passing through the output matching circuit 101, the first switch 102, the filter 103, the second switch 104 and the antenna terminal 105.

[0036] (1.2) Circuit structure of power amplifier circuit

[0037] like Figure 1 and Figure 2 As shown, the power amplifier circuit 1 includes an amplifier circuit 2, a bias circuit 3, a detection unit 4, and a control circuit 5. (As shown...) Figure 2 As shown, amplifier circuit 2 has two first bipolar transistors Tr2 for amplifying the input signal and outputting it. The two bipolar transistors Tr2 are amplification transistors. Bias circuit 3 has two emitter followers 30 corresponding one-to-one with the two first bipolar transistors Tr2. Each of the two emitter followers 30 includes a second bipolar transistor Tr3. The two emitter followers 30 supply bias current to the base of the corresponding first bipolar transistor Tr2 among the two first bipolar transistors Tr2. The two second bipolar transistors Tr3 are bias transistors. Detection unit 4 detects the voltage Vcc (hereinafter also referred to as power supply voltage Vcc) of power supply terminal 11 connected to the collector of the two first bipolar transistors Tr2. Power supply terminal 11 is connected, for example, to a power supply IC (Integrated Circuit) 330 included in communication device 300, and this power supply terminal 11 is the terminal from which the power supply voltage Vcc is supplied from the power supply IC 330. Control circuit 5 has a current limiting circuit 54. A current-limiting circuit 54 is disposed between the battery terminal 12 and the collectors of the two second bipolar transistors Tr3. The control circuit 5 changes the upper limit value Iup of the control current Ice supplied to the collectors of the two second bipolar transistors Tr3 based on the detection voltage of the detection unit 4. Here, when the bias circuit 3 has multiple (in this case, two) emitter followers 30, the control current Ice is shunted to the multiple emitter followers 30.

[0038] Amplifier circuit 2 has an input terminal 27 and an output terminal 28. For example, amplifier circuit 2 amplifies the input signal (transmit signal) received from signal processing circuit 301 via signal input terminal 13 of high-frequency module 100 to input terminal 27 and outputs it from output terminal 28. In amplifier circuit 2, two amplifiers 20 are connected in multiple stages. For ease of explanation, the primary (driver stage) amplifier 20 is sometimes referred to as primary amplifier 21, and the final stage (output stage) amplifier 20 is sometimes referred to as final stage amplifier 22. Additionally, the first bipolar transistor Tr2 of primary amplifier 21 is sometimes referred to as first bipolar transistor Tr21, and the first bipolar transistor Tr2 of final stage amplifier 22 is sometimes referred to as first bipolar transistor Tr22. Amplifier circuit 2 amplifies the input transmit signal through primary amplifier 21, and then amplifies it again through final stage amplifier 22 before outputting it. That is, final stage amplifier 22 further amplifies the transmit signal amplified by primary amplifier 21 before outputting it.

[0039] The amplifier circuit 2 also includes a matching circuit 23 disposed between the input terminal 27 and the primary amplifier 21, and a matching circuit 24 disposed between the primary amplifier 21 and the final stage amplifier 22. Matching circuit 23 is used to achieve impedance matching between the primary amplifier 21 and the signal processing circuit 301. Matching circuit 24 is used to achieve impedance matching between the primary amplifier 21 and the final stage amplifier 22 (interstage matching circuit). In the amplifier circuit 2, the final stage amplifier 22 may also have a matching circuit 25 disposed between the collector of the first bipolar transistor Tr22 and the output terminal 28 of the amplifier circuit 2.

[0040] The base of the first bipolar transistor Tr21 is connected to the input terminal 27 via matching circuit 23. The collector of the first bipolar transistor Tr21 is connected to the power supply terminal 11. Additionally, the collector of the first bipolar transistor Tr21 is connected to the base of the first bipolar transistor Tr22 via matching circuit 24. The emitter of the first bipolar transistor Tr21 is grounded. The first bipolar transistor Tr21 amplifies the input signal input to its base and outputs it from its collector.

[0041] The base of the first bipolar transistor Tr22 is connected to the collector of the first bipolar transistor Tr21 via matching circuit 24. The collector of the first bipolar transistor Tr22 is connected to power supply terminal 11. Additionally, the collector of the first bipolar transistor Tr22 is connected to output terminal 28 via matching circuit 25. The emitter of the first bipolar transistor Tr22 is grounded.

[0042] The bias circuit 3 has multiple emitter followers 30, each corresponding to one of the multiple (two in this case) first bipolar transistors Tr2. Hereinafter, regarding the two emitter followers 30, the emitter follower 30 corresponding to the first bipolar transistor Tr21 is sometimes referred to as emitter follower 31, and the emitter follower 30 corresponding to the first bipolar transistor Tr22 is sometimes referred to as emitter follower 32. Furthermore, regarding the two second bipolar transistors Tr3, the second bipolar transistor Tr3 included in emitter follower 31 is sometimes referred to as second bipolar transistor Tr31, and the second bipolar transistor Tr3 included in emitter follower 32 is sometimes referred to as second bipolar transistor Tr32.

[0043] The base of the second bipolar transistor Tr31 is connected to the third current source 53 via resistor R31. The emitter of the second bipolar transistor Tr31 is connected to the base of the first bipolar transistor Tr21. The collector of the second bipolar transistor Tr31 is connected to the current limiting circuit 54. The base of the second bipolar transistor Tr32 is connected to the third current source 53 via resistor R32. The emitter of the second bipolar transistor Tr32 is connected to the base of the first bipolar transistor Tr22. The collector of the second bipolar transistor Tr32 is connected to the current limiting circuit 54. In the bias circuit 3, a control current Ice from the current limiting circuit 54 is supplied to the connection point between the collectors of the plurality of second bipolar transistors Tr3.

[0044] Amplification circuit 2 and bias circuit 3 are included, for example, in a single-chip IC chip. The IC chip including amplifier circuit 2 and bias circuit 3 is, for example, a GaAs-based IC chip. In this case, the two first bipolar transistors Tr2 are, for example, HBTs (Heterojunction Bipolar Transistors).

[0045] The IC chip including amplifier circuit 2 and bias circuit 3 is not limited to GaAs-based IC chips. For example, it can also be a Si-based IC chip with amplifier circuit 2 or a SiGe-based IC chip with amplifier circuit 2.

[0046] The detection unit 4 has a resistor divider circuit 41 that divides the voltage Vcc at the power supply terminal 11. The power amplifier circuit 1 also has a comparator CP1 that compares the output voltage of the resistor divider circuit 41 with a threshold voltage Vref. In the power amplifier circuit 1, the output voltage of the resistor divider circuit 41 is the detection voltage of the detection unit 4. The control circuit 5 changes the upper limit value Iup of the control current Ice according to the output of the comparator CP1. The resistor divider circuit 41 is a series circuit of resistors R411 and R412. In the resistor divider circuit 41, resistor R411 is set on the power supply terminal 11 side, resistor R412 is set on the ground side, and the resistor divider circuit 41 is set between the power supply terminal 11 and ground. More specifically, in the resistor divider circuit 41, one end of resistor R411 is connected to the power supply terminal 11, the other end of resistor R411 is connected to one end of resistor R412, and the other end of resistor R412 is connected to ground. The output terminal 410 of the resistor divider circuit 41 is the connection point of resistors R411 and R412. Comparator CP1 has a first input terminal, a second input terminal, and an output terminal. The first input terminal of comparator CP1 is connected to the output terminal 410 of the resistor divider circuit 41 (the connection point of resistors R411 and R412). Thus, a voltage obtained by dividing the power supply voltage Vcc through resistors R411 and R412 is applied to the first input terminal of comparator CP1. The reference voltage source E1 for the output threshold voltage Vref is connected to the second input terminal of comparator CP1. The output terminal of comparator CP1 is connected to the control unit 55. Comparator CP1 is a comparison circuit that compares the detection voltage output from the detection unit 4 with the threshold voltage Vref to determine whether the detection voltage exceeds the threshold voltage. The control unit 55 may also be included in the switching circuit 56. The comparator CP1 is configured such that when the detected voltage does not exceed the threshold voltage Vref, the signal level (voltage level) of the output signal from the output terminal is a first level (also called a low level), and when the detected voltage exceeds the threshold voltage Vref, the signal level (voltage level) of the output signal from the output terminal is a second level (also called a high level) that is higher than the first level.

[0047] The control circuit 5 is, for example, an integrated circuit (IC) controlling the amplifier circuit 2 and the bias circuit 3. The control circuit 5 supplies a control current Ice to the junction of the collectors of the two second bipolar transistors Tr3 in the bias circuit 3. The current limiting circuit 54 in the control circuit 5 limits the upper limit value Iup of the control current Ice to a current value proportional to the magnitude of the reference current Iref input to the current limiting circuit 54. The control circuit 5 has a first current source 51 and a second current source 52. The first current source 51 supplies a first reference current Iref1 to the current limiting circuit 54 as a reference current. The second current source 52 supplies a second reference current Iref2, whose current value is smaller than the first reference current Iref1, to the current limiting circuit 54 as a reference current. When the detection voltage of the detection unit 4 does not exceed the threshold voltage Vref, the control circuit 5 supplies the first reference current Iref1 from the first current source 51 to the current limiting circuit 54. When the detection voltage of the detection unit 4 exceeds the threshold voltage Vref, the control circuit 5 supplies the second reference current Iref2 from the second current source 52 to the current limiting circuit 54. The upper limit value Iup of the control current Ice when the first reference current Iref1 is supplied to the current limiting circuit 54 is the upper limit value Iup1 determined by the first reference current Iref1 (reference). Figure 4 Furthermore, the upper limit value Iup of the control current Ice when the second reference current Iref2 is supplied to the current limiting circuit 54 is the upper limit value Iup2 determined by the second reference current Iref2 (reference). Figure 4 Here, the upper limit value Iup2 is less than the upper limit value Iup1. In addition, the control circuit 5 also has a third current source 53.

[0048] The control circuit 5 also includes a switching circuit 56 and a control unit 55. The switching circuit 56 connects the first current source 51 and the second current source 52 to the current limiting circuit 54. The control unit 55 controls the switching circuit 56 based on the detection voltage from the detection unit 4. The switching circuit 56 is, for example, a switch having a common terminal 560 and two selection terminals 561 and 562 (see reference). Figure 3 The common terminal 560 is connected to the current limiting circuit 54. One of the two selection terminals 561 and 562, selection terminal 561, is connected to the first current source 51, and selection terminal 562, on the other hand, is connected to the second current source 52.

[0049] The third current source 53 supplies a control current Icont to the bases of the second bipolar transistor Tr31 and the second bipolar transistor Tr32, respectively. The control current Icont is a constant current.

[0050] Emitter follower 31 supplies bias current from the emitter of second bipolar transistor Tr31 to the base of first bipolar transistor Tr21 of primary amplifier 21. This bias current is a bias signal used to control the bias point (operation point) of primary amplifier 21.

[0051] Emitter follower 32 supplies bias current from the emitter of second bipolar transistor Tr32 to the base of first bipolar transistor Tr22 of final stage amplifier 22. This bias current is a bias signal used to control the bias point (operation point) of final stage amplifier 22.

[0052] Two diodes, D311 and D312, are connected in series between the base of the second bipolar transistor Tr31 included in the emitter follower 31 and ground. The two diodes, D311 and D312, are respectively constructed by connecting the base and collector of an npn transistor.

[0053] Two diodes, D321 and D322, are connected in series between the base of the second bipolar transistor Tr32 included in the emitter follower 32 and ground. The two diodes D321 and D322 are respectively configured by connecting the base and collector of an npn transistor.

[0054] The current limiting circuit 54 is a circuit that limits the control current Ice to a current value that is proportional to the current value of the reference current. The current limiting circuit 54 outputs the control current Ice.

[0055] Current limiting circuit 54, for example, is composed of... Figure 3 The current mirror circuit is configured as shown. The current limiting circuit 54 has three n-channel MOSFETs (Metal-Oxide-Semiconductor Field Effect Transistors) 542, 543, and 544, and four p-channel MOSFETs 545, 546, 547, and 548.

[0056] The drain of the n-channel MOSFET 542 can be connected to the first current source 51 and the second current source 52 via the switching circuit 56. The source of the n-channel MOSFET 542 is grounded. The gate of the n-channel MOSFET 542 is connected to the gates of two n-channel MOSFETs 543 and 544. In the current limiting circuit 54, a reference current Iref is input to the drain of the n-channel MOSFET 542.

[0057] In the current limiting circuit 54, a series circuit of p-channel MOSFET 545, p-channel MOSFET 547, and n-channel MOSFET 543 is connected between battery terminal 12 and ground. Additionally, in the current limiting circuit 54, a series circuit of p-channel MOSFET 546, p-channel MOSFET 548, and n-channel MOSFET 544 is connected between battery terminal 12 and ground.

[0058] In the current limiting circuit 54, the source of p-channel MOSFET 545 is connected to battery terminal 12, and the drain of p-channel MOSFET 545 is connected to the source of p-channel MOSFET 547. The source of p-channel MOSFET 546 is connected to battery terminal 12, and the drain of p-channel MOSFET 546 is connected to the source of p-channel MOSFET 548. The gate of p-channel MOSFET 545 is connected to the gate of p-channel MOSFET 546. The gate of p-channel MOSFET 547 is connected to the gate of p-channel MOSFET 548. The gate of p-channel MOSFET 548 is connected to the drain of p-channel MOSFET 548.

[0059] The gates of two n-channel MOSFETs, 543 and 544, are each connected to the gate of n-channel MOSFET 542. The drain of n-channel MOSFET 543 is connected to the drain of p-channel MOSFET 547. The drain of n-channel MOSFET 544 is connected to the drain of p-channel MOSFET 548. The sources of the two n-channel MOSFETs, 543 and 544, are each connected to ground.

[0060] In the current limiting circuit 54, the control current Ice is output through a current path branching off from the node of the current path connecting the drain of the p-channel MOSFET 546 to the source of the p-channel MOSFET 548.

[0061] The current flowing through n-channel MOSFET 544 is proportional to the current flowing through n-channel MOSFET 543. The current flowing through p-channel MOSFET 546 is proportional to the current flowing through p-channel MOSFET 545. The current flowing through p-channel MOSFET 546 is the sum of the current flowing through n-channel MOSFET 544 and the control current Ice. The current limiting circuit 54 has the function of generating and outputting the control current Ice based on the current flowing through n-channel MOSFET 543.

[0062] The control circuit 5 and comparator CP1 are included, for example, in a single-chip IC. The IC chip including the control circuit 5 and comparator CP1 is, for example, a Si-based IC chip.

[0063] Control circuit 5 is connected to signal processing circuit 301, for example. Control circuit 5 controls amplifier circuit 2 and bias circuit 3 based on control signals obtained from signal processing circuit 301. Control circuit 5 supports MIPI standard, for example. Control circuit 5 controls amplifier circuit 2 and bias circuit 3 according to control signals from RF signal processing circuit 302 of signal processing circuit 301.

[0064] (1.3) Operation of the power amplifier circuit

[0065] Power amplifier circuit 1, for example, amplifies and outputs the transmitted signal from signal processing circuit 301. Here, in power amplifier circuit 1, amplifier circuit 2 amplifies and outputs the input signal, which is the transmitted signal of a specified frequency band.

[0066] In the power amplifier circuit 1, when the power supply voltage Vcc at the power supply terminal 11 is the rated power supply voltage, the detection voltage of the detection unit 4 does not exceed the threshold voltage Vref, and the signal level of the output signal of the comparator CP1 is at the first level. When the output signal of the comparator CP1 is at the first level, the control unit 55 connects the selection terminal 561 of the switching circuit 56 to the common terminal 560. As a result, a first reference current Iref1 is supplied to the current limiting circuit 54 as the reference current Iref.

[0067] In the power amplifier circuit 1, when the power supply voltage Vcc at the power supply terminal 11 is higher than the rated power supply voltage by a specified voltage (e.g., 0.5V), the detection voltage of the detection unit 4 exceeds the threshold voltage Vref, and the signal level of the output signal of the comparator CP1 is at the second level. When the output signal of the comparator CP1 is at the second level, the control unit 55 connects the selection terminal 562 of the switching circuit 56 to the common terminal 560. As a result, a second reference current Iref2 is supplied to the current limiting circuit 54 as the reference current Iref.

[0068] In the power amplifier circuit 1, when a first reference current Iref1 is supplied to the current limiting circuit 54 as the reference current Iref, and when a second reference current Iref2 is supplied to the current limiting circuit 54 as the reference current Iref, as follows: Figure 4 As shown, the input power Pin and control current Ice characteristics of amplifier circuit 2 are different, such as... Figure 5 As shown, the input power Pin and output power Pout characteristics of amplifier circuit 2 are different.

[0069] In power amplifier circuit 1, when the reference current Iref is the first reference current Iref1, as follows: Figure 4As shown by solid line A1, the control current Ice flows at a desired level (less than the upper limit Iup1) as the input power Pin of amplifier circuit 2 increases. In short, in power amplifier circuit 1, the control current Ice will not rise to the upper limit Iup1; the control current Ice increases as the input power Pin of amplifier circuit 2 increases. Therefore, in power amplifier circuit 1, when the power supply voltage Vcc is at the rated power supply voltage and the output power Pout of amplifier circuit 2 is below the rated maximum output, such as... Figure 5 As shown by solid line B1, the input power Pin-output power Pout characteristic of amplifier circuit 2 exhibits linearity. In power amplifier circuit 1, with the power supply voltage Vcc at the rated power supply voltage, the output power Pout of amplifier circuit 2 saturates at a value higher than the rated maximum output but lower than a specified power. The specified power is, for example, the power at which a circuit element with low power tolerance (e.g., filter 103) in the high-frequency module 100, other than power amplifier circuit 1, would be damaged. An example of the specified power is the power tolerance of filter 103.

[0070] In power amplifier circuit 1, when the reference current Iref is the second reference current Iref2, if the input power Pin of amplifier circuit 2 increases, then as follows: Figure 4 As shown by the dashed line A2, the control current Ice is limited to an upper limit Iup2 determined by the second reference current Iref2. In short, in power amplifier circuit 1, when the control current Ice rises to the upper limit Iup2, even if the input power Pin of amplifier circuit 2 increases, the control current Ice is limited to the upper limit Iup2. Therefore, in power amplifier circuit 1, when the power supply voltage Vcc is a specified voltage higher than the rated power supply voltage (e.g., 0.1V to 0.2V), the output power Pout of amplifier circuit 2 is as follows: Figure 5 As shown by the dashed line B2, the power amplifier 2 saturates at a value higher than the rated maximum output but lower than the specified power, when the power supply voltage Vcc is the rated power supply voltage. In power amplifier circuit 1, with the power supply voltage Vcc at its rated voltage, the output power Pout of amplifier circuit 2 saturates at a value higher than the rated maximum output but lower than the specified power. The specified power is, for example, the power at which a circuit element with low power tolerance (e.g., filter 103) in the high-frequency module 100, other than power amplifier circuit 1, would be damaged. An example of the specified power is the power tolerance of filter 103.

[0071] (2) Summary

[0072] The power amplifier circuit 1 according to the embodiment includes an amplifier circuit 2, a bias circuit 3, a detection unit 4, and a control circuit 5. The amplifier circuit 2 has a first bipolar transistor Tr2 for amplifying and outputting an input signal. The bias circuit 3 has an emitter follower 30. The emitter follower 30 includes a second bipolar transistor Tr3. The emitter follower 30 supplies a bias current to the base of the first bipolar transistor Tr2. The detection unit 4 detects the voltage Vcc at the power supply terminal 11 connected to the collector of the first bipolar transistor Tr2. The control circuit 5 has a current limiting circuit 54. The current limiting circuit 54 is provided between the battery terminal 12 and the collector of the second bipolar transistor Tr3. The control circuit 5 changes the upper limit value Iup of the control current Ice supplied to the collector of the second bipolar transistor Tr3 based on the voltage detected by the detection unit 4.

[0073] The power amplifier circuit 1 according to the embodiment can improve the linearity of the input power Pin-output power Pout characteristic of the amplifier circuit 2. Here, the power amplifier circuit 1 according to the embodiment can improve the linearity when operating at the rated power supply voltage and at power below the rated maximum output power, and can suppress the degradation of ACLR and EVM.

[0074] Furthermore, even when the power supply voltage Vcc becomes a voltage higher than the rated power supply voltage by a specified amount, the power amplifier circuit 1 according to the embodiment can limit the output power Pout of the amplifier circuit 2 to a specified amount that does not rise above the rated maximum output. Assuming a structure that limits the control current Icont instead of Ice, when a large signal operation occurs, even a slight change in the base-emitter voltage of the second bipolar transistor Tr3 of the emitter follower 30 will cause the control current Ice to increase, making it difficult to precisely limit the output power Pout of the amplifier circuit 2. In contrast, in the power amplifier circuit 1 according to the embodiment, the control current Ice is limited to an upper limit Iup. Therefore, even when the base-emitter voltage of the second bipolar transistor Tr3 of the emitter follower 30 decreases during a large signal operation, the base current flowing through the first bipolar transistor Tr2 of the amplifier circuit 2 will not exceed the threshold value of the control current Ice. Therefore, compared to limiting the control current Icont, the power amplifier circuit 1 according to the embodiment can limit the output power Pout with higher precision. In the power amplifier circuit 1 according to the embodiment, compared with the case where the control current Icont is limited without limiting the control current Ice, the bias current flowing through the first bipolar transistor Tr2 is less susceptible to the influence of the emitter follower 30 h. fe The impact of fluctuations in (output short-circuit current gain).

[0075] The high-frequency module 100, which includes a power amplifier circuit 1, comprises multiple circuit elements (GaAs-based and Si-based IC chips of the power amplifier circuit 1, a first switch 102, a filter 103, a second switch 104, etc.) and a substrate for mounting these multiple circuit elements. In the high-frequency module 100, miniaturization is sometimes achieved by miniaturizing the filter 103, which occupies a larger area on the substrate among the multiple circuit elements. However, the power tolerance of the filter 103 tends to decrease as the chip size of the filter 103 decreases. In the power amplifier circuit 1 according to the embodiment, the output power Pout of the amplifier circuit 2 can be limited to a predetermined power that does not exceed the rated maximum output. Therefore, for example, damage to the filter 103 can be suppressed, and the design margin of the filter 103 can be easily increased. Furthermore, it is preferable, for example, to determine the predetermined power based on the power tolerance of the circuit element with the lowest power tolerance in the high-frequency module 100.

[0076] (3) Modifications of power amplifier circuits

[0077] (3.1) Variation Example 1

[0078] Reference Figure 6 The power amplifier circuit 1a according to Modification 1 of the embodiment will be described below. Regarding the power amplifier circuit 1a according to Modification 1, the same reference numerals are used for the same constituent elements as those in the power amplifier circuit 1 according to the embodiment, and descriptions are omitted. Furthermore, in Figure 6 The diagrams of amplifier circuit 2, bias circuit 3, detection unit 4, and comparator CP1 are omitted.

[0079] The power amplifier circuit 1a in Modification 1 differs from the power amplifier circuit 1 in the embodiment in that the power amplifier circuit 1a in Modification 1 includes a control circuit 5a instead of the control circuit 5 in the power amplifier circuit 1 in the embodiment. Furthermore, the power amplifier circuit 1a in Modification 1 differs from the power amplifier circuit 1 in the embodiment in that a switching circuit 6 is provided separately from the control circuit 5a in the power amplifier circuit 1a in Modification 1.

[0080] The control circuit 5a has a current source 50a, which replaces the group of first current source 51, second current source 52, and switching circuit 56 in the control circuit 5. The current source 50a supplies a reference current Iref to the current limiting circuit 54. The magnitude of the reference current Iref supplied from the current source 50a to the current limiting circuit 54 is, for example, the same as the magnitude of the second reference current Iref2 supplied from the second current source 52 to the current limiting circuit 54 in the power amplifier circuit 1 according to the embodiment.

[0081] The switching circuit 6 has a common terminal 60 and two select terminals 61 and 62. The common terminal 60 is connected to the collector of the second bipolar transistor Tr3 of each emitter follower 30. The select terminal 61 is connected to the output of the current limiting circuit 54. Thus, in Figure 6 In this example, select terminal 61 is connected to a node on the current path between the drain of p-channel MOSFET 546 and the source of p-channel MOSFET 548. Select terminal 62 is connected to battery terminal 12 without passing through current limiting circuit 54. Here, "connected to battery terminal 12 without passing through current limiting circuit 54" means connected to battery terminal 12 without passing through any of the circuit elements of current limiting circuit 54.

[0082] The control circuit 5a has a control unit 55a, replacing the control unit 55 of the control circuit 5 of the power amplifier circuit 1 according to the embodiment. The switching circuit 6 switches the connection state of the common terminal 60 and the two selection terminals 61, 62 according to the control signal input from the control unit 55a. In summary, the switching circuit 6 exclusively connects the current limiting circuit 54 and the battery terminal 12 to the emitter follower 30 (see reference). Figure 2 The collector connection of the second bipolar transistor Tr3.

[0083] When the detection voltage of the detection unit 4 exceeds the threshold voltage Vref, the control circuit 5a controls the switching circuit 6 to connect the battery terminal 12 to the collector of the second bipolar transistor Tr3 of the emitter follower 30 via the current limiting circuit 54. When the detection voltage of the detection unit 4 does not exceed the threshold voltage Vref, the control circuit 5a controls the switching circuit 6 to connect the battery terminal 12 to the collector of the second bipolar transistor Tr3 of the emitter follower 30 without passing through the current limiting circuit 54. In this case, the control circuit 5a stops supplying the reference current Iref from the current source 50a to the current limiting circuit 54. In the control circuit 5a, the control unit 55a controls the switching circuit 6 to connect the battery terminal 12 to the collector of the second bipolar transistor Tr3 of the emitter follower 30 without passing through the current limiting circuit 54. Figure 2 The output signal of ) is used to control the switching circuit 6.

[0084] In the power amplifier circuit 1a described in Modification 1, when the battery terminal 12 is connected to the collector of the second bipolar transistor Tr3 of the emitter follower 30 without passing through the current limiting circuit 54, it presents a state similar to... Figure 4 solid line A1 and Figure 5 The solid line B1 has the same characteristics. Furthermore, in the power amplifier circuit 1a according to Modified Example 1, when the battery terminal 12 is connected to the collector of the second bipolar transistor Tr3 of the emitter follower 30 via the current limiting circuit 54, it exhibits the same characteristics as... Figure 4 The dashed line A2 and Figure 5 It has the same characteristics as the dashed line B2.

[0085] The power amplifier circuit 1a involved in Modification Example 1 is the same as the power amplifier circuit 1 involved in Embodiment 1. The control circuit 5a changes the direction of the second bipolar transistor Tr3 (refer to) according to the detection voltage of the detection unit 4. Figure 2 The upper limit value Iup of the control current Ice supplied to the collector of the amplifier circuit is determined. Therefore, the power amplifier circuit 1a in Modified Example 1, like the power amplifier circuit 1 in the Embodiment 1, can realize the amplifier circuit 2 (see reference 1). Figure 2 The linearity of the input power Pin-output power Pout characteristic is improved.

[0086] (3.2) Variation Example 2

[0087] Reference Figure 7 The power amplifier circuit 1b according to Modification 2 of the embodiment will be described below. Regarding the power amplifier circuit 1b according to Modification 2, the same reference numerals are used for the same components as those in the power amplifier circuit 1 according to the embodiment, and descriptions are omitted. Furthermore, in Figure 7 The diagrams of amplifier circuit 2, bias circuit 3, detection unit 4, and comparator CP1 are omitted.

[0088] The power amplifier circuit 1b involved in Modification 2 differs from the power amplifier circuit 1 involved in Embodiment 1 in that: the power amplifier circuit 1b involved in Modification 2 includes a control circuit 5b having a current source 50b and a switching unit 7, which replaces the group of the first current source 51, the second current source 52, the switching circuit 56 and the current limiting circuit 54 of the control circuit 5 of the power amplifier circuit 1 involved in Embodiment 1.

[0089] Switching unit 7 is disposed between current source 50b and current limiting circuit 54. Switching unit 7 is a current mirror circuit capable of changing the mirror ratio. Switching unit 7 has an n-channel MOSFET 71 and n (n is an integer greater than or equal to 2) n-channel MOSFETs 721 to 72. n m (m is an integer greater than or equal to 2) n-channel MOSFETs 731~73 m It has two p-channel MOSFETs 75 and 76, one n-channel MOSFET 74, and two switches SW1 and SW2.

[0090] The drain of n-channel MOSFET 71 is connected to current source 50b. In n-channel MOSFET 71, the drain is connected to the gate. The source of n-channel MOSFET 71 is connected to ground. The gate of n-channel MOSFET 71 is connected to the gate of n-channel MOSFET 721 via switch SW1. There are n n-channel MOSFETs 721-72... n The drain and m n-channel MOSFETs 731-73m The drain of the MOSFET is connected to the drain of the p-channel MOSFET 75. There are n n-channel MOSFETs 721-72. n The source and m n-channel MOSFETs 731~73 m The source is connected to ground. m n-channel MOSFETs 731~73 m The gates of the two devices are connected to each other via switch SW2 to the n-channel MOSFET72. n The gate connection. n-channel MOSFET 72 n The gate of the p-channel MOSFET 75 is connected to the gate of the n-channel MOSFET 721 via switch SW1. In switching section 7, the drain of the p-channel MOSFET 75 is connected to its gate. Additionally, in switching section 7, the gate of the p-channel MOSFET 75 is connected to the gate of the p-channel MOSFET 76. Furthermore, in switching section 7, the sources of both the p-channel MOSFET 75 and the p-channel MOSFET 76 are connected to the battery terminal 12. Additionally, the drain of the p-channel MOSFET 76 is connected to the drain of the n-channel MOSFET 74. The source of the n-channel MOSFET 74 is connected to ground. The gate of the n-channel MOSFET 74 is connected to the gate of the n-channel MOSFET 543 in the current limiting circuit 54.

[0091] In the switching unit 7, when switch SW2 is on and switch SW1 is off, the magnetic mirror ratio is smaller compared to when SW2 is off and switch SW1 is on.

[0092] Control circuit 5b has a control unit 55b, replacing the control unit 55 of control circuit 5. Switching unit 7 switches the connection states of switches SW1 and SW2 according to a control signal input from control unit 55b, for example. In summary, switching unit 7 can change the current flowing through the n-channel MOSFET 74, which is connected to the n-channel MOSFET 543 of current limiting circuit 54. The current flowing through the n-channel MOSFET 74 is determined by the reference current Iref and the magnetic mirror ratio of switching unit 7.

[0093] If the detection voltage of the detection unit 4 does not exceed the threshold voltage Vref, the control circuit 5b controls the switching unit 7, causing SW2 of the switching unit 7 to open and switch SW1 to close. If the detection voltage of the detection unit 4 exceeds the threshold voltage Vref, the control circuit 5b controls the switching unit 7, causing SW2 of the switching unit 7 to close and switch SW1 to open. In the control circuit 5b, the control unit 55b controls the switching unit 7 based on the output signal of the comparator CP1.

[0094] The power amplifier circuit 1b in Variation Example 2 is similar to the power amplifier circuit 1 in Embodiment 1. The control circuit 5b adjusts the voltage output to the second bipolar transistor Tr3 (see reference 4) based on the detection voltage detected by the detection unit 4. Figure 2 The upper limit value Iup of the control current Ice supplied to the collector of the amplifier circuit is determined. Therefore, the power amplifier circuit 1b in Modified Example 2, like the power amplifier circuit 1 in the Embodiment 1, can realize the amplifier circuit 2 (see reference 2). Figure 2 The linearity of the input power Pin-output power Pout characteristic is improved. In the power amplifier circuit 1b involved in the modified example 2, the switch SW2 of the switching unit 7 can also be removed, and the upper limit value Iup of the control current Ice can be changed by switching the switch SW1.

[0095] In the power amplifier circuit 1b described in Modification 2, the control circuit 5b may change the upper limit of the control current Ice based on the frequency band of the input signal to be amplified by the amplifier circuit 2. In this case, the control unit 55b changes the upper limit of the control current Ice via the control switching unit 7.

[0096] Alternatively, in power amplifier circuits 1, 1a, and 1b, control circuits 5, 5a, and 5b can also be configured based on power supply terminal 11 (refer to...). Figure 2 The threshold voltage Vref is changed according to the rated power supply voltage of the detection unit 4. In this case, for example, a variable power supply is used as the reference voltage source E1, and the control units 55, 55a, and 55b change the threshold voltage Vref according to the rated power supply voltage corresponding to the detection voltage of the detection unit 4.

[0097] (Other variations)

[0098] The above-described embodiments are merely one of the various embodiments of the present invention. Various modifications can be made to the above-described embodiments based on design and other factors, as long as the objectives of the present invention are achieved.

[0099] For example, in power amplifier circuit 1, the number of connection stages of amplifier 20 in amplifier circuit 2 is set to 2, but it is not limited to this; the number of connection stages of amplifier 20 can also be set to 3 or more. Furthermore, amplifier circuit 2 is not limited to a structure having multiple amplifiers 20; it only needs to have at least one amplifier 20. In summary, in power amplifier circuit 1, the number of first bipolar transistors Tr2 can also be one, and in this case, the number of emitter followers 30 and second bipolar transistors Tr3 in bias circuit 3 can also be one.

[0100] In addition, in the high-frequency module 100, the filter 103 is an elastic wave filter that utilizes surface acoustic waves, but it is not limited to this. For example, it can also be an elastic wave filter that utilizes boundary acoustic waves, plate waves, etc.

[0101] In elastic wave filters, the resonators of multiple series arm resonators and multiple parallel arm resonators are not limited to SAW resonators; for example, they can also be BAW (Bulk Acoustic Wave) resonators.

[0102] The high-frequency module 100 may also include a receiving circuit, which includes a low-noise amplifier that amplifies the received signal input from the antenna terminal 105 and a filter connected to the low-noise amplifier.

[0103] In addition, filter 103 is not limited to a transmitting filter, but can also be a duplexer.

[0104] In addition, in the high-frequency module 100, the first switch 102 and the second switch 104 may also be switch ICs that support GPIO (General Purpose Input / Output).

[0105] (Way)

[0106] The following methods are disclosed in this specification.

[0107] The power amplifier circuit (1; 1a; 1b) involved in the first embodiment includes an amplifier circuit (2), a bias circuit (3), a detection unit (4), and a control circuit (5; 5a; 5b). The amplifier circuit (2) has a first bipolar transistor (Tr2) for amplifying the input signal and outputting it. The bias circuit (3) has an emitter follower (30). The emitter follower (30) includes a second bipolar transistor (Tr3). The emitter follower (30) supplies a bias current to the base of the first bipolar transistor (Tr2). The detection unit (4) detects the voltage (Vcc) at the power supply terminal (11) connected to the collector of the first bipolar transistor (Tr2). The control circuit (5; 5a; 5b) has a current limiting circuit (54). The current limiting circuit (54) is provided between the battery terminal (12) and the collector of the second bipolar transistor (Tr3). The control circuit (5; 5a; 5b) changes the upper limit of the control current (Ice) supplied to the collector of the second bipolar transistor (Tr3) based on the detection voltage of the detection unit (4).

[0108] The power amplifier circuits (1; 1a; 1b) involved in the first method can improve the linearity of the input power (Pin) - output power (Pout) characteristics of the amplifier circuit (2).

[0109] In the power amplifier circuit (1; 1a; 1b) involved in the second method, in the first method, when the detection voltage of the detection unit (4) is greater than the threshold voltage (Vref) corresponding to the rated power supply voltage of the power supply terminal (11), the control circuit (5; 5a; 5b) reduces the upper limit of the control current (Ice).

[0110] In the power amplifier circuit (1; 1a; 1b) involved in the second method, it is possible to suppress the rise of the output power (Pout) of the amplifier circuit (2) when the power supply voltage (Vcc) becomes a voltage that is higher than the rated power supply voltage by a specified voltage.

[0111] In the power amplifier circuit (1) involved in the third method, in the second method, the current limiting circuit (54) is a circuit that limits the upper limit of the control current (Ice) to a current value proportional to the magnitude of the reference current (Iref) input to the current limiting circuit (54). The control circuit (5) has a first current source (51) and a second current source (52). The first current source (51) can supply a first reference current (Iref1) to the current limiting circuit (54) as a reference current (Iref). The second current source (52) can supply a second reference current (Iref2) with a current value smaller than the first reference current (Iref1) to the current limiting circuit (54) as a reference current (Iref). If the detection voltage of the detection unit (4) does not exceed the threshold voltage (Vref), the control circuit (5) supplies the first reference current (Iref1) from the first current source (51) to the current limiting circuit (54). If the detection voltage of the detection unit (4) exceeds the threshold voltage (Vref), the control circuit (5) supplies the second reference current (Iref2) from the second current source (52) to the current limiting circuit (54).

[0112] In the power amplifier circuit (1) involved in the third method, the control current (Ice) can be changed when a first reference current (Iref1) is supplied to the current limiting circuit (54) as a reference current (Iref) and when a second reference current (Iref2) is supplied to the current limiting circuit (54) as a reference current (Iref).

[0113] In the power amplifier circuit (1) involved in the fourth method, in the third method, the control circuit (5) also includes a switching circuit (56) and a control unit (55). The switching circuit (56) connects the first current source (51) and the second current source (52) to the current limiting circuit (54). The control unit (55) controls the switching circuit (56) according to the detection voltage of the detection unit (4).

[0114] The power amplifier circuit (1) involved in the fourth method can selectively connect the first current source (51) and the second current source (52) to the current limiting circuit (54).

[0115] In the power amplifier circuit (1a) according to the fifth method, the second method includes a switching circuit (6). The switching circuit (6) exclusively connects the current limiting circuit (54) and the battery terminal (12) to the collector of the second bipolar transistor (Tr3). When the detection voltage of the detection unit (4) exceeds the threshold voltage (Vref), the control circuit (5a) controls the switching circuit (6) to connect the battery terminal (12) to the collector of the second bipolar transistor (Tr3) via the current limiting circuit (54). When the detection voltage of the detection unit (4) does not exceed the threshold voltage (Vref), the control circuit (5a) controls the switching circuit (6) to connect the battery terminal (12) to the collector of the second bipolar transistor (Tr3) without passing through the current limiting circuit (54).

[0116] In the power amplifier circuit (1a) involved in the fifth method, when the detection voltage of the detection unit (4) does not exceed the threshold voltage (Vref), the current limiting circuit (54) is not used, thereby improving the linearity of the input power (Pin)-output power (Pout) characteristics of the amplifier circuit (2).

[0117] In the power amplifier circuit (1; 1a; 1b) involved in the sixth method, in any of the second to fifth methods, the detection unit (4) has a resistor divider circuit (41) that divides the voltage (Vcc) of the power supply terminal (11). The power amplifier circuit (1; 1a; 1b) also has a comparator (CP1) that compares the output voltage of the resistor divider circuit (41) with a threshold voltage (Vref). The control circuit (5; 5a; 5b) changes the upper limit value of the control current (Ice) according to the output of the comparator (CP1).

[0118] In the power amplifier circuit (1; 1a; 1b) involved in the sixth method, the value of the threshold voltage (Vref) can be reduced compared to the case where the voltage (Vcc) of the power supply terminal (11) is directly input to the comparator (CP1).

[0119] In the power amplifier circuit (1; 1a; 1b) involved in the seventh method, in the sixth method, the amplifier circuit (2) has multiple bipolar transistors (Tr2). In the amplifier circuit (2), the multiple bipolar transistors (Tr2) are connected in multiple stages. The collector of the primary bipolar transistor (first bipolar transistor Tr21) in the resistor divider circuit (41) and the multiple bipolar transistors (Tr2) is connected to the power supply terminal (11).

[0120] In the power amplifier circuit (1; 1a; 1b) involved in the seventh method, the degradation of high-frequency characteristics can be suppressed.

[0121] In the power amplifier circuit (1b) involved in the eighth method, in any of the first to seventh methods, the control circuit (5b) changes the upper limit of the control current (Ice) according to the frequency band of the input signal to be amplified by the amplifier circuit (2).

[0122] In the power amplifier circuit (1b) of the eighth method, for example, the higher the frequency band of the input signal, the greater the upper limit of the control current (Ice) can be. Therefore, the power amplifier circuit (1b) of the eighth method is easy to support HPUE (High Power User Equipment).

[0123] In the power amplifier circuit (1; 1a; 1b) involved in the ninth method, in any of the second to fifth methods, the control circuit (5) changes the threshold voltage (Vref) according to the rated power supply voltage of the power supply terminal (11).

[0124] In the power amplifier circuit (1; 1a; 1b) involved in the ninth method, regardless of the rated power supply voltage of the power supply terminal (11), the linearity of the input power (Pin)-output power (Pout) characteristic of the amplifier circuit (2) can be improved.

[0125] Explanation of reference numerals in the attached figures

[0126] 1. 1a, 1b: Power amplifier circuit; 2: Amplifier circuit; 20: Amplifier; 21: Primary amplifier; 22: Final stage amplifier; 23: Matching circuit; 24: Matching circuit; 25: Matching circuit; 27: Input terminal; 28: Output terminal; 3: Bias circuit; 30: Emitter follower; 31: Emitter follower; 32: Emitter follower; 4: Detection unit; 41: Resistor voltage divider circuit; 410: Output terminal; 5. 5a, 5b: Control circuit; 51: First current source; 52: Second... 53: Current source; 54: Third current source; 54: Current limiting circuit; 542: n-channel MOSFET; 543: n-channel MOSFET; 544: n-channel MOSFET; 545: p-channel MOSFET; 546: p-channel MOSFET; 547: p-channel MOSFET; 548: p-channel MOSFET; 55, 55a, 55b: Control unit; 56: Switching circuit; 6: Switching circuit; 7: Switching unit; 71: n-channel MOSFET; 721~72 n : n-channel MOSFET; 731~73 m74: n-channel MOSFET; 75: p-channel MOSFET; 76: p-channel MOSFET; 11: Power supply terminal; 100: High-frequency module; 101: Output matching circuit; 102: First switch; 103: Filter; 104: Second switch; 105: Antenna terminal; 300: Communication device; 301: Signal processing circuit; 302: RF signal processing circuit; 303: Baseband signal processing circuit; 310: Antenna; 330: Power IC; CP1: Comparator; D311, D312, D321, D322: Diodes; E1: Reference voltage Source; Ice: Control current; Iref: Reference current; Iref1: First reference current; Iref2: Second reference current; Icont: Control current; Pin: Input power; Pout: Output power; R31: Resistor; R32: Resistor; R411: Resistor; R412: Resistor; SW1: Switch; SW2: Switch; Tr2: First bipolar transistor; Tr21: First bipolar transistor; Tr22: First bipolar transistor; Tr3: Second bipolar transistor; Tr31, Tr32: Second bipolar transistor; Vcc: Power supply voltage; Vbatt: Battery voltage.

Claims

1. A power amplifier circuit, comprising: An amplifier circuit having a first bipolar transistor for amplifying the input signal and outputting it; A bias circuit having an emitter follower, the emitter follower including a second bipolar transistor for supplying bias current to the base of the first bipolar transistor; The detection unit detects the voltage at the power supply terminal connected to the collector of the first bipolar transistor; as well as The control circuit includes a current-limiting circuit disposed between the battery terminal and the collector of the second bipolar transistor. The control circuit adjusts the upper limit of the control current supplied to the collector of the second bipolar transistor based on the detection voltage of the detection unit. The control circuit also has: A switching circuit connects the first current source and the second current source to the current limiting circuit; and The control unit controls the switching circuit based on the detection voltage detected by the detection unit.

2. The power amplifier circuit according to claim 1, characterized in that, When the detection voltage of the detection unit is greater than the threshold voltage corresponding to the rated power supply voltage of the power supply terminal, the control circuit reduces the upper limit of the control current.

3. The power amplifier circuit according to claim 2, characterized in that, The current limiting circuit is a circuit that limits the upper limit of the control current to a current value that is proportional to the magnitude of the reference current input to the current limiting circuit. The control circuit has: The first current source is capable of supplying a first reference current to the current limiting circuit as the reference current; and The second current source is capable of supplying the current-limiting circuit with a second reference current whose current value is smaller than that of the first reference current, as the reference current. If the detection voltage of the detection unit does not exceed the threshold voltage, the control circuit supplies the first reference current from the first current source to the current limiting circuit. When the detection voltage of the detection unit exceeds the threshold voltage, the control circuit supplies the second reference current from the second current source to the current limiting circuit.

4. The power amplifier circuit according to claim 2, characterized in that, The device includes a switching circuit that exclusively connects the current limiting circuit and the battery terminal to the collector of the second bipolar transistor. If the detection voltage of the detection unit exceeds the threshold voltage, the control circuit controls the switching circuit to connect the battery terminal to the collector of the second bipolar transistor via the current limiting circuit. If the detection voltage of the detection unit does not exceed the threshold voltage, the control circuit controls the switching circuit to connect the battery terminal to the collector of the second bipolar transistor without passing through the current limiting circuit.

5. The power amplifier circuit according to any one of claims 2 to 4, characterized in that, The detection unit has: A resistor divider circuit that divides the voltage at the power supply terminals; and A comparator compares the output voltage of the resistor divider circuit with the threshold voltage. The control circuit changes the upper limit of the control current based on the output of the comparator.

6. The power amplifier circuit according to claim 5, characterized in that, The amplifier circuit has a plurality of the first bipolar transistors. In the amplifier circuit, multiple first bipolar transistors are connected in multiple stages. The collector of the primary first bipolar transistor in the resistor divider circuit and the plurality of first bipolar transistors is connected to the power supply terminal.

7. The power amplifier circuit according to any one of claims 1 to 4 and 6, characterized in that, The control circuit changes the upper limit of the control current according to the frequency band of the input signal to be amplified by the amplifier circuit.

8. The power amplifier circuit according to claim 5, characterized in that, The control circuit changes the upper limit of the control current according to the frequency band of the input signal to be amplified by the amplifier circuit.

9. The power amplifier circuit according to any one of claims 2 to 4, characterized in that, The control circuit changes the threshold voltage according to the rated power supply voltage of the power supply terminal.

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