Vertical cavity surface emitting laser

Abstract

A vertical cavity surface emitting laser includes a substrate having a main surface including a first region and a second region, a post disposed on the first region, the post including a first distributed Bragg reflector of a first conductivity type disposed on the first region, an active layer disposed on the first distributed Bragg reflector, and a second distributed Bragg reflector of a second conductivity type disposed on the active layer, a laminate disposed on the main surface, the laminate having an upper surface with at least one recess disposed on the second region, a resin portion disposed in the at least one recess, and an electrode pad disposed on the resin portion and electrically connected to either one of the first distributed Bragg reflector and the second distributed Bragg reflector.

Description

Technical Field

[0001] This invention relates to vertical cavity surface-emitting lasers. Background Technology

[0002] Non-patent document 1 discloses a vertical cavity surface-emitting laser having a polyimide portion disposed under the electrode pads in order to reduce capacitance caused by the electrode pads.

[0003] Existing technical documents

[0004] Non-patent literature

[0005] Non-patent document 1: ANAl-Omari and KLLear, "VCSELs with a self-alignedcontactand copper-plated heatsink," in IEEE Photonics Technology Letters, vol.17, no.9, pp.1767-1769, Sept.2005, doi:10.1109 / LPT.2005.851938. Summary of the Invention

[0006] The problem that the invention aims to solve

[0007] The aforementioned polyimide portion is formed by removing the portion of the polyimide layer formed on the upper surface of the semiconductor laminate, excluding the portion disposed below the electrode pads. Therefore, the polyimide portion has a mesa shape protruding from the upper surface of the semiconductor laminate.

[0008] The present invention provides a vertical cavity surface-emitting laser capable of suppressing or reducing the amount of resin portion protruding from the upper surface of a laminate.

[0009] means for solving problems

[0010] A vertical-cavity surface-emitting laser (VCSEL) disclosed in one aspect comprises: a substrate having a main surface including a first region and a second region; an electrode post disposed on the first region, the electrode post including a first distributed Bragg reflector of a first conductivity type disposed on the first region, an active layer disposed on the first distributed Bragg reflector, and a second distributed Bragg reflector of a second conductivity type disposed on the active layer; a laminate disposed on the main surface, the laminate having an upper surface having at least one recess disposed on the second region; a resin portion disposed within the at least one recess; and an electrode pad disposed on the resin portion and electrically connected to either the first distributed Bragg reflector or the second distributed Bragg reflector.

[0011] Invention Effects

[0012] According to this disclosure, a vertical cavity surface-emitting laser is provided that can suppress the protrusion of the resin portion from the upper surface of the laminate, or can reduce the amount of the resin portion protruding from the upper surface of the laminate. Attached Figure Description

[0013] Figure 1 This is a schematic top view illustrating a vertical cavity surface-emitting laser according to one embodiment.

[0014] Figure 2 It is along Figure 1 A sectional view along line II-II.

[0015] Figure 3 It is along Figure 1 A cross-sectional view along line III-III.

[0016] Figure 4 This is a top view schematically illustrating a portion of a vertical cavity surface-emitting laser according to one embodiment.

[0017] Figure 5 It is Figure 2 A sectional view shown as an enlarged portion.

[0018] Figure 6 This is a cross-sectional view schematically illustrating one step of a manufacturing method for a vertical cavity surface-emitting laser according to one embodiment.

[0019] Figure 7 This is a cross-sectional view schematically illustrating one step of a manufacturing method for a vertical cavity surface-emitting laser according to one embodiment.

[0020] Figure 8 This is a cross-sectional view schematically illustrating one step of a manufacturing method for a vertical cavity surface-emitting laser according to one embodiment.

[0021] Figure 9 This is a cross-sectional view schematically illustrating one step of a manufacturing method for a vertical cavity surface-emitting laser according to one embodiment.

[0022] Figure 10 This is a schematic top view illustrating a portion of a vertical-cavity surface-emitting laser according to other embodiments.

[0023] Figure 11 This is a top view schematically representing a portion of the vertical-cavity surface-emitting laser of the first experimental example.

[0024] Figure 12 This is a top view schematically representing a portion of the vertical-cavity surface-emitting laser of the second experimental example.

[0025] Figure 13 This is a top view schematically representing a portion of the vertical-cavity surface-emitting laser of the third experimental example.

[0026] Figure 14 This is a top view schematically representing a portion of the vertical-cavity surface-emitting laser of the fourth experimental example.

[0027] Figure 15 This is a top view schematically representing a portion of the vertical-cavity surface-emitting laser of the fifth experimental example.

[0028] Figure 16 It is a graph showing the capacitance caused by the electrode pads in the vertical cavity surface-emitting lasers of the first to fifth experimental examples. Detailed Implementation

[0029] [Description of embodiments of this disclosure]

[0030] One embodiment of a vertical-cavity surface-emitting laser includes: a substrate having a main surface comprising a first region and a second region; an electrode post disposed on the first region, the electrode post comprising a first distributed Bragg reflector of a first conductivity type disposed on the first region, an active layer disposed on the first distributed Bragg reflector, and a second distributed Bragg reflector of a second conductivity type disposed on the active layer; a laminate disposed on the main surface, the laminate having an upper surface having at least one recess disposed on the second region; a resin portion disposed within the at least one recess; and an electrode pad disposed on the resin portion and electrically connected to either the first distributed Bragg reflector or the second distributed Bragg reflector.

[0031] According to the above-described vertical cavity surface-emitting laser, since the resin portion is disposed in at least one recess, it is possible to suppress the resin portion from protruding from the upper surface of the laminate, or to reduce the amount of resin portion protruding from the upper surface of the laminate.

[0032] Alternatively, the at least one recess may be multiple recesses. In this case, the volume of the resin portion disposed within each recess can be reduced. Therefore, the stress generated between the resin portion and the laminate due to the shrinkage of the resin portion can be reduced.

[0033] Alternatively, the aforementioned vertical-cavity surface-emitting laser may also include partition walls that separate adjacent recesses from each other, and these partition walls are annular in shape when viewed from a direction orthogonal to the main surface of the substrate. In this case, stress concentration at specific locations can be suppressed between the partition walls and the resin portion.

[0034] Alternatively, the aforementioned vertical-cavity surface-emitting laser may also include partition walls that separate adjacent recesses from each other, and these partition walls are connected to the laminate. In this case, since the partition walls are supported by the laminate, they are less likely to tip over.

[0035] Alternatively, the partition wall may have a width of 1 μm or more on its upper surface. In this case, the partition wall can be made thicker, making it difficult for it to tip over.

[0036] Alternatively, the partition wall may have a side surface that is inclined relative to the main surface of the substrate, with an angle of less than 90° extending from the main surface through the interior of the partition wall to the side surface. In this case, the stress generated between the side surface of the partition wall and the resin portion can be reduced.

[0037] Alternatively, the aforementioned vertical-cavity surface-emitting laser may further include a contact layer disposed on the main surface, the contact layer extending from the first region to the second region, the contact layer being connected to the first distributed Bragg reflector, and the electrode pads being electrically connected to the second distributed Bragg reflector. In this case, the capacitance between the electrode pads and the contact layer can be reduced.

[0038] [Details of the embodiments disclosed herein]

[0039] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In the description of the drawings, the same or equivalent elements are referred to by the same reference numerals, and repeated descriptions are omitted.

[0040] Figure 1 This is a schematic top view illustrating a vertical cavity surface-emitting laser according to one embodiment. Figure 2 It is along Figure 1 A sectional view along line II-II. Figure 3 It is along Figure 1 A cross-sectional view along line III-III. Figure 4 This is a top view schematically illustrating a portion of a vertical cavity surface-emitting laser according to one embodiment. Figures 1 to 4 The vertical cavity surface emitting laser (VCSEL) 10 shown is, for example, a laser for communication applications. The VCSEL 10 emits a laser beam L along an axis Ax1. The oscillation wavelength of the laser beam L is, for example, 840 nm or more and 860 nm or less. The VCSEL 10 includes a substrate 12, a pole piece PS, a laminate LM, and a resin section 60.

[0041] The substrate 12 may also be a semi-insulating substrate. The substrate 12 has a main surface 12a that intersects (e.g., is orthogonal) the axis Ax1. The main surface 12a includes a first region 12a1 and a second region 12a2. The axis Ax1 passes through the first region 12a1. The first region 12a1, for example, has a circular shape centered on the axis Ax1. The second region 12a2 may also be located away from the first region 12a1. An axis Ax2, parallel to the axis Ax1, passes through the second region 12a2. The second region 12a2, for example, has a circular shape centered on the axis Ax2. The main surface 12a may also have a third region 12a3 located away from both the first region 12a1 and the second region 12a2. An axis Ax3, parallel to the axis Ax1, passes through the third region 12a3. The third region 12a3, for example, has a circular shape centered on the axis Ax3. The main surface 12a may also have a fourth region 12a4 surrounding the first region 12a1. The fourth region 12a4, for example, has an annular shape centered on the axis Ax1. The main surface 12a may also have a fifth region 12a5 surrounding the first regions 12a1 to the fourth regions 12a4. The fifth region 12a5 is the region of the main surface 12a other than the regions 12a1 to 12a4. Adjacent regions share a common boundary line. The carrier concentration of the substrate 12 is, for example, 1 × 10⁻⁶. 15 cm -3 The substrate 12 may be, for example, a III-V compound semiconductor substrate such as GaAs.

[0042] Alternatively, an undoped DBR (Distributed Bragg Reflector) portion 14 may be formed on the main surface 12a of the substrate 12. The DBR portion 14 is formed on the entire main surface 12a. The DBR portion 14 includes semiconductor layers 14a and 14b arranged alternately along the axis Ax1. Semiconductor layer 14a has a lower refractive index than semiconductor layer 14b. Semiconductor layers 14a and 14b each contain a III-V compound semiconductor such as AlGaAs.

[0043] Alternatively, a contact layer 16 may be provided on the main surface 12a of the substrate 12. The contact layer 16 is provided on the DBR portion 14. The DBR unit 14 (third distributed Bragg reflector) may be disposed between the substrate 12 and the contact layer 16. The contact layer 16 is a semiconductor layer of a first conductivity type (e.g., n-type). The contact layer 16 contains, for example, a III-V compound semiconductor such as AlGaAs. Examples of n-type dopants include silicon. The contact layer 16 extends from the first region 12a1 to the second region 12a2. The contact layer 16 may also be provided on the entire main surface 12a.

[0044] The pole piece PS is disposed on the first region 12a1. The lower surface of the pole piece PS may also be connected to the contact layer 16. The upper surface PSa of the pole piece PS has, for example, a circle centered on the axis Ax1. Viewed from the direction of the axis Ax1, the upper surface PSa of the pole piece PS may also overlap with the first region 12a1. The pole piece PS may also have a side surface that is inclined relative to the main surface 12a of the substrate 12.

[0045] The electrode PS includes a first conductivity type DBR section 18 (first distributed Bragg reflector) disposed on the first region 12a1, an active layer 20 disposed on the DBR section 18, and a second conductivity type (e.g., p-type) DBR section 22 (second distributed Bragg reflector) disposed on the active layer 20. The second conductivity type is the opposite of the first conductivity type.

[0046] The DBR section 18 is connected to the contact layer 16. The DBR section 18 includes a first layer 18a and a second layer 18b arranged alternately along the axis Ax1. The first layer 18a includes a semiconductor layer 18aa and an oxide layer 18ab surrounding the semiconductor layer 18aa. The second layer 18b is a semiconductor layer. The semiconductor layer 18aa has a lower refractive index than the second layer 18b. The semiconductor layer 18aa and the second layer 18b each contain a III-V compound semiconductor such as AlGaAs.

[0047] The active layer 20 may have a multi-quantum-well structure. The multi-quantum-well structure may include GaAs layers (or AlGaAs layers) and AlGaAs layers arranged alternately along the axis Ax1.

[0048] The DBR section 22 includes a third layer 22a and a fourth layer 22b arranged alternately along the axis Ax1. The third layer 22a includes a semiconductor layer 22aa and an oxide layer 22ab surrounding the semiconductor layer 22aa. The fourth layer 22b is a semiconductor layer. The semiconductor layer 22aa has a lower refractive index than the fourth layer 22b. Both the semiconductor layer 22aa and the fourth layer 22b contain a III-V compound semiconductor, such as AlGaAs.

[0049] The DBR section 22 may also include a current confinement structure 26. The current confinement structure 26 has a current aperture portion 26a and an insulator portion 26b. The insulator portion 26b surrounds the current aperture portion 26a. The current aperture portion 26a contains, for example, a III-V compound semiconductor such as AlGaAs. The axis Ax1 passes through the current aperture portion 26a. The current aperture portion 26a is, for example, cylindrical. The insulator portion 26b contains, for example, an oxide such as aluminum oxide.

[0050] The electrode PS may also include a contact layer 29 disposed on the DBR portion 22. The upper surface of the contact layer 29 may be the upper surface PSa of the electrode PS. The contact layer 29 is a semiconductor layer of a second conductivity type. The contact layer 29 contains, for example, a III-V compound semiconductor such as AlGaAs.

[0051] The laminate LM is disposed on the main surface 12a. The laminate LM is disposed on the second region 12a2 to the fifth region 12a5. The lower surface of the laminate LM may also be connected to the contact layer 16. The upper surface LMa of the laminate LM may also be in the same plane as the upper surface PSa of the pole PS. The laminate LM may also have a side surface that is inclined relative to the main surface 12a of the substrate 12.

[0052] The upper surface LMa has at least one recess RS disposed on each of the second region 12a2 and the third region 12a3. In this embodiment, multiple recesses RS are disposed on each of the second region 12a2 and the third region 12a3. The bottom of each recess RS reaches the upper surface of the contact layer 16. The upper surface LMa may have a groove TR disposed on the fourth region 12a4. The groove TR is provided in a manner that surrounds the pole PS. The bottom of the groove TR reaches the upper surface of the contact layer 16.

[0053] The laminate LM has the same layer structure as the pole PS. The laminate LM includes a lower laminate 218 disposed on the contact layer 16, an intermediate layer 220 disposed on the lower laminate 218, and an upper laminate 222 disposed on the intermediate layer 220.

[0054] The lower laminate 218 has a fifth layer 218a and a sixth layer 218b arranged alternately along axis Ax2 or axis Ax3. The fifth layer 218a has a semiconductor layer 218aa and an oxide layer 218ab surrounding the semiconductor layer 218aa. The sixth layer 218b is a semiconductor layer. The semiconductor layers 218aa and 218b have the same configuration as the semiconductor layers 18aa and 18b, respectively. The intermediate layer 220 has the same configuration as the active layer 20. The upper laminate 222 has a seventh layer 222a and an eighth layer 222b arranged alternately along axis Ax2 or axis Ax3. The seventh layer 222a has a semiconductor layer 222aa and an oxide layer 222ab surrounding the semiconductor layer 222aa. The eighth layer 222b is a semiconductor layer. The semiconductor layers 222aa and 222b have the same configuration as the semiconductor layers 22aa and 22b, respectively. The upper laminate 222 may also include layer 226. Layer 226 has the same configuration as the current confinement structure 26.

[0055] The resin portion 60 is disposed within each recess RS and trench TR. The resin portion 60 may also fill each recess RS and trench TR. The resin portion 60 comprises a resin with a low dielectric constant. Examples of the resin include benzocyclobutene (BCB) or polyimide. The resin portion 60 may also not be disposed within the trench TR.

[0056] Adjacent recesses RS can also be separated from each other by partition walls PW. Partition walls PW are disposed on the second region 12a2 and the third region 12a3. The lower surface of the partition wall PW can also be connected to the contact layer 16. The upper surface PWa of the partition wall PW can also be located on the same plane as the upper surface PSa of the pole PS. In this embodiment, as... Figure 4 As shown, multiple partition walls PW are arranged in a concentric circle around axis Ax2 or axis Ax3. That is, when viewed from the direction of axis Ax2 or axis Ax3, each partition wall PW has a ring shape centered on axis Ax2 or axis Ax3. Figure 4 In this paper, the pole PS, the laminate LM, the partition wall PW, the recess RS, and the structures on the trench TR are omitted.

[0057] Each partition wall PW has the same layer structure as the laminate LM. The partition wall PW includes a lower laminate 118 disposed on the contact layer 16, an intermediate layer 120 disposed on the lower laminate 118, and an upper laminate 122 disposed on the intermediate layer 120.

[0058] The lower laminate 118 includes a ninth layer 118a and a tenth layer 118b, which are alternately arranged along axis Ax2 or axis Ax3. The ninth layer 118a includes a semiconductor layer 118aa and an oxide layer 118ab surrounding the semiconductor layer 118aa. The tenth layer 118b is a semiconductor layer. The semiconductor layers 118aa and 118b have the same configuration as the semiconductor layers 18aa and 18b, respectively. The intermediate layer 120 has the same configuration as the active layer 20. The upper laminate 122 includes an eleventh layer 122a and a twelfth layer 122b, which are alternately arranged along axis Ax2 or axis Ax3. In this embodiment, the eleventh layer 122a is an oxide layer. The twelfth layer 122b has the same configuration as the fourth layer 22b. The upper laminate 122 may include a layer 126. In this embodiment, the layer 126 has the same configuration as the insulating portion 26b of the current confinement structure 26.

[0059] Figure 5 It is Figure 2 A partially enlarged cross-sectional view. For example... Figure 5 As shown, the partition wall PW may also have a width W1 of 1 μm or more on its upper surface PWa. The partition wall PW may also have side surfaces PWs that are inclined relative to the main surface 12a of the substrate 12. The side surfaces PWs are inclined in such a way that the width of the partition wall PW gradually decreases as it moves away from the main surface 12a. The angle θ from the main surface 12a through the interior of the partition wall PW to the side surfaces PWs may be less than 90°, less than 80°, or more than 60°. The partition wall PW may also have a height H1 of 5 μm or more. The height H1 is the distance from the lower surface of the partition wall PW to the upper surface PWa. The height H1 may also be the same as the thickness H2 of the resin portion 60 or the depth of the recess RS.

[0060] An insulating layer 50 may also be provided on the pole PS, the laminate LM, the separator PW, each recess RS, and the trench TR. The insulating layer 50 is provided between each recess RS and the resin portion 60, and also between the trench TR and the resin portion 60. For example... Figure 2 as well as Figure 3 As shown, the insulating layer 50 has an opening 50a on the upper surface PSa of the electrode PS. The electrode 30 is connected to the upper surface PSa of the electrode PS through the opening 50a. The electrode 30 is arranged to surround the axis Ax1. Figure 3 As shown, the insulating layer 50 has an opening 50b at the bottom of the trench TR. The electrode 40 is connected to the contact layer 16 through the opening 50b. The electrode 40 is arranged to surround the pole piece PS. By applying a voltage between the electrode 30 and the electrode 40, the vertical cavity surface-emitting laser 10 emits laser light L. The insulating layer 50 can be a single layer or multiple layers. The insulating layer 50 can, for example, contain a silicon nitride layer or a silicon oxynitride layer.

[0061] The vertical-cavity surface-emitting laser 10 includes electrode pads 34 and 44. The electrode pads 34 are connected to the electrode 30 via wiring 32. Thus, the electrode pads 34 are electrically connected to the DBR section 22. The wiring 32 extends from a first region 12a1 to a second region 12a2 on the insulating layer 50 and the resin section 60. The electrode pads 34 are disposed on the second region 12a2. The electrode pads 34 are disposed on the insulating layer 50 and the resin section 60. The electrode pads 34 extend along the main surface 12a. Viewed from axis Ax2, the electrode pads 34, for example, have a circular shape centered on axis Ax2. The diameter of the electrode pads 34 is, for example, 40 μm or more. The electrode pads 34 contain, for example, a metal such as gold.

[0062] Electrode pad 44 is connected to electrode 40 via wiring 42. Thus, electrode pad 44 is electrically connected to DBR section 18. Wiring 42 is provided on insulating layer 50 and resin section 60. Wiring 42 extends from first region 12a1 to third region 12a3 on insulating layer 50 and resin section 60. Electrode pad 44 is provided on third region 12a3. Electrode pad 44 is provided on insulating layer 50 and resin section 60. Electrode pad 44 extends along main surface 12a. Viewed from axis Ax3, electrode pad 44, for example, has a circular shape centered on axis Ax3. The diameter of electrode pad 44 is, for example, 40 μm or more. Electrode pad 44 contains, for example, a metal such as gold.

[0063] According to the vertical-cavity surface-emitting laser 10, since the resin portion 60 is disposed within each recess RS, it is possible to suppress the protrusion of the resin portion 60 from the upper surface LMa of the laminate LM, or to reduce the amount of protrusion of the resin portion 60 from the upper surface LMa of the laminate LM. Furthermore, by adjusting the depth of the recess RS, the thickness H2 of the resin portion 60 can be controlled with high precision. Further, the resin portion 60 can reduce the capacitance caused by the electrode pads 34 or 44. For example, the capacitance between the electrode pads 34 and the contact layer 16 can be reduced. For example, the capacitance between the electrode pads 44 and the contact layer 29 can be reduced. When the capacitance is reduced, the modulated bandwidth of the vertical-cavity surface-emitting laser 10 can be increased.

[0064] When the laminate LM has multiple recesses RS, the volume of the resin portion 60 disposed in each recess RS can be reduced. Therefore, the stress generated between the resin portion 60 and each recess RS due to the shrinkage of the resin portion 60 can be reduced. Therefore, it is possible to suppress the peeling of the resin portion 60 from each recess RS.

[0065] When the partition wall PW has a circular shape, it is possible to suppress the stress concentration at specific locations (e.g., corners) between the partition wall PW and the resin portion 60.

[0066] When the partition wall PW has a width W1 of more than 1 μm, the partition wall PW can be thickened, making it difficult for the partition wall PW to tip over.

[0067] When the angle θ from the main surface 12a of the substrate 12 to the side surface PWs of the partition wall PW is less than 90°, the stress generated between the side surface PWs of the partition wall PW and the resin portion 60 can be reduced.

[0068] Figures 6 to 9 These are cross-sectional views schematically illustrating one step of a manufacturing method for a vertical-cavity surface-emitting laser according to one embodiment. The vertical-cavity surface-emitting laser 10 described above can also be manufactured as follows.

[0069] (Formation of layered structures)

[0070] First, such as Figure 6 As shown, a semiconductor stack SL and an insulating layer 350 are formed on the main surface 12a of the substrate 12. Specifically, a DBR portion 14, a contact layer 16, a semiconductor stack 318 that should be a DBR portion 18, a semiconductor layer 320 that should be an active layer 20, a semiconductor stack 322 that should be a DBR portion 22, a semiconductor layer 329 that should be a contact layer 29, and an insulating layer 350 are sequentially formed on the main surface 12a. The semiconductor stack 318 includes semiconductor layers 318a and 318b that should be a first layer 18a and a second layer 18b, respectively. The semiconductor stack 322 includes semiconductor layers 322a and 322b that should be a third layer 22a and a fourth layer 22b, respectively, and a semiconductor layer 326 that should be a current confinement structure 26. The layers constituting the semiconductor stack SL are formed, for example, by metal-organic vapor deposition or molecular beam epitaxy.

[0071] After the insulating layer 350 is formed, protons can be injected into the portion of the semiconductor stack 322 from the second region 12a2 to the fifth region 12a5.

[0072] (The formation of trenches)

[0073] Next, as Figure 7 As shown, a trench TR is formed in the fourth region 12a4. Additionally, recesses RS are formed in the second region 12a2 and the third region 12a3. This forms an electrode post PS surrounded by the trench TR, a partition wall PW between adjacent recesses RS, and a laminate LM between the trench TR and the recesses RS. The trench TR and the recesses RS can also be formed simultaneously, for example, by dry etching the insulating layer 350, semiconductor layer 329, semiconductor laminate 322, semiconductor layer 320, and semiconductor laminate 318.

[0074] (Oxidation)

[0075] Next, as Figure 7 As shown, the side surfaces of the electrode post PS are oxidized by exposing it to an oxygen-containing gas, such as water vapor. This forms the current-constrained structure 26. The side surfaces of the laminate LM and the separator wall PW can also be oxidized simultaneously.

[0076] (Formation of the insulating layer)

[0077] Next, as Figure 8 As shown, an insulating layer 352 is formed on the pole PS, the laminate LM, the separator PW, the recesses RS, and the trench TR. In the insulating layer 352, an opening 352a is formed on the upper surface PSa of the pole PS and an opening 352b is formed on the bottom of the trench TR.

[0078] (Electrode formation)

[0079] Next, as Figure 8 As shown, an electrode 30 is formed in opening 352a, and an electrode 40 is formed in opening 352b. Then, an insulating layer 354 is formed on the insulating layer 352, the electrode 30, and the electrode 40.

[0080] (Formation of the resin layer)

[0081] Next, as Figure 8 As shown, a resin layer 360, which should become the resin portion 60, is formed on the insulating layer 354. The resin layer 360 can also be formed by applying a liquid resin material onto the insulating layer 354 and then curing the resin material.

[0082] (Formation of the resin portion)

[0083] Next, as Figure 9 As shown, the resin portion 60 is formed by etching the resin layer 360. For example, firstly, the entire surface of the resin layer 360 is etched to expose the insulating layer 354. Then, a portion of the resin layer 360 is removed by photolithography and etching, thereby forming an opening 60a on the electrode 40 and an opening 60b on the electrode 30. Then, portions of the insulating layer 354 on the electrodes 30 and 40 are removed by photolithography and etching. Thus, the insulating layer 50 is formed by the insulating layers 350, 352, and 354.

[0084] (The formation of wiring and electrode pads)

[0085] Next, as Figure 3 As shown, wiring 32, wiring 42, electrode pad 34 and electrode pad 44 are formed, for example, by a stripping method.

[0086] (cut off)

[0087] Next, the substrate 12 is cut to separate the components. Cutting is performed, for example, by cleaving or dicing. In this way, multiple vertical-cavity surface-emitting lasers 10 are fabricated.

[0088] Figure 10 This is a schematic top view of a portion of a vertical cavity surface-emitting laser according to other embodiments. Figure 10 The vertical-cavity surface-emitting laser shown has the same configuration as the vertical-cavity surface-emitting laser 10, except for the shape of the partition walls PW. In the vertical-cavity surface-emitting laser of this embodiment, each partition wall PW is connected to the laminate LM. Each partition wall PW may also extend along the main surface 12a. The two ends of each partition wall PW in the extension direction are connected to the laminate LM. The extension direction of the partition wall PW is not particularly limited. Multiple partition walls PW may also extend in straight lines parallel to each other.

[0089] According to this embodiment of the vertical cavity surface-emitting laser, since the partition wall PW is supported by the laminate LM, the partition wall PW is difficult to tilt.

[0090] Figures 11 to 15 These are top views schematically illustrating portions of the vertical-cavity surface-emitting lasers in the first through fifth experimental examples. Figure 11 The pole post (PS), the laminated body (LM), and the structures on the trench (TR) are omitted. Figure 12 The pole post PS, the laminated body LM, the recess RS, and the structures on the trench TR are omitted. Figures 13 to 15 In this paper, the pole PS, the laminate LM, the partition wall PW, the recess RS, and the structures on the trench TR are omitted.

[0091] Figure 11 The vertical-cavity surface-emitting laser shown in the first experimental example has the same configuration as the vertical-cavity surface-emitting laser 10, except that it lacks the recessed portion RS and the resin portion 60. In the vertical-cavity surface-emitting laser of the first experimental example, electrode pads 34 and 44 are provided on the upper surface LMa of the laminate LM. The resin portion 60 is not disposed between the electrode pads 34 and 44 and the contact layer 16.

[0092] Figure 12 The vertical-cavity surface-emitting laser shown in the second experimental example has the same configuration as the vertical-cavity surface-emitting laser 10, except that it does not have partition walls PW in each recess RS. In the vertical-cavity surface-emitting laser of the second experimental example, a single recess RS is provided on each of the second region 12a2 and the third region 12a3.

[0093] Figure 13The vertical-cavity surface-emitting laser (VCSEL) of the third experimental example shown has the same configuration as the VCSEL 10, except that a single partition wall PW is provided in each recess RS. In the VCSEL of the third experimental example, two recesses RS are provided in the second region 12a2 and the third region 12a3, respectively. Each partition wall PW has an annular shape centered on the axis Ax2 or the axis Ax3.

[0094] Figure 14 The fourth experimental example of the vertical-cavity surface-emitting laser (VCSEL) shown has the same configuration as the VCSEL 10, except that it has five partition walls PW within each recess RS. In the fourth experimental example of the VCSEL, six recesses RS are respectively provided in the second region 12a2 and the third region 12a3. The five partition walls PW are arranged in a concentric circle with axis Ax2 or axis Ax3 as the center. Each partition wall PW has an annular shape centered on axis Ax2 or axis Ax3.

[0095] Figure 15 The fifth experimental example of the vertical-cavity surface-emitting laser (VCSEL) shown has the same configuration as the VCSEL 10, except that it has ten partition walls PW within each recess RS. In the fifth experimental example of the VCSEL, eleven recesses RS are provided in the second region 12a2 and the third region 12a3, respectively. The ten partition walls PW are arranged in a concentric circle around axis Ax2 or axis Ax3. Each partition wall PW has an annular shape centered on axis Ax2 or axis Ax3.

[0096] For the vertical-cavity surface-emitting laser in the first experimental example, the capacitance between the electrode pad 34 and the contact layer 16 was measured. Furthermore, for the vertical-cavity surface-emitting lasers in the second to fifth experimental examples, the capacitance between the electrode pad 34 and the contact layer 16 (the capacitance between parallel plates) was calculated by simulation while varying the thickness H2 of the resin portion 60. The width W1 of the partition wall PW on the upper surface PWa of the partition wall PW is 1 μm. The results are shown below. Figure 16 .

[0097] Figure 16This is a graph showing the capacitance caused by the electrode pads in the first to fifth experimental examples of vertical-cavity surface-emitting lasers. The horizontal axis of the graph represents the thickness of the resin portion (μm). The vertical axis of the graph represents the capacitance caused by the electrode pads (fF). In the figure, E1 to E5 represent the results of the first to fifth experimental examples, respectively. In the vertical-cavity surface-emitting laser of the first experimental example, the capacitance between the electrode pad 34 and the contact layer 16 is 150 fF. From the simulation results of the second to fifth experimental examples, it can be seen that as the thickness H2 of the resin portion 60 increases, the capacitance between the electrode pad 34 and the contact layer 16 decreases monotonically. In addition, it can be seen that as the number of recesses RS or partition walls PW decreases, the capacitance between the electrode pad 34 and the contact layer 16 decreases monotonically. By setting the thickness H2 of the resin portion 60 to 5 μm or more and setting the number of partition walls PW to five or less, the capacitance between the electrode pad 34 and the contact layer 16 can be set to approximately 60 fF or less. That is, the capacitance can be reduced by more than 60%.

[0098] The preferred embodiments of this disclosure have been described in detail above, but this disclosure is not limited to the above embodiments.

[0099] For example, a single recess RS may be provided on each of the second region 12a2 and the third region 12a3, or the recess RS and the resin portion 60 may not be provided on either the second region 12a2 or the third region 12a3.

[0100] It should be understood that the embodiments disclosed herein are illustrative rather than restrictive in all respects. The scope of the invention is not defined by the foregoing, but by the technical solutions, and is intended to include all modifications within the scope and meaning equivalent to the technical solutions.

Claims

1. A vertical-cavity surface-emitting laser, wherein, The vertical-cavity surface-emitting laser includes: A substrate having a main surface comprising a first region and a second region; An electrode post is disposed on the first region, the electrode post comprising a first distributed Bragg reflector of a first conductivity type disposed on the first region, an active layer disposed on the first distributed Bragg reflector, and a second distributed Bragg reflector of a second conductivity type disposed on the active layer; A laminate disposed on the main surface, the laminate having an upper surface having a plurality of recesses disposed on the second region; A partition wall that separates the adjacent plurality of recesses from each other, the partition wall being connected to the laminate; A resin portion disposed within the plurality of recesses; as well as An electrode pad is disposed on the resin portion and electrically connected to either the first distributed Bragg reflector or the second distributed Bragg reflector.

2. The vertical-cavity surface-emitting laser according to claim 1, wherein, When viewed from a direction orthogonal to the main surface of the substrate, the partition wall is annular in shape.

3. The vertical-cavity surface-emitting laser according to claim 1, wherein, When viewed from a direction orthogonal to the main surface of the substrate, the partition wall is annular in shape, and when viewed from a direction orthogonal to the main surface of the substrate, the plurality of partition walls are arranged in concentric circles.

4. The vertical-cavity surface-emitting laser according to claim 1, wherein, The partition wall extends along the main surface of the substrate, and both ends of the partition wall are connected to the laminate.

5. The vertical-cavity surface-emitting laser according to claim 1, wherein, The plurality of the partition walls extend in a straight line parallel to each other along the main surface of the substrate.

6. The vertical-cavity surface-emitting laser according to any one of claims 2 to 5, wherein, The partition wall has a width of more than 1 μm on its upper surface.

7. The vertical-cavity surface-emitting laser according to any one of claims 2 to 5, wherein, The partition wall has a side surface that is inclined relative to the main surface of the substrate. The angle from the main surface through the interior of the partition wall to the side surface is less than 90°.

8. The vertical-cavity surface-emitting laser according to any one of claims 2 to 5, wherein, The partition wall has the same layer structure as the laminate.

9. The vertical-cavity surface-emitting laser according to any one of claims 1 to 5, wherein, The laminate has the same layer structure as the pole.

10. The vertical-cavity surface-emitting laser according to any one of claims 1 to 5, wherein, The upper surface of the laminate and the upper surface of the pole are located in the same plane.

11. The vertical-cavity surface-emitting laser according to any one of claims 1 to 5, wherein, The vertical cavity surface-emitting laser also includes an insulating layer disposed between at least one recess and the resin portion.

12. The vertical-cavity surface-emitting laser according to any one of claims 1 to 5, wherein, The resin portion contains benzocyclobutene or polyimide.

13. The vertical-cavity surface-emitting laser according to any one of claims 1 to 5, wherein, The vertical cavity surface-emitting laser also includes a contact layer disposed on the main surface. The contact layer extends from the first region to the second region. The contact layer is connected to the first distributed Bragg reflector. The electrode pads are electrically connected to the second distributed Bragg reflector.

14. The vertical-cavity surface-emitting laser according to claim 13, wherein, At least one recessed portion reaches the upper surface of the contact layer.

15. The vertical-cavity surface-emitting laser according to claim 13, wherein, The vertical cavity surface-emitting laser also includes an undoped third distributed Bragg reflector disposed between the substrate and the contact layer.

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