High-speed encryption and decryption system and method for implementing MSI interrupt processing based on multi-algorithm IP core

By using multiple algorithm IP cores and algorithm controllers to manage MSI interrupts in PCIe multi-algorithm core encryption and decryption system, the problems of system interrupt loss and processing delay are solved, and the encryption and decryption performance and efficiency are improved.

CN114817965BActive Publication Date: 2025-03-28GUANGZHOU WANXIETONG INFORMATION TECH CO LTD
1 Cites 0 Cited by

Patent Information

Application Number
CN202210579931.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-05-25
Publication Date
2025-03-28
Estimated Expiration
2042-05-25

AI Technical Summary

Technical Problem

The existing PCIe multi-algorithm core encryption and decryption systems have the possibility of large delays and interrupt loss during MSI-X interrupt processing, and the hardware and software design are complex and the R&D cost is high.

Method used

A high-speed encryption and decryption system based on multi-algorithm IP core is adopted, and the host computer and encryption algorithm chip are connected through PCIe3.0 channel, and the algorithm controller and DMA module are used to realize ping-pong data transfer and encryption and decryption operations, and the idle state and interrupt processing of the algorithm IP core is managed through the interrupt status register and the idle state register.

Benefits of technology

The number of interrupts of MSI messages sent by the PCIe encryption and decryption chip is reduced, the MSI interrupt processing load of the host computer is reduced, the efficiency of the system to handle MSI interrupts and the operation processing efficiency of multi-threaded encryption and decryption is improved, and the performance of the PCIe encryption and decryption board is significantly improved.

✦ Generated by Eureka AI based on patent content.
Patent Text Reader

Abstract

The present invention provides a high-speed encryption and decryption system and method for realizing MSI interrupt processing based on a multi-algorithm IP core, comprising a host computer and an encryption algorithm chip connected through a PCIe3.0 channel, wherein the encryption algorithm chip comprises a PCIe3.0 core, a DMA module, a key controller, an algorithm controller, multiple algorithm IP cores and a first storage unit and a second storage unit therein; the system solves the problem of insufficient interrupt vectors of the host computer and loss of MSI interrupts in the application environment of the PCIe multi-algorithm IP core. The number of MSI message interrupts issued by the PCIe encryption and decryption chip is reduced, the load of the host computer MSI interrupt processing is reduced, the efficiency of the system processing MSI interrupts is improved, the efficiency of multi-thread encryption and decryption job processing is improved, and the performance of the PCIe encryption and decryption board is greatly improved.
Need to check novelty before this filing date? Find Prior Art