Image sensor and method of forming an image sensor

Abstract

In some embodiments, this disclosure relates to an image sensor, comprising: a semiconductor substrate; a plurality of photodiodes disposed within the semiconductor substrate; and a deep trench isolation structure separating the plurality of photodiodes from each other and defining a plurality of pixel regions corresponding to the plurality of photodiodes. The plurality of pixel regions include a first pixel region sensitive to a first region of the spectrum, a second pixel region sensitive to a second region of the spectrum, and a third pixel region sensitive to a third region of the spectrum. The first pixel region is smaller than the second pixel region or the third pixel region.

Description

Technical Field

[0001] This invention relates to an image sensor and a method for forming an image sensor. Background Technology

[0002] Many modern electronic devices (e.g., digital cameras and camcorders) contain image sensors to convert optical images into digital data. To achieve this, an image sensor comprises an array of pixel regions. Each pixel region contains a photodiode configured to capture optical signals (e.g., light) and convert them into digital data (e.g., a digital image). Complementary metal-oxide-semiconductor (CMOS) image sensors are often used over charge-coupled device (CCD) image sensors because CMOS image sensors offer many advantages, such as lower power consumption, faster data processing, and lower manufacturing costs. Summary of the Invention

[0003] According to an embodiment of the present invention, an image sensor includes: a semiconductor substrate; a plurality of photodiodes disposed within the semiconductor substrate; and a deep trench isolation structure separating the plurality of photodiodes from each other and defining a plurality of pixel regions corresponding to the plurality of photodiodes. The plurality of pixel regions include a first pixel region sensitive to a first region of the spectrum, a second pixel region sensitive to a second region of the spectrum, and a third pixel region sensitive to a third region of the spectrum. The first pixel region is smaller than the second pixel region or the third pixel region.

[0004] According to an embodiment of the present invention, a method for forming an image sensor includes: forming a plurality of photodiodes in a semiconductor substrate; forming a deep trench isolation structure in the back side of the semiconductor substrate, correspondingly dividing the plurality of photodiodes into a plurality of pixel regions; and forming a color filter array on the semiconductor substrate, such that each color filter is directly coated on a corresponding photodiode among the plurality of photodiodes. The plurality of pixel regions includes a first pixel region sensitive to a first region of the spectrum, a second pixel region sensitive to a second region of the spectrum, and a third pixel region sensitive to a third region of the spectrum. When viewed from above, the color filters in the color filter array in the first pixel region have a smaller area than the color filters in the color filter array in the second or third pixel region.

[0005] According to an embodiment of the present invention, an image sensor includes: a semiconductor substrate; a plurality of photodiodes disposed within the semiconductor substrate; a deep trench isolation structure separating the plurality of photodiodes; and a metal mesh overlying the semiconductor substrate and directly overlying the deep trench isolation structure. The metal mesh and the deep trench isolation structure define a plurality of pixel regions corresponding to the plurality of photodiodes. The plurality of pixel regions include a first pixel region sensitive to a first region of the spectrum, a second pixel region sensitive to a second region of the spectrum, and a third pixel region sensitive to a third region of the spectrum. When viewed from above, the ratio of the area of ​​the metal mesh to the total area of ​​the pixel regions when viewed from above is larger in the first pixel region than in the second or third pixel region. Attached Figure Description

[0006] The best understanding of all aspects of this disclosure will be achieved by reading the following detailed description in conjunction with the accompanying drawings. It should be noted that, in accordance with standard practice in the industry, the various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or decreased for clarity of explanation.

[0007] Figure 1 Graphical representations of some embodiments showing the relationship between the quantum efficiency of pixels sensitive to different regions of the spectrum and wavelength.

[0008] Figure 2 A top view is shown of some embodiments of an image sensor comprising multiple pixel regions with different shapes and / or unequal sizes.

[0009] Figures 3 to 6 Show Figure 2 Top view of some alternative embodiments of the image sensor shown.

[0010] Figure 7 The diagram shows a top view of some embodiments of an image sensor comprising multiple pixel blocks, wherein each pixel block comprises multiple pixel regions with different shapes and / or unequal sizes.

[0011] Figure 8 Cross-sectional views are shown of some embodiments of image sensors that include pixel regions with different shapes and / or unequal sizes.

[0012] Figures 9 to 19 A series of cross-sections are shown illustrating some embodiments of a method for forming an image sensor comprising pixel regions of different shapes and / or unequal sizes.

[0013] Figure 20 Flowcharts illustrating some embodiments of a method for forming an image sensor comprising pixel regions of different shapes and / or unequal sizes are shown. Detailed Implementation

[0014] The following disclosure provides numerous different embodiments or instances for implementing various features of the provided subject matter. Specific examples of components and arrangements are described below to simplify this disclosure. Of course, these are merely examples and not intended to be limiting. For example, the following description of a first feature forming on or on a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features such that the first and second features are not in direct contact. Furthermore, reference numerals and / or letters may be repeated in various instances of this disclosure. Such repetition is for the purpose of brevity and clarity and is not, in itself, intended to indicate a relationship between the various embodiments and / or configurations discussed.

[0015] Furthermore, for ease of explanation, spatially relative terms such as "beneath," "below," "lower," "above," and "upper" may be used herein to describe the relationship between one element or feature shown in the figures and another element or feature. These spatially relative terms are intended to encompass different orientations of the device in use or operation, in addition to those shown in the figures. The device may have other orientations (rotated 90 degrees or in other orientations), and the spatially relative terms used herein may be interpreted accordingly.

[0016] The image sensor includes multiple pixel regions defined by a deep trench isolation structure and a metal mesh. Each pixel region contains a photodiode configured to capture an optical image (e.g., light) and convert it into digital data (e.g., a digital image). Each pixel region also includes a color filter overlaid on the photodiode and configured to filter a portion of the optical image to a specific region of the visual spectrum. For example, some pixel regions may be configured to be sensitive to green light, some to blue light, and some to red light. Color information of the optical image can be obtained by having the pixel regions measure the intensity of different regions of the spectrum for various colors.

[0017] During operation, each pixel receives incident photons through a color filter, and a photodiode converts the incident photons into output electrons. The ratio of output electrons to incident photons defines the quantum efficiency of the pixel. The size of the pixel affects how many incident photons the photodiode receives. Some pixel areas are sensitive to colors corresponding to wavelengths with higher quantum efficiencies (e.g., strong pixels), while others are sensitive to colors corresponding to wavelengths with lower quantum efficiencies (e.g., weak pixels). Therefore, a strong pixel of a given size may have a higher quantum efficiency than a weak pixel of the same size, resulting in a non-uniform distribution of quantum efficiency across pixels in an image sensor.

[0018] In some embodiments, this application relates to an image sensor comprising pixel regions of different shapes and / or unequal sizes. Certain color-sensitive pixel regions corresponding to wavelengths with higher quantum efficiency (e.g., strong pixels) are reduced in size, while certain color-sensitive pixel regions corresponding to wavelengths with lower quantum efficiency (e.g., weak pixels) are enlarged.

[0019] Figure 1 A graphical representation 100 illustrating some embodiments of the relationship between the quantum efficiency of pixels sensitive to different regions of the spectrum and wavelength. Lines 102a, 102b, and 102c represent image sensors including pixels of equal size. Line 102a represents a pixel sensitive to a first region of the spectrum (e.g., green light), line 102b represents a pixel sensitive to a second region of the spectrum (e.g., blue light), and line 102c represents a pixel sensitive to a third region of the spectrum (e.g., red light). Pixels associated with lines 102b and 102c have a lower quantum efficiency than the pixel associated with line 102a.

[0020] Lines 104a, 104b, and 104c represent image sensors comprising pixels with different shapes and / or different sizes. Line 104a represents a pixel sensitive to a first region of the spectrum and smaller than the pixel associated with line 102a. Line 104b represents a pixel sensitive to a second region of the spectrum and larger than the pixel associated with line 102b. Line 104c represents a pixel sensitive to a third region of the spectrum and larger than the pixel associated with line 102c. In some embodiments, the pixel associated with line 104b has the same size as the pixel associated with line 104c.

[0021] By enlarging the pixels sensitive to the second and third regions of the spectrum, the total pixel area increases, thus reflecting fewer incident photons and converting more incident photons into output electrons, thereby increasing quantum efficiency (see lines 106b and 106c). Similarly, by shrinking the pixels sensitive to the first region of the spectrum, the total pixel area decreases, thus reflecting more incident photons and converting fewer incident photons into output electrons, thereby decreasing quantum efficiency (see line 106a). Lines 104a, 104b, and 104c have a more uniform quantum efficiency than lines 102a, 102b, and 102c. Better device performance can be achieved by distributing quantum efficiency more uniformly across the pixels.

[0022] like Figure 1 As shown, by reducing the size of pixels sensitive to the first region of light, the quantum efficiency of strong pixels decreases slightly from line 102a to line 104a (see line 106a); conversely, by increasing the size of pixels sensitive to the second and third regions of light, the quantum efficiency of weak pixels increases slightly from lines 102b and 102c to lines 104b and 104c (see lines 106b and 106c). For example, strong pixels can be sensitive to the green region of the visual spectrum, while weak pixels can be sensitive to the blue or red region of the visual spectrum. By enlarging pixel regions sensitive to certain colors corresponding to wavelengths with lower quantum efficiency, the total area of ​​the enlarged pixel regions increases, thus reflecting fewer incident photons and converting more incident photons into output electrons, thereby increasing quantum efficiency. Similarly, by shrinking pixel regions sensitive to certain colors corresponding to wavelengths with higher quantum efficiency, the total area of ​​the smaller pixel regions decreases, thus reflecting more incident photons and converting fewer incident photons into output electrons, thereby decreasing quantum efficiency. Figure 1 As shown, lines 104a, 104b, and 104c have a more uniformly distributed quantum efficiency than lines 102a, 102b, and 102c, resulting in a lower signal-to-noise ratio and therefore better image sensor performance. For example, in some embodiments, the areas of a first pixel sensitive to a first light region, a second pixel sensitive to a second light region, and a third pixel sensitive to a third light region can be designed in size such that the quantum efficiencies of the first, second, and third pixels are each within + / -10% of each other, to achieve a relatively uniform distribution of quantum efficiency across the pixels.

[0023] Figure 2A top view 200 is shown illustrating some embodiments of an image sensor including multiple pixel regions of different shapes and / or unequal sizes. A first pixel region 202 is sensitive to a first region of the spectrum (e.g., the green region of the spectrum). A second pixel region 204 is sensitive to a second region of the spectrum (e.g., the blue region of the spectrum). A third pixel region 206 is sensitive to a third region of the spectrum (e.g., the red region of the spectrum). In an alternative embodiment, the first region of the spectrum may be cyan, the second region may be magenta, and the third region may be yellow. The multiple pixel regions are arranged into a first row of pixel regions 208a and a second row of pixel regions 208b extending in a first direction 205. The first row of pixel regions 208a includes alternating first pixel regions 202 and second pixel regions 204 in the first direction 205. The second row of pixel regions 208b extends in the first direction 205 and includes alternating first pixel regions 202 and third pixel regions 206 in the first direction 205.

[0024] First pixel region 202, second pixel region 204, and third pixel region 206 each extend a first distance D1 along a first direction 205. Second pixel region 204 and third pixel region 206 each extend a second distance D2 along a second direction 207 substantially orthogonal to the first direction 205. The second distance D2 is different from the first distance D1. First pixel region 202 extends a third distance D3 along the second direction 207, wherein the third distance D3 is different from the first distance D1 and less than the second distance D2. The first direction 205 and the second direction 207 define a plane parallel to the top surface of a semiconductor substrate (not shown), in which the plurality of pixel regions are disposed.

[0025] In some embodiments, the first distance D1 may be in the range of approximately 0.1 micrometers to approximately 100 micrometers. In some embodiments, the second distance D2 may be in the range of approximately 0.1 micrometers to approximately 100 micrometers. In some embodiments, the third distance D3 may be in the range of approximately 0.1 micrometers to approximately 100 micrometers.

[0026] The first pixel region 202 has a first area A1. The second pixel region 204 and the third pixel region 206 each have a second area A2 larger than the first area A1. Since the first region of the spectrum corresponds to a wavelength with a quantum efficiency greater than that of the corresponding wavelengths of the second and third regions of the spectrum, the second area A2 is larger than the first area A1, thereby reducing the quantum efficiency of the first pixel region 202 and increasing the quantum efficiency of the second pixel region 204 and the third pixel region 206. Therefore, compared to an image sensor including pixels of equal size, Figure 2The arrangement shown achieves better device performance by distributing quantum efficiency more uniformly across pixels. In an alternative embodiment, the first pixel region 202 in the first row of pixel regions 208a may have a different area than the first pixel region 202 in the second row of pixel regions 208b. In still other embodiments, the second pixel region 204 may have a different area than the third pixel region 206.

[0027] In some embodiments, the second area A2 may be in the range of approximately 1% to approximately 50% larger than the first area A1, approximately 5% to approximately 20% larger than the first area A1, approximately 10% to approximately 30% larger than the first area A1, or some other suitable value. In some embodiments, if the second area A2 is not large enough compared to the first area A1 (e.g., less than 1% larger than the first area A1), the quantum efficiency of the second pixel region 204 and the quantum efficiency of the third pixel region 206 may not be distributed sufficiently uniformly with the quantum efficiency of the first pixel region 202 to achieve an improvement in device performance. In some embodiments, if the second area A2 is too large compared to the first area A1 (e.g., more than 50% larger), the quantum efficiency of the second pixel region 204 and the quantum efficiency of the third pixel region 206 may exceed the quantum efficiency of the first pixel region 202 by a large margin, and therefore the quantum efficiency across pixels may not be distributed uniformly enough to achieve an improvement in device performance. In some embodiments, the first ratio of the first area A1 to the second area A2 is in the range of approximately 90% to approximately 110% of each other, approximately 95% to approximately 105% of each other, or is some other suitable value of the second ratio of the quantum efficiency of the first pixel area 202 to the quantum efficiency of the second pixel area 204 or the quantum efficiency of the third pixel area 206.

[0028] In some embodiments, corresponding pixel regions among the plurality of pixel regions are separated from each other by a deep trench isolation structure 203. In some embodiments of this type of embodiment, the second pixel region 204 and the third pixel region 206 share a common portion 209 of the deep trench isolation structure 203, wherein the common portion 209 of the deep trench isolation structure 203 extends in a first direction 205.

[0029] Figures 3 to 6 Show Figure 2 Top view of some alternative embodiments of the image sensor shown.

[0030] like Figure 3As shown in the top view 300, the first row of pixel areas 208a has pixel areas of equal size, and the second row of pixel areas 208b has pixel areas of different shapes and / or unequal sizes. The first pixel area 202 in the second row of pixel areas 208b has a first area A1, and the third pixel area 206 in the second row of pixel areas 208b has a second area A2. The first pixel area 202 and the second pixel area 204 in the first row of pixel areas 208a each have a third area A3. The third area A3 is larger than the first area A1 and smaller than the second area A2. In some embodiments, the first pixel area 202 and the second pixel area 204 in the first row of pixel areas 208a extend a first distance D1 in the second direction 207.

[0031] like Figure 4 As shown in the top view 400, the first row of pixel areas 208a has pixel areas with different shapes and / or unequal sizes, and the second row of pixel areas 208b has pixel areas of equal size. The first pixel area 202 in the first row of pixel areas 208a has a first area A1, and the second pixel area 204 in the first row of pixel areas 208a has a second area A2. The first pixel area 202 and the third pixel area 206 in the first row of pixel areas 208a each have a third area A3. The third area A3 is larger than the first area A1 and smaller than the second area A2. In some embodiments, the first pixel area 202 and the third pixel area 206 in the second row of pixel areas 208b extend a first distance D1 in the second direction 207.

[0032] like Figure 5 As shown in the top view 500, the plurality of pixel regions are divided into a plurality of pixel groups with different shapes and / or unequal sizes. A pixel group comprises four pixel regions arranged in a 2×2 pattern. A first row of pixel groups 508a comprises alternating first pixel groups 502 and second pixel groups 504 in a first direction 205. The first pixel group 502 comprises four first pixel regions 202 arranged in a 2×2 pattern, and the second pixel group 504 comprises four second pixel regions 204 arranged in a 2×2 pattern. A second row of pixel groups 508b comprises alternating first pixel groups 502 and third pixel groups 506 in a first direction 205. The first pixel group 502 comprises four first pixel regions 202 arranged in a 2×2 pattern, and the third pixel group 506 comprises four third pixel regions 206 arranged in a 2×2 pattern. In some embodiments, the individual pixel regions of each pixel group may have equal sizes. In alternative embodiments, the plurality of pixel groups may comprise a single pixel region, such as... Figure 2 As shown in the image.

[0033] The first pixel group 502, the second pixel group 504, and the third pixel group 506 each extend a fourth distance D4 in the first direction 205. The second pixel group 504 and the third pixel group 506 each extend a fifth distance D5 in the second direction 207, which is different from the fourth distance D4. The first pixel group 502 extends a sixth distance D6 in the second direction 207, which is different from the fourth distance D4 and less than the fifth distance D5. In some embodiments, the first pixel region 202 of the first pixel group 502, the second pixel region 204 of the second pixel group 504, and the third pixel region 206 of the third pixel group 506 may each extend a first distance D1 in the first direction 205. In some embodiments, the second pixel region 204 of the second pixel group 504 and the third pixel region 206 of the third pixel group 506 may each extend a second distance D2 in the second direction 207. In some embodiments, the first pixel region 202 of the first pixel group 502 may extend a third distance D3 in the second direction 207.

[0034] The first pixel group 502 has a fourth area A4, which can be, for example... Figure 2 The first area A1 described herein is three to five times larger, and in some embodiments may be four times larger than the first area A1. The second pixel group 504 and the third pixel group 506 have a fifth area A5, which may be larger than... Figure 2 The second area A2 described herein is three to five times larger, and in some embodiments may be four times larger than the second area A2. In an alternative embodiment, within the first row pixel group 508a, the first pixel group 502 and the second pixel group 504 have equal sizes, and within the second row pixel group 508b, the first pixel group 502 and the third pixel group 506 have unequal sizes. In an alternative embodiment, within the first row pixel group 508a, the first pixel group 502 and the second pixel group 504 have unequal sizes, and within the second row pixel group 508b, the first pixel group 502 and the third pixel group 506 have equal sizes. In some embodiments, the first pixel region 202 of the first pixel group 502 may have as follows: Figure 2 The first area A1 is described in the text. In some embodiments, the second pixel region 204 of the second pixel group 504 and the third pixel region 206 of the third pixel group 506 may have the following characteristics: Figure 2 The second area A2 is described in the text.

[0035] The individual pixel groups in the plurality of pixel groups are separated from each other by deep trench isolation structures 203. In some embodiments, the second pixel group 504 and the third pixel group 506 share a common portion 509 of the deep trench isolation structure 203, and the common portion 509 of the deep trench isolation structure 203 extends in the first direction 205. In some embodiments, the fourth distance D4 may be in the range of approximately 1.5 times to approximately 2 times larger than the first distance D1, or approximately 1.5 times to approximately 2.5 times larger than the first distance D1, or some other suitable value. In some embodiments, the fifth distance D5 may be in the range of approximately 1.5 times to approximately 2 times larger than the second distance D2, or approximately 1.5 times to approximately 2.5 times larger than the second distance D2, or some other suitable value. In some embodiments, the sixth distance D6 may be in the range of approximately 1.5 times to approximately 2 times larger than the third distance D3, or approximately 1.5 times to approximately 2.5 times larger than the third distance D3, or some other suitable value.

[0036] like Figure 6 As shown in the top view 600, the plurality of pixel regions are divided into pixel groups with different shapes and / or unequal sizes, and the pixel groups include nine pixel regions arranged in a 3×3 pattern. The first row of pixel groups 508a includes a first pixel group 602 and a second pixel group 604 alternating in a first direction 205. The first pixel group 602 includes nine first pixel regions 202 arranged in a 3×3 pattern, and the second pixel group 604 includes nine second pixel regions 204 arranged in a 3×3 pattern.

[0037] The second row of pixel group 508b includes a first pixel group 602 and a third pixel group 606 alternating in the first direction 205. The first pixel group 602 includes nine first pixel areas 202 arranged in a 3×3 pattern, and the third pixel group 606 includes nine third pixel areas 206 arranged in a 3×3 pattern. In some embodiments, the individual pixel areas of each pixel group may have equal sizes. The first pixel group 602 has a sixth area A6, which may be, for example... Figure 2 The first area A1 described herein is eight to ten times larger, and in some embodiments may be nine times larger than the first area A1. The second pixel group 604 and the third pixel group 606 have a seventh area A7, which may be, for example... Figure 2 The second area A2 described herein is eight to ten times larger, and in some embodiments may be nine times larger than the second area A2. In some embodiments, the first pixel region 202 of the first pixel group 602 may have, as described above, Figure 2 The first area A1 is described in the text. In some embodiments, the second pixel region 204 of the second pixel group 604 and the third pixel region 206 of the third pixel group 606 may have the following characteristics: Figure 2The second area A2 is described in the text.

[0038] The first pixel group 602, the second pixel group 604, and the third pixel group 606 each extend a seventh distance D7 in the first direction 205. The second pixel group 604 and the third pixel group 606 each extend an eighth distance D8 in the second direction 207, which is different from the seventh distance D7. The first pixel group 602 extends a ninth distance D9 in the second direction 207, which is different from the seventh distance D7 and less than the eighth distance D8. In some embodiments, the first pixel region 202 of the first pixel group 602, the second pixel region 204 of the second pixel group 604, and the third pixel region 206 of the third pixel group 606 may each extend a first distance D1 in the first direction 205. In some embodiments, the second pixel region 204 of the second pixel group 604 and the third pixel region 206 of the third pixel group 606 may each extend a second distance D2 in the second direction 207. In some embodiments, the first pixel region 202 of the first pixel group 602 may extend a third distance D3 in the second direction 207.

[0039] The individual pixel groups in the plurality of pixel groups are separated from each other by the deep trench isolation structure 203. In some embodiments, the second pixel group 604 and the third pixel group 606 share a common portion 609 of the deep trench isolation structure 203, and the common portion 609 of the deep trench isolation structure 203 extends in the first direction 205.

[0040] In some embodiments, the seventh distance D7 may be approximately 2 to 3 times larger than the first distance D1, approximately 2 to 4 times larger than the first distance D1, approximately 2.5 to 3.5 times larger than the first distance D1, or some other suitable value. In some embodiments, the eighth distance D8 may be approximately 2 to 3 times larger than the second distance D2, approximately 2 to 4 times larger than the second distance D2, approximately 2.5 to 3.5 times larger than the second distance D2, or some other suitable value. In some embodiments, the ninth distance D9 may be approximately 2 to 3 times larger than the third distance D3, approximately 2 to 4 times larger than the third distance D3, approximately 2.5 to 3.5 times larger than the third distance D3, or some other suitable value.

[0041] Figure 7A top view 700 of some embodiments of an image sensor is shown, comprising a plurality of pixel blocks 702, each pixel block 702 comprising multiple pixel regions with different shapes and / or unequal sizes. The plurality of pixel blocks 702 are arranged into multiple rows of pixel blocks 704 and multiple columns of pixel blocks 706. The plurality of pixel regions are separated from each other by deep trench isolation structures 203.

[0042] The respective pixel blocks of the plurality of pixel blocks 702 include a first pixel region 202 having a first area A1 and a second pixel region 204 having a second area A2 larger than the first area A1. The individual pixel blocks of the plurality of pixel blocks 702 are arranged into a first row of pixel regions 208a and a second row of pixel regions 208b. The first row of pixel regions 208a includes alternating first pixel regions 202 and second pixel regions 204 along a first direction 205. The second row of pixel regions 208b extends along the first direction 205 and includes alternating first pixel regions 202 and third pixel regions 206 along the first direction 205. In some embodiments, the respective pixel blocks of the plurality of pixel blocks 702 have a square top profile. In some embodiments, when viewed from above, the area occupied by the first pixel region 202 across the plurality of pixel regions is smaller than the combination of the second pixel regions 204 and the third pixel regions 206.

[0043] In some embodiments, the corresponding pixel blocks in the plurality of pixel blocks 702 may be or otherwise include Figure 2 The image sensor shown. In an alternative embodiment, the respective pixel blocks in the plurality of pixel blocks 702 may be or otherwise include, for example... Figure 3 The image sensor shown or Figure 4 The image sensor shown. In an alternative embodiment, the respective pixel blocks in the plurality of pixel blocks 702 may be or otherwise include, for example... Figure 5 The image sensor shown or Figure 6 The image sensor shown arranges the corresponding pixel blocks in the plurality of pixel blocks 702 into a first row of pixel groups and a second row of pixel groups.

[0044] Figure 8 A cross-sectional view 800 is shown for some embodiments of an image sensor including pixel regions of different shapes and / or unequal sizes. In some embodiments, the cross-sectional view 800 may be along... Figure 2The line 210 shown is cut off. A plurality of photodiodes 804 are disposed within a semiconductor substrate 802. A deep trench isolation structure 203 separates the plurality of photodiodes 804 from each other and defines a plurality of pixel regions (e.g., a first pixel region 202 and a second pixel region 204) corresponding to the plurality of photodiodes 804. The first pixel region 202 is smaller than the second pixel region 204. In some embodiments, the first pixel region 202 and the second pixel region 204 may be... Figure 2 The first pixel region 202 and the second pixel region 204 are shown to correspond. In an alternative embodiment, the second pixel region 204 may be... Figure 2 The third pixel region 206 is shown. A deep trench isolation structure 203 extends from the back side 828 of the semiconductor substrate 802 to a location within or further through the semiconductor substrate 802. In some embodiments, the deep trench isolation structure 203 extends beyond half of the semiconductor substrate 802. In some embodiments, the semiconductor substrate 802 may have a first doping type (e.g., p-type). In some embodiments, the plurality of photodiodes 804 may have a second doping type opposite to the first doping type (e.g., n-type).

[0045] A plurality of doped isolation wells 806 are disposed between the first pixel region 202 and the second pixel region 204, and the plurality of doped isolation wells 806 further separate the first pixel region 202 and the second pixel region 204. The plurality of doped isolation wells 806 extend from the front side 826 of the semiconductor substrate 802 to a location within the semiconductor substrate 802. The doped isolation wells 806 may be centered on individual trenches of the deep trench isolation structure 203. In some embodiments, the doped isolation wells 806 may have a first doping type. In some embodiments, the doped isolation wells 806 are more heavily doped than the semiconductor substrate 802. In some embodiments, the doped isolation wells 806 extend less than half of the semiconductor substrate 802. The deep trench isolation structure 203 may be recessed into the doped isolation wells 806. Since the doped isolation wells 806 provide p-type dopant to the photodiode 804, the doped isolation wells 806 facilitate the depletion of the photodiode 804 during operation, thereby improving the total well capacity.

[0046] A floating diffusion well 816, serving as the source / drain for a transfer transistor 814, extends from the front side 826 of the semiconductor substrate 802 to a location within the semiconductor substrate 802. An inter-layer dielectric (ILD) structure 811 is disposed along the front side 826 of the semiconductor substrate 802. The transfer transistor 814 is disposed within the ILD structure 811 and along the front side 826 of the semiconductor substrate 802. An interconnect structure 810 is disposed within the ILD structure 811 and electrically coupled to the transfer transistor 814 and the floating diffusion well 816. A redistribution layer 812, including a bonding dielectric layer and a plurality of bonding pads, is disposed between the interconnect structure 810 and the semiconductor die 818 and electrically couples the interconnect structure 810 to the semiconductor die 818. In some embodiments, the semiconductor die 818 may be a logic die.

[0047] A metal mesh 820 is disposed along the back side 828 of the semiconductor substrate 802 to minimize crosstalk between adjacent pixel regions. Individual components of the metal mesh 820 may be centered on individual trenches of the deep trench isolation structure 203. Individual components of the metal mesh 820 in the first pixel region 202 are more closely spaced than individual components of the metal mesh 820 in the second pixel region 204. Individual components of the metal mesh 820 in the first pixel region 202 are spaced apart from each other by a third distance D3, and individual components of the metal mesh 820 in the second pixel region 204 are spaced apart from each other by a second distance D2 greater than the third distance D3. In some embodiments, the second distance D2 may be in the range of approximately 1% to approximately 50%, approximately 5% to approximately 20%, approximately 10% to approximately 30%, or some other suitable value greater than the third distance D3. In some embodiments, the metal mesh 820, the doped isolation trap 806, and the deep trench isolation structure 203 separate the plurality of photodiodes 804 from each other and define the plurality of pixel regions (e.g., the first pixel region 202 and the second pixel region 204) corresponding to the plurality of photodiodes 804.

[0048] A color filter array 822 is disposed along the back side 828 of the semiconductor substrate 802 and between individual components of the metal mesh 820. Each color filter in the color filter array 822 is directly coated on the corresponding photodiode among the plurality of photodiodes 804. In some embodiments, the color filters in the color filter array 822 in the first pixel region 202 are sensitive to a first region of the spectrum. In some embodiments, the color filters in the color filter array 822 in the second pixel region 204 are sensitive to a second region of the spectrum. In some embodiments, the first region of the spectrum is the green region and the second region of the spectrum is the blue region. In an alternative embodiment, the second region of the spectrum is the red region. A plurality of microlenses 824 are directly coated on the corresponding color filters in the color filter array 822. In some embodiments, the microlenses in the plurality of microlenses 824 in the first pixel region 202 are smaller than the microlenses in the plurality of microlenses 824 in the second pixel region 204. It should be noted that although the plurality of microlenses 824 are in Figure 8 The image sensor is shown as being fixed to the image sensor, but it should be understood that the image sensor may not include the microlens, and the microlens may be attached to the image sensor later in a separate manufacturing process.

[0049] During operation of the image sensor, the plurality of microlenses 824 focus incident radiation (e.g., photons) onto corresponding pixel regions. When incident radiation of sufficient energy strikes a photodiode 804, it generates electron-hole pairs that form a photocurrent. Since the first region of the spectrum corresponds to a wavelength with a quantum efficiency greater than that of the second and third regions of the spectrum, the second distance D2 is greater than the third distance D3 compared to the second pixel region 204. This causes more incident photons to deviate from the metal mesh 820 in the first pixel region 202, thus reducing the quantum efficiency of the first pixel region 202 and increasing the quantum efficiency of the second pixel region 204. Therefore, by distributing quantum efficiency more uniformly across pixels, better device performance can be achieved compared to image sensors comprising pixels of equal size.

[0050] In some embodiments, the semiconductor substrate 802 may comprise any type of semiconductor body (e.g., silicon / germanium / complementary metal-oxide-semiconductor (CMOS) bulk, SiGe, SOI, etc.) (e.g., a semiconductor wafer or one or more dies on a wafer) and any other type of semiconductor and / or epitaxial layer formed on and / or otherwise associated with the semiconductor body. In some embodiments, the bonding dielectric layer of the deep trench isolation structure 203 and the redistribution layer 812 may be or comprise, for example, silicon dioxide, silicon nitride, some other suitable dielectric material, or a combination of the foregoing. In some embodiments, the bonding pads of the interconnect structure 810 and the redistribution layer 812 may be or comprise, for example, tungsten, copper, gold, aluminum copper, titanium nitride, or some other suitable conductive material. In some embodiments, the ILD structure 811 may be or comprise, for example, nitrides (e.g., silicon nitride, silicon oxynitride), carbides (e.g., silicon carbide), oxides (e.g., silicon oxide), borosilicate glass (BSG), phosphoric silicate glass (PSG), borophosphosilicate glass (BPSG), low dielectric constant (low-k) oxides (e.g., carbon-doped oxides, SiCOH), etc. In some embodiments, the metal mesh 820 may be or comprise, for example, tungsten, copper, gold, aluminum, or some other suitable material.

[0051] Reference Figures 9 to 19 A series of cross-sectional views 900 to 1900 illustrate some embodiments of methods for forming an image sensor comprising pixel regions of different shapes and / or unequal sizes. The image sensor may, for example, correspond to... Figure 8 The image sensor shown. Although Figures 9 to 19 This is an explanation of one method, but it should be understood that... Figures 9 to 19 The structure disclosed herein is not limited to this method, but can exist independently of the method.

[0052] like Figure 9As shown in the cross-sectional view 900, a plurality of photodiodes 804 are formed in a semiconductor substrate 802. The photodiodes 804 can be formed, for example, by a doping process. In some embodiments, the doping process may include forming a masking structure 902 over the front side 826 of the semiconductor substrate 802 and implanting a dopant of a first doping type (e.g., n-type doping by arsenic, phosphorus, or some other suitable n-type dopant) into the semiconductor substrate 802. In some embodiments, the masking structure 902 is then removed. When viewed from above, the photodiodes in the plurality of photodiodes 804 in the first pixel region 202 have a smaller cross-sectional area than the photodiodes in the plurality of photodiodes 804 in the second pixel region 204.

[0053] like Figure 10 As shown in the cross-sectional view 1000, a plurality of doped isolation wells 806 are formed in the front side 826 of a semiconductor substrate 802 between adjacent photodiodes of the plurality of photodiodes 804. The doped isolation wells 806 can be formed, for example, by a doping process. In some embodiments, the doping process may include forming a masking structure 1002 on the front side 826 of the semiconductor substrate 802 and implanting a dopant of a second doping type opposite to the first doping type (e.g., p-type doping by boron or some other suitable p-type dopant). In some embodiments, the masking structure 1002 is then removed.

[0054] like Figure 11 As shown in the cross-sectional view 1100, a transfer transistor 814 is formed on the front side 826 of a semiconductor substrate 802. The transfer transistor 814 can be formed by depositing a gate dielectric layer and a gate electrode layer on the semiconductor substrate 802. The gate dielectric layer and the gate electrode layer are then patterned to form a gate dielectric 1102 and a gate electrode 1104. In some embodiments, sidewall spacers 1106 are formed along the sidewalls of the gate dielectric 1102 and the sidewalls of the gate electrode 1104. In some embodiments, an implantation process is performed within the front side 826 of the semiconductor substrate 802 to form a floating diffusion well 816 along one side of the transfer transistor 814.

[0055] like Figure 12As shown in the cross-sectional view 1200, an ILD structure 811 is formed on the front side 826 of the transfer transistor 814 and the semiconductor substrate 802. The ILD structure 811 is then etched to form vias and / or metal trenches. Interconnect structures 810 are then formed within the vias and / or metal trenches. In some embodiments, the ILD structure 811 can be formed by deposition processes (e.g., physical vapor deposition, chemical vapor deposition, or some other suitable deposition process). The interconnect structures 810 can be formed using deposition processes (e.g., PVD, CVD, etc.) and / or plating processes (e.g., electroplating, electroless plating, etc.).

[0056] like Figure 13 As shown in the cross-sectional view 1300, a redistribution layer 812 is formed on the ILD structure 811. The redistribution layer 812 can be formed using deposition processes (e.g., PVD, CVD, etc.) and / or plating processes (e.g., electroplating, electroless plating, etc.). A semiconductor die 818 is then bonded to the redistribution layer 812. An annealing process can be performed after the bonding process and can be carried out at a temperature ranging from about 250°C to about 450°C for a time ranging from about 0.5 hours to about 4 hours.

[0057] like Figure 14 As shown in the cross-sectional view 1400, the image sensor is flipped and the back side 828 of the semiconductor substrate 802 is thinned. This thinning process allows radiation to pass through the back side 828 of the semiconductor substrate 802 and reach the photodiode 804. The semiconductor substrate 802 can be thinned by etching the back side 828. Alternatively, the semiconductor substrate 802 can be thinned by mechanically grinding the back side 828 or by performing chemical mechanical planarization (CMP) on the back side 828.

[0058] like Figure 15As shown in the cross-sectional view 1500, a deep trench isolation structure 203 is formed in the back side 828 of the semiconductor substrate 802 to separate adjacent photodiodes of the plurality of photodiodes 804. The deep trench isolation structure 203 can be formed by etching a plurality of deep trenches in the back side 828 of the semiconductor substrate 802. An isolation filler material is then deposited on the semiconductor substrate 802 and deposited into the plurality of deep trenches by, for example, PVD, CVD, or some other suitable deposition process. In some embodiments, lateral portions of the isolation filler material may be removed or thinned such that the top surface of the deep trench isolation structure 203 is substantially flush with the back side 828 of the semiconductor substrate 802. The individual trenches of the deep trench isolation structure 203 are spaced further apart in the second pixel region 204 than in the first pixel region 202. In some embodiments, the deep trench isolation structure 203 is recessed into the plurality of doped isolation wells 806.

[0059] like Figure 16 As shown in the cross-sectional view 1600, a metal layer 1602 is formed on the back side of a semiconductor substrate 802. The metal layer 1602 can be formed using deposition processes (e.g., PVD, CDV, etc.) and / or plating processes (e.g., electroplating, electroless plating, etc.).

[0060] like Figure 17 As shown in the cross-sectional view 1700, a metal layer 1602 is selectively patterned to form a metal mesh 820 overlying a semiconductor substrate 802. In some embodiments, individual components of the metal mesh 820 are directly overlying individual trenches of the deep trench isolation structure 203. Individual components of the metal mesh 820 in the first pixel region 202 are spaced apart from each other by a third distance D3, and individual components of the metal mesh 820 in the second pixel region 204 are spaced apart from each other by a second distance D2 greater than the third distance D3.

[0061] like Figure 18As shown in the cross-sectional view 1800, a color filter array 822 is formed on the back side 828 of a semiconductor substrate 802 and between individual components of a metal mesh 820. In some embodiments, the color filter array 822 may have an upper surface aligned with the upper surface of the metal mesh 820. In some embodiments, the color filters in the color filter array 822 in the first pixel region 202 are sensitive to a first region of the spectrum. In some embodiments, the color filters in the color filter array 822 in the second pixel region 204 are sensitive to a second region of the spectrum. In some embodiments, the first region of the spectrum is a green region and the second region of the spectrum is a blue region. In an alternative embodiment, the second region of the spectrum is a red region. The process for forming the color filter array 822 may include forming a color filter layer and patterning the color filter layer for each of the regions of the spectrum that the corresponding color filter is sensitive to. The color filter layer may be planarized after the color filter layer is formed. Patterning can be performed by forming a patterned photoresist layer on top of the color filter layer, applying an etchant to the color filter layer according to the pattern of the photoresist layer, and removing the patterned photoresist layer.

[0062] Since the first region of the spectrum corresponds to a wavelength with a quantum efficiency greater than that of the wavelengths corresponding to the second and third regions of the spectrum, the color filters in the color filter array 822 are smaller in the first pixel region 202 than in the second pixel region 204. This reduces the quantum efficiency of the first pixel region 202 and increases the quantum efficiency of the second pixel region 204. Therefore, by distributing quantum efficiency more uniformly across pixels, better device performance can be achieved compared to image sensors comprising pixels of equal size.

[0063] like Figure 19 As shown in the cross-sectional view 1900, a plurality of microlenses 824 are formed over a color filter array 822. In some embodiments, the plurality of microlenses 824 can be formed by depositing microlens material over the color filter array (e.g., by spin coating or deposition process). A microlens template having a curved upper surface is patterned over the microlens material. In some embodiments, the microlens template may comprise a photoresist material exposed using a distributed exposure light dose (e.g., for a negative photoresist, more light is exposed at the bottom of the curvature and less light is exposed at the top of the curvature), developed, and baked to form a circular shape. The plurality of microlenses 824 are then formed by selectively etching the microlens material according to the microlens template. The microlenses in the plurality of microlenses 824 of the first pixel region 202 are formed to be smaller than the microlenses in the plurality of microlenses 824 of the second pixel region 204.

[0064] against Figure 20A flowchart 2000 illustrates some embodiments of a method for forming an image sensor comprising pixel regions of different shapes and / or unequal sizes. The image sensor may, for example, correspond to... Figure 8 The image sensor shown.

[0065] Although flowchart 2000 is shown and illustrated as a series of actions or events, it should be understood that the order in which these actions or events are shown should not be construed as limiting. For example, some actions may occur in a different order, and / or may occur simultaneously with other actions or events besides those shown and / or illustrated herein. Furthermore, not all actions shown may be necessary when implementing one or more aspects or embodiments described herein. Additionally, one or more actions illustrated herein may be performed in one or more separate actions and / or phases.

[0066] At operation 2002, multiple photodiodes are formed in the semiconductor substrate. See example. Figure 9 .

[0067] At action 2004, multiple doped isolation wells are formed on the front side of the semiconductor substrate. See, for example... Figure 10 .

[0068] At operation 2006, a transfer transistor is formed on the front side of the semiconductor substrate. See example. Figure 11 .

[0069] At operation 2008, an interlayer dielectric (ILD) structure is formed on the front side of the transmission transistor and the semiconductor substrate. See example. Figure 12 .

[0070] At action 2010, a redistribution layer is formed on top of the ILD structure, and the semiconductor die is bonded to the redistribution layer. See example. Figure 13 .

[0071] At action 2012, the image sensor is flipped and the back side of the semiconductor substrate is thinned. See, for example... Figure 14 .

[0072] At action 2014, a deep trench isolation structure is formed in the back side of the semiconductor substrate. See example. Figure 15 .

[0073] At action 2016, a metal layer is formed on the back side of the semiconductor substrate. See example. Figure 16 .

[0074] At action 2018, the metal layer is selectively etched to form a metal mesh. See, for example... Figure 17 .

[0075] At action 2020, a color filter array is formed on the back side of the semiconductor substrate and between individual components of the metal mesh. See, for example... Figure 18 .

[0076] At action 2022, multiple microlenses are formed over the color filter array. See example. Figure 19 .

[0077] Therefore, in some embodiments, this disclosure relates to an image sensor comprising: a semiconductor substrate; a plurality of photodiodes disposed within the semiconductor substrate; and a deep trench isolation structure separating the plurality of photodiodes from each other and defining a plurality of pixel regions corresponding to the plurality of photodiodes. The plurality of pixel regions include a first pixel region sensitive to a first region of the spectrum, a second pixel region sensitive to a second region of the spectrum, and a third pixel region sensitive to a third region of the spectrum. The first pixel region is smaller than the second pixel region or the third pixel region.

[0078] In some embodiments, the first region of the spectrum is a green region, and the second region and the third region of the spectrum are a blue region and a red region, respectively.

[0079] In some embodiments, the first pixel region has a first area when viewed from above, the first area being at least 1% smaller than each of the second area of ​​the second pixel region and the third area of ​​the third pixel region.

[0080] In some embodiments, the first ratio of the first area to the second area is in the range of 90% to 110% of the second ratio of the first quantum efficiency of the first pixel region to the second quantum efficiency of the second pixel region.

[0081] In some embodiments, when viewed from above, the first pixel region has an area that is 50% smaller than the area of ​​the second pixel region or the area of ​​the third pixel region.

[0082] In some embodiments, each of the plurality of pixel regions extends a first distance in a first direction and a second distance in a second direction substantially orthogonal to the first direction, wherein the first direction and the second direction define a plane parallel to the top surface of the semiconductor substrate, and wherein the first distance and the second distance are different.

[0083] In other embodiments, this disclosure relates to a method of forming an image sensor, the method comprising: forming a plurality of photodiodes in a semiconductor substrate; forming a deep trench isolation structure in the back side of the semiconductor substrate that correspondingly divides the plurality of photodiodes into a plurality of pixel regions; and forming a color filter array on the semiconductor substrate such that each color filter is directly coated on a corresponding photodiode of the plurality of photodiodes. The plurality of pixel regions include a first pixel region sensitive to a first region of the spectrum, a second pixel region sensitive to a second region of the spectrum, and a third pixel region sensitive to a third region of the spectrum. When viewed from above, the color filters in the color filter array in the first pixel region have a smaller area than the color filters in the color filter array in the second or third pixel region.

[0084] In some embodiments, the trenches of the deep trench isolation structure are spaced further apart in the second pixel region or the third pixel region than in the first pixel region.

[0085] In some embodiments, the method further includes forming a metal mesh directly overlaid on the deep trench isolation structure on the semiconductor substrate, wherein the components of the metal mesh in the first pixel region are spaced closer together than the components of the metal mesh in the second pixel region or the third pixel region.

[0086] In some embodiments, the method further includes forming a plurality of microlenses on the color filter array such that each of the plurality of microlenses directly covers the corresponding color filter, wherein when viewed from above, each microlens of the first pixel region has a smaller area than each microlens of the second pixel region or each microlens of the third pixel region.

[0087] In some embodiments, when viewed from above, the area occupied by the first pixel region spanning the plurality of pixel regions is smaller than the combined area of ​​the second pixel region and the third pixel region.

[0088] In some other embodiments, this disclosure relates to an image sensor comprising: a semiconductor substrate; a plurality of photodiodes disposed within the semiconductor substrate; a deep trench isolation structure separating the plurality of photodiodes; and a metal mesh overlying the semiconductor substrate and directly overlying the deep trench isolation structure. The metal mesh and the deep trench isolation structure define a plurality of pixel regions corresponding to the plurality of photodiodes. The plurality of pixel regions includes a first pixel region sensitive to a first region of the spectrum, a second pixel region sensitive to a second region of the spectrum, and a third pixel region sensitive to a third region of the spectrum. The ratio of the area of ​​the metal mesh to the total area of ​​the pixel regions when viewed from above is greater in the first pixel region than in the second or third pixel region.

[0089] In some embodiments, the plurality of pixel regions are divided into a plurality of pixel groups, and the plurality of pixel groups include: a first row of pixel groups extending in a first direction and including a first pixel group and a second pixel group alternating in the first direction; and a second row of pixel groups extending in the first direction and including the first pixel group and a third pixel group alternating in the first direction, wherein the first pixel group includes the first pixel region, wherein the second pixel group includes the second pixel region, and wherein the third pixel group includes the third pixel region.

[0090] In some embodiments, the second pixel group and the third pixel group share a common portion of the deep trench isolation structure, and the common portion of the deep trench isolation structure extends in the first direction.

[0091] In some embodiments, each of the plurality of pixel groups includes a single pixel area, four pixel areas arranged in a 2×2 pattern, or nine pixel areas arranged in a 3×3 pattern.

[0092] In some embodiments, the first pixel group in the first row of pixel groups has a different size than the first pixel group in the second row of pixel groups.

[0093] In some embodiments, the first pixel group is smaller than the third pixel region in the second row of pixel groups, and the first pixel group has the same size as the second pixel group in the first row of pixel groups.

[0094] In some embodiments, the first pixel group is smaller than the second pixel area in the first row of pixel groups, and the first pixel group has the same size as the third pixel group in the second row of pixel groups.

[0095] In some embodiments, the components of the metal mesh in the first pixel region are spaced closer together than the components of the metal mesh in the second pixel region or the third pixel region.

[0096] In some embodiments, the distance between individual components of the metal mesh in the pixel regions of the plurality of pixel regions is smaller in the first pixel region than in the second or third pixel region.

[0097] The foregoing has outlined features of several embodiments to enable those skilled in the art to better understand various aspects of this disclosure. Those skilled in the art will understand that they can readily use this disclosure as a basis for designing or modifying other processes and structures to achieve the same purposes and / or realize the same advantages as the embodiments described herein. Those skilled in the art should also recognize that these equivalent constructions do not depart from the spirit and scope of this disclosure, and that various changes, substitutions, and modifications can be made herein without departing from the spirit and scope of this disclosure.

Claims

1. An image sensor, comprising: Semiconductor substrate; Multiple photodiodes are disposed within the semiconductor substrate; as well as A deep trench isolation structure separates the plurality of photodiodes from each other; as well as A metal mesh is overlaid on the semiconductor substrate and the deep trench isolation structure, wherein the metal mesh and the deep trench isolation structure define a plurality of pixel regions corresponding to the plurality of photodiodes, wherein the plurality of pixel regions include a first pixel region sensitive to a first region of the spectrum, a second pixel region sensitive to a second region of the spectrum, and a third pixel region sensitive to a third region of the spectrum, wherein the first pixel region is smaller than the second pixel region or the third pixel region, and wherein the ratio of the area of ​​the metal mesh to the total area of ​​the plurality of pixel regions when viewed from above is larger in the first pixel region than in the second pixel region or the third pixel region.

2. The image sensor according to claim 1, wherein the first region of the spectrum is a green region, and wherein the second region of the spectrum and the third region of the spectrum are a blue region and a red region, respectively.

3. The image sensor of claim 1, wherein when viewed from above, the first pixel region has a first area, the first area being at least 1% smaller than each of the second area of ​​the second pixel region and the third area of ​​the third pixel region.

4. The image sensor of claim 3, wherein the first ratio of the first area to the second area is in the range of 90% to 110% of the second ratio of the first quantum efficiency of the first pixel region to the second quantum efficiency of the second pixel region.

5. The image sensor of claim 1, wherein when viewed from above, the first pixel region has an area that is 50% smaller than the area of ​​the second pixel region or the area of ​​the third pixel region.

6. The image sensor of claim 1, wherein each of the plurality of pixel regions extends a first distance in a first direction and a second distance in a second direction substantially orthogonal to the first direction, wherein the first direction and the second direction define a plane parallel to the top surface of the semiconductor substrate, and wherein the first distance and the second distance are different.

7. A method for forming an image sensor, comprising: Multiple photodiodes are formed in a semiconductor substrate; A deep trench isolation structure is formed on the back side of the semiconductor substrate to correspondingly separate the plurality of photodiodes into a plurality of pixel regions; A metal mesh is formed directly overlaid on the deep trench isolation structure on the semiconductor substrate; as well as A color filter array is formed on the semiconductor substrate, such that each color filter is directly coated on the corresponding photodiode among the plurality of photodiodes. The plurality of pixel regions includes a first pixel region sensitive to a first region of the spectrum, a second pixel region sensitive to a second region of the spectrum, and a third pixel region sensitive to a third region of the spectrum, wherein, when viewed from above, the color filters in the color filter array in the first pixel region have a smaller area than the color filters in the color filter array in the second or third pixel region, and wherein, when viewed from above, the ratio of the area of ​​the metal mesh to the total area of ​​the plurality of pixel regions when viewed from above is greater in the first pixel region than in the second or third pixel region.

8. The method of claim 7, wherein the trenches of the deep trench isolation structure are spaced further apart in the second pixel region or the third pixel region than in the first pixel region.

9. The method according to claim 7, further comprising: The components of the metal mesh in the first pixel area are more closely spaced than the components of the metal mesh in the second pixel area or the third pixel area.

10. The method of claim 7, further comprising: Multiple microlenses are formed on the color filter array such that each of the multiple microlenses directly covers the corresponding color filter, wherein when viewed from above, each microlens in the first pixel region has a smaller area than each microlens in the second pixel region or each microlens in the third pixel region.

11. The method of claim 7, wherein when viewed from above, the area occupied by the first pixel region across the plurality of pixel regions is smaller than the combination of the second pixel region and the third pixel region.

12. An image sensor, comprising: Semiconductor substrate; Multiple photodiodes are disposed within the semiconductor substrate; A deep trench isolation structure separates the plurality of photodiodes; as well as A metal mesh is overlaid on the semiconductor substrate and directly overlaid on the deep trench isolation structure, wherein the metal mesh and the deep trench isolation structure define a plurality of pixel regions corresponding to the plurality of photodiodes, wherein the plurality of pixel regions include a first pixel region sensitive to a first region of the spectrum, a second pixel region sensitive to a second region of the spectrum, and a third pixel region sensitive to a third region of the spectrum, and wherein the ratio of the area of ​​the metal mesh to the total area of ​​the plurality of pixel regions when viewed from above is greater in the first pixel region than in the second pixel region or the third pixel region.

13. The image sensor of claim 12, wherein the plurality of pixel regions are divided into a plurality of pixel groups, and wherein the plurality of pixel groups comprises: The first row of pixel groups extends in a first direction and includes alternating first pixel groups and second pixel groups in the first direction; as well as The second row of pixel groups extends in the first direction and includes alternating first and third pixel groups in the first direction. The first pixel group includes the first pixel region, the second pixel group includes the second pixel region, and the third pixel group includes the third pixel region.

14. The image sensor of claim 13, wherein the second pixel group and the third pixel group share a common portion of the deep trench isolation structure, and wherein the common portion of the deep trench isolation structure extends in the first direction.

15. The image sensor of claim 13, wherein each of the plurality of pixel groups comprises a single pixel region, four pixel regions arranged in a 2×2 pattern, or nine pixel regions arranged in a 3×3 pattern.

16. The image sensor of claim 13, wherein the first pixel group in the first row of pixel groups has a different size than the first pixel group in the second row of pixel groups.

17. The image sensor of claim 13, wherein in the second row of pixel groups, the first pixel group is smaller than the third pixel region, and wherein in the first row of pixel groups, the first pixel group has the same size as the second pixel group.

18. The image sensor of claim 13, wherein in the first row of pixel groups, the first pixel group is smaller than the second pixel region, and wherein in the second row of pixel groups, the first pixel group has the same size as the third pixel group.

19. The image sensor of claim 12, wherein the components of the metal mesh in the first pixel region are spaced closer together than the components of the metal mesh in the second pixel region or the third pixel region.

20. The image sensor of claim 12, wherein in the pixel regions of the plurality of pixel regions, the distance between individual components of the metal mesh is less in the first pixel region than in the second pixel region or the third pixel region.

Images