一种双控制栅半浮栅晶体管及其制备方法

By using a dual-controlled gate structure and combining high-k dielectric material and metal gate, the problems of quantum tunneling effect and weak electric field control in semi-floating gate devices during floating gate charging are solved, achieving better electric field control and power consumption optimization.

CN114823901BActive Publication Date: 2026-07-17SHANGHAI HUALI INTEGRATED CIRCUIT CORP

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
SHANGHAI HUALI INTEGRATED CIRCUIT CORP
Filing Date
2021-01-28
Publication Date
2026-07-17

AI Technical Summary

Technical Problem

In the prior art, semi-floating gate devices suffer from a large quantum tunneling effect in the gate dielectric layer during floating gate charging and a weak electric field control during gate readout.

Method used

A dual-control gate structure is adopted, including a floating gate stack, a polysilicon control gate stack, and a metal control gate stack. High-k dielectric material and metal gate are used to reduce quantum tunneling effect, and better electric field control is achieved through the independent operation of polysilicon control gate and metal control gate.

Benefits of technology

It effectively reduces the quantum tunneling effect of the gate dielectric layer during floating gate charging, improves gate leakage current and the power consumption it causes, and realizes electric field control of the device during reading and writing, achieving the function of simultaneous reading and writing.

✦ Generated by Eureka AI based on patent content.

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Abstract

本发明提供一种双控制栅半浮栅晶体管及其制备方法,位于衬底上设有U型槽的浅掺杂阱区;浮栅氧化层的一部分覆盖U型槽侧壁和底部,另一部分覆盖U型槽一侧的浅掺杂阱区上,并覆盖浅掺杂阱区上的浮栅氧化层设有将浅掺杂阱区上表面暴露的开口;浮栅多晶硅层填充于U型槽并覆盖浮栅氧化层;多晶硅控制栅叠层包括位于浮栅多晶硅层上的多晶硅控制栅氧化层及位于多晶硅控制栅氧化层上的多晶硅控制栅多晶硅层;金属控制栅叠层包括高K介质层和金属栅;金属控制栅叠层连续地覆盖在部分多晶硅控制栅多晶硅层和浅掺杂阱区之上;金属栅上表面高于多晶硅控制栅多晶硅层上表面;形成于金属栅侧壁及浮栅叠层、多晶硅控制栅叠层外侧的侧壁。
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