Automatic voltage reconfiguration

By dynamically adjusting the core voltage configuration of the central processing unit, the problem of resource waste caused by excessive frequency voltage margin is solved, and the computing system can operate efficiently in real-world environments and use cases.

CN114830064BActive Publication Date: 2026-08-04ADVANCED MICRO DEVICES INC +1
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
ADVANCED MICRO DEVICES INC
Filing Date
2020-12-15
Publication Date
2026-08-04

AI Technical Summary

Technical Problem

The frequency and voltage margins set at the factory for the central processing unit are too large, which cannot reflect the actual environment and use case scenarios, resulting in wasted resources and underutilized performance.

Method used

By executing user-specified workloads, the minimum safe voltage of the core is dynamically adjusted until a fault condition is identified, and the core's voltage configuration is modified based on the minimum safe voltage, including margin adjustments to the frequency-voltage curve.

Benefits of technology

The core voltage configuration has been optimized to make it more efficient in real-world operating environments and use cases, thereby improving the performance of the computing system.

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Abstract

Automatic voltage reconfiguration in a computer processor including one or more cores includes executing one or more user-specified workloads, determining a respective minimum safe voltage for each core of the one or more cores based on the user-specified workloads, and modifying a respective voltage configuration for each core of the one or more cores based on the respective minimum safe voltage.
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Description

Background Technology

[0001] The central processing unit (CPU) is manufactured with a margin in its frequency-voltage profile. This margin ensures proper functioning of the CPU under "worst-case" scenarios. These "worst-case" scenarios typically do not reflect the CPU's actual operating environment and use case scenarios. Attached Figure Description

[0002] Figure 1 This is a block diagram of an example processor for automatic voltage reconfiguration according to some implementation schemes.

[0003] Figure 2 This is a flowchart of an example method for automatic voltage reconfiguration based on some implementation schemes.

[0004] Figure 3 This is a flowchart of an example method for automatic voltage reconfiguration based on some implementation schemes.

[0005] Figure 4 This is a flowchart of an example method for automatic voltage reconfiguration based on some implementation schemes.

[0006] Figure 5 This is a flowchart of an example method for automatic voltage reconfiguration based on some implementation schemes. Detailed Implementation

[0007] In some implementations, a method for automatic voltage reconfiguration includes: executing one or more user-specified workloads; determining a corresponding minimum safe voltage for each of the one or more cores based on the user-specified workloads; and modifying the corresponding voltage configuration for each of the one or more cores based on the corresponding minimum safe voltage.

[0008] In some embodiments, determining the corresponding minimum safe voltage for each of the one or more cores includes modifying the corresponding operating voltage of each of the one or more cores during the execution of the one or more user-specified workloads until a fault state is identified. In some embodiments, the method further includes receiving a selection of one or more predefined test modes as the one or more user-specified workloads. In some embodiments, the corresponding voltage configuration includes a margin in the frequency-voltage profile. In some embodiments, the execution of the one or more user-specified workloads is based on interaction with one or more users of one or more software applications. In some embodiments, the method further includes saving the corresponding minimum safe voltage for each of the one or more cores to a storage location. In some embodiments, the method further includes loading the corresponding minimum safe voltage for each of the one or more cores in response to a request to overclock the one or more cores.

[0009] In some implementations, a device for automatic voltage reconfiguration performs the steps of: executing one or more user-specified workloads; determining a corresponding minimum safe voltage for each of the one or more cores based on the user-specified workloads; and modifying the corresponding voltage configuration for each of the one or more cores based on the corresponding minimum safe voltage.

[0010] In some embodiments, determining the corresponding minimum safe voltage for each of the one or more cores includes modifying the corresponding operating voltage of each of the one or more cores during the execution of the one or more user-specified workloads until a fault state is identified. In some embodiments, the step further includes receiving a selection of one or more predefined test modes as the one or more user-specified workloads. In some embodiments, the corresponding voltage configuration includes a margin in the frequency-voltage profile. In some embodiments, the execution of the one or more user-specified workloads is based on interaction with one or more users of one or more software applications. In some embodiments, the step further includes saving the corresponding minimum safe voltage for each of the one or more cores to a storage location. In some embodiments, the step further includes loading the corresponding minimum safe voltage for each of the one or more cores in response to a request to overclock the one or more cores.

[0011] In some embodiments, a computer program product for automatic voltage reconfiguration disposed on a computer-readable medium includes computer program instructions that, when executed, cause a computer to perform steps including: executing one or more user-specified workloads; determining a corresponding minimum safe voltage for each of the one or more cores based on the user-specified workloads; and modifying a corresponding voltage configuration for each of the one or more cores based on the corresponding minimum safe voltage.

[0012] In some embodiments, determining the corresponding minimum safe voltage for each of the one or more cores includes modifying the corresponding operating voltage of each of the one or more cores during the execution of the one or more user-specified workloads until a fault state is identified. In some embodiments, the step further includes receiving a selection of one or more predefined test modes as the one or more user-specified workloads. In some embodiments, the corresponding voltage configuration includes a margin in the frequency-voltage profile. In some embodiments, the execution of the one or more user-specified workloads is based on interaction with one or more users of one or more software applications. In some embodiments, the step further includes saving the corresponding minimum safe voltage for each of the one or more cores to a storage location. In some embodiments, the step further includes loading the corresponding minimum safe voltage for each of the one or more cores in response to a request to overclock the one or more cores.

[0013] The automatic voltage reconfiguration according to this application is typically implemented using a computer, i.e., using an automated computing machine. Therefore, for further explanation, Figure 1 A block diagram is provided illustrating an automated computing machine including an exemplary computer 100 configured for automatic voltage reconfiguration according to certain implementation schemes. Figure 1 The computer 100 includes at least one computer processor 102 or 'CPU' and random access memory 104 ('RAM'), which is connected to the processor 102 and other components of the computer 100 via a high-speed memory bus 106 and a bus adapter 108.

[0014] The operating system 110 is stored in RAM 104. Operating systems useful in computers configured for automatic voltage reconfiguration according to certain implementation schemes include UNIX. TM Linux TM Microsoft Windows TM And other operating systems that those skilled in the art would think of. Figure 1In the example, the operating system 108 is shown in RAM 104, but many components of such software are typically also stored in non-volatile memory, such as data storage device 112 on a disk drive. A voltage reconfiguration module 114, for automatic voltage reconfiguration according to certain embodiments, is also stored in RAM.

[0015] Figure 1 Computer 100 includes a disk drive adapter 116, which is coupled to processor 102 and other components of computer 100 via extension bus 118 and bus adapter 108. Disk drive adapter 116 connects a non-volatile data storage device, in the form of data storage device 112, to computer 100. Disk drive adapters useful in computers configured for automatic voltage reconfiguration according to certain embodiments include integrated drive electronics ('IDE') adapters, small computer system interface ('SCSI') adapters, and other adapters that will be apparent to those skilled in the art. In some embodiments, as will be apparent to those skilled in the art, the non-volatile computer memory is implemented as an optical disc drive, electrically erasable programmable read-only memory (so-called 'EEPROM' or 'flash memory'), RAM drive, etc.

[0016] Figure 1 Example computer 100 includes one or more input / output ('I / O') adapters 120. The I / O adapters implement user-oriented input / output through, for example, software drivers and computer hardware, to control output to display devices such as computer displays, and user input from user input devices 122 such as keyboards and mice. Figure 1 Example computer 100 includes a video adapter 124, which is an example of an I / O adapter specifically designed to output graphics to a display device 126, such as a display screen or computer monitor. The video adapter 124 is connected to the processor 102 via a high-speed video bus 128, a bus adapter 108, and a front-side bus 130, which is also a high-speed bus.

[0017] Figure 1An exemplary computer 100 includes a communication adapter 132 for data communication with other computers and for data communication with a data communication network. Such data communication is carried out serially via an RS-232 connection, via an external bus such as a Universal Serial Bus ('USB'), via a data communication network such as an IP data communication network, and / or in other ways that would be apparent to those skilled in the art. The communication adapter enables hardware-level data communication, through which a computer directly or via a data communication network transmits data communication to another computer. Examples of communication adapters useful in computers configured for automatic voltage reconfiguration according to certain embodiments include modems for wired dial-up communication, Ethernet (IEEE 802.3) adapters for wired data communication, and 802.11 adapters for wireless data communication.

[0018] To further explain, Figure 2 A flowchart illustrating an exemplary method for automatic voltage reconfiguration is provided, the method including (e.g., by voltage reconfiguration module 114) performing 202 one or more user-specified workloads. In one embodiment, the one or more user-specified workloads include one or more predefined or pre-generated workloads. For example, predefined workloads include predefined test modes, test suites, stress tests, or other predefined groups of predefined operations. In one embodiment, one or more user-specified workloads are selected from a plurality of test modes. For example, each of the plurality of different test modes includes operations associated with a specific type of computation or application, such as graphics rendering, code compilation, data processing, etc.

[0019] In another implementation, one or more user-specified workloads are operations performed or initiated by the user. For example, the user selects a software application or process to execute. The user then interacts with the executed software application. In other words, executing one or more user-specified workloads is based on interaction with one or more software applications by one or more users.

[0020] Figure 2The method also includes determining a corresponding minimum safe voltage for each of the 204 cores or more based on the user-specified workload. During the execution of one or more user-specified workloads (e.g., during the execution of one or more selected predefined test modes, or during user interaction with one or more software applications), the voltage reconfiguration module 114 modifies the operating voltage of one or more cores. For example, the voltage reconfiguration module 114 configures one or more cores to operate at varying voltages until predefined conditions are met. Continuing this example, the voltage reconfiguration module 114 reduces the operating voltage of each core at predefined intervals or increments until predefined conditions are met. Predefined conditions include failure to complete a function or operation, an exception occurring during code execution, failure to complete a function or operation within a predefined time window, etc. The minimum safe voltage for a given core is then determined as the final operating voltage at which the predefined conditions are not met (e.g., before reducing the operating voltage and causing the predefined conditions to be met).

[0021] Figure 2 The method also includes modifying the corresponding voltage configuration of each of the 206 or more cores based on the corresponding minimum safe voltage. In one embodiment, the corresponding voltage configuration includes a margin in a frequency-voltage curve. For example, each core corresponds to a frequency-voltage curve that defines the corresponding frequency of the core for a given operating voltage. Each frequency-voltage curve includes the minimum and maximum voltages at which the corresponding core can operate. Therefore, modifying the corresponding voltage configuration involves reducing the minimum voltage of the frequency-voltage curve. Thus, after modification, each core has a lower possible minimum operating voltage. In other words, the reduced minimum voltage for bucking has been determined.

[0022] In one implementation, the corresponding voltage configuration of each core is modified to operate at a lower possible minimum operating voltage, but not necessarily at that minimum operating voltage. For example, in one implementation, the operating voltage of a core is not reduced (e.g., reduced to a determined minimum safe voltage) until a request or other input is provided to change the core's operating voltage. In one implementation, by operating at a lower operating voltage, the frequency of a given core is then increased (e.g., overclocked) according to a modified frequency-voltage profile. For example, the system management unit automatically adjusts the frequency of a given core based on its operating voltage.

[0023] As mentioned above, the minimum safe voltage for each core is determined based on the user-specified workload. Before distribution, the test chip is tested to operate under "worst-case" conditions (e.g., under specific stress tests, under higher thermal conditions, etc.). The chip's frequency-voltage profile (for example, for each core) has an operating margin to guarantee operation under these "worst-case" conditions. Typical user operation will not approach these worst-case conditions. For instance, a user system with adequate or high-end cooling will not reach the worst-case thermal conditions under which the test chip operates. As another example, the specific stress tests applied to the chip do not reflect typical user operation. In other words, the chip is constrained to meet test conditions that do not reflect the environment and workload in which the chip will ultimately operate.

[0024] For example, suppose a chip is being tested and it's discovered that at a specific voltage, only a code compilation stress test causes the chip to fail. The chip's frequency-voltage profile is then modified to avoid this voltage. For instance, the minimum voltage on the frequency-voltage profile is set to be higher than the voltage at which the code compilation stress test fails. This imposes an unnecessary limitation on the chip for users who are unlikely or never perform similar code compilation operations. To overcome this limitation, the voltage reconfiguration module 114 determines the minimum safe voltage for user-specified workloads (e.g., predefined workloads selected by the user, or user-specified applications and interactions). Therefore, the minimum safe voltage is modified to reflect the operating environment and use cases of each individual system.

[0025] To further explain, Figure 3 A flowchart illustrating an exemplary method for automatic voltage reconfiguration is provided, the method comprising: (e.g., by voltage reconfiguration module 114) performing 202 one or more user-specified workloads; determining 204 a corresponding minimum safe voltage for each of the one or more cores based on the user-specified workloads; and modifying the corresponding voltage configuration for each of the one or more cores based on the corresponding minimum safe voltages.

[0026] Figure 3 Methods and Figure 2The difference lies in that determining the corresponding minimum safe voltage for each of the one or more cores based on the user-specified workload 204 involves modifying the corresponding operating voltage of each of the one or more cores 302 during the execution of the one or more user-specified workloads until a fault state is identified. For example, the voltage reconfiguration module 114 runs in parallel with or as a background process with one or more user-specified workloads and modifies one or more cores to operate under different combinations or settings of operating voltages until a fault state is identified. Fault states include software crashes or anomalies, failure to maintain a specific quality of service for one or more user-specified workloads, failure to complete operations within a time threshold, or other criteria. The minimum safe voltage for a given core is then determined to be the last tested operating voltage of the core that caused the fault state.

[0027] To further explain, Figure 4 A flowchart illustrating an exemplary method for automatic voltage reconfiguration is provided, the method comprising: (e.g., by voltage reconfiguration module 114) performing 202 one or more user-specified workloads; determining 204 a corresponding minimum safe voltage for each of the one or more cores based on the user-specified workloads; and modifying the corresponding voltage configuration for each of the one or more cores based on the corresponding minimum safe voltages.

[0028] Figure 4 Methods and Figure 2 The difference is that, Figure 4 The method also includes receiving 402 to select one or more predefined test modes as one or more user-specified workloads. In one embodiment, each of the predefined test modes corresponds to a specific type or category of workload (e.g., code compilation, graphics rendering, data processing, database applications, data storage, network connectivity, etc.). The user then selects one or more predefined test modes to allow the voltage reconfiguration module 114 to automatically configure a minimum safe voltage for each core based on the selected specific type of workload. For example, the user selects the workload based on expected or desired use cases.

[0029] To further explain, Figure 5 A flowchart illustrating an exemplary method for automatic voltage reconfiguration is provided, the method comprising: (e.g., by voltage reconfiguration module 114) performing 202 one or more user-specified workloads; determining 204 a corresponding minimum safe voltage for each of the one or more cores based on the user-specified workloads; and modifying the corresponding voltage configuration for each of the one or more cores based on the corresponding minimum safe voltages.

[0030] Figure 5Methods and Figure 2 The difference is that, Figure 5 The method also includes saving the corresponding minimum safe voltage 504 502 for each of the one or more cores to storage location 506. In one embodiment, storage location 506 includes non-volatile memory (e.g., disk storage) of the computer 100 performing the voltage reconfiguration module 114. In an alternative embodiment, storage location 506 includes a storage device located remotely from the computer 100 performing the voltage reconfiguration module 114. For example, storage location 506 includes a remote storage system, such as a cloud storage system or a web server.

[0031] Figure 5 The method also includes loading a corresponding minimum safe voltage 504 for each of the one or more cores in response to a request 510 to overclock one or more cores (e.g., from storage location 506). In one embodiment, the request 510 to overclock one or more cores is generated in response to user input (e.g., to a user interface) to overclock one or more cores. In an alternative embodiment, the request 510 to overclock one or more cores is generated by the operating system 110 or an application requesting that one or more cores be overclocked. If storage location 506 is local non-volatile memory, the minimum safe voltage 504 is loaded from the non-volatile memory (e.g., loaded into random access memory or other memory). If storage location 506 is a remote storage system (e.g., a cloud storage system or a web server), the minimum safe voltage 504 is requested from the remote storage system. Therefore, the minimum safe voltage 504 loaded 508 is used to modify the corresponding voltage configuration of 206.

[0032] Based on the explanations set forth above, the reader will recognize that the benefits of automatic voltage reconfiguration according to the embodiments of this disclosure include:

[0033] ● By adjusting the minimum safe operating voltage of the core to reflect the actual operating environment and use cases, the performance of the computing system is improved.

[0034] The exemplary embodiments of this disclosure are described primarily in the context of a full-featured computer system for automatic voltage reconfiguration. However, those skilled in the art will recognize that this disclosure can also be embodied in a computer program product disposed on a computer-readable storage medium for use with any suitable data processing system. Such a computer-readable storage medium can be any storage medium for machine-readable information, including magnetic media, optical media, or other suitable media. Examples of such media include disks in hard disk drives or floppy disks, optical discs for optical drives, magnetic tapes, and other media that would be apparent to those skilled in the art. Those skilled in the art will readily recognize that any computer system with suitable programming means will be able to perform the steps of the methods of this disclosure as embodied in the computer program product. Those skilled in the art will also recognize that while some of the exemplary embodiments described in this specification are directed to software installed on and executed on computer hardware, alternative embodiments implemented as firmware or hardware are also fully within the scope of this disclosure.

[0035] This disclosure can be a system, method, and / or computer program product. A computer program product may include one or more computer-readable storage media having computer-readable program instructions on which a processor performs aspects of this disclosure.

[0036] A computer-readable storage medium can be a tangible means capable of retaining and storing instructions for use by an instruction execution device. A computer-readable storage medium can be, for example, but not limited to, electronic storage devices, magnetic storage devices, optical storage devices, electromagnetic storage devices, semiconductor storage devices, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of computer-readable storage media includes: portable computer floppy disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable optical disc read-only memory (CD-ROM), digital versatile optical disc (DVD), memory sticks, floppy disks, mechanical encoding devices (e.g., punched cards or raised structures in slots on which instructions are recorded), and any suitable combination of the foregoing. As used herein, a computer-readable storage medium should not be construed as being itself a transient signal, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through waveguides or other transmission media (e.g., light pulses transmitted through fiber optic cables), or electrical signals transmitted through wires.

[0037] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to a corresponding computing / processing device, or downloaded via a network (e.g., the Internet, a local area network, a wide area network, and / or a wireless network) to an external computer or external storage device. The network may include copper transmission cables, fiber optic cables, wireless transmissions, routers, firewalls, switches, gateway computers, and / or edge servers. A network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards them to a computer-readable storage medium within the corresponding computing / processing device.

[0038] Computer-readable program instructions used to perform the operations of this disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, status setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, etc., and conventional procedural programming languages ​​such as the "C" programming language or similar programming languages. The computer-readable program instructions may be executed entirely on the user's computer, partially on the user's computer, as a separate software package partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the latter case, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may form a connection to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, electronic circuitry including, for example, programmable logic circuitry, field-programmable gate arrays (FPGAs), or programmable logic arrays (PLAs) may execute computer-readable program instructions by personalizing the electronic circuitry with status information utilizing the computer-readable program instructions in order to perform aspects of this disclosure.

[0039] Various aspects of this disclosure are described herein with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this disclosure. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.

[0040] These computer-readable program instructions may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions / actions specified in one or more boxes of a flowchart and / or block diagram. These computer-readable program instructions may also be stored in a computer-readable storage medium that can instruct a computer, programmable data processing apparatus, and / or other means to function in a particular manner, such that the computer-readable storage medium storing the instructions includes an article of writing comprising instructions that implement aspects of the functions / actions specified in one or more boxes of a flowchart and / or block diagram.

[0041] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other device to produce a computer-implemented process, such that the instructions, which execute on the computer, other programmable apparatus or other device, perform the functions / actions specified in one or more boxes of a flowchart and / or block diagram.

[0042] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this disclosure. In this respect, each block in a flowchart or block diagram may represent a module, segment, or portion comprising one or more executable instructions for implementing a specified logical function(s). In some alternative implementations, the functions mentioned in a block may occur in a different order than those shown in the drawings. For example, two blocks shown consecutively may actually be executed substantially simultaneously, or these blocks may sometimes be executed in reverse order, depending on the functionality involved. It will also be noted that each block and combination of blocks in the block diagrams and / or flowcharts may be implemented by a dedicated hardware-based system that performs the specified function or action or implements a combination of dedicated hardware and computer instructions.

[0043] As will be understood from the foregoing description, modifications and changes can be made to various embodiments of this disclosure. The description in this specification is for illustrative purposes only and should not be construed as limiting. The scope of this disclosure is limited only by the language of the appended claims.

Claims

1. A method for automatic voltage reconfiguration in a computer processor comprising one or more cores, the method comprising: Execute one or more user-specified workloads; The minimum safe voltage for each of the one or more cores is determined based on the user-specified workload. as well as The voltage configuration of each of the one or more cores is modified based on the corresponding minimum safe voltage, wherein the corresponding voltage configuration includes a margin in the frequency voltage curve, and wherein modifying the voltage configuration of each of the one or more cores includes modifying the margin in the frequency voltage curve by reducing the minimum voltage of the frequency voltage curve.

2. The method of claim 1, wherein determining the corresponding minimum safe voltage for each of the one or more cores comprises modifying the corresponding operating voltage of each of the one or more cores during the execution of the one or more user-specified workloads until a fault condition is identified.

3. The method of claim 1, further comprising receiving selection of one or more predefined test modes as the one or more user-specified workloads, wherein each of the one or more predefined test modes corresponds to a specific type of workload.

4. The method of claim 1, wherein the frequency-voltage curve includes the minimum and maximum voltages at which the corresponding core can operate.

5. The method of claim 1, wherein executing one or more user-specified workloads is based on one or more user interactions with one or more software applications.

6. The method of claim 1, further comprising saving the corresponding minimum safe voltage of each of the one or more cores to a storage location.

7. The method of claim 6, further comprising, in response to a request to overclock the one or more cores, loading the corresponding minimum safe voltage for each of the one or more cores.

8. An apparatus for automatic voltage reconfiguration in a computer processor including one or more cores, the apparatus comprising: Voltage configuration module, the voltage configuration module is configured to: Execute one or more user-specified workloads; The minimum safe voltage for each of one or more cores is determined based on the user-specified workload. as well as The voltage configuration of each of the one or more cores is modified based on the corresponding minimum safe voltage, wherein the corresponding voltage configuration includes a margin in the frequency voltage curve, and wherein modifying the voltage configuration of each of the one or more cores includes modifying the margin in the frequency voltage curve by reducing the minimum voltage of the frequency voltage curve.

9. The device of claim 8, wherein determining the respective minimum safe voltage for each of the one or more cores comprises modifying the respective operating voltage of each of the one or more cores during the execution of the one or more user-specified workloads until a fault condition is identified.

10. The device of claim 8, wherein the voltage configuration module is further configured to receive selection of one or more predefined test modes as the one or more user-specified workloads.

11. The device of claim 8, wherein the frequency voltage curve includes the minimum and maximum voltages at which the respective core can operate.

12. The device of claim 8, wherein the execution of one or more user-specified workloads is based on interaction with one or more users through one or more software applications.

13. The device of claim 8, further configured to save the corresponding minimum safe voltage of each of the one or more cores to a storage location.

14. The device of claim 13, wherein the voltage configuration module is further configured to load the corresponding minimum safe voltage for each of the one or more cores in response to a request to overclock the one or more cores.