RRAM manufacturing method

Abstract

The present invention discloses a method for manufacturing RRAM, comprising the following steps: Step 1, forming a metal lower electrode material layer on a semiconductor substrate. Step 2, forming a first material layer on the surface of the metal lower electrode material layer, wherein the material of the first material layer is a nitride of a first metal. Step 3, annealing and oxidizing the first material layer, so that the first material layer is divided into an oxidized top layer and an unoxidized bottom layer, wherein the material of the top layer of the first material layer is converted into an oxide of the first metal and serves as a resistive material layer; and the bottom layer serves as a bottom barrier layer. Step 4, forming a metal upper electrode material layer on top of the resistive material layer. The present invention can form a resistive material barrier layer having a gradient distribution of oxygen content, and the process is simple, easy to control, and has a low process cost.

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a semiconductor integrated circuit, and in particular to a method for manufacturing a resistive random access memory (RRAM). Background Art

[0002] Reversible electroresistive random access memory is a next-generation memory technology that is currently under development. Compared with the current mainstream floating gate flash memory based on charge storage mechanism, RRAM has a series of outstanding advantages such as simple structure, low power consumption, high device density, and fast programming / erasing speed. In traditional Flash memory, data is stored in the form of charge, which is susceptible to problems such as floating gate coupling, charge leakage, and crosstalk between adjacent cells. As semiconductor technology nodes continue to advance, these technical challenges are becoming increasingly apparent. In RRAM, the storage principle is to use certain materials to have different resistance states (high / low resistance states) under electrical stimulation to realize the recording of data in memory (0 or 1). This is a non-charge storage mechanism, so it can effectively avoid the charge leakage problem caused by further reduction of key dimensions in traditional Flash.

[0003] The structure of RRAM devices is very simple, generally a sandwich structure of lower electrode-insulating layer-upper electrode, and the insulating layer in the middle is a resistive material layer that can switch between high resistance state and low resistance state. In RRAM, the insulating layer that constitutes the resistive material layer usually adopts a metal oxide layer such as tantalum oxide (TaO). The oxygen in tantalum oxide will move under the action of an electric field and generate oxygen vacancies. The oxygen vacancies are connected together to form conductive filaments. If the oxygen vacancies in the entire thickness range of the resistive material layer are connected together along the thickness direction, the conductive filaments will penetrate the entire resistive material layer, so the resistive material layer is in a low resistance state; conversely, if the conductive filaments are disconnected within the thickness range of the resistive material layer, the resistive material layer is in a high resistance state. Since the conductive filaments are connected by oxygen vacancies, and the oxygen vacancies are formed by the movement of oxygen ions, the oxygen ions will move toward the anode, and the oxygen vacancies will grow from the cathode to the anode. The conductive filaments are formed by the conical structure formed by the oxygen vacancies growing from the cathode to the anode. In order to form the conical structure of oxygen vacancies, the oxygen concentration in the resistive material layer needs to gradually decrease from the anode to the cathode, that is, this structure with a gradual change in oxygen concentration gradient can improve the performance of RRAM such as programming / erasing speed; that is: the insulating oxide layer in RRAM is generally designed to be a non-homogeneous stoichiometric ratio, that is, a gradient structure with more oxygen near the anode surface and less oxygen near the cathode surface, so as to better conform to the concentration gradient characteristics of the conical growth of oxygen vacancy conductive filaments, which is beneficial to improving the switching performance of RRAM devices.

[0004] Therefore, for RRAM devices, the preparation process of the intermediate insulating layer, i.e., the resistive material layer, is one of the most critical processes. In the existing methods, the methods for forming the resistive material layer mainly include the following two methods:

[0005] The first existing method includes: using a physical vapor deposition process to directly deposit a metal oxide insulating layer by bombarding a metal target with oxygen ions.

[0006] The disadvantage of the first existing method is that the components of the prepared insulating layer are fixed and it is impossible to form an oxygen content gradient structure that is beneficial to improving the programming / erasing speed of the RRAM device.

[0007] The second existing method includes: first depositing a metal film layer, and then converting it into a metal oxide layer through annealing and oxidation.

[0008] Compared with the first existing method, which is the method of directly depositing a metal oxide layer, the most prominent advantage of the second existing method is that it can prepare a structure with a gradient of oxygen content.

[0009] However, the second existing method also has its disadvantages, which are reflected in the control of oxidation time (depth). If the oxidation time is short, the oxide layer formed is too thin and cannot meet the requirements of device design; if the oxidation time is long, over-oxidation is likely to occur, and most of the entire metal film is oxidized to become an oxide layer with the highest oxidation state, which is also not conducive to improving device performance. Summary of the invention

[0010] The technical problem to be solved by the present invention is to provide a method for manufacturing RRAM, which can form a resistive material barrier layer with a gradient distribution of oxygen content, and has a simple process, is easy to control and has a low process cost.

[0011] In order to solve the above technical problems, the present invention provides a method for manufacturing a RRAM, comprising the following steps:

[0012] Step 1: forming a metal bottom electrode material layer on a semiconductor substrate.

[0013] Step 2: forming a first material layer on the surface of the metal lower electrode material layer, wherein the material of the first material layer is a nitride of a first metal.

[0014] Step three, annealing and oxidizing the first material layer, wherein the annealing and oxidation separate the first material layer into an oxidized top layer and an unoxidized bottom layer, and the material of the top layer of the first material layer is converted into the oxide of the first metal; the bottom layer of the first material layer serves as a bottom barrier layer, and the top layer of the first material layer serves as a resistive material layer; utilizing the properties of the annealing and oxidation, the oxygen content of the resistive material layer has a distribution structure with a gradient decreasing from top to bottom.

[0015] Step 4: forming a metal upper electrode material layer on top of the resistive material layer, and forming a sandwich structure of RRAM by stacking the metal lower electrode material layer, the bottom barrier layer, the resistive material layer and the metal upper electrode material layer.

[0016] A further improvement is that in step one, the semiconductor substrate includes a silicon substrate.

[0017] A further improvement is that the material of the metal lower electrode material layer includes copper.

[0018] A further improvement is that the material of the first metal includes Ta.

[0019] A further improvement is that in step three, the thickness of the top layer and the bottom layer is controlled by the annealing oxidation process time; the minimum value of the annealing oxidation process time needs to ensure that the oxide layer of the first metal appears on the surface of the first material layer, and the maximum value of the annealing oxidation process time needs to ensure that the nitride layer of the first metal is retained on the bottom surface of the first material layer.

[0020] A further improvement is that the oxidizing gas for the annealing oxidation includes oxygen and nitrous oxide.

[0021] A further improvement is that in step 4, the step of forming a top barrier layer is also included between forming the metal upper electrode material layer.

[0022] A further improvement is that the material of the metal upper electrode material layer includes copper.

[0023] A further improvement is that the material of the top barrier layer is nitride of the first metal.

[0024] A further improvement is that the method further includes patterning the sandwich structure of the RRAM to form a device unit of the RRAM.

[0025] A further improvement is that in step 2, the first material layer is formed by a physical vapor deposition process.

[0026] A further improvement is that the sandwich structure of the RRAM is patterned by etching the sandwich structure of the RRAM.

[0027] Alternatively, the metal lower electrode material layer and the metal upper electrode material layer are respectively formed by a Damascene process, and the sandwich structure of the RRAM is patterned during the Damascene process of forming the metal lower electrode material layer and the metal upper electrode material layer.

[0028] The resistive material layer of the present invention is formed by annealing and oxidizing the first material layer used to form the bottom barrier layer. The annealing and oxidation process can make the distribution of the oxygen content of the resistive material layer gradually decrease from the top to the bottom of the resistive material layer, that is, the gradient decreases. Therefore, the present invention can form a resistive material barrier layer with a gradually changing oxygen content distribution.

[0029] In addition, since the present invention does not adopt the method corresponding to the second existing method of depositing metal and then oxidizing the metal to form a resistive material layer, but instead adopts the method of annealing and oxidizing the first material layer corresponding to the bottom barrier layer to form a resistive material layer, the deposition thickness of the first material layer will be greater than the thickness of the directly deposited metal layer corresponding to the second existing method, thereby avoiding the defect that the annealing and oxidation process is difficult to control when depositing a thin metal layer, making the annealing and oxidation process control of the present invention simple, such as the variation range of the annealing and oxidation process time of the present invention can be larger, so the process window is larger, so the present invention has the advantages of simple process and easy control.

[0030] In addition, since the present invention directly uses the first material layer corresponding to the bottom barrier layer to anneal and oxidize to form the resistive material layer, that is, the bottom barrier layer and the resistive material layer of the present invention are actually formed simultaneously using the same process, the present invention is equivalent to merging the formation process of two layers of material into the formation process of one layer of material. Therefore, the present invention can reduce the process cost, has the advantage of low process cost, and can also improve production efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments:

[0032] Figure 1 is a flow chart of a method for manufacturing RRAM according to an embodiment of the present invention;

[0033] Figure 2A-2E It is a schematic diagram of the structure of the device in each step of the manufacturing method of RRAM according to an embodiment of the present invention. DETAILED DESCRIPTION

[0034] like Figure 1 As shown in FIG. 1 , it is a flow chart of a method for manufacturing RRAM according to an embodiment of the present invention; FIG. 2A to FIG. 2E , which is a schematic diagram of the structure of the device in each step of the manufacturing method of RRAM according to an embodiment of the present invention; the manufacturing method of RRAM according to an embodiment of the present invention comprises the following steps:

[0035] Step 1: Figure 2A As shown, a metal lower electrode material layer 102 is formed on a semiconductor substrate 101 .

[0036] In the embodiment of the present invention, the semiconductor substrate 101 includes a silicon substrate.

[0037] The material of the metal lower electrode material layer 102 is copper. The metal lower electrode material layer 102 is formed by a copper interconnection process. In other embodiments, the material of the metal lower electrode material layer 102 can also be other metals.

[0038] Step 2: Figure 2B As shown, a first material layer 103 is formed on the surface of the metal lower electrode material layer 102, and the material of the first material layer 103 is a nitride of a first metal.

[0039] In the embodiment of the present invention, the material of the first metal is Ta. In other embodiments, the material of the first metal can also be other materials that can be used to form the subsequent bottom barrier layer 1031 and the resistive material layer 1032, that is, the nitride of the first metal can be used as the bottom barrier layer 1031 and the oxide of the first metal can be used as the resistive material layer 1032.

[0040] In the embodiment of the present invention, the first material layer 103 is formed by a physical vapor deposition process.

[0041] Step 3: Figure 2C As shown, the first material layer 103 is annealed and oxidized, and the annealing and oxidation separate the first material layer 103 into an oxidized top layer and an unoxidized bottom layer, and the material of the top layer of the first material layer 103 is converted into the oxide of the first metal; the bottom layer of the first material layer 103 serves as the bottom barrier layer 1031, and the top layer of the first material layer 103 serves as the resistive material layer 1032; utilizing the properties of the annealing and oxidation, the oxygen content of the resistive material layer 1032 has a distribution structure that decreases gradually from top to bottom.

[0042] In an embodiment of the present invention, the thickness of the top layer and the bottom layer is controlled by the annealing oxidation process time; the minimum value of the annealing oxidation process time needs to ensure that an oxide layer of the first metal appears on the surface of the first material layer 103, and the maximum value of the annealing oxidation process time needs to ensure that a nitride layer of the first metal is retained on the bottom surface of the first material layer 103.

[0043] The oxidizing gas for the annealing oxidation includes oxygen and nitrous oxide.

[0044] Step 4: Figure 2D As shown, a metal upper electrode material layer 105 is formed on the top of the resistive material layer 1032 , and the metal lower electrode material layer 102 , the bottom barrier layer 1031 , the resistive material layer 1032 and the metal upper electrode material layer 105 are stacked to form a sandwich structure of RRAM.

[0045] In the embodiment of the present invention, the step of forming the metal upper electrode material layer 105 also includes the step of forming a top barrier layer 104. The top barrier layer 104 is also stacked in the sandwich structure of the RRAM.

[0046] The material of the metal upper electrode material layer 105 includes copper.

[0047] The top barrier layer 104 is made of a nitride of the first metal.

[0048] like Figure 2E As shown, the method further includes patterning the sandwich structure of the RRAM to form a device unit of the RRAM.

[0049] In some embodiments, the sandwich structure of the RRAM is patterned by patterning the sandwich structure of the RRAM. In other embodiments, the metal lower electrode material layer 102 and the metal upper electrode material layer 105 are both formed by a Damascene process, and the RRAM sandwich structure is patterned during the Damascene process of forming the metal lower electrode material layer 102 and the metal upper electrode material layer 105.

[0050] The resistive material layer 1032 of the embodiment of the present invention is formed by annealing and oxidizing the first material layer 103 used to form the bottom barrier layer 1031. The annealing and oxidation process can make the distribution of the oxygen content of the resistive material layer 1032 gradually decrease from the top to the bottom of the resistive material layer 1032, that is, the gradient decreases. Therefore, the embodiment of the present invention can form a resistive material barrier layer with a gradient distribution of oxygen content.

[0051] In addition, since the embodiment of the present invention does not adopt the second method corresponding to the existing method of depositing metal and then oxidizing the metal to form the resistive material layer 1032, but instead adopts the first material layer 103 corresponding to the bottom barrier layer 1031 to anneal and oxidize to form the resistive material layer 1032, the deposition thickness of the first material layer 103 will be greater than the thickness of the directly deposited metal layer corresponding to the second method, thereby avoiding the defect that the annealing and oxidation process is difficult to control when depositing a thin metal layer, making the annealing and oxidation process control of the present invention simple. For example, the range of variation of the annealing and oxidation process time of the embodiment of the present invention can be larger, so the process window is larger. Therefore, the embodiment of the present invention has the advantages of simple process and easy control.

[0052] In addition, since the embodiment of the present invention directly uses the first material layer 103 corresponding to the bottom barrier layer 1031 to anneal and oxidize to form the resistive material layer 1032, that is, the bottom barrier layer 1031 and the resistive material layer 1032 of the embodiment of the present invention are actually formed simultaneously using the same process, the embodiment of the present invention is equivalent to merging the formation process of two layers of material into the formation process of one layer of material. Therefore, the embodiment of the present invention can reduce the process cost, has the advantage of low process cost, and can also improve production efficiency.

[0053] The present invention has been described in detail above through specific embodiments, but these do not constitute limitations of the present invention. Without departing from the principle of the present invention, those skilled in the art may also make many variations and improvements, which should also be considered as the protection scope of the present invention.

Claims

1. A method for manufacturing a RRAM, characterized in that: The steps include: Step 1: forming a metal bottom electrode material layer on a semiconductor substrate; Step 2: forming a first material layer on the surface of the metal lower electrode material layer, wherein the material of the first material layer is a nitride of a first metal; Step 3: performing annealing oxidation on the first material layer, wherein the annealing oxidation separates the first material layer into an oxidized top layer and an unoxidized bottom layer, and the material of the top layer of the first material layer is converted into the oxide of the first metal; the bottom layer of the first material layer serves as a bottom barrier layer, and the top layer of the first material layer serves as a resistive material layer; By utilizing the properties of the annealing oxidation, the oxygen content of the resistive material layer has a distribution structure with a gradient decreasing from top to bottom; Step 4: forming a metal upper electrode material layer on top of the resistive material layer, and forming a sandwich structure of RRAM by stacking the metal lower electrode material layer, the bottom barrier layer, the resistive material layer and the metal upper electrode material layer.

2. The method for manufacturing a RRAM according to claim 1, wherein: In step one, the semiconductor substrate includes a silicon substrate.

3. The method for manufacturing a RRAM according to claim 1, wherein: The material of the metal lower electrode material layer includes copper.

4. The method for manufacturing a RRAM according to claim 3, wherein: The material of the first metal includes Ta.

5. The method for manufacturing a RRAM according to claim 4, wherein: In step three, the thickness of the top layer and the bottom layer is controlled by the annealing and oxidation process time; the minimum value of the annealing and oxidation process time needs to ensure that the oxide layer of the first metal appears on the surface of the first material layer, and the maximum value of the annealing and oxidation process time needs to ensure that the nitride layer of the first metal is retained on the bottom surface of the first material layer.

6. The method for manufacturing a RRAM according to claim 4, wherein: The oxidizing gas for the annealing oxidation includes oxygen and nitrous oxide.

7. The method for manufacturing a RRAM according to claim 4, wherein: In step 4, the step of forming a top barrier layer is also included between forming the metal upper electrode material layer.

8. The method for manufacturing a RRAM according to claim 7, wherein: The material of the metal upper electrode material layer includes copper.

9. The method for manufacturing a RRAM according to claim 8, wherein: The top barrier layer is made of a nitride of a first metal.

10. The method for manufacturing the RRAM according to claim 8, wherein: The method also includes patterning the RRAM sandwich structure to form a device unit of the RRAM.

11. The method for manufacturing a RRAM according to claim 1, wherein: In step 2, the first material layer is formed by a physical vapor deposition process.

12. The method for manufacturing a RRAM according to claim 10, wherein: Patterning the sandwich structure of the RRAM by patterning and etching the sandwich structure of the RRAM; Alternatively, the metal lower electrode material layer and the metal upper electrode material layer are respectively formed by a Damascene process, and the sandwich structure of the RRAM is patterned during the Damascene process of forming the metal lower electrode material layer and the metal upper electrode material layer.

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